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zydis
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276 Commits

Author SHA1 Message Date
Joel Höner 3a38b9ceb5 Revert "Minor interface changes" 
This reverts commit 0ba5c95dac.
 2017-11-02 23:03:21 +01:00
flobernd 0ba5c95dac Minor interface changes 
- Removed `ZydisDecoderEnableMode`
- Added `ZydisDecoderInitEx` with an additional `flags` parameter that can be used to specify a mask of decoder-modes
 2017-11-02 17:03:12 +01:00
flobernd 97a3425e31 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-11-01 23:39:20 +01:00
flobernd 57f7ff8bcd Implemented decoder-modes to support ISA-extensions that conflict with existing instructions 
- Added decoder-modes
 - `ZYDIS_DECODER_MODE_MINIMAL`
 - `ZYDIS_DECODER_MODE_AMD_BRANCHES`
 - `ZYDIS_DECODER_MODE_MPX`
 - `ZYDIS_DECODER_MODE_CET`
 - `ZYDIS_DECODER_MODE_LZCNT`
 - `ZYDIS_DECODER_MODE_TZCNT`
- Removed `ZydisDecoderInitEx` and the possibility to pass a decoder-granularity (use `ZYDIS_DECODER_MODE_MINIMAL` instead)
 2017-11-01 23:39:10 +01:00
Joel Höner 22318a04dd Minor decoder fixes 
- Cosmetic changes
- Check `instruction` argument for `NULL`
 2017-10-27 03:07:33 +02:00
flobernd 5ed561a0fc Fixed `bndldx` and `bndstx` not accepting segment-overrides 2017-10-27 03:02:36 +02:00
flobernd 20b98c4a70 Minor bugfixes 2017-10-26 20:16:37 +02:00
flobernd 566ebf8566 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-10-26 20:11:01 +02:00
flobernd 38df6e0d1e Improved support for MPX instructions 2017-10-26 20:10:51 +02:00
Joel Höner 95338c59bc Added previously forgotten const qualifiers 
- Also, fixed integer comparision warning in `ZydisPerfTest`
 2017-10-24 17:21:09 +02:00
flobernd 4de4def535 Fixed some MVEX instructions 2017-10-20 16:16:57 +02:00
flobernd dd4c793885 Fixed messed-up assert condition 2017-10-19 22:19:20 +02:00
flobernd 668db54b18 Added implicit operands for instructions with stack-operations 
- Implicit SP/ESP/RSP register-operand
- Implicit [SP/ESP/RSP] memory-operand
 2017-10-19 22:11:23 +02:00
flobernd 219200eebe Minor table fixes 2017-10-19 17:36:08 +02:00
flobernd 9871cb414c Minor bugfixes 2017-10-19 15:13:09 +02:00
flobernd 9fc44085d2 Added new ISA-extensions 
- BITALG
- GFNI
- RDPID
- VAES
- VBMI2
- VNNI
- VPCLMULQDQ
 2017-10-19 01:10:25 +02:00
flobernd 750808bea5 Fixed some MVEX instructions 2017-10-17 18:05:17 +02:00
Joel Höner d2c6115f6f Fixed two formatter issues 
- Unintentional fallthrough
- Assertion on 0-length append
 2017-10-17 17:44:19 +02:00
Joel Höner c77c9f2561 Move encoder to `feature/encoder` branch 
- Won’t be ready until v2.1
 2017-10-17 17:30:55 +02:00
flobernd 943993ae4a Changed the way how user-data is passed to custom formatter-callbacks 
* Removed `userData` from the `ZydisDecodedInstruction` struct
* Added `userData` as parameter to all formatter-callbacks
* Added `ZydisFormatterFormatInstructionEx` function with the additional `userData` paramter
* Updated the `FormatterHooks.c` demo
 2017-10-14 18:37:59 +02:00
flobernd a6113c9252 Merge branch 'const_party' of https://github.com/mrexodia/zydis into mrexodia-const_party 2017-10-14 18:16:33 +02:00
flobernd ea3e9b648a Minor refactorings 2017-10-14 18:10:53 +02:00
flobernd e4cc39d195 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-10-14 17:55:29 +02:00
flobernd 2e1bb33731 Minor table fixes 2017-10-14 17:55:18 +02:00
Duncan Ogilvie 1564120c22
Fixed an uninitialized variable in ZydisChangeCase 2017-10-14 13:45:21 +02:00
Duncan Ogilvie d459b39bb7
Convert all functions in ZydisFormatter to take const arguments 2017-10-14 13:39:00 +02:00
Joel Höner 90e4626d11 Replace `to{lower,upper}` with custom func 2017-09-30 01:04:52 +02:00
flobernd 49a8f105b3 Updated instruction database 2017-09-26 21:05:50 +02:00
flobernd ded9d0e513 Minor refactorings 
- `ZydisUtilsCalcAbsoluteTargetAddress` is now called `ZydisCalcAbsoluteAddress`
- `ZydisCalcAbsoluteAddress` does now handle `MEM` operands with absolute displacement values
 2017-09-25 17:59:14 +02:00
flobernd 10a9765585 Minor improvements to the performance-test tool 2017-09-25 17:06:14 +02:00
flobernd 505224dc20 Further improvements to address-formatting 2017-09-25 16:18:01 +02:00
flobernd 3223a4d63f Fixed formatting of "moff"-displacements 2017-09-25 04:10:11 +02:00
flobernd ac16314f48 `InstructionEncodings.inc` is now generated with deterministic output 2017-09-25 02:05:53 +02:00
flobernd 10790b449f Changed immediate-operand of `aad` and `aam` from signed to unsigned 2017-09-24 22:31:17 +02:00
flobernd 04ae18bef2 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-09-23 19:46:37 +02:00
flobernd 2145c399b5 Formatter does now print the `far` modifier for the respective instructions 2017-09-23 19:46:27 +02:00
flobernd 6315e29aa5 Added `ZYDIS_ATTRIB_IS_FAR_BRANCH` attribute for far JMP/CALL/RET instructions 2017-09-23 18:26:48 +02:00
Joel Höner 994f8efa43 Added `_MAX_VALUE` marker value to all enums 2017-09-21 23:50:44 +02:00
flobernd 9222f80b97 Fixed formatting of signed 8-bit immediate operands (again) 
- Renamed `operandSize` to `operandWidth`
- The `operandWidth` field is now set to 8-bit, if the instruction performs a byte-operation
 2017-09-21 22:16:37 +02:00
flobernd e6399bbb27 Reverted last change 
Need to find a clean solution that works in all possible cases
 2017-09-21 19:40:47 +02:00
flobernd c91fe2cc4b Fixed formatting of signed 8-bit immediate operands 2017-09-21 18:20:48 +02:00
flobernd c62cd21c89 Fixed formatting of signed 32-bit immediate operands 2017-09-21 16:53:23 +02:00
flobernd 66972e43b4 Minor refactorings 2017-09-20 15:46:51 +02:00
flobernd 92cfcdac00 Minor performance improvements to the `ZydisPrintHexU` function 2017-09-16 17:37:14 +02:00
flobernd 606214c5a7 Fixed decoding of 16-bit displacements 2017-09-14 22:21:11 +02:00
flobernd 867b6bc109 Fixed an issue where instructions with more than 15-bytes did not get rejected correctly 
fixes #17
 2017-09-14 19:05:13 +02:00
flobernd f230688af4 Fixed `ZydisISAExt` enum 2017-09-14 17:54:22 +02:00
flobernd 1b56dfc49a Fixed `NOP` instruction with `66` prefix 2017-09-14 04:01:57 +02:00
flobernd 9fe5d66380 Simplified custom print-functions and fixed some bugs 2017-09-14 02:59:20 +02:00
flobernd 41e943c34c Removed outdated assertion 2017-09-14 01:08:37 +02:00
flobernd 01dca38516 Significantly improved formatter performance 
- Exchanged `vsnprintf` by custom print functions
 2017-09-14 00:59:23 +02:00
flobernd 30f15afe0a Minor refactorings and bug-fixes 2017-09-14 00:56:01 +02:00
flobernd 71be8a1bc2 Removed `Strings` suffix from generated enum files 2017-09-10 21:48:16 +02:00
flobernd 01b8267d47 Minor refactorings 
- Adjusted datatype of some enums
- Renamed some things
  - `ZydisDecodedInstruction.flags` -> `ZydisDecodedInstruction.accessedFlags`
  - `ZydisDecodedInstruction.meta.roundingMode` -> `ZydisDecodedInstruction.meta.rounding.mode`
  - `ZydisDecodedInstruction.meta.swizzleMode` -> `ZydisDecodedInstruction.meta.swizzle.mode`
  - `ZydisDecodedInstruction.meta.conversionMode` -> `ZydisDecodedInstruction.meta.conversion.mode`
  - `ZydisGetCPUFlagsByAction` -> `ZydisGetAccessedFlagsByAction`
 2017-09-10 21:43:52 +02:00
flobernd 5d6c58ad1c Fixed `ZydisISAExt` enum 2017-09-10 20:43:01 +02:00
flobernd fec4116ad6 Minor refactorings and bugfixes 
- Added the `ZYDIS_ATTRIB_HAS_MVEX` attribute
- Updated attribute macro values
- Changed size of `ZydisDecodeGranularity` from 32-bit to 8-bit
 2017-09-09 14:16:54 +02:00
flobernd 5914abc0be Tables fixes and more meta-info 
- Added exception-class meta-info
- Added CMake option for shared-libraries
- Fixed some instruction-definitions
- Updated VersionInfo.rc
 2017-09-06 17:05:05 +02:00
flobernd fafa93d40b Internal refactorings and new meta-info 
- Imported meta-info from Intel XED
- Added instruction-category meta-info to the `ZydisDecodedInstruction` struct
- Added isa-set meta-info to the `ZydisDecodedInstruction` struct
- Added isa-extension meta-info to the `ZydisDecodedInstruction` struct
 2017-09-05 17:35:23 +02:00
flobernd 14d87fda8b Fixed wrong return value of `ZydisFormatterSetHook` 2017-08-23 20:40:57 +02:00
flobernd f89398877d Merge branch 'master' into develop 2017-08-15 14:33:07 +02:00
flobernd 74484aec2e Removed trailing whitespace after mnemonic for instructions without visible operands 2017-08-14 17:10:24 +02:00
Joel Höner c0fd657f15 Merged internal encoder AVX/REX structs 
- It was pretty redundant before
  - Required unnecessary routing logic
  - Minor decrease of required stack memory
- Added `ZydisEmitMVEX` and generally more MVEX support
 2017-08-03 02:04:39 +02:00
Joel Höner 9437e89006 More encoder progress 2017-08-03 01:25:25 +02:00
Joel Höner 87394ef4da Added basic support for Windows kernel drivers 
- Manual typedefs for fixed width int types
- Custom `vsnprintf` function
- Disable ZYDIS_ASSERT and ZYDIS_UNREACHABLE
 2017-07-28 22:25:20 +02:00
Joel Höner 5ac595eb72 Major rework of encoder context design 
- Split into various smaller structs
- Only hand functions parts they actually need
 2017-07-28 03:13:30 +02:00
Joel Höner 9152714865 Fixed encoder IMM size derivation 2017-07-28 02:26:52 +02:00
Joel Höner 4140db6c1f Encoder progress, ZYDIS_UNREACHABLE for MSVC 2017-07-28 00:37:52 +02:00
flobernd 03ef968413 `REX.R` and `REX.B` is ignored for non-GPR/VR/CR/DR registers 2017-07-26 18:17:59 +02:00
flobernd cde97dca36 Fixed a bug that caused the formatter to falsely print a `{sae}` decorator in some cases 2017-07-25 14:58:17 +02:00
flobernd 7434bea839 Fixed some `EVEX` instruction-definitions 
- A bug in the table generator caused inverted conditions regarding zero-mask support for some `EVEX` instructions
 2017-07-25 14:30:32 +02:00
flobernd 341f3866c3 Various changes to the instruction-definitions and decoder/encoder-tables 2017-07-19 18:43:59 +02:00
flobernd e76c3d64c3 Added missing instructions to the encoder-table 2017-07-18 22:38:56 +02:00
flobernd 54d3836256 Minor improvements to the instruction-formatter 2017-07-15 03:39:48 +02:00
flobernd 9e15ecc5f1 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-07-14 22:56:06 +02:00
flobernd 53e89b0800 Replaced `EVEX.z` filter by `acceptsZeroMask` attribute 2017-07-14 22:54:22 +02:00
Joel Höner 58fffa4e71 Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop 2017-07-12 23:57:25 +02:00
Joel Höner ebd1e18d0f More work in the operand encoding derivation logic 2017-07-12 23:57:20 +02:00
flobernd 59fa404919 Added detailed information about accessed CPU-flags 2017-07-12 17:48:02 +02:00
flobernd 13a2858210 Added hidden R/E/FLAGS register operands 2017-07-12 15:44:47 +02:00
flobernd 682c647eb6 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-07-11 22:22:33 +02:00
flobernd bb1708daaf Preparations for the CPU-flag info feature 2017-07-11 18:51:54 +02:00
Joel Höner 743048852c More encoder progress 2017-07-10 23:43:52 +02:00
Joel Höner 3498a33944 More clean-up in the encoder 2017-07-10 14:34:25 +02:00
flobernd 8fa80f0b86 Minor bugfixes and improvement of the encoder-table 
- Fixed scale-factor of memory operands, if SIB byte is used
- Fixed operand-encoding missing for some operands
- Added operand-size and address-size filters to the encoder-table
 2017-07-09 18:06:43 +02:00
flobernd 5c07598a2d Improved encoder-table 2017-07-06 21:49:38 +02:00
Joel Höner 6bd79283e0 Fixed encoder header 2017-07-06 13:12:43 +02:00
Joel Höner 610d08960b Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop 
# Conflicts:
#	CMakeLists.txt
 2017-07-06 08:17:38 +02:00
Joel Höner 41776bac29 Updated encoder to a lot of previous refactorings 2017-07-06 08:07:22 +02:00
flobernd df2dbd9109 Refactorings 
- Renamed Types.h to CommonTypes.h
- Splitted DecoderTypes.h into SharedTypes.h and DecoderTypes.h
- Splitted InstructionTable.h into SharedData.h and DecoderData.h
- Implemented `ZydisGetEncodableInstructions` in EncoderData.h
- Some internal changes to the data-tables
 2017-07-06 00:34:36 +02:00
flobernd f8f928a4a8 Added number of decoded instructions to the performance-test tool output 2017-07-05 16:28:16 +02:00
flobernd 428da82416 Added `ZYDIS_ATTRIB_IS_PRIVILEGED` 2017-07-05 13:47:54 +02:00
flobernd 34a0572948 Refactorings 2017-07-05 13:33:59 +02:00
flobernd 8a626388ae Improved formatting of decorators 2017-07-04 19:02:11 +02:00
flobernd af0c6c8cac Removed EVEX/MVEX compressed 8-bit displacement scale-factor from the public interface (for now) 2017-07-04 16:26:03 +02:00
flobernd b9cf56af4d Refactorings 2017-07-04 16:10:21 +02:00
flobernd bbf8b1193b Added performance test 2017-07-03 21:10:04 +02:00
flobernd 87c9155207 Refactorings 2017-07-03 17:36:03 +02:00
flobernd 6ce34bd141 Added error-condition for illegal LOCK-prefixes 2017-07-03 17:02:32 +02:00
Joel Höner 7ba6ea0596 Moved private headers to `src` directory 2017-07-03 04:16:38 +02:00
flobernd 38c67d2a85 Refactorings 2017-07-03 03:14:01 +02:00