mirror of https://github.com/x64dbg/zydis
Minor bugfixes and improvement of the encoder-table
- Fixed scale-factor of memory operands, if SIB byte is used - Fixed operand-encoding missing for some operands - Added operand-size and address-size filters to the encoder-table
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@ -223,7 +223,7 @@ int main()
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// vcmppd xmm1, xmm2, xmm3, 0x17
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0xC5, 0xE9, 0xC2, 0xCB, 0x17,
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// vcmpps k2 {k7}, zmm2, zmmword ptr ds:[rax + rbx*4 + 0x100] {1to16}, 0x0F
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// vcmpps k2 {k7}, zmm2, dword ptr ds:[rax + rbx*4 + 0x100] {1to16}, 0x0F
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0x62, 0xF1, 0x6C, 0x5F, 0xC2, 0x54, 0x98, 0x40, 0x0F
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};
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@ -234,7 +234,6 @@ int main()
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puts("");
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disassembleBuffer(&decoder, &data[0], sizeof(data), ZYDIS_TRUE);
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getchar();
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return 0;
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}
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@ -303,7 +303,7 @@ enum ZydisOperandActions
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/**
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* @brief The operand is written and conditionally read by the instruction (must write).
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*/
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ZYDIS_OPERAND_ACTION_CONDREAD_WRITE,
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ZYDIS_OPERAND_ACTION_CONDREAD_WRITE
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};
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/* ---------------------------------------------------------------------------------------------- */
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@ -1415,7 +1415,7 @@ static ZydisStatus ZydisDecodeOperandMemory(ZydisDecoderContext* context,
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ZydisCalcRegisterId(context, instruction,
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vidxRegisterClass ? ZYDIS_REG_ENCODING_VIDX : ZYDIS_REG_ENCODING_INDEX,
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vidxRegisterClass ? vidxRegisterClass : ZYDIS_REGCLASS_GPR32));
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operand->mem.scale = (1 << instruction->raw.sib.scale) & ~1;
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operand->mem.scale = (1 << instruction->raw.sib.scale);
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if (operand->mem.index == ZYDIS_REGISTER_ESP)
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{
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operand->mem.index = ZYDIS_REGISTER_NONE;
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@ -1472,7 +1472,7 @@ static ZydisStatus ZydisDecodeOperandMemory(ZydisDecoderContext* context,
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ZydisCalcRegisterId(context, instruction,
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vidxRegisterClass ? ZYDIS_REG_ENCODING_VIDX : ZYDIS_REG_ENCODING_INDEX,
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vidxRegisterClass ? vidxRegisterClass : ZYDIS_REGCLASS_GPR64));
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operand->mem.scale = (1 << instruction->raw.sib.scale) & ~1;
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operand->mem.scale = (1 << instruction->raw.sib.scale);;
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if (operand->mem.index == ZYDIS_REGISTER_RSP)
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{
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operand->mem.index = ZYDIS_REGISTER_NONE;
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@ -1731,6 +1731,8 @@ static ZydisStatus ZydisDecodeOperands(ZydisDecoderContext* context,
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goto FinalizeOperand;
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}
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instruction->operands[i].encoding = operand->op.encoding;
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// Register operands
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ZydisRegisterClass registerClass = ZYDIS_REGCLASS_INVALID;
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switch (operand->type)
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@ -1797,7 +1799,6 @@ static ZydisStatus ZydisDecodeOperands(ZydisDecoderContext* context,
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}
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if (registerClass)
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{
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instruction->operands[i].encoding = operand->op.encoding;
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switch (operand->op.encoding)
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{
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case ZYDIS_OPERAND_ENCODING_MODRM_REG:
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@ -61,6 +61,8 @@ typedef struct ZydisEncodableInstruction_
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uint8_t opcode ZYDIS_BITFIELD( 8);
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ZydisOpcodeMap opcodeMap ZYDIS_BITFIELD( 3);
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uint8_t mode ZYDIS_BITFIELD( 3);
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uint8_t operandSize ZYDIS_BITFIELD( 3);
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uint8_t addressSize ZYDIS_BITFIELD( 3);
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uint8_t modrmMod ZYDIS_BITFIELD( 4);
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ZydisBool forceModrmReg ZYDIS_BITFIELD( 1);
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uint8_t modrmReg ZYDIS_BITFIELD( 8);
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