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zydis
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Commit Graph

  • 01b8267d47 Minor refactorings flobernd 2017-09-10 21:43:52 +0200
  • 5d6c58ad1c Fixed `ZydisISAExt` enum flobernd 2017-09-10 20:43:01 +0200
  • fec4116ad6 Minor refactorings and bugfixes flobernd 2017-09-09 14:16:54 +0200
  • 5914abc0be Tables fixes and more meta-info flobernd 2017-09-06 17:05:05 +0200
  • fafa93d40b Internal refactorings and new meta-info flobernd 2017-09-05 17:35:23 +0200
  • 14d87fda8b Fixed wrong return value of `ZydisFormatterSetHook` flobernd 2017-08-23 20:40:57 +0200
  • 4a79d5762e Updated README.md Joel Höner 2017-08-18 13:34:00 +0200
  • f89398877d Merge branch 'master' into develop flobernd 2017-08-15 14:33:07 +0200
  • 74484aec2e Removed trailing whitespace after mnemonic for instructions without visible operands flobernd 2017-08-14 17:10:24 +0200
  • 705f0ed5cd Minor changes to the performance test tool flobernd 2017-08-12 04:33:02 +0200
  • a525342b42 Fixed README flobernd 2017-08-09 17:25:45 +0200
  • c0fd657f15 Merged internal encoder AVX/REX structs Joel Höner 2017-08-03 02:04:39 +0200
  • 9437e89006 More encoder progress Joel Höner 2017-08-02 23:05:30 +0200
  • 87394ef4da Added basic support for Windows kernel drivers Joel Höner 2017-07-28 22:25:20 +0200
  • 5ac595eb72 Major rework of encoder context design Joel Höner 2017-07-28 03:13:30 +0200
  • 9152714865 Fixed encoder IMM size derivation Joel Höner 2017-07-28 02:26:52 +0200
  • 4140db6c1f Encoder progress, ZYDIS_UNREACHABLE for MSVC Joel Höner 2017-07-28 00:37:52 +0200
  • 03ef968413 `REX.R` and `REX.B` is ignored for non-GPR/VR/CR/DR registers flobernd 2017-07-26 18:17:59 +0200
  • 27fbb7a7e2 Merge branch 'develop' Joel Höner 2017-07-25 15:09:43 +0200
  • dc590bc4b4 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop flobernd 2017-07-25 15:09:13 +0200
  • cde97dca36 Fixed a bug that caused the formatter to falsely print a `{sae}` decorator in some cases flobernd 2017-07-25 14:58:17 +0200
  • 7434bea839 Fixed some `EVEX` instruction-definitions flobernd 2017-07-25 14:30:32 +0200
  • faea901984 Moved Doxyfile to root Joel Höner 2017-07-25 01:09:33 +0200
  • 65091811d2 Added Doxyfile Joel Höner 2017-07-25 01:04:25 +0200
  • 7033929e63 Added github-linguist language override Joel Höner 2017-07-24 22:49:30 +0200
  • 31ff04e0dd Moved `Compilation` README section Joel Höner 2017-07-24 22:46:28 +0200
  • a50b9cd83c Updated README.md Joel Höner 2017-07-24 22:41:08 +0200
  • 6de4794814 Added ZydisInfo screenshot Joel Höner 2017-07-24 22:35:58 +0200
  • 39369269e8 Fixed formatting bug in ZydisInfo tool flobernd 2017-07-24 22:03:41 +0200
  • 821d9da338 Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop Joel Höner 2017-07-24 22:00:14 +0200
  • df6b0cb628 Moved ZydisFuzzIn and ZydisPerfTest to examples Joel Höner 2017-07-24 21:59:54 +0200
  • 862330b19c Updated README file flobernd 2017-07-24 21:40:59 +0200
  • 61f7a188a3 Removed old instruction-editor flobernd 2017-07-24 21:37:58 +0200
  • 341f3866c3 Various changes to the instruction-definitions and decoder/encoder-tables flobernd 2017-07-19 18:43:59 +0200
  • d7a49370fe Minor bugfixes flobernd 2017-07-19 16:56:12 +0200
  • e76c3d64c3 Added missing instructions to the encoder-table flobernd 2017-07-18 22:38:56 +0200
  • fa4e683b01 Minor bugfixes flobernd 2017-07-18 20:02:32 +0200
  • 54d3836256 Minor improvements to the instruction-formatter flobernd 2017-07-15 03:39:48 +0200
  • 2be83199d5 Further improvements to the `ZydisInfo` tool flobernd 2017-07-15 03:36:11 +0200
  • 9e15ecc5f1 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop flobernd 2017-07-14 22:56:06 +0200
  • 18eaba7cdd Improved `ZydisInfo` tool flobernd 2017-07-14 22:55:32 +0200
  • 53e89b0800 Replaced `EVEX.z` filter by `acceptsZeroMask` attribute flobernd 2017-07-14 22:54:22 +0200
  • 58fffa4e71 Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop Joel Höner 2017-07-12 23:57:25 +0200
  • ebd1e18d0f More work in the operand encoding derivation logic Joel Höner 2017-07-12 23:57:20 +0200
  • 5bdc173649 Added a tool that prints instruction details flobernd 2017-07-12 19:54:42 +0200
  • 59fa404919 Added detailed information about accessed CPU-flags flobernd 2017-07-12 17:48:02 +0200
  • 13a2858210 Added hidden R/E/FLAGS register operands flobernd 2017-07-12 15:44:47 +0200
  • 682c647eb6 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop flobernd 2017-07-11 22:22:33 +0200
  • bb1708daaf Preparations for the CPU-flag info feature flobernd 2017-07-11 18:51:54 +0200
  • 743048852c More encoder progress Joel Höner 2017-07-10 23:43:52 +0200
  • 3498a33944 More clean-up in the encoder Joel Höner 2017-07-10 14:34:25 +0200
  • 8fa80f0b86 Minor bugfixes and improvement of the encoder-table flobernd 2017-07-09 18:06:43 +0200
  • 5c07598a2d Improved encoder-table flobernd 2017-07-06 21:49:38 +0200
  • 6bd79283e0 Fixed encoder header Joel Höner 2017-07-06 13:12:43 +0200
  • 57059d4e0d Added feature switch for decoder Joel Höner 2017-07-06 09:52:14 +0200
  • 610d08960b Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop Joel Höner 2017-07-06 08:17:38 +0200
  • 41776bac29 Updated encoder to a lot of previous refactorings Joel Höner 2017-07-06 08:07:22 +0200
  • 26a971f624 Added timing code for macOS (PerfTest) Joel Höner 2017-07-06 08:04:35 +0200
  • df2dbd9109 Refactorings flobernd 2017-07-06 00:34:36 +0200
  • f8f928a4a8 Added number of decoded instructions to the performance-test tool output flobernd 2017-07-05 16:28:16 +0200
  • 428da82416 Added `ZYDIS_ATTRIB_IS_PRIVILEGED` flobernd 2017-07-05 13:47:54 +0200
  • 34a0572948 Refactorings flobernd 2017-07-05 13:33:59 +0200
  • f73539ede1 Added Gitter badge Florian Bernd 2017-07-04 19:06:19 +0200
  • 8a626388ae Improved formatting of decorators flobernd 2017-07-04 19:02:11 +0200
  • 9f735b0f51 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop flobernd 2017-07-04 18:36:06 +0200
  • af0c6c8cac Removed EVEX/MVEX compressed 8-bit displacement scale-factor from the public interface (for now) flobernd 2017-07-04 16:26:03 +0200
  • df9100fbd4 Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop Joel Höner 2017-07-04 16:23:07 +0200
  • a4355f4a96 Updated license Joel Höner 2017-07-04 16:22:51 +0200
  • 447e89820a Fixed performance-test tool flobernd 2017-07-04 16:13:37 +0200
  • b9cf56af4d Refactorings flobernd 2017-07-04 16:10:21 +0200
  • bbf8b1193b Added performance test flobernd 2017-07-03 21:10:04 +0200
  • 87c9155207 Refactorings flobernd 2017-07-03 17:36:03 +0200
  • 6ce34bd141 Added error-condition for illegal LOCK-prefixes flobernd 2017-07-03 17:02:32 +0200
  • 7ba6ea0596 Moved private headers to `src` directory Joel Höner 2017-07-03 04:16:38 +0200
  • d12059e043 Fixed examples and tools flobernd 2017-07-03 03:58:25 +0200
  • 66fe376f36 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop flobernd 2017-07-03 03:38:13 +0200
  • 2eb915a90e Fixed project structure in VS Joel Höner 2017-07-03 03:37:38 +0200
  • 8e36baa98b Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop flobernd 2017-07-03 03:24:40 +0200
  • 449176b140 Added basic install rules to CMakeLists Joel Höner 2017-07-03 03:21:24 +0200
  • 38c67d2a85 Refactorings flobernd 2017-07-03 03:14:01 +0200
  • a0f54a45c3 Modernized CMakeLists Joel Höner 2017-07-02 08:40:41 +0200
  • ad8e5ce6a9 Minor refactorings flobernd 2017-07-01 01:10:03 +0200
  • 392c36c85f Fixed decoding of MASK register (again) flobernd 2017-06-29 21:12:22 +0200
  • c2a531902c Fixed decoding of MASK register flobernd 2017-06-29 21:07:08 +0200
  • 1fe1894362 Minor bugfixes flobernd 2017-06-29 20:54:36 +0200
  • aca1ad1414 Minor bugfixes flobernd 2017-06-29 20:52:35 +0200
  • d7c81e5104 Fixed operand-size of some special MVEX instructions flobernd 2017-06-29 20:40:48 +0200
  • 2ee8332529 Fixed operand-action for MVEX-instructions with `READWRITE` operands flobernd 2017-06-29 20:06:44 +0200
  • 8ef597970d Minor bugfixes flobernd 2017-06-29 19:44:01 +0200
  • 65fe4a4e6c Improved instruction decoding flobernd 2017-06-29 18:09:42 +0200
  • 73b02f6d12 Updated some instruction-definitions to allow segment-overrides for implicit-memory operands flobernd 2017-06-28 22:42:39 +0200
  • 778b47c02f Minor bugfixes flobernd 2017-06-28 22:18:12 +0200
  • 05817fa8e7 Fixed register decoding for XOP and VEX instructions (again) flobernd 2017-06-28 20:50:32 +0200
  • 808ccac372 Fixed register decoding for XOP and VEX instructions flobernd 2017-06-28 20:46:32 +0200
  • b118637dae Cleaned up register-decoding code flobernd 2017-06-28 19:50:33 +0200
  • 55400e9206 Improved decoding of XOP/VEX/EVEX/MVEX instructions flobernd 2017-06-27 04:14:17 +0200
  • e7a7be70e9 Performance optimizations flobernd 2017-06-27 03:32:42 +0200
  • 920d62d699 Fixed operand-action for EVEX/MVEX instructions with write-mask (again) flobernd 2017-06-26 03:20:26 +0200
  • a1551af657 Fixed decoding of operands with VSIB index-register flobernd 2017-06-26 03:12:18 +0200
  • 99de0f3152 Fixed operand-action for EVEX/MVEX instructions with write-mask (again) flobernd 2017-06-26 00:54:49 +0200