flobernd
4487d1b252
Fixed some operand-size related filter-tables
2017-06-20 01:33:07 +02:00
flobernd
0902068007
Fixed more EVEX tuple-types
2017-06-19 21:06:33 +02:00
flobernd
ee97ae753c
Fixed some EVEX tuple-types
2017-06-19 20:46:42 +02:00
flobernd
4bceac86c9
Various bugfixes
...
- Fixed operand-size and element-count of AGEN operands
- Fixed decoding of 8-bit modrm.rm register-operands
- Fixed vector-length for EVEX instructions with rounding-semantics
2017-06-19 20:19:21 +02:00
flobernd
2d2e1acf27
Added T1_4X tuple-type
2017-06-18 22:02:59 +02:00
flobernd
f20dc484cd
Fixed priority of mandatory-prefixes
2017-06-17 21:01:57 +02:00
flobernd
58b15163f2
Improved decoding of PTR and AGEN operands
2017-06-17 02:50:08 +02:00
flobernd
6794495f63
Various bugfixes
...
- Fixed decoding of XOP/VEX instructions with 256-bit vector length
- Fixed decoding of instructions with hardcoded displacement values (e.g. MOFFS)
- Fixed decoding of instructions that make use of the "ANY" mandatory-prefix filter
2017-06-17 00:59:42 +02:00
flobernd
1d023c2997
Implemented decoding of PTR and AGEN operands
2017-06-17 00:20:44 +02:00
flobernd
28a8178559
Fixed compatibility problem
2017-06-16 23:38:06 +02:00
flobernd
ad35e81eee
Added semantic element-information for operands
2017-06-16 23:19:57 +02:00
flobernd
44792f2338
Added semantic decoding of implicit memory operands
2017-06-16 16:27:37 +02:00
flobernd
1db4db9ec2
Added semantic decoding of implicit register operands
2017-06-16 03:25:39 +02:00
flobernd
6caa68b674
Reimplemented decoding of 3DNOW instructions and improved EVEX decoding
2017-06-13 22:04:29 +02:00
flobernd
702f6b8d53
Reimplemented a basic version of semantic operand-decoding
2017-06-13 20:17:20 +02:00
flobernd
26d39cc7f0
Fixed XOP decoding
2017-06-12 21:07:43 +02:00
flobernd
8740b1e50f
Major changes to the instruction decoder
...
- Decoupled semantic operand decoding (optional) from physical instruction decoding
- Several optimizations of the internal structures
- Further preparations for MVEX-support
2017-06-12 19:16:01 +02:00
flobernd
e5e5899f72
Preparations for MVEX-support and decoupling of operand-decoding
2017-05-08 18:18:08 +02:00
Joel Höner
d3192a8be7
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-05-05 19:26:13 +02:00
Joel Höner
de666d7a4a
Improved handling of unreachable code
2017-05-05 19:26:03 +02:00
flobernd
baa1bc243a
Fixed decoding of VEX/EVEX instructions with high-register-specifiers
2017-04-25 17:46:02 +02:00
Joel Höner
40d6c39dbe
Renamed disassembler mode constants
...
ZYDIS_DISASSEMBLER_MODE_* -> ZYDIS_OPERATING_MODE_*
2017-04-12 21:12:18 +02:00
flobernd
71a6d786d7
Minor bugfixes and cosmetical changes
2017-04-12 21:00:46 +02:00
Joel Höner
ebf71d632f
Moved `internal` sub-struct from info to context
...
Also, fixed examples and tools.
2017-04-11 03:18:08 +02:00
Joel Höner
71a551ef1a
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-04-11 02:20:02 +02:00
Joel Höner
c9606c389d
Removed obsolete public decoder struct
2017-04-11 02:19:53 +02:00
flobernd
8dd599555f
Further improvements on #13
2017-04-09 23:11:16 +02:00
flobernd
839729bfb2
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-04-09 22:57:30 +02:00
flobernd
b4f2d3bc62
CMake bugfix and cosmetical changes to the README file
2017-04-09 22:54:53 +02:00
Joel Höner
e825b6ed78
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-04-09 20:56:08 +02:00
Joel Höner
3b47ed4a9a
Fixed inaccurate relative operands on decoding
...
Resolves #13
2017-04-09 20:55:49 +02:00
Joel Höner
70cb75eec7
Merge pull request #12 from mrexodia/patch-1
...
changes AccessMode to Action in frmMain
2017-04-08 21:03:32 +02:00
Duncan Ogilvie
ae5a900591
changes AccessMode to Action in frmMain
...
This fixes a compile error because TOperandAccessMode was refactored to TOperandAction.
2017-04-08 20:33:58 +02:00
Joel Höner
0376376b83
Temp. disabled encoder, updated CMake defaults
2017-04-08 19:36:43 +02:00
Joel Höner
fda4f15c6d
Many encoder bug-fixes, movabs support
2017-01-23 21:52:26 +01:00
Joel Höner
616cd00ec8
Encoder support for rIP relative addressing
2017-01-23 19:21:15 +01:00
Joel Höner
0862398940
Various encoder bug-fixes
2017-01-23 18:31:50 +01:00
Joel Höner
781b9641c4
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-01-23 01:37:45 +01:00
flobernd
8157b9fa42
Temporary change to expose the semantic operand-type
2017-01-23 01:17:15 +01:00
Joel Höner
4fe029a34e
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-01-22 22:12:24 +01:00
Joel Höner
eb64a23231
Added encoding of opcode bits into ModRM
2017-01-22 22:12:06 +01:00
flobernd
deff3b8e55
Fixed register encoding
2017-01-22 21:44:42 +01:00
Joel Höner
1faec66a66
Fixed mandatory prefixes, added prefix compatibility checks
2017-01-22 19:02:07 +01:00
Joel Höner
cb98db80ea
Minor encoder cleanup
2017-01-22 17:38:14 +01:00
Joel Höner
587187af89
Implemented address size prefix encoding, bugfixes
2017-01-22 15:46:20 +01:00
Joel Höner
b3c8d44bda
Implemented segment prefix encoding, refactoring
...
- Moved memory operand encoding into dedicated function
2017-01-21 23:53:50 +01:00
Joel Höner
87e80346f4
Fixed tools
2017-01-21 18:15:37 +01:00
Joel Höner
03e26408fe
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-01-21 01:48:35 +01:00
Joel Höner
0a50bb9daa
Implemented encoding for XOP, VEX and EVEX
2017-01-20 21:18:13 +01:00
Joel Höner
46077709f8
Completed SIB encoding
2017-01-20 00:54:48 +01:00