mirror of https://github.com/x64dbg/zydis
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
This commit is contained in:
commit
71a551ef1a
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@ -25,7 +25,7 @@ option(ZYDIS_BUILD_TOOLS "Build tools" ON)
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if (NOT CONFIGURED_ONCE)
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if ("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU" OR
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"${CMAKE_C_COMPILER_ID}" STREQUAL "Clang" OR
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"${CMAKE_CXX_COMPILER_ID}" STREQUAL "AppleClang")
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"${CMAKE_C_COMPILER_ID}" STREQUAL "AppleClang")
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set(compiler_specific "-std=c99 -pedantic -Wextra -Werror")
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elseif (MSVC)
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set(compiler_specific "/WX /W4 /TC")
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20
README.md
20
README.md
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@ -1,5 +1,5 @@
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Zyan Disassembler Engine (Zydis)
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================================
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# Zyan Disassembler Engine (Zydis)
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[![License: MIT](https://img.shields.io/badge/License-MIT-blue.svg)](https://opensource.org/licenses/MIT)
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Fast and lightweight x86/x86-64 disassembler library.
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@ -7,17 +7,17 @@ Fast and lightweight x86/x86-64 disassembler library.
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- Supports all x86 and x86-64 (AMD64) general-purpose and system instructions.
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- Supported ISA extensions:
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- FPU (x87), MMX
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- SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, AESNI
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- AVX, AVX2, AVX512BW, AVX512CD, AVX512DQ, AVX512ER, AVX512F, AVX512PF, AVX512VL
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- ADX, BMI1, BMI2, FMA, FMA4
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- ..
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- FPU (x87), MMX
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- SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, AESNI
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- AVX, AVX2, AVX512BW, AVX512CD, AVX512DQ, AVX512ER, AVX512F, AVX512PF, AVX512VL
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- ADX, BMI1, BMI2, FMA, FMA4
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- ..
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- Optimized for high performance
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- No dynamic memory allocation
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- Perfect for kernel-mode drivers and embedded devices
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- Perfect for kernel-mode drivers and embedded devices
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- Very small file-size overhead compared to other common disassembler libraries
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- Language bindings
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- C++, Delphi, Python, ..
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- C++, Delphi, Python, ..
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- Complete doxygen documentation
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## Quick Example ##
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@ -86,4 +86,4 @@ Zydis builds cleanly on most platforms without any external dependencies. You ca
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## License ##
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Zyan Disassembler Engine is licensed under the MIT License. Dependencies are under their respective licenses.
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Zyan Disassembler Engine is licensed under the MIT License. Dependencies are under their respective licenses.
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@ -357,7 +357,8 @@ typedef struct ZydisOperandInfo_
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*/
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ZydisBool isSigned;
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/**
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* @brief Signals, if the immediate value contains a relative offset.
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* @brief Signals, if the immediate value contains a relative offset. You can use
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* @c ZydisUtilsCalcAbsoluteTargetAddress to determine the absolute address value.
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*/
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ZydisBool isRelative;
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/**
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@ -2433,16 +2433,6 @@ ZydisStatus ZydisDecodeEx(ZydisOperatingMode operatingMode,
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}
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}
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// For relative operands, apply instruction length offset.
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for (size_t i = 0; i < info->operandCount; ++i)
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{
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if (info->operands[i].type == ZYDIS_OPERAND_TYPE_IMMEDIATE &&
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info->operands[i].imm.isRelative)
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{
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info->operands[i].imm.value.sqword += info->length;
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}
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}
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// Replace XCHG rAX, rAX with NOP alias
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if (info->mnemonic == ZYDIS_MNEMONIC_XCHG)
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{
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@ -51,19 +51,21 @@ ZydisStatus ZydisUtilsCalcAbsoluteTargetAddress(const ZydisInstructionInfo* info
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}
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if (operand->mem.base == ZYDIS_REGISTER_EIP)
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{
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*address = (uint64_t)((uint32_t)info->instrPointer + operand->mem.disp.value.sdword);
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*address = (uint64_t)((uint32_t)info->instrPointer + operand->mem.disp.value.sdword);
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return ZYDIS_STATUS_SUCCESS;
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}
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if (operand->mem.base == ZYDIS_REGISTER_RIP)
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{
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*address = (uint64_t)(info->instrPointer + operand->mem.disp.value.sqword);
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*address =
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(uint64_t)(info->instrPointer + operand->mem.disp.value.sqword);
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return ZYDIS_STATUS_SUCCESS;
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}
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break;
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case ZYDIS_OPERAND_TYPE_IMMEDIATE:
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if (operand->imm.isSigned && operand->imm.isRelative)
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{
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*address = (uint64_t)((int64_t)info->instrPointer + operand->imm.value.sqword);
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*address =
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(uint64_t)((int64_t)info->instrPointer + info->length + operand->imm.value.sqword);
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switch (info->mode)
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{
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case ZYDIS_DISASSEMBLER_MODE_16BIT:
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