flobernd
2e979ec737
Improved support for ICC
2017-09-15 01:45:01 +02:00
Joel Höner
891942533d
Fixed GCC release build
2017-09-15 00:40:14 +02:00
flobernd
f230688af4
Fixed `ZydisISAExt` enum
2017-09-14 17:54:22 +02:00
flobernd
3b5906f40e
Fixed doxygen comments for generated enums
2017-09-11 03:05:49 +02:00
flobernd
01b8267d47
Minor refactorings
...
- Adjusted datatype of some enums
- Renamed some things
- `ZydisDecodedInstruction.flags` -> `ZydisDecodedInstruction.accessedFlags`
- `ZydisDecodedInstruction.meta.roundingMode` -> `ZydisDecodedInstruction.meta.rounding.mode`
- `ZydisDecodedInstruction.meta.swizzleMode` -> `ZydisDecodedInstruction.meta.swizzle.mode`
- `ZydisDecodedInstruction.meta.conversionMode` -> `ZydisDecodedInstruction.meta.conversion.mode`
- `ZydisGetCPUFlagsByAction` -> `ZydisGetAccessedFlagsByAction`
2017-09-10 21:43:52 +02:00
flobernd
5d6c58ad1c
Fixed `ZydisISAExt` enum
2017-09-10 20:43:01 +02:00
flobernd
fec4116ad6
Minor refactorings and bugfixes
...
- Added the `ZYDIS_ATTRIB_HAS_MVEX` attribute
- Updated attribute macro values
- Changed size of `ZydisDecodeGranularity` from 32-bit to 8-bit
2017-09-09 14:16:54 +02:00
flobernd
5914abc0be
Tables fixes and more meta-info
...
- Added exception-class meta-info
- Added CMake option for shared-libraries
- Fixed some instruction-definitions
- Updated VersionInfo.rc
2017-09-06 17:05:05 +02:00
flobernd
fafa93d40b
Internal refactorings and new meta-info
...
- Imported meta-info from Intel XED
- Added instruction-category meta-info to the `ZydisDecodedInstruction` struct
- Added isa-set meta-info to the `ZydisDecodedInstruction` struct
- Added isa-extension meta-info to the `ZydisDecodedInstruction` struct
2017-09-05 17:35:23 +02:00
Joel Höner
9437e89006
More encoder progress
2017-08-03 01:25:25 +02:00
Joel Höner
87394ef4da
Added basic support for Windows kernel drivers
...
- Manual typedefs for fixed width int types
- Custom `vsnprintf` function
- Disable ZYDIS_ASSERT and ZYDIS_UNREACHABLE
2017-07-28 22:25:20 +02:00
Joel Höner
4140db6c1f
Encoder progress, ZYDIS_UNREACHABLE for MSVC
2017-07-28 00:37:52 +02:00
Joel Höner
65091811d2
Added Doxyfile
2017-07-25 01:04:25 +02:00
flobernd
341f3866c3
Various changes to the instruction-definitions and decoder/encoder-tables
2017-07-19 18:43:59 +02:00
flobernd
54d3836256
Minor improvements to the instruction-formatter
2017-07-15 03:39:48 +02:00
flobernd
53e89b0800
Replaced `EVEX.z` filter by `acceptsZeroMask` attribute
2017-07-14 22:54:22 +02:00
flobernd
59fa404919
Added detailed information about accessed CPU-flags
2017-07-12 17:48:02 +02:00
flobernd
682c647eb6
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-07-11 22:22:33 +02:00
flobernd
bb1708daaf
Preparations for the CPU-flag info feature
2017-07-11 18:51:54 +02:00
Joel Höner
743048852c
More encoder progress
2017-07-10 23:43:52 +02:00
Joel Höner
3498a33944
More clean-up in the encoder
2017-07-10 14:34:25 +02:00
flobernd
8fa80f0b86
Minor bugfixes and improvement of the encoder-table
...
- Fixed scale-factor of memory operands, if SIB byte is used
- Fixed operand-encoding missing for some operands
- Added operand-size and address-size filters to the encoder-table
2017-07-09 18:06:43 +02:00
flobernd
5c07598a2d
Improved encoder-table
2017-07-06 21:49:38 +02:00
Joel Höner
6bd79283e0
Fixed encoder header
2017-07-06 13:12:43 +02:00
Joel Höner
610d08960b
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
...
# Conflicts:
# CMakeLists.txt
2017-07-06 08:17:38 +02:00
Joel Höner
41776bac29
Updated encoder to a lot of previous refactorings
2017-07-06 08:07:22 +02:00
flobernd
df2dbd9109
Refactorings
...
- Renamed Types.h to CommonTypes.h
- Splitted DecoderTypes.h into SharedTypes.h and DecoderTypes.h
- Splitted InstructionTable.h into SharedData.h and DecoderData.h
- Implemented `ZydisGetEncodableInstructions` in EncoderData.h
- Some internal changes to the data-tables
2017-07-06 00:34:36 +02:00
flobernd
f8f928a4a8
Added number of decoded instructions to the performance-test tool output
2017-07-05 16:28:16 +02:00
flobernd
34a0572948
Refactorings
2017-07-05 13:33:59 +02:00
flobernd
8a626388ae
Improved formatting of decorators
2017-07-04 19:02:11 +02:00
flobernd
af0c6c8cac
Removed EVEX/MVEX compressed 8-bit displacement scale-factor from the public interface (for now)
2017-07-04 16:26:03 +02:00
flobernd
b9cf56af4d
Refactorings
2017-07-04 16:10:21 +02:00
flobernd
bbf8b1193b
Added performance test
2017-07-03 21:10:04 +02:00
flobernd
87c9155207
Refactorings
2017-07-03 17:36:03 +02:00
flobernd
6ce34bd141
Added error-condition for illegal LOCK-prefixes
2017-07-03 17:02:32 +02:00
Joel Höner
7ba6ea0596
Moved private headers to `src` directory
2017-07-03 04:16:38 +02:00
flobernd
38c67d2a85
Refactorings
2017-07-03 03:14:01 +02:00
flobernd
ad8e5ce6a9
Minor refactorings
2017-07-01 01:10:03 +02:00
flobernd
aca1ad1414
Minor bugfixes
2017-06-29 20:52:35 +02:00
flobernd
d7c81e5104
Fixed operand-size of some special MVEX instructions
2017-06-29 20:40:48 +02:00
flobernd
65fe4a4e6c
Improved instruction decoding
...
- Decoding of EVEX/MVEX instructions without a NDS/NDD-operand encoded in `.vvvv` and without a VSIB-operand will now fail, if `.v'` is != 1b
- Added information about XACQUIRE, XRELEASE and BOUND prefixes to the instruction definitions
- Fixed immediate-decoding of the `vpermil2pd` / `vpermil2ps` instruction
2017-06-29 18:09:42 +02:00
flobernd
73b02f6d12
Updated some instruction-definitions to allow segment-overrides for implicit-memory operands
2017-06-28 22:42:39 +02:00
flobernd
778b47c02f
Minor bugfixes
...
- Fixed segment register for implicit memory-operands
- Fixed decoding of `MOV CR, GPR`, `MOV GPR, CR`, `MOV DR, GPR` and `MOV GPR, DR`
2017-06-28 22:18:12 +02:00
flobernd
b118637dae
Cleaned up register-decoding code
2017-06-28 19:50:33 +02:00
flobernd
55400e9206
Improved decoding of XOP/VEX/EVEX/MVEX instructions
...
Decoding of XOP/VEX/EVEX/MVEX instructions without a NDS register encoded in .vvvv will now fail, if the .vvvv value is != 1111b
2017-06-27 04:14:17 +02:00
flobernd
e7a7be70e9
Performance optimizations
2017-06-27 03:32:42 +02:00
flobernd
99de0f3152
Fixed operand-action for EVEX/MVEX instructions with write-mask (again)
2017-06-26 00:54:49 +02:00
flobernd
83699fe9d0
Minor bugfixes
2017-06-25 23:24:43 +02:00
flobernd
f0d1ef9725
Added some missing instructions
2017-06-24 02:11:32 +02:00
flobernd
b3d508850f
Added information for VEX/EVEX/MVEX instructions with static broadcast-factor
2017-06-23 20:47:34 +02:00
flobernd
c8c3d29ba4
Added support for MVEX instructions with static broadcast factor
2017-06-23 03:35:12 +02:00
flobernd
2297c763cf
Added compressed disp8 calculation for MVEX instructions with element-granularity
2017-06-23 01:40:19 +02:00
flobernd
d8f3843f57
Added compressed disp8 calculation for MVEX instructions without swizzle/broadcast/convert functionality
2017-06-23 01:15:42 +02:00
flobernd
6c370d29c9
Added support for some MVEX special-cases
2017-06-22 22:10:18 +02:00
flobernd
4d3a71369b
Removed EVEX tuple-type and element-size from the public info-struct
2017-06-22 19:54:35 +02:00
flobernd
76f0bcf00d
Improved semantic decoding of MVEX instructions
2017-06-22 19:14:27 +02:00
flobernd
2a0525925f
Added decoding of MVEX swizzle/conversion and rounding-control values
2017-06-22 02:42:16 +02:00
flobernd
15f89dc4ea
Fixed a bitfield-size error
2017-06-22 01:40:20 +02:00
flobernd
5bd81b7f1c
Fixed sign-extension of displacement values
2017-06-22 01:38:41 +02:00
flobernd
bd38d86986
Updated CMake file and Zydis features
2017-06-21 18:25:53 +02:00
flobernd
9628fb8367
Fixed order of segment-registers
2017-06-21 03:03:13 +02:00
flobernd
d475231a63
Fixed decoding of implicit "1" immediate (ROL, ROR, RCL, ...)
2017-06-20 22:44:37 +02:00
flobernd
52e1b59702
Improved EVEX and MVEX encoding
...
- Added some MASK related error-conditions
- Added functionality and mask-policy attributes to the MVEX instruction-definition struct
- Added MVEX specific error-condition
2017-06-20 21:23:06 +02:00
flobernd
95b685a29d
Minor bugfixes
...
- Fixed some VEX/EVEX/MVEX-prefix error conditions
- MASK register size is now 64-bit for EVEX- and 16-bit for MVEX-instructions
2017-06-20 17:48:55 +02:00
flobernd
17358016d9
Allowed custom operand-sizes for register operands
2017-06-20 03:16:17 +02:00
flobernd
4487d1b252
Fixed some operand-size related filter-tables
2017-06-20 01:33:07 +02:00
flobernd
0902068007
Fixed more EVEX tuple-types
2017-06-19 21:06:33 +02:00
flobernd
ee97ae753c
Fixed some EVEX tuple-types
2017-06-19 20:46:42 +02:00
flobernd
4bceac86c9
Various bugfixes
...
- Fixed operand-size and element-count of AGEN operands
- Fixed decoding of 8-bit modrm.rm register-operands
- Fixed vector-length for EVEX instructions with rounding-semantics
2017-06-19 20:19:21 +02:00
flobernd
2d2e1acf27
Added T1_4X tuple-type
2017-06-18 22:02:59 +02:00
flobernd
58b15163f2
Improved decoding of PTR and AGEN operands
2017-06-17 02:50:08 +02:00
flobernd
28a8178559
Fixed compatibility problem
2017-06-16 23:38:06 +02:00
flobernd
ad35e81eee
Added semantic element-information for operands
2017-06-16 23:19:57 +02:00
flobernd
44792f2338
Added semantic decoding of implicit memory operands
2017-06-16 16:27:37 +02:00
flobernd
1db4db9ec2
Added semantic decoding of implicit register operands
2017-06-16 03:25:39 +02:00
flobernd
6caa68b674
Reimplemented decoding of 3DNOW instructions and improved EVEX decoding
2017-06-13 22:04:29 +02:00
flobernd
702f6b8d53
Reimplemented a basic version of semantic operand-decoding
2017-06-13 20:17:20 +02:00
flobernd
8740b1e50f
Major changes to the instruction decoder
...
- Decoupled semantic operand decoding (optional) from physical instruction decoding
- Several optimizations of the internal structures
- Further preparations for MVEX-support
2017-06-12 19:16:01 +02:00
flobernd
e5e5899f72
Preparations for MVEX-support and decoupling of operand-decoding
2017-05-08 18:18:08 +02:00
Joel Höner
de666d7a4a
Improved handling of unreachable code
2017-05-05 19:26:03 +02:00
Joel Höner
40d6c39dbe
Renamed disassembler mode constants
...
ZYDIS_DISASSEMBLER_MODE_* -> ZYDIS_OPERATING_MODE_*
2017-04-12 21:12:18 +02:00
flobernd
71a6d786d7
Minor bugfixes and cosmetical changes
2017-04-12 21:00:46 +02:00
Joel Höner
ebf71d632f
Moved `internal` sub-struct from info to context
...
Also, fixed examples and tools.
2017-04-11 03:18:08 +02:00
Joel Höner
71a551ef1a
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-04-11 02:20:02 +02:00
Joel Höner
c9606c389d
Removed obsolete public decoder struct
2017-04-11 02:19:53 +02:00
flobernd
839729bfb2
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-04-09 22:57:30 +02:00
flobernd
b4f2d3bc62
CMake bugfix and cosmetical changes to the README file
2017-04-09 22:54:53 +02:00
Joel Höner
0376376b83
Temp. disabled encoder, updated CMake defaults
2017-04-08 19:36:43 +02:00
flobernd
8157b9fa42
Temporary change to expose the semantic operand-type
2017-01-23 01:17:15 +01:00
Joel Höner
cb98db80ea
Minor encoder cleanup
2017-01-22 17:38:14 +01:00
flobernd
98d34d0c62
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-01-20 00:03:28 +01:00
flobernd
dc70ee7eb2
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-01-20 00:02:21 +01:00
flobernd
4b54158aa2
Minor bugfixes
2017-01-20 00:01:56 +01:00
Joel Höner
c0f53a3a69
More encoder progress, minor refactoring
...
- Added encoding support for more X86 features (IMMs, SIB, ..)
- Added ZYDIS_ARRAY_SIZE macro
- Moved ZYDIS_MAX_INSTRUCTION_LENGTH (Decoder.h -> InstructionInfo.h)
- Renamed ZydisInstructionEncoder -> ZydisEncoderContext
- Various bug-fixes
2017-01-19 17:37:05 +01:00
Joel Höner
14848083ae
More encoder progress
2017-01-17 20:53:34 +01:00
flobernd
5ead1d9345
Minor refactorings
...
- The instruction pointer is now directly passed to the ZydisDecoderDecodeInstruction function
- Removed the user-data pointer in the ZydisOperandInfo struct
2017-01-12 20:14:12 +01:00
Joel Höner
689708fbd3
Refactored docstrings to use uppercase abbreviations
2017-01-12 19:37:57 +01:00
Joel Höner
a9514fbfea
Minor documentation and style fixes
2017-01-12 18:54:16 +01:00
Joel Höner
0793090388
Implemented basic prefix encoding
2017-01-12 18:53:28 +01:00
Joel Höner
3d2365b6ed
Added encoder stub, made decoder input const
2017-01-12 15:12:09 +01:00