flobernd
606214c5a7
Fixed decoding of 16-bit displacements
2017-09-14 22:21:11 +02:00
flobernd
867b6bc109
Fixed an issue where instructions with more than 15-bytes did not get rejected correctly
...
fixes #17
2017-09-14 19:05:13 +02:00
flobernd
f230688af4
Fixed `ZydisISAExt` enum
2017-09-14 17:54:22 +02:00
flobernd
1b56dfc49a
Fixed `NOP` instruction with `66` prefix
2017-09-14 04:01:57 +02:00
flobernd
9fe5d66380
Simplified custom print-functions and fixed some bugs
2017-09-14 02:59:20 +02:00
flobernd
41e943c34c
Removed outdated assertion
2017-09-14 01:08:37 +02:00
flobernd
01dca38516
Significantly improved formatter performance
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- Exchanged `vsnprintf` by custom print functions
2017-09-14 00:59:23 +02:00
flobernd
30f15afe0a
Minor refactorings and bug-fixes
2017-09-14 00:56:01 +02:00
flobernd
3b5906f40e
Fixed doxygen comments for generated enums
2017-09-11 03:05:49 +02:00
flobernd
71be8a1bc2
Removed `Strings` suffix from generated enum files
2017-09-10 21:48:16 +02:00
flobernd
01b8267d47
Minor refactorings
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- Adjusted datatype of some enums
- Renamed some things
- `ZydisDecodedInstruction.flags` -> `ZydisDecodedInstruction.accessedFlags`
- `ZydisDecodedInstruction.meta.roundingMode` -> `ZydisDecodedInstruction.meta.rounding.mode`
- `ZydisDecodedInstruction.meta.swizzleMode` -> `ZydisDecodedInstruction.meta.swizzle.mode`
- `ZydisDecodedInstruction.meta.conversionMode` -> `ZydisDecodedInstruction.meta.conversion.mode`
- `ZydisGetCPUFlagsByAction` -> `ZydisGetAccessedFlagsByAction`
2017-09-10 21:43:52 +02:00
flobernd
5d6c58ad1c
Fixed `ZydisISAExt` enum
2017-09-10 20:43:01 +02:00
flobernd
fec4116ad6
Minor refactorings and bugfixes
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- Added the `ZYDIS_ATTRIB_HAS_MVEX` attribute
- Updated attribute macro values
- Changed size of `ZydisDecodeGranularity` from 32-bit to 8-bit
2017-09-09 14:16:54 +02:00
flobernd
5914abc0be
Tables fixes and more meta-info
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- Added exception-class meta-info
- Added CMake option for shared-libraries
- Fixed some instruction-definitions
- Updated VersionInfo.rc
2017-09-06 17:05:05 +02:00
flobernd
fafa93d40b
Internal refactorings and new meta-info
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- Imported meta-info from Intel XED
- Added instruction-category meta-info to the `ZydisDecodedInstruction` struct
- Added isa-set meta-info to the `ZydisDecodedInstruction` struct
- Added isa-extension meta-info to the `ZydisDecodedInstruction` struct
2017-09-05 17:35:23 +02:00
flobernd
14d87fda8b
Fixed wrong return value of `ZydisFormatterSetHook`
2017-08-23 20:40:57 +02:00
flobernd
f89398877d
Merge branch 'master' into develop
2017-08-15 14:33:07 +02:00
flobernd
74484aec2e
Removed trailing whitespace after mnemonic for instructions without visible operands
2017-08-14 17:10:24 +02:00
flobernd
705f0ed5cd
Minor changes to the performance test tool
2017-08-12 04:33:02 +02:00
flobernd
a525342b42
Fixed README
2017-08-09 17:25:45 +02:00
Joel Höner
c0fd657f15
Merged internal encoder AVX/REX structs
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- It was pretty redundant before
- Required unnecessary routing logic
- Minor decrease of required stack memory
- Added `ZydisEmitMVEX` and generally more MVEX support
2017-08-03 02:04:39 +02:00
Joel Höner
9437e89006
More encoder progress
2017-08-03 01:25:25 +02:00
Joel Höner
87394ef4da
Added basic support for Windows kernel drivers
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- Manual typedefs for fixed width int types
- Custom `vsnprintf` function
- Disable ZYDIS_ASSERT and ZYDIS_UNREACHABLE
2017-07-28 22:25:20 +02:00
Joel Höner
5ac595eb72
Major rework of encoder context design
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- Split into various smaller structs
- Only hand functions parts they actually need
2017-07-28 03:13:30 +02:00
Joel Höner
9152714865
Fixed encoder IMM size derivation
2017-07-28 02:26:52 +02:00
Joel Höner
4140db6c1f
Encoder progress, ZYDIS_UNREACHABLE for MSVC
2017-07-28 00:37:52 +02:00
flobernd
03ef968413
`REX.R` and `REX.B` is ignored for non-GPR/VR/CR/DR registers
2017-07-26 18:17:59 +02:00
Joel Höner
27fbb7a7e2
Merge branch 'develop'
2017-07-25 15:09:43 +02:00
flobernd
dc590bc4b4
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-07-25 15:09:13 +02:00
flobernd
cde97dca36
Fixed a bug that caused the formatter to falsely print a `{sae}` decorator in some cases
2017-07-25 14:58:17 +02:00
flobernd
7434bea839
Fixed some `EVEX` instruction-definitions
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- A bug in the table generator caused inverted conditions regarding zero-mask support for some `EVEX` instructions
2017-07-25 14:30:32 +02:00
Joel Höner
faea901984
Moved Doxyfile to root
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- Required in order to make it work with our doc cron
2017-07-25 01:09:33 +02:00
Joel Höner
65091811d2
Added Doxyfile
2017-07-25 01:04:25 +02:00
Joel Höner
7033929e63
Added github-linguist language override
...
- Repo was previously wrongly detected as “POV-Ray SDL”
2017-07-24 22:49:30 +02:00
Joel Höner
31ff04e0dd
Moved `Compilation` README section
2017-07-24 22:46:28 +02:00
Joel Höner
a50b9cd83c
Updated README.md
2017-07-24 22:41:08 +02:00
Joel Höner
6de4794814
Added ZydisInfo screenshot
2017-07-24 22:35:58 +02:00
flobernd
39369269e8
Fixed formatting bug in ZydisInfo tool
2017-07-24 22:03:41 +02:00
Joel Höner
821d9da338
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-07-24 22:00:14 +02:00
Joel Höner
df6b0cb628
Moved ZydisFuzzIn and ZydisPerfTest to examples
2017-07-24 21:59:54 +02:00
flobernd
862330b19c
Updated README file
2017-07-24 21:40:59 +02:00
flobernd
61f7a188a3
Removed old instruction-editor
2017-07-24 21:37:58 +02:00
flobernd
341f3866c3
Various changes to the instruction-definitions and decoder/encoder-tables
2017-07-19 18:43:59 +02:00
flobernd
d7a49370fe
Minor bugfixes
2017-07-19 16:56:12 +02:00
flobernd
e76c3d64c3
Added missing instructions to the encoder-table
2017-07-18 22:38:56 +02:00
flobernd
fa4e683b01
Minor bugfixes
2017-07-18 20:02:32 +02:00
flobernd
54d3836256
Minor improvements to the instruction-formatter
2017-07-15 03:39:48 +02:00
flobernd
2be83199d5
Further improvements to the `ZydisInfo` tool
2017-07-15 03:36:11 +02:00
flobernd
9e15ecc5f1
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-07-14 22:56:06 +02:00
flobernd
18eaba7cdd
Improved `ZydisInfo` tool
2017-07-14 22:55:32 +02:00