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zydis
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378 Commits 3 Branches 1 Tag 8.5 MiB
Commit Graph

378 Commits

Author SHA1 Message Date
flobernd 505224dc20 Further improvements to address-formatting 2017-09-25 16:18:01 +02:00
flobernd 3223a4d63f Fixed formatting of "moff"-displacements 2017-09-25 04:10:11 +02:00
flobernd ac16314f48 `InstructionEncodings.inc` is now generated with deterministic output 2017-09-25 02:05:53 +02:00
flobernd 10790b449f Changed immediate-operand of `aad` and `aam` from signed to unsigned 2017-09-24 22:31:17 +02:00
flobernd 38975c8d3d Minor refactorings 2017-09-23 19:53:48 +02:00
flobernd 04ae18bef2 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-09-23 19:46:37 +02:00
flobernd 2145c399b5 Formatter does now print the `far` modifier for the respective instructions 2017-09-23 19:46:27 +02:00
flobernd 6315e29aa5 Added `ZYDIS_ATTRIB_IS_FAR_BRANCH` attribute for far JMP/CALL/RET instructions 2017-09-23 18:26:48 +02:00
Joel Höner 425387e892 Added attribute info to `ZydisInfo` tool 2017-09-22 19:09:14 +02:00
Joel Höner 2ed87351b8 Added read and write masks to `ZydisOperandActions` 2017-09-22 00:04:23 +02:00
Joel Höner 994f8efa43 Added `_MAX_VALUE` marker value to all enums 2017-09-21 23:50:44 +02:00
flobernd 9222f80b97 Fixed formatting of signed 8-bit immediate operands (again) 
- Renamed `operandSize` to `operandWidth`
- The `operandWidth` field is now set to 8-bit, if the instruction performs a byte-operation
 2017-09-21 22:16:37 +02:00
flobernd e6399bbb27 Reverted last change 
Need to find a clean solution that works in all possible cases
 2017-09-21 19:40:47 +02:00
flobernd c91fe2cc4b Fixed formatting of signed 8-bit immediate operands 2017-09-21 18:20:48 +02:00
flobernd c62cd21c89 Fixed formatting of signed 32-bit immediate operands 2017-09-21 16:53:23 +02:00
flobernd 66972e43b4 Minor refactorings 2017-09-20 15:46:51 +02:00
flobernd 92cfcdac00 Minor performance improvements to the `ZydisPrintHexU` function 2017-09-16 17:37:14 +02:00
flobernd 2e979ec737 Improved support for ICC 2017-09-15 01:45:01 +02:00
flobernd 6b608a302b Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-09-15 00:42:13 +02:00
flobernd 75729e8446 Fixed compilation of the performance-test tool on linux systems 2017-09-15 00:42:05 +02:00
Joel Höner d7775dcfaa Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop 2017-09-15 00:41:06 +02:00
Joel Höner 891942533d Fixed GCC release build 2017-09-15 00:40:14 +02:00
flobernd 8540326e33 Improved performance-test tool 2017-09-14 23:41:25 +02:00
flobernd 606214c5a7 Fixed decoding of 16-bit displacements 2017-09-14 22:21:11 +02:00
flobernd 867b6bc109 Fixed an issue where instructions with more than 15-bytes did not get rejected correctly 
fixes #17
 2017-09-14 19:05:13 +02:00
flobernd f230688af4 Fixed `ZydisISAExt` enum 2017-09-14 17:54:22 +02:00
flobernd 1b56dfc49a Fixed `NOP` instruction with `66` prefix 2017-09-14 04:01:57 +02:00
flobernd 9fe5d66380 Simplified custom print-functions and fixed some bugs 2017-09-14 02:59:20 +02:00
flobernd 41e943c34c Removed outdated assertion 2017-09-14 01:08:37 +02:00
flobernd 01dca38516 Significantly improved formatter performance 
- Exchanged `vsnprintf` by custom print functions
 2017-09-14 00:59:23 +02:00
flobernd 30f15afe0a Minor refactorings and bug-fixes 2017-09-14 00:56:01 +02:00
flobernd 3b5906f40e Fixed doxygen comments for generated enums 2017-09-11 03:05:49 +02:00
flobernd 71be8a1bc2 Removed `Strings` suffix from generated enum files 2017-09-10 21:48:16 +02:00
flobernd 01b8267d47 Minor refactorings 
- Adjusted datatype of some enums
- Renamed some things
  - `ZydisDecodedInstruction.flags` -> `ZydisDecodedInstruction.accessedFlags`
  - `ZydisDecodedInstruction.meta.roundingMode` -> `ZydisDecodedInstruction.meta.rounding.mode`
  - `ZydisDecodedInstruction.meta.swizzleMode` -> `ZydisDecodedInstruction.meta.swizzle.mode`
  - `ZydisDecodedInstruction.meta.conversionMode` -> `ZydisDecodedInstruction.meta.conversion.mode`
  - `ZydisGetCPUFlagsByAction` -> `ZydisGetAccessedFlagsByAction`
 2017-09-10 21:43:52 +02:00
flobernd 5d6c58ad1c Fixed `ZydisISAExt` enum 2017-09-10 20:43:01 +02:00
flobernd fec4116ad6 Minor refactorings and bugfixes 
- Added the `ZYDIS_ATTRIB_HAS_MVEX` attribute
- Updated attribute macro values
- Changed size of `ZydisDecodeGranularity` from 32-bit to 8-bit
 2017-09-09 14:16:54 +02:00
flobernd 5914abc0be Tables fixes and more meta-info 
- Added exception-class meta-info
- Added CMake option for shared-libraries
- Fixed some instruction-definitions
- Updated VersionInfo.rc
 2017-09-06 17:05:05 +02:00
flobernd fafa93d40b Internal refactorings and new meta-info 
- Imported meta-info from Intel XED
- Added instruction-category meta-info to the `ZydisDecodedInstruction` struct
- Added isa-set meta-info to the `ZydisDecodedInstruction` struct
- Added isa-extension meta-info to the `ZydisDecodedInstruction` struct
 2017-09-05 17:35:23 +02:00
flobernd 14d87fda8b Fixed wrong return value of `ZydisFormatterSetHook` 2017-08-23 20:40:57 +02:00
flobernd f89398877d Merge branch 'master' into develop 2017-08-15 14:33:07 +02:00
flobernd 74484aec2e Removed trailing whitespace after mnemonic for instructions without visible operands 2017-08-14 17:10:24 +02:00
flobernd 705f0ed5cd Minor changes to the performance test tool 2017-08-12 04:33:02 +02:00
flobernd a525342b42 Fixed README 2017-08-09 17:25:45 +02:00
Joel Höner c0fd657f15 Merged internal encoder AVX/REX structs 
- It was pretty redundant before
  - Required unnecessary routing logic
  - Minor decrease of required stack memory
- Added `ZydisEmitMVEX` and generally more MVEX support
 2017-08-03 02:04:39 +02:00
Joel Höner 9437e89006 More encoder progress 2017-08-03 01:25:25 +02:00
Joel Höner 87394ef4da Added basic support for Windows kernel drivers 
- Manual typedefs for fixed width int types
- Custom `vsnprintf` function
- Disable ZYDIS_ASSERT and ZYDIS_UNREACHABLE
 2017-07-28 22:25:20 +02:00
Joel Höner 5ac595eb72 Major rework of encoder context design 
- Split into various smaller structs
- Only hand functions parts they actually need
 2017-07-28 03:13:30 +02:00
Joel Höner 9152714865 Fixed encoder IMM size derivation 2017-07-28 02:26:52 +02:00
Joel Höner 4140db6c1f Encoder progress, ZYDIS_UNREACHABLE for MSVC 2017-07-28 00:37:52 +02:00
flobernd 03ef968413 `REX.R` and `REX.B` is ignored for non-GPR/VR/CR/DR registers 2017-07-26 18:17:59 +02:00