Joel Höner
4dd632463c
Merge branch 'develop'
...
# Conflicts:
# README.md
2017-10-17 19:51:14 +02:00
flobernd
750808bea5
Fixed some MVEX instructions
2017-10-17 18:05:17 +02:00
Joel Höner
d2c6115f6f
Fixed two formatter issues
...
- Unintentional fallthrough
- Assertion on 0-length append
2017-10-17 17:44:19 +02:00
Joel Höner
c77c9f2561
Move encoder to `feature/encoder` branch
...
- Won’t be ready until v2.1
2017-10-17 17:30:55 +02:00
flobernd
c5e418f34f
Merge branch 'mrexodia-const_party' into develop
2017-10-14 18:39:53 +02:00
flobernd
943993ae4a
Changed the way how user-data is passed to custom formatter-callbacks
...
* Removed `userData` from the `ZydisDecodedInstruction` struct
* Added `userData` as parameter to all formatter-callbacks
* Added `ZydisFormatterFormatInstructionEx` function with the additional `userData` paramter
* Updated the `FormatterHooks.c` demo
2017-10-14 18:37:59 +02:00
flobernd
a6113c9252
Merge branch 'const_party' of https://github.com/mrexodia/zydis into mrexodia-const_party
2017-10-14 18:16:33 +02:00
flobernd
ea3e9b648a
Minor refactorings
2017-10-14 18:10:53 +02:00
flobernd
e4cc39d195
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-10-14 17:55:29 +02:00
flobernd
2e1bb33731
Minor table fixes
2017-10-14 17:55:18 +02:00
Joel Höner
8f294ed3e5
Merge pull request #18 from mrexodia/fix_error
...
Fixed an uninitialized variable in ZydisChangeCase
2017-10-14 14:03:29 +02:00
Duncan Ogilvie
1564120c22
Fixed an uninitialized variable in ZydisChangeCase
2017-10-14 13:45:21 +02:00
Duncan Ogilvie
d459b39bb7
Convert all functions in ZydisFormatter to take const arguments
2017-10-14 13:39:00 +02:00
Joel Höner
90e4626d11
Replace `to{lower,upper}` with custom func
2017-09-30 01:04:52 +02:00
flobernd
49a8f105b3
Updated instruction database
2017-09-26 21:05:50 +02:00
flobernd
ded9d0e513
Minor refactorings
...
- `ZydisUtilsCalcAbsoluteTargetAddress` is now called `ZydisCalcAbsoluteAddress`
- `ZydisCalcAbsoluteAddress` does now handle `MEM` operands with absolute displacement values
2017-09-25 17:59:14 +02:00
flobernd
10a9765585
Minor improvements to the performance-test tool
2017-09-25 17:06:14 +02:00
flobernd
505224dc20
Further improvements to address-formatting
2017-09-25 16:18:01 +02:00
flobernd
3223a4d63f
Fixed formatting of "moff"-displacements
2017-09-25 04:10:11 +02:00
flobernd
ac16314f48
`InstructionEncodings.inc` is now generated with deterministic output
2017-09-25 02:05:53 +02:00
flobernd
10790b449f
Changed immediate-operand of `aad` and `aam` from signed to unsigned
2017-09-24 22:31:17 +02:00
flobernd
38975c8d3d
Minor refactorings
2017-09-23 19:53:48 +02:00
flobernd
04ae18bef2
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-09-23 19:46:37 +02:00
flobernd
2145c399b5
Formatter does now print the `far` modifier for the respective instructions
2017-09-23 19:46:27 +02:00
flobernd
6315e29aa5
Added `ZYDIS_ATTRIB_IS_FAR_BRANCH` attribute for far JMP/CALL/RET instructions
2017-09-23 18:26:48 +02:00
Joel Höner
425387e892
Added attribute info to `ZydisInfo` tool
2017-09-22 19:09:14 +02:00
Joel Höner
2ed87351b8
Added read and write masks to `ZydisOperandActions`
2017-09-22 00:04:23 +02:00
Joel Höner
994f8efa43
Added `_MAX_VALUE` marker value to all enums
2017-09-21 23:50:44 +02:00
flobernd
9222f80b97
Fixed formatting of signed 8-bit immediate operands (again)
...
- Renamed `operandSize` to `operandWidth`
- The `operandWidth` field is now set to 8-bit, if the instruction performs a byte-operation
2017-09-21 22:16:37 +02:00
flobernd
e6399bbb27
Reverted last change
...
Need to find a clean solution that works in all possible cases
2017-09-21 19:40:47 +02:00
flobernd
c91fe2cc4b
Fixed formatting of signed 8-bit immediate operands
2017-09-21 18:20:48 +02:00
flobernd
c62cd21c89
Fixed formatting of signed 32-bit immediate operands
2017-09-21 16:53:23 +02:00
flobernd
66972e43b4
Minor refactorings
2017-09-20 15:46:51 +02:00
flobernd
92cfcdac00
Minor performance improvements to the `ZydisPrintHexU` function
2017-09-16 17:37:14 +02:00
flobernd
2e979ec737
Improved support for ICC
2017-09-15 01:45:01 +02:00
flobernd
6b608a302b
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-09-15 00:42:13 +02:00
flobernd
75729e8446
Fixed compilation of the performance-test tool on linux systems
2017-09-15 00:42:05 +02:00
Joel Höner
d7775dcfaa
Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop
2017-09-15 00:41:06 +02:00
Joel Höner
891942533d
Fixed GCC release build
2017-09-15 00:40:14 +02:00
flobernd
8540326e33
Improved performance-test tool
2017-09-14 23:41:25 +02:00
flobernd
606214c5a7
Fixed decoding of 16-bit displacements
2017-09-14 22:21:11 +02:00
flobernd
867b6bc109
Fixed an issue where instructions with more than 15-bytes did not get rejected correctly
...
fixes #17
2017-09-14 19:05:13 +02:00
flobernd
f230688af4
Fixed `ZydisISAExt` enum
2017-09-14 17:54:22 +02:00
flobernd
1b56dfc49a
Fixed `NOP` instruction with `66` prefix
2017-09-14 04:01:57 +02:00
flobernd
9fe5d66380
Simplified custom print-functions and fixed some bugs
2017-09-14 02:59:20 +02:00
flobernd
41e943c34c
Removed outdated assertion
2017-09-14 01:08:37 +02:00
flobernd
01dca38516
Significantly improved formatter performance
...
- Exchanged `vsnprintf` by custom print functions
2017-09-14 00:59:23 +02:00
flobernd
30f15afe0a
Minor refactorings and bug-fixes
2017-09-14 00:56:01 +02:00
flobernd
3b5906f40e
Fixed doxygen comments for generated enums
2017-09-11 03:05:49 +02:00
flobernd
71be8a1bc2
Removed `Strings` suffix from generated enum files
2017-09-10 21:48:16 +02:00