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zydis
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142 Commits

Author SHA1 Message Date
flobernd 04ae18bef2 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-09-23 19:46:37 +02:00
flobernd 2145c399b5 Formatter does now print the `far` modifier for the respective instructions 2017-09-23 19:46:27 +02:00
flobernd 6315e29aa5 Added `ZYDIS_ATTRIB_IS_FAR_BRANCH` attribute for far JMP/CALL/RET instructions 2017-09-23 18:26:48 +02:00
Joel Höner 2ed87351b8 Added read and write masks to `ZydisOperandActions` 2017-09-22 00:04:23 +02:00
Joel Höner 994f8efa43 Added `_MAX_VALUE` marker value to all enums 2017-09-21 23:50:44 +02:00
flobernd 9222f80b97 Fixed formatting of signed 8-bit immediate operands (again) 
- Renamed `operandSize` to `operandWidth`
- The `operandWidth` field is now set to 8-bit, if the instruction performs a byte-operation
 2017-09-21 22:16:37 +02:00
flobernd 66972e43b4 Minor refactorings 2017-09-20 15:46:51 +02:00
flobernd 2e979ec737 Improved support for ICC 2017-09-15 01:45:01 +02:00
Joel Höner 891942533d Fixed GCC release build 2017-09-15 00:40:14 +02:00
flobernd f230688af4 Fixed `ZydisISAExt` enum 2017-09-14 17:54:22 +02:00
flobernd 3b5906f40e Fixed doxygen comments for generated enums 2017-09-11 03:05:49 +02:00
flobernd 01b8267d47 Minor refactorings 
- Adjusted datatype of some enums
- Renamed some things
  - `ZydisDecodedInstruction.flags` -> `ZydisDecodedInstruction.accessedFlags`
  - `ZydisDecodedInstruction.meta.roundingMode` -> `ZydisDecodedInstruction.meta.rounding.mode`
  - `ZydisDecodedInstruction.meta.swizzleMode` -> `ZydisDecodedInstruction.meta.swizzle.mode`
  - `ZydisDecodedInstruction.meta.conversionMode` -> `ZydisDecodedInstruction.meta.conversion.mode`
  - `ZydisGetCPUFlagsByAction` -> `ZydisGetAccessedFlagsByAction`
 2017-09-10 21:43:52 +02:00
flobernd 5d6c58ad1c Fixed `ZydisISAExt` enum 2017-09-10 20:43:01 +02:00
flobernd fec4116ad6 Minor refactorings and bugfixes 
- Added the `ZYDIS_ATTRIB_HAS_MVEX` attribute
- Updated attribute macro values
- Changed size of `ZydisDecodeGranularity` from 32-bit to 8-bit
 2017-09-09 14:16:54 +02:00
flobernd 5914abc0be Tables fixes and more meta-info 
- Added exception-class meta-info
- Added CMake option for shared-libraries
- Fixed some instruction-definitions
- Updated VersionInfo.rc
 2017-09-06 17:05:05 +02:00
flobernd fafa93d40b Internal refactorings and new meta-info 
- Imported meta-info from Intel XED
- Added instruction-category meta-info to the `ZydisDecodedInstruction` struct
- Added isa-set meta-info to the `ZydisDecodedInstruction` struct
- Added isa-extension meta-info to the `ZydisDecodedInstruction` struct
 2017-09-05 17:35:23 +02:00
Joel Höner 9437e89006 More encoder progress 2017-08-03 01:25:25 +02:00
Joel Höner 87394ef4da Added basic support for Windows kernel drivers 
- Manual typedefs for fixed width int types
- Custom `vsnprintf` function
- Disable ZYDIS_ASSERT and ZYDIS_UNREACHABLE
 2017-07-28 22:25:20 +02:00
Joel Höner 4140db6c1f Encoder progress, ZYDIS_UNREACHABLE for MSVC 2017-07-28 00:37:52 +02:00
Joel Höner 65091811d2 Added Doxyfile 2017-07-25 01:04:25 +02:00
flobernd 341f3866c3 Various changes to the instruction-definitions and decoder/encoder-tables 2017-07-19 18:43:59 +02:00
flobernd 54d3836256 Minor improvements to the instruction-formatter 2017-07-15 03:39:48 +02:00
flobernd 53e89b0800 Replaced `EVEX.z` filter by `acceptsZeroMask` attribute 2017-07-14 22:54:22 +02:00
flobernd 59fa404919 Added detailed information about accessed CPU-flags 2017-07-12 17:48:02 +02:00
flobernd 682c647eb6 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-07-11 22:22:33 +02:00
flobernd bb1708daaf Preparations for the CPU-flag info feature 2017-07-11 18:51:54 +02:00
Joel Höner 743048852c More encoder progress 2017-07-10 23:43:52 +02:00
Joel Höner 3498a33944 More clean-up in the encoder 2017-07-10 14:34:25 +02:00
flobernd 8fa80f0b86 Minor bugfixes and improvement of the encoder-table 
- Fixed scale-factor of memory operands, if SIB byte is used
- Fixed operand-encoding missing for some operands
- Added operand-size and address-size filters to the encoder-table
 2017-07-09 18:06:43 +02:00
flobernd 5c07598a2d Improved encoder-table 2017-07-06 21:49:38 +02:00
Joel Höner 6bd79283e0 Fixed encoder header 2017-07-06 13:12:43 +02:00
Joel Höner 610d08960b Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop 
# Conflicts:
#	CMakeLists.txt
 2017-07-06 08:17:38 +02:00
Joel Höner 41776bac29 Updated encoder to a lot of previous refactorings 2017-07-06 08:07:22 +02:00
flobernd df2dbd9109 Refactorings 
- Renamed Types.h to CommonTypes.h
- Splitted DecoderTypes.h into SharedTypes.h and DecoderTypes.h
- Splitted InstructionTable.h into SharedData.h and DecoderData.h
- Implemented `ZydisGetEncodableInstructions` in EncoderData.h
- Some internal changes to the data-tables
 2017-07-06 00:34:36 +02:00
flobernd f8f928a4a8 Added number of decoded instructions to the performance-test tool output 2017-07-05 16:28:16 +02:00
flobernd 34a0572948 Refactorings 2017-07-05 13:33:59 +02:00
flobernd 8a626388ae Improved formatting of decorators 2017-07-04 19:02:11 +02:00
flobernd af0c6c8cac Removed EVEX/MVEX compressed 8-bit displacement scale-factor from the public interface (for now) 2017-07-04 16:26:03 +02:00
flobernd b9cf56af4d Refactorings 2017-07-04 16:10:21 +02:00
flobernd bbf8b1193b Added performance test 2017-07-03 21:10:04 +02:00
flobernd 87c9155207 Refactorings 2017-07-03 17:36:03 +02:00
flobernd 6ce34bd141 Added error-condition for illegal LOCK-prefixes 2017-07-03 17:02:32 +02:00
Joel Höner 7ba6ea0596 Moved private headers to `src` directory 2017-07-03 04:16:38 +02:00
flobernd 38c67d2a85 Refactorings 2017-07-03 03:14:01 +02:00
flobernd ad8e5ce6a9 Minor refactorings 2017-07-01 01:10:03 +02:00
flobernd aca1ad1414 Minor bugfixes 2017-06-29 20:52:35 +02:00
flobernd d7c81e5104 Fixed operand-size of some special MVEX instructions 2017-06-29 20:40:48 +02:00
flobernd 65fe4a4e6c Improved instruction decoding 
- Decoding of EVEX/MVEX instructions without a NDS/NDD-operand encoded in `.vvvv` and without a VSIB-operand will now fail, if `.v'` is != 1b
- Added information about XACQUIRE, XRELEASE and BOUND prefixes to the instruction definitions
- Fixed immediate-decoding of the `vpermil2pd` / `vpermil2ps` instruction
 2017-06-29 18:09:42 +02:00
flobernd 73b02f6d12 Updated some instruction-definitions to allow segment-overrides for implicit-memory operands 2017-06-28 22:42:39 +02:00
flobernd 778b47c02f Minor bugfixes 
- Fixed segment register for implicit memory-operands
- Fixed decoding of `MOV CR, GPR`, `MOV GPR, CR`, `MOV DR, GPR` and `MOV GPR, DR`
 2017-06-28 22:18:12 +02:00