mirror of https://github.com/x64dbg/TitanEngine
parent
f23d23a5f5
commit
02d0be742a
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@ -1054,11 +1054,13 @@ __declspec(dllexport) bool TITCALL GetAVXContext(HANDLE hActiveThread, TITAN_ENG
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(1ui64 << (XSTATE_AVX512_ZMM)))
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(1ui64 << (XSTATE_AVX512_ZMM)))
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#endif
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#endif
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static bool SetAVX512ContextFallbackToAVX(HANDLE hActiveThread, TITAN_ENGINE_CONTEXT_AVX512_t* titcontext) {
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static bool SetAVX512ContextFallbackToAVX(HANDLE hActiveThread, TITAN_ENGINE_CONTEXT_AVX512_t* titcontext)
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{
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// Fall back to using AVX and ignore the rest
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// Fall back to using AVX and ignore the rest
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TITAN_ENGINE_CONTEXT_t Avx;
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TITAN_ENGINE_CONTEXT_t Avx;
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memset(&Avx, 0, sizeof(Avx));
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memset(&Avx, 0, sizeof(Avx));
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for (int i = 0; i < _countof(Avx.YmmRegisters); i++) {
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for(int i = 0; i < _countof(Avx.YmmRegisters); i++)
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{
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Avx.YmmRegisters[i] = titcontext->ZmmRegisters[i].Low;
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Avx.YmmRegisters[i] = titcontext->ZmmRegisters[i].Low;
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}
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}
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return SetAVXContext(hActiveThread, &Avx);
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return SetAVXContext(hActiveThread, &Avx);
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@ -1133,11 +1135,13 @@ __declspec(dllexport) bool TITCALL SetAVX512Context(HANDLE hActiveThread, TITAN_
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Avx512_ZMM_H[i] = titcontext->ZmmRegisters[i].High;
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Avx512_ZMM_H[i] = titcontext->ZmmRegisters[i].High;
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}
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}
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#ifdef _WIN64
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if(Avx512_ZMM != NULL) //If the feature is unsupported by the processor it will return NULL
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if(Avx512_ZMM != NULL) //If the feature is unsupported by the processor it will return NULL
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{
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{
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for(int i = 0; i < MIN(FeatureLengthAvx512_ZMM / sizeof(ZmmRegister_t), _countof(titcontext->ZmmRegisters) - FeatureLengthAvx / sizeof(XmmRegister_t)); i++)
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for(int i = 0; i < MIN(FeatureLengthAvx512_ZMM / sizeof(ZmmRegister_t), _countof(titcontext->ZmmRegisters) - FeatureLengthAvx / sizeof(XmmRegister_t)); i++)
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Avx512_ZMM[i] = titcontext->ZmmRegisters[i + FeatureLengthAvx / sizeof(XmmRegister_t)];
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Avx512_ZMM[i] = titcontext->ZmmRegisters[i + FeatureLengthAvx / sizeof(XmmRegister_t)];
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}
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}
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#endif // _WIN64
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if(Avx512_KMASK != NULL) //If the feature is unsupported by the processor it will return NULL
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if(Avx512_KMASK != NULL) //If the feature is unsupported by the processor it will return NULL
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{
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{
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@ -1153,12 +1157,14 @@ static bool GetAVX512ContextFallbackToAVX(HANDLE hActiveThread, TITAN_ENGINE_CON
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// Fall back to using AVX and fill the rest with 0
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// Fall back to using AVX and fill the rest with 0
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TITAN_ENGINE_CONTEXT_t Avx;
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TITAN_ENGINE_CONTEXT_t Avx;
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memset(titcontext, 0, sizeof(*titcontext));
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memset(titcontext, 0, sizeof(*titcontext));
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if (GetAVXContext(hActiveThread, &Avx)) {
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if(GetAVXContext(hActiveThread, &Avx))
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{
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for(int i = 0; i < _countof(Avx.YmmRegisters); i++)
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for(int i = 0; i < _countof(Avx.YmmRegisters); i++)
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titcontext->ZmmRegisters[i].Low = Avx.YmmRegisters[i];
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titcontext->ZmmRegisters[i].Low = Avx.YmmRegisters[i];
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return true;
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return true;
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}
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}
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else {
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else
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{
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return false;
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return false;
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}
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}
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}
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}
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@ -1232,11 +1238,13 @@ __declspec(dllexport) bool TITCALL GetAVX512Context(HANDLE hActiveThread, TITAN_
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titcontext->ZmmRegisters[i].High = Avx512_ZMM_H[i];
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titcontext->ZmmRegisters[i].High = Avx512_ZMM_H[i];
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}
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}
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#ifdef _WIN64
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if(Avx512_ZMM != NULL) //If the feature is unsupported by the processor it will return NULL
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if(Avx512_ZMM != NULL) //If the feature is unsupported by the processor it will return NULL
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{
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{
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for(int i = 0; i < MIN(FeatureLengthAvx512_ZMM / sizeof(ZmmRegister_t), _countof(titcontext->ZmmRegisters) - FeatureLengthAvx / sizeof(XmmRegister_t)); i++)
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for(int i = 0; i < MIN(FeatureLengthAvx512_ZMM / sizeof(ZmmRegister_t), _countof(titcontext->ZmmRegisters) - FeatureLengthAvx / sizeof(XmmRegister_t)); i++)
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titcontext->ZmmRegisters[i + FeatureLengthAvx / sizeof(XmmRegister_t)] = Avx512_ZMM[i];
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titcontext->ZmmRegisters[i + FeatureLengthAvx / sizeof(XmmRegister_t)] = Avx512_ZMM[i];
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}
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}
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#endif // _WIN64
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if(Avx512_KMASK != NULL) //If the feature is unsupported by the processor it will return NULL
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if(Avx512_KMASK != NULL) //If the feature is unsupported by the processor it will return NULL
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{
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{
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