mirror of https://github.com/x64dbg/zydis
9656 lines
509 KiB
C++
9656 lines
509 KiB
C++
/**************************************************************************************************
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Verteron Disassembler Engine
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Version 1.0
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Remarks : Freeware, Copyright must be included
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Original Author : Florian Bernd
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Modifications :
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Last change : 14. October 2014
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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**************************************************************************************************/
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#include "VXOpcodeTable.h"
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namespace Verteron
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{
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namespace Internal
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{
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#define INVALID 0
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#define NODE(type, n) (static_cast<VXOpcodeTreeNode>(type) << 12 | (n))
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const VXOpcodeTreeNode optreeTable[][256] =
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{
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{
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/* 00 */ 0x0015,
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/* 01 */ 0x0014,
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/* 02 */ 0x0016,
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/* 03 */ 0x0018,
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/* 04 */ 0x0017,
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/* 05 */ 0x0010,
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/* 06 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0000),
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/* 07 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0001),
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/* 08 */ 0x0394,
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/* 09 */ 0x0393,
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/* 0A */ 0x0396,
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/* 0B */ 0x0395,
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/* 0C */ 0x0390,
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/* 0D */ 0x038F,
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/* 0E */ NODE(VXOpcodeTreeNodeType::MODE, 0x0002),
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/* 0F */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0001),
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/* 10 */ 0x000B,
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/* 11 */ 0x000A,
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/* 12 */ 0x000C,
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/* 13 */ 0x000E,
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/* 14 */ 0x000D,
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/* 15 */ 0x0006,
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/* 16 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0007),
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/* 17 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0008),
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/* 18 */ 0x04FE,
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/* 19 */ 0x04F7,
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/* 1A */ 0x04F8,
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/* 1B */ 0x04FB,
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/* 1C */ 0x04FA,
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/* 1D */ 0x04F9,
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/* 1E */ NODE(VXOpcodeTreeNodeType::MODE, 0x0009),
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/* 1F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000A),
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/* 20 */ 0x0026,
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/* 21 */ 0x0027,
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/* 22 */ 0x0025,
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/* 23 */ 0x002C,
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/* 24 */ 0x002D,
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/* 25 */ 0x002E,
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/* 26 */ INVALID,
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/* 27 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000B),
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/* 28 */ 0x0542,
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/* 29 */ 0x0549,
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/* 2A */ 0x0548,
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/* 2B */ 0x054B,
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/* 2C */ 0x054A,
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/* 2D */ 0x0547,
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/* 2E */ INVALID,
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/* 2F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000C),
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/* 30 */ 0x06B8,
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/* 31 */ 0x06B9,
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/* 32 */ 0x06B6,
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/* 33 */ 0x06B7,
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/* 34 */ 0x06BA,
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/* 35 */ 0x06BB,
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/* 36 */ INVALID,
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/* 37 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000D),
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/* 38 */ 0x006C,
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/* 39 */ 0x006D,
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/* 3A */ 0x006B,
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/* 3B */ 0x006A,
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/* 3C */ 0x0070,
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/* 3D */ 0x006F,
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/* 3E */ INVALID,
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/* 3F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000E),
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/* 40 */ 0x02AB,
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/* 41 */ 0x02AC,
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/* 42 */ 0x02B2,
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/* 43 */ 0x02B1,
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/* 44 */ 0x02B3,
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/* 45 */ 0x02B4,
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/* 46 */ 0x02AE,
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/* 47 */ 0x02AD,
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/* 48 */ 0x00A7,
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/* 49 */ 0x00A6,
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/* 4A */ 0x00A8,
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/* 4B */ 0x00AA,
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/* 4C */ 0x00A9,
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/* 4D */ 0x00A2,
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/* 4E */ 0x00A1,
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/* 4F */ 0x00A3,
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/* 50 */ 0x04B4,
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/* 51 */ 0x04B9,
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/* 52 */ 0x04B3,
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/* 53 */ 0x04AE,
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/* 54 */ 0x04AF,
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/* 55 */ 0x04B0,
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/* 56 */ 0x04B1,
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/* 57 */ 0x04B2,
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/* 58 */ 0x0449,
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/* 59 */ 0x0447,
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/* 5A */ 0x0448,
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/* 5B */ 0x0442,
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/* 5C */ 0x043E,
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/* 5D */ 0x043D,
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/* 5E */ 0x043F,
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/* 5F */ 0x0441,
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/* 60 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0007),
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/* 61 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0008),
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/* 62 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0013),
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/* 63 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0014),
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/* 64 */ INVALID,
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/* 65 */ INVALID,
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/* 66 */ INVALID,
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/* 67 */ INVALID,
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/* 68 */ 0x04B7,
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/* 69 */ 0x02A4,
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/* 6A */ 0x04AB,
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/* 6B */ 0x02A6,
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/* 6C */ 0x02B5,
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/* 6D */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0009),
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/* 6E */ 0x039F,
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/* 6F */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000A),
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/* 70 */ 0x02E8,
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/* 71 */ 0x02E2,
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/* 72 */ 0x02CA,
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/* 73 */ 0x02DE,
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/* 74 */ 0x02CE,
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/* 75 */ 0x02E1,
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/* 76 */ 0x02CB,
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/* 77 */ 0x02C7,
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/* 78 */ 0x02ED,
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/* 79 */ 0x02E6,
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/* 7A */ 0x02EB,
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/* 7B */ 0x02E5,
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/* 7C */ 0x02D5,
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/* 7D */ 0x02D3,
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/* 7E */ 0x02D8,
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/* 7F */ 0x02D1,
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/* 80 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0013),
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/* 81 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0014),
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/* 82 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0015),
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/* 83 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0016),
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/* 84 */ 0x055C,
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/* 85 */ 0x055D,
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/* 86 */ 0x06A8,
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/* 87 */ 0x06A7,
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/* 88 */ 0x0334,
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/* 89 */ 0x0336,
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/* 8A */ 0x0335,
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/* 8B */ 0x0331,
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/* 8C */ 0x031D,
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/* 8D */ 0x02F4,
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/* 8E */ 0x031C,
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/* 8F */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0017),
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/* 90 */ 0x06A9,
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/* 91 */ 0x06AB,
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/* 92 */ 0x06AA,
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/* 93 */ 0x06A3,
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/* 94 */ 0x06A2,
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/* 95 */ 0x06A4,
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/* 96 */ 0x06A6,
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/* 97 */ 0x06A5,
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/* 98 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000B),
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/* 99 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000C),
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/* 9A */ NODE(VXOpcodeTreeNodeType::MODE, 0x001D),
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/* 9B */ 0x069D,
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/* 9C */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000D),
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/* 9D */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000E),
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/* 9E */ 0x04EF,
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/* 9F */ 0x02EF,
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/* A0 */ 0x031B,
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/* A1 */ 0x0320,
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/* A2 */ 0x031F,
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/* A3 */ 0x031E,
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/* A4 */ 0x0367,
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/* A5 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000F),
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/* A6 */ 0x0076,
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/* A7 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0010),
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/* A8 */ 0x055E,
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/* A9 */ 0x055B,
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/* AA */ 0x053D,
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/* AB */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0011),
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/* AC */ 0x0300,
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/* AD */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0012),
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/* AE */ 0x0501,
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/* AF */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0013),
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/* B0 */ 0x0317,
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/* B1 */ 0x031A,
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/* B2 */ 0x0318,
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/* B3 */ 0x0319,
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/* B4 */ 0x0321,
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/* B5 */ 0x032C,
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/* B6 */ 0x032B,
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/* B7 */ 0x032A,
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/* B8 */ 0x032D,
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/* B9 */ 0x0330,
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/* BA */ 0x032F,
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/* BB */ 0x032E,
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/* BC */ 0x0329,
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/* BD */ 0x0324,
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/* BE */ 0x0323,
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/* BF */ 0x0322,
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/* C0 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0018),
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/* C1 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0019),
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/* C2 */ 0x04D9,
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/* C3 */ 0x04D8,
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/* C4 */ NODE(VXOpcodeTreeNodeType::VEX, 0x0000),
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/* C5 */ NODE(VXOpcodeTreeNodeType::VEX, 0x0001),
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/* C6 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001E),
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/* C7 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001F),
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/* C8 */ 0x00B4,
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/* C9 */ 0x02F5,
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/* CA */ 0x04DA,
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/* CB */ 0x04DB,
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/* CC */ 0x02BB,
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/* CD */ 0x02B9,
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/* CE */ NODE(VXOpcodeTreeNodeType::MODE, 0x0027),
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/* CF */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0017),
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/* D0 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0020),
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/* D1 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0021),
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/* D2 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0022),
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/* D3 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0023),
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/* D4 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0028),
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/* D5 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0029),
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/* D6 */ NODE(VXOpcodeTreeNodeType::MODE, 0x002A),
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/* D7 */ 0x06B2,
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/* D8 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0015),
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/* D9 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0016),
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/* DA */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0017),
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/* DB */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0018),
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/* DC */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0019),
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/* DD */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x001A),
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/* DE */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x001B),
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/* DF */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x001C),
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/* E0 */ 0x0306,
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/* E1 */ 0x0305,
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/* E2 */ 0x0304,
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/* E3 */ NODE(VXOpcodeTreeNodeType::ADDRESS_SIZE, 0x0000),
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/* E4 */ 0x02A9,
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/* E5 */ 0x02AA,
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/* E6 */ 0x039D,
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/* E7 */ 0x039E,
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/* E8 */ 0x004E,
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/* E9 */ 0x02DB,
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/* EA */ NODE(VXOpcodeTreeNodeType::MODE, 0x002B),
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/* EB */ 0x02DD,
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/* EC */ 0x02A7,
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/* ED */ 0x02A8,
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/* EE */ 0x039B,
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/* EF */ 0x039C,
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/* F0 */ 0x02FF,
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/* F1 */ 0x02BA,
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/* F2 */ 0x04D7,
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/* F3 */ 0x04D6,
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/* F4 */ 0x029D,
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/* F5 */ 0x0059,
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/* F6 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002C),
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/* F7 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002D),
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/* F8 */ 0x0053,
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/* F9 */ 0x0538,
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/* FA */ 0x0057,
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/* FB */ 0x053B,
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/* FC */ 0x0054,
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/* FD */ 0x0539,
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/* FE */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002E),
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/* FF */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002F),
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},
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{
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/* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0000),
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/* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0000),
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/* 02 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0003),
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/* 03 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0004),
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/* 04 */ INVALID,
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/* 05 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0005),
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/* 06 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0006),
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/* 07 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0007),
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/* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0008),
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/* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0009),
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/* 0A */ INVALID,
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/* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000A),
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/* 0C */ INVALID,
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/* 0D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000B),
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/* 0E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000C),
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/* 0F */ NODE(VXOpcodeTreeNodeType::AMD3DNOW, 0x0000),
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/* 10 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000D),
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/* 11 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000E),
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/* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0001),
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/* 13 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0011),
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/* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0012),
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/* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0013),
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/* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0002),
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/* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0016),
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/* 18 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0017),
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/* 19 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0018),
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/* 1A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0019),
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/* 1B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001A),
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/* 1C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001B),
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/* 1D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001C),
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/* 1E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001D),
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/* 1F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001E),
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/* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001F),
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/* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0020),
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/* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0021),
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/* 23 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0022),
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/* 24 */ INVALID,
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/* 25 */ INVALID,
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/* 26 */ INVALID,
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/* 27 */ INVALID,
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/* 28 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0023),
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/* 29 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0024),
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/* 2A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0025),
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/* 2B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0026),
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/* 2C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0027),
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/* 2D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0028),
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/* 2E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0029),
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/* 2F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002A),
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/* 30 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002B),
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/* 31 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002C),
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/* 32 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002D),
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/* 33 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002E),
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/* 34 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002F),
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/* 35 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0030),
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/* 36 */ INVALID,
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/* 37 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0031),
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/* 38 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0002),
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/* 39 */ INVALID,
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/* 3A */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0003),
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/* 3B */ INVALID,
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/* 3C */ INVALID,
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/* 3D */ INVALID,
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/* 3E */ INVALID,
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/* 3F */ INVALID,
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/* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0081),
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/* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0082),
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/* 42 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0083),
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/* 43 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0084),
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/* 44 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0085),
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/* 45 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0086),
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/* 46 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0087),
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/* 47 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0088),
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/* 48 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0089),
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/* 49 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008A),
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/* 4A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008B),
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/* 4B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008C),
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/* 4C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008D),
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/* 4D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008E),
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/* 4E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008F),
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/* 4F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0090),
|
|
/* 50 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0091),
|
|
/* 51 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0092),
|
|
/* 52 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0093),
|
|
/* 53 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0094),
|
|
/* 54 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0095),
|
|
/* 55 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0096),
|
|
/* 56 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0097),
|
|
/* 57 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0098),
|
|
/* 58 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0099),
|
|
/* 59 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009A),
|
|
/* 5A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009B),
|
|
/* 5B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009C),
|
|
/* 5C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009D),
|
|
/* 5D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009E),
|
|
/* 5E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009F),
|
|
/* 5F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A0),
|
|
/* 60 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A1),
|
|
/* 61 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A2),
|
|
/* 62 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A3),
|
|
/* 63 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A4),
|
|
/* 64 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A5),
|
|
/* 65 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A6),
|
|
/* 66 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A7),
|
|
/* 67 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A8),
|
|
/* 68 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A9),
|
|
/* 69 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AA),
|
|
/* 6A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AB),
|
|
/* 6B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AC),
|
|
/* 6C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AD),
|
|
/* 6D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AE),
|
|
/* 6E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AF),
|
|
/* 6F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B0),
|
|
/* 70 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B1),
|
|
/* 71 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B2),
|
|
/* 72 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B3),
|
|
/* 73 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B4),
|
|
/* 74 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B5),
|
|
/* 75 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B6),
|
|
/* 76 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B7),
|
|
/* 77 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B8),
|
|
/* 78 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B9),
|
|
/* 79 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BA),
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BB),
|
|
/* 7D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BC),
|
|
/* 7E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BD),
|
|
/* 7F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BE),
|
|
/* 80 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BF),
|
|
/* 81 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C0),
|
|
/* 82 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C1),
|
|
/* 83 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C2),
|
|
/* 84 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C3),
|
|
/* 85 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C4),
|
|
/* 86 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C5),
|
|
/* 87 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C6),
|
|
/* 88 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C7),
|
|
/* 89 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C8),
|
|
/* 8A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C9),
|
|
/* 8B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CA),
|
|
/* 8C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CB),
|
|
/* 8D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CC),
|
|
/* 8E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CD),
|
|
/* 8F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CE),
|
|
/* 90 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CF),
|
|
/* 91 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D0),
|
|
/* 92 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D1),
|
|
/* 93 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D2),
|
|
/* 94 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D3),
|
|
/* 95 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D4),
|
|
/* 96 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D5),
|
|
/* 97 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D6),
|
|
/* 98 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D7),
|
|
/* 99 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D8),
|
|
/* 9A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D9),
|
|
/* 9B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DA),
|
|
/* 9C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DB),
|
|
/* 9D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DC),
|
|
/* 9E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DD),
|
|
/* 9F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DE),
|
|
/* A0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DF),
|
|
/* A1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E0),
|
|
/* A2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E1),
|
|
/* A3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E2),
|
|
/* A4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E3),
|
|
/* A5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E4),
|
|
/* A6 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0003),
|
|
/* A7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0004),
|
|
/* A8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E7),
|
|
/* A9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E8),
|
|
/* AA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E9),
|
|
/* AB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EA),
|
|
/* AC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EB),
|
|
/* AD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EC),
|
|
/* AE */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0005),
|
|
/* AF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EF),
|
|
/* B0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F0),
|
|
/* B1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F1),
|
|
/* B2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F2),
|
|
/* B3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F3),
|
|
/* B4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F4),
|
|
/* B5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F5),
|
|
/* B6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F6),
|
|
/* B7 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F7),
|
|
/* B8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F8),
|
|
/* B9 */ INVALID,
|
|
/* BA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F9),
|
|
/* BB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FA),
|
|
/* BC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FB),
|
|
/* BD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FC),
|
|
/* BE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FD),
|
|
/* BF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FE),
|
|
/* C0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FF),
|
|
/* C1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0100),
|
|
/* C2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0101),
|
|
/* C3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0102),
|
|
/* C4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0103),
|
|
/* C5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0104),
|
|
/* C6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0105),
|
|
/* C7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0006),
|
|
/* C8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0108),
|
|
/* C9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0109),
|
|
/* CA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010A),
|
|
/* CB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010B),
|
|
/* CC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010C),
|
|
/* CD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010D),
|
|
/* CE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010E),
|
|
/* CF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010F),
|
|
/* D0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0110),
|
|
/* D1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0111),
|
|
/* D2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0112),
|
|
/* D3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0113),
|
|
/* D4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0114),
|
|
/* D5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0115),
|
|
/* D6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0116),
|
|
/* D7 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0117),
|
|
/* D8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0118),
|
|
/* D9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0119),
|
|
/* DA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011A),
|
|
/* DB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011B),
|
|
/* DC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011C),
|
|
/* DD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011D),
|
|
/* DE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011E),
|
|
/* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011F),
|
|
/* E0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0120),
|
|
/* E1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0121),
|
|
/* E2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0122),
|
|
/* E3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0123),
|
|
/* E4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0124),
|
|
/* E5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0125),
|
|
/* E6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0126),
|
|
/* E7 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0127),
|
|
/* E8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0128),
|
|
/* E9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0129),
|
|
/* EA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012A),
|
|
/* EB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012B),
|
|
/* EC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012C),
|
|
/* ED */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012D),
|
|
/* EE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012E),
|
|
/* EF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012F),
|
|
/* F0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0130),
|
|
/* F1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0131),
|
|
/* F2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0132),
|
|
/* F3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0133),
|
|
/* F4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0134),
|
|
/* F5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0135),
|
|
/* F6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0136),
|
|
/* F7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0007),
|
|
/* F8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0138),
|
|
/* F9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0139),
|
|
/* FA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013A),
|
|
/* FB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013B),
|
|
/* FC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013C),
|
|
/* FD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013D),
|
|
/* FE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013E),
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0032),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0033),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0034),
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0035),
|
|
/* 04 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0036),
|
|
/* 05 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0037),
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0038),
|
|
/* 07 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0039),
|
|
/* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003A),
|
|
/* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003B),
|
|
/* 0A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003C),
|
|
/* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003D),
|
|
/* 0C */ INVALID,
|
|
/* 0D */ INVALID,
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
/* 10 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003E),
|
|
/* 11 */ INVALID,
|
|
/* 12 */ INVALID,
|
|
/* 13 */ INVALID,
|
|
/* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003F),
|
|
/* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0040),
|
|
/* 16 */ INVALID,
|
|
/* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0041),
|
|
/* 18 */ INVALID,
|
|
/* 19 */ INVALID,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0042),
|
|
/* 1D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0043),
|
|
/* 1E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0044),
|
|
/* 1F */ INVALID,
|
|
/* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0045),
|
|
/* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0046),
|
|
/* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0047),
|
|
/* 23 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0048),
|
|
/* 24 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0049),
|
|
/* 25 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004A),
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004B),
|
|
/* 29 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004C),
|
|
/* 2A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004D),
|
|
/* 2B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004E),
|
|
/* 2C */ INVALID,
|
|
/* 2D */ INVALID,
|
|
/* 2E */ INVALID,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004F),
|
|
/* 31 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0050),
|
|
/* 32 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0051),
|
|
/* 33 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0052),
|
|
/* 34 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0053),
|
|
/* 35 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0054),
|
|
/* 36 */ INVALID,
|
|
/* 37 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0055),
|
|
/* 38 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0056),
|
|
/* 39 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0057),
|
|
/* 3A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0058),
|
|
/* 3B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0059),
|
|
/* 3C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005A),
|
|
/* 3D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005B),
|
|
/* 3E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005C),
|
|
/* 3F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005D),
|
|
/* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005E),
|
|
/* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005F),
|
|
/* 42 */ INVALID,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ INVALID,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ INVALID,
|
|
/* 51 */ INVALID,
|
|
/* 52 */ INVALID,
|
|
/* 53 */ INVALID,
|
|
/* 54 */ INVALID,
|
|
/* 55 */ INVALID,
|
|
/* 56 */ INVALID,
|
|
/* 57 */ INVALID,
|
|
/* 58 */ INVALID,
|
|
/* 59 */ INVALID,
|
|
/* 5A */ INVALID,
|
|
/* 5B */ INVALID,
|
|
/* 5C */ INVALID,
|
|
/* 5D */ INVALID,
|
|
/* 5E */ INVALID,
|
|
/* 5F */ INVALID,
|
|
/* 60 */ INVALID,
|
|
/* 61 */ INVALID,
|
|
/* 62 */ INVALID,
|
|
/* 63 */ INVALID,
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ INVALID,
|
|
/* 70 */ INVALID,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ INVALID,
|
|
/* 7D */ INVALID,
|
|
/* 7E */ INVALID,
|
|
/* 7F */ INVALID,
|
|
/* 80 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0060),
|
|
/* 81 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0061),
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ INVALID,
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ INVALID,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ INVALID,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ INVALID,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0062),
|
|
/* DC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0063),
|
|
/* DD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0064),
|
|
/* DE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0065),
|
|
/* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0066),
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ INVALID,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0067),
|
|
/* F1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0068),
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
/* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0069),
|
|
/* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006A),
|
|
/* 0A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006B),
|
|
/* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006C),
|
|
/* 0C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006D),
|
|
/* 0D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006E),
|
|
/* 0E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006F),
|
|
/* 0F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0070),
|
|
/* 10 */ INVALID,
|
|
/* 11 */ INVALID,
|
|
/* 12 */ INVALID,
|
|
/* 13 */ INVALID,
|
|
/* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0071),
|
|
/* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0072),
|
|
/* 16 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0073),
|
|
/* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0074),
|
|
/* 18 */ INVALID,
|
|
/* 19 */ INVALID,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ INVALID,
|
|
/* 1D */ INVALID,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0075),
|
|
/* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0076),
|
|
/* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0077),
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ INVALID,
|
|
/* 29 */ INVALID,
|
|
/* 2A */ INVALID,
|
|
/* 2B */ INVALID,
|
|
/* 2C */ INVALID,
|
|
/* 2D */ INVALID,
|
|
/* 2E */ INVALID,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
/* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0078),
|
|
/* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0079),
|
|
/* 42 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007A),
|
|
/* 43 */ INVALID,
|
|
/* 44 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007B),
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ INVALID,
|
|
/* 51 */ INVALID,
|
|
/* 52 */ INVALID,
|
|
/* 53 */ INVALID,
|
|
/* 54 */ INVALID,
|
|
/* 55 */ INVALID,
|
|
/* 56 */ INVALID,
|
|
/* 57 */ INVALID,
|
|
/* 58 */ INVALID,
|
|
/* 59 */ INVALID,
|
|
/* 5A */ INVALID,
|
|
/* 5B */ INVALID,
|
|
/* 5C */ INVALID,
|
|
/* 5D */ INVALID,
|
|
/* 5E */ INVALID,
|
|
/* 5F */ INVALID,
|
|
/* 60 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007C),
|
|
/* 61 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007D),
|
|
/* 62 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007E),
|
|
/* 63 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007F),
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ INVALID,
|
|
/* 70 */ INVALID,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ INVALID,
|
|
/* 7D */ INVALID,
|
|
/* 7E */ INVALID,
|
|
/* 7F */ INVALID,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ INVALID,
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ INVALID,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ INVALID,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ INVALID,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ INVALID,
|
|
/* DC */ INVALID,
|
|
/* DD */ INVALID,
|
|
/* DE */ INVALID,
|
|
/* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0080),
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ INVALID,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ INVALID,
|
|
/* F1 */ INVALID,
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
/* 08 */ INVALID,
|
|
/* 09 */ INVALID,
|
|
/* 0A */ INVALID,
|
|
/* 0B */ INVALID,
|
|
/* 0C */ INVALID,
|
|
/* 0D */ INVALID,
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
/* 10 */ 0x05E6,
|
|
/* 11 */ 0x05E5,
|
|
/* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0008),
|
|
/* 13 */ 0x05CC,
|
|
/* 14 */ 0x0698,
|
|
/* 15 */ 0x0696,
|
|
/* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0009),
|
|
/* 17 */ 0x05C7,
|
|
/* 18 */ INVALID,
|
|
/* 19 */ INVALID,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ INVALID,
|
|
/* 1D */ INVALID,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ INVALID,
|
|
/* 21 */ INVALID,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ 0x05B8,
|
|
/* 29 */ 0x05B7,
|
|
/* 2A */ INVALID,
|
|
/* 2B */ 0x05D2,
|
|
/* 2C */ INVALID,
|
|
/* 2D */ INVALID,
|
|
/* 2E */ 0x0694,
|
|
/* 2F */ 0x0581,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
/* 40 */ INVALID,
|
|
/* 41 */ INVALID,
|
|
/* 42 */ INVALID,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ INVALID,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ 0x05CE,
|
|
/* 51 */ 0x0689,
|
|
/* 52 */ 0x0684,
|
|
/* 53 */ 0x067E,
|
|
/* 54 */ 0x0575,
|
|
/* 55 */ 0x0573,
|
|
/* 56 */ 0x05F6,
|
|
/* 57 */ 0x069A,
|
|
/* 58 */ 0x0567,
|
|
/* 59 */ 0x05EF,
|
|
/* 5A */ 0x0587,
|
|
/* 5B */ 0x0583,
|
|
/* 5C */ 0x068E,
|
|
/* 5D */ 0x05AF,
|
|
/* 5E */ 0x0593,
|
|
/* 5F */ 0x05A9,
|
|
/* 60 */ INVALID,
|
|
/* 61 */ INVALID,
|
|
/* 62 */ INVALID,
|
|
/* 63 */ INVALID,
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ INVALID,
|
|
/* 70 */ INVALID,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0000),
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ INVALID,
|
|
/* 7D */ INVALID,
|
|
/* 7E */ INVALID,
|
|
/* 7F */ INVALID,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000A),
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ 0x057D,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ 0x0687,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ INVALID,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ INVALID,
|
|
/* DC */ INVALID,
|
|
/* DD */ INVALID,
|
|
/* DE */ INVALID,
|
|
/* DF */ INVALID,
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ INVALID,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ INVALID,
|
|
/* F1 */ INVALID,
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
/* 08 */ INVALID,
|
|
/* 09 */ INVALID,
|
|
/* 0A */ INVALID,
|
|
/* 0B */ INVALID,
|
|
/* 0C */ INVALID,
|
|
/* 0D */ INVALID,
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
/* 10 */ 0x05E4,
|
|
/* 11 */ 0x05E3,
|
|
/* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000B),
|
|
/* 13 */ 0x05CA,
|
|
/* 14 */ 0x0697,
|
|
/* 15 */ 0x0695,
|
|
/* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000C),
|
|
/* 17 */ 0x05C5,
|
|
/* 18 */ INVALID,
|
|
/* 19 */ INVALID,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ INVALID,
|
|
/* 1D */ INVALID,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ INVALID,
|
|
/* 21 */ INVALID,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ 0x05B5,
|
|
/* 29 */ 0x05B6,
|
|
/* 2A */ INVALID,
|
|
/* 2B */ 0x05D1,
|
|
/* 2C */ INVALID,
|
|
/* 2D */ INVALID,
|
|
/* 2E */ 0x0693,
|
|
/* 2F */ 0x0580,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
/* 40 */ INVALID,
|
|
/* 41 */ INVALID,
|
|
/* 42 */ INVALID,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ INVALID,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ 0x05CD,
|
|
/* 51 */ 0x0688,
|
|
/* 52 */ INVALID,
|
|
/* 53 */ INVALID,
|
|
/* 54 */ 0x0574,
|
|
/* 55 */ 0x0572,
|
|
/* 56 */ 0x05F5,
|
|
/* 57 */ 0x0699,
|
|
/* 58 */ 0x0566,
|
|
/* 59 */ 0x05EE,
|
|
/* 5A */ 0x0585,
|
|
/* 5B */ 0x0586,
|
|
/* 5C */ 0x068D,
|
|
/* 5D */ 0x05AE,
|
|
/* 5E */ 0x0592,
|
|
/* 5F */ 0x05A8,
|
|
/* 60 */ 0x0679,
|
|
/* 61 */ 0x067C,
|
|
/* 62 */ 0x067A,
|
|
/* 63 */ 0x05FB,
|
|
/* 64 */ 0x0614,
|
|
/* 65 */ 0x0617,
|
|
/* 66 */ 0x0615,
|
|
/* 67 */ 0x05FD,
|
|
/* 68 */ 0x0675,
|
|
/* 69 */ 0x0678,
|
|
/* 6A */ 0x0676,
|
|
/* 6B */ 0x05FA,
|
|
/* 6C */ 0x067B,
|
|
/* 6D */ 0x0677,
|
|
/* 6E */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0014),
|
|
/* 6F */ 0x05BF,
|
|
/* 70 */ 0x0654,
|
|
/* 71 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001B),
|
|
/* 72 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001C),
|
|
/* 73 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001D),
|
|
/* 74 */ 0x060E,
|
|
/* 75 */ 0x0611,
|
|
/* 76 */ 0x060F,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ 0x059C,
|
|
/* 7D */ 0x059E,
|
|
/* 7E */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0015),
|
|
/* 7F */ 0x05C0,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ INVALID,
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ 0x057C,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ 0x0630,
|
|
/* C5 */ 0x0623,
|
|
/* C6 */ 0x0686,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ 0x056A,
|
|
/* D1 */ 0x066B,
|
|
/* D2 */ 0x0665,
|
|
/* D3 */ 0x0669,
|
|
/* D4 */ 0x0600,
|
|
/* D5 */ 0x0650,
|
|
/* D6 */ 0x05D4,
|
|
/* D7 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0004),
|
|
/* D8 */ 0x0671,
|
|
/* D9 */ 0x0672,
|
|
/* DA */ 0x063C,
|
|
/* DB */ 0x0607,
|
|
/* DC */ 0x0603,
|
|
/* DD */ 0x0604,
|
|
/* DE */ 0x0636,
|
|
/* DF */ 0x0608,
|
|
/* E0 */ 0x0609,
|
|
/* E1 */ 0x0663,
|
|
/* E2 */ 0x0662,
|
|
/* E3 */ 0x060A,
|
|
/* E4 */ 0x064D,
|
|
/* E5 */ 0x064E,
|
|
/* E6 */ 0x058E,
|
|
/* E7 */ 0x05CF,
|
|
/* E8 */ 0x066F,
|
|
/* E9 */ 0x0670,
|
|
/* EA */ 0x063B,
|
|
/* EB */ 0x0651,
|
|
/* EC */ 0x0601,
|
|
/* ED */ 0x0602,
|
|
/* EE */ 0x0635,
|
|
/* EF */ 0x067D,
|
|
/* F0 */ INVALID,
|
|
/* F1 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0005),
|
|
/* F2 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0006),
|
|
/* F3 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0007),
|
|
/* F4 */ INVALID,
|
|
/* F5 */ 0x0632,
|
|
/* F6 */ 0x0652,
|
|
/* F7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000D),
|
|
/* F8 */ 0x066C,
|
|
/* F9 */ 0x0673,
|
|
/* FA */ 0x066D,
|
|
/* FB */ 0x066E,
|
|
/* FC */ 0x05FE,
|
|
/* FD */ 0x0605,
|
|
/* FE */ 0x05FF,
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0653,
|
|
/* 01 */ 0x0627,
|
|
/* 02 */ 0x0625,
|
|
/* 03 */ 0x0626,
|
|
/* 04 */ 0x0631,
|
|
/* 05 */ 0x062B,
|
|
/* 06 */ 0x0629,
|
|
/* 07 */ 0x062A,
|
|
/* 08 */ 0x0657,
|
|
/* 09 */ 0x0659,
|
|
/* 0A */ 0x0658,
|
|
/* 0B */ 0x064C,
|
|
/* 0C */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0000),
|
|
/* 0D */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0001),
|
|
/* 0E */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0002),
|
|
/* 0F */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0003),
|
|
/* 10 */ INVALID,
|
|
/* 11 */ INVALID,
|
|
/* 12 */ INVALID,
|
|
/* 13 */ INVALID,
|
|
/* 14 */ INVALID,
|
|
/* 15 */ INVALID,
|
|
/* 16 */ INVALID,
|
|
/* 17 */ 0x0674,
|
|
/* 18 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0004),
|
|
/* 19 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0005),
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ 0x05F7,
|
|
/* 1D */ 0x05F9,
|
|
/* 1E */ 0x05F8,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ 0x0642,
|
|
/* 21 */ 0x0640,
|
|
/* 22 */ 0x0641,
|
|
/* 23 */ 0x0643,
|
|
/* 24 */ 0x0644,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ 0x064B,
|
|
/* 29 */ 0x0610,
|
|
/* 2A */ 0x05D0,
|
|
/* 2B */ 0x05FC,
|
|
/* 2C */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0006),
|
|
/* 2D */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0007),
|
|
/* 2E */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0008),
|
|
/* 2F */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0009),
|
|
/* 30 */ 0x0647,
|
|
/* 31 */ 0x0645,
|
|
/* 32 */ 0x0646,
|
|
/* 33 */ 0x0649,
|
|
/* 34 */ 0x064A,
|
|
/* 35 */ 0x0648,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ 0x0616,
|
|
/* 38 */ 0x0639,
|
|
/* 39 */ 0x063A,
|
|
/* 3A */ 0x063E,
|
|
/* 3B */ 0x063D,
|
|
/* 3C */ 0x0633,
|
|
/* 3D */ 0x0634,
|
|
/* 3E */ 0x0638,
|
|
/* 3F */ 0x0637,
|
|
/* 40 */ 0x064F,
|
|
/* 41 */ 0x0628,
|
|
/* 42 */ INVALID,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ INVALID,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ INVALID,
|
|
/* 51 */ INVALID,
|
|
/* 52 */ INVALID,
|
|
/* 53 */ INVALID,
|
|
/* 54 */ INVALID,
|
|
/* 55 */ INVALID,
|
|
/* 56 */ INVALID,
|
|
/* 57 */ INVALID,
|
|
/* 58 */ INVALID,
|
|
/* 59 */ INVALID,
|
|
/* 5A */ INVALID,
|
|
/* 5B */ INVALID,
|
|
/* 5C */ INVALID,
|
|
/* 5D */ INVALID,
|
|
/* 5E */ INVALID,
|
|
/* 5F */ INVALID,
|
|
/* 60 */ INVALID,
|
|
/* 61 */ INVALID,
|
|
/* 62 */ INVALID,
|
|
/* 63 */ INVALID,
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ INVALID,
|
|
/* 70 */ INVALID,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ INVALID,
|
|
/* 7D */ INVALID,
|
|
/* 7E */ INVALID,
|
|
/* 7F */ INVALID,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ INVALID,
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ INVALID,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ INVALID,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ INVALID,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ 0x0570,
|
|
/* DC */ 0x056E,
|
|
/* DD */ 0x056F,
|
|
/* DE */ 0x056C,
|
|
/* DF */ 0x056D,
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ INVALID,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ INVALID,
|
|
/* F1 */ INVALID,
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000A),
|
|
/* 05 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000B),
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000C),
|
|
/* 07 */ INVALID,
|
|
/* 08 */ 0x0681,
|
|
/* 09 */ 0x0680,
|
|
/* 0A */ 0x0683,
|
|
/* 0B */ 0x0682,
|
|
/* 0C */ 0x0577,
|
|
/* 0D */ 0x0576,
|
|
/* 0E */ 0x060C,
|
|
/* 0F */ 0x0606,
|
|
/* 10 */ INVALID,
|
|
/* 11 */ INVALID,
|
|
/* 12 */ INVALID,
|
|
/* 13 */ INVALID,
|
|
/* 14 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000D),
|
|
/* 15 */ 0x0624,
|
|
/* 16 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0016),
|
|
/* 17 */ 0x059B,
|
|
/* 18 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0011),
|
|
/* 19 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0012),
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ INVALID,
|
|
/* 1D */ INVALID,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0013),
|
|
/* 21 */ 0x05A1,
|
|
/* 22 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0025),
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ INVALID,
|
|
/* 29 */ INVALID,
|
|
/* 2A */ INVALID,
|
|
/* 2B */ INVALID,
|
|
/* 2C */ INVALID,
|
|
/* 2D */ INVALID,
|
|
/* 2E */ INVALID,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
/* 40 */ 0x0597,
|
|
/* 41 */ 0x0596,
|
|
/* 42 */ 0x05E7,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ 0x060D,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0016),
|
|
/* 4B */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0017),
|
|
/* 4C */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0018),
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ INVALID,
|
|
/* 51 */ INVALID,
|
|
/* 52 */ INVALID,
|
|
/* 53 */ INVALID,
|
|
/* 54 */ INVALID,
|
|
/* 55 */ INVALID,
|
|
/* 56 */ INVALID,
|
|
/* 57 */ INVALID,
|
|
/* 58 */ INVALID,
|
|
/* 59 */ INVALID,
|
|
/* 5A */ INVALID,
|
|
/* 5B */ INVALID,
|
|
/* 5C */ INVALID,
|
|
/* 5D */ INVALID,
|
|
/* 5E */ INVALID,
|
|
/* 5F */ INVALID,
|
|
/* 60 */ 0x0613,
|
|
/* 61 */ 0x0612,
|
|
/* 62 */ 0x0619,
|
|
/* 63 */ 0x0618,
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ INVALID,
|
|
/* 70 */ INVALID,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ INVALID,
|
|
/* 7D */ INVALID,
|
|
/* 7E */ INVALID,
|
|
/* 7F */ INVALID,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ INVALID,
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ INVALID,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ INVALID,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ INVALID,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ INVALID,
|
|
/* DC */ INVALID,
|
|
/* DD */ INVALID,
|
|
/* DE */ INVALID,
|
|
/* DF */ 0x0571,
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ INVALID,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ INVALID,
|
|
/* F1 */ INVALID,
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
/* 08 */ INVALID,
|
|
/* 09 */ INVALID,
|
|
/* 0A */ INVALID,
|
|
/* 0B */ INVALID,
|
|
/* 0C */ INVALID,
|
|
/* 0D */ INVALID,
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
/* 10 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000E),
|
|
/* 11 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000F),
|
|
/* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0010),
|
|
/* 13 */ INVALID,
|
|
/* 14 */ INVALID,
|
|
/* 15 */ INVALID,
|
|
/* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0011),
|
|
/* 17 */ INVALID,
|
|
/* 18 */ INVALID,
|
|
/* 19 */ INVALID,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ INVALID,
|
|
/* 1D */ INVALID,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ INVALID,
|
|
/* 21 */ INVALID,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ INVALID,
|
|
/* 29 */ INVALID,
|
|
/* 2A */ 0x058B,
|
|
/* 2B */ INVALID,
|
|
/* 2C */ 0x0591,
|
|
/* 2D */ 0x058D,
|
|
/* 2E */ INVALID,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
/* 40 */ INVALID,
|
|
/* 41 */ INVALID,
|
|
/* 42 */ INVALID,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ INVALID,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ INVALID,
|
|
/* 51 */ 0x068B,
|
|
/* 52 */ 0x0685,
|
|
/* 53 */ 0x067F,
|
|
/* 54 */ INVALID,
|
|
/* 55 */ INVALID,
|
|
/* 56 */ INVALID,
|
|
/* 57 */ INVALID,
|
|
/* 58 */ 0x0569,
|
|
/* 59 */ 0x05F1,
|
|
/* 5A */ 0x058C,
|
|
/* 5B */ 0x058F,
|
|
/* 5C */ 0x0690,
|
|
/* 5D */ 0x05B1,
|
|
/* 5E */ 0x0595,
|
|
/* 5F */ 0x05AB,
|
|
/* 60 */ INVALID,
|
|
/* 61 */ INVALID,
|
|
/* 62 */ INVALID,
|
|
/* 63 */ INVALID,
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ 0x05C2,
|
|
/* 70 */ 0x0655,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ INVALID,
|
|
/* 7D */ INVALID,
|
|
/* 7E */ 0x05D3,
|
|
/* 7F */ 0x05C1,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ INVALID,
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ 0x057F,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ INVALID,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ INVALID,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ INVALID,
|
|
/* DC */ INVALID,
|
|
/* DD */ INVALID,
|
|
/* DE */ INVALID,
|
|
/* DF */ INVALID,
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ 0x0582,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ INVALID,
|
|
/* F1 */ INVALID,
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
/* 08 */ INVALID,
|
|
/* 09 */ INVALID,
|
|
/* 0A */ INVALID,
|
|
/* 0B */ INVALID,
|
|
/* 0C */ INVALID,
|
|
/* 0D */ INVALID,
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
/* 10 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0012),
|
|
/* 11 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0013),
|
|
/* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0014),
|
|
/* 13 */ INVALID,
|
|
/* 14 */ INVALID,
|
|
/* 15 */ INVALID,
|
|
/* 16 */ INVALID,
|
|
/* 17 */ INVALID,
|
|
/* 18 */ INVALID,
|
|
/* 19 */ INVALID,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ INVALID,
|
|
/* 1D */ INVALID,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ INVALID,
|
|
/* 21 */ INVALID,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ INVALID,
|
|
/* 29 */ INVALID,
|
|
/* 2A */ 0x058A,
|
|
/* 2B */ INVALID,
|
|
/* 2C */ 0x0590,
|
|
/* 2D */ 0x0588,
|
|
/* 2E */ INVALID,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
/* 40 */ INVALID,
|
|
/* 41 */ INVALID,
|
|
/* 42 */ INVALID,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ INVALID,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ INVALID,
|
|
/* 51 */ 0x068A,
|
|
/* 52 */ INVALID,
|
|
/* 53 */ INVALID,
|
|
/* 54 */ INVALID,
|
|
/* 55 */ INVALID,
|
|
/* 56 */ INVALID,
|
|
/* 57 */ INVALID,
|
|
/* 58 */ 0x0568,
|
|
/* 59 */ 0x05F0,
|
|
/* 5A */ 0x0589,
|
|
/* 5B */ INVALID,
|
|
/* 5C */ 0x068F,
|
|
/* 5D */ 0x05B0,
|
|
/* 5E */ 0x0594,
|
|
/* 5F */ 0x05AA,
|
|
/* 60 */ INVALID,
|
|
/* 61 */ INVALID,
|
|
/* 62 */ INVALID,
|
|
/* 63 */ INVALID,
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ INVALID,
|
|
/* 70 */ 0x0656,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ 0x059D,
|
|
/* 7D */ 0x059F,
|
|
/* 7E */ INVALID,
|
|
/* 7F */ INVALID,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ INVALID,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ INVALID,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ INVALID,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ INVALID,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ INVALID,
|
|
/* 97 */ INVALID,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ INVALID,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ INVALID,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ INVALID,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ INVALID,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ INVALID,
|
|
/* A7 */ INVALID,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ INVALID,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ INVALID,
|
|
/* AF */ INVALID,
|
|
/* B0 */ INVALID,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ INVALID,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ INVALID,
|
|
/* B7 */ INVALID,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ INVALID,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ INVALID,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ 0x057E,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ INVALID,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ 0x056B,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ INVALID,
|
|
/* DC */ INVALID,
|
|
/* DD */ INVALID,
|
|
/* DE */ INVALID,
|
|
/* DF */ INVALID,
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ 0x0584,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ 0x05A2,
|
|
/* F1 */ INVALID,
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeModrmMod[][2] =
|
|
{
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0001),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0002),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000F),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0010),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0014),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0015),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E5),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E6),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00ED),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EE),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0106),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0107),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0137),
|
|
},
|
|
{
|
|
/* 00 */ 0x05CB,
|
|
/* 01 */ 0x05C3,
|
|
},
|
|
{
|
|
/* 00 */ 0x05C6,
|
|
/* 01 */ 0x05C8,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001A),
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05C9,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05C4,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05A3,
|
|
},
|
|
{
|
|
/* 00 */ 0x05E2,
|
|
/* 01 */ 0x05DF,
|
|
},
|
|
{
|
|
/* 00 */ 0x05E0,
|
|
/* 01 */ 0x05E1,
|
|
},
|
|
{
|
|
/* 00 */ 0x05DE,
|
|
/* 01 */ 0x05DD,
|
|
},
|
|
{
|
|
/* 00 */ 0x05DB,
|
|
/* 01 */ 0x05DC,
|
|
},
|
|
{
|
|
/* 00 */ 0x05DA,
|
|
/* 01 */ 0x05D9,
|
|
},
|
|
{
|
|
/* 00 */ 0x05D8,
|
|
/* 01 */ 0x05D7,
|
|
},
|
|
{
|
|
/* 00 */ 0x05BE,
|
|
/* 01 */ 0x05BD,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0024),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0000),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0025),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0001),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0026),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0002),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0027),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0003),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0028),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0004),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0029),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0005),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002A),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0006),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002B),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0007),
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeModrmReg[][8] =
|
|
{
|
|
{
|
|
/* 00 */ 0x0531,
|
|
/* 01 */ 0x0541,
|
|
/* 02 */ 0x02FC,
|
|
/* 03 */ 0x0309,
|
|
/* 04 */ 0x0598,
|
|
/* 05 */ 0x0599,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0516,
|
|
/* 01 */ 0x052F,
|
|
/* 02 */ 0x02F9,
|
|
/* 03 */ 0x02FB,
|
|
/* 04 */ 0x0533,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x02FE,
|
|
/* 07 */ 0x02C0,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0000),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0001),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0002),
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0003),
|
|
/* 04 */ 0x0532,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x02FD,
|
|
/* 07 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0004),
|
|
},
|
|
{
|
|
/* 00 */ 0x0455,
|
|
/* 01 */ 0x0456,
|
|
/* 02 */ 0x0457,
|
|
/* 03 */ 0x0458,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x0486,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ 0x0479,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x0470,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x0485,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ 0x0478,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x0473,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x047E,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ 0x0475,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x0468,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x047C,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ 0x0476,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x046A,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x0482,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x046D,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x0481,
|
|
/* 03 */ 0x0480,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x046C,
|
|
/* 07 */ 0x046B,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0005),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0006),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0007),
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0008),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0009),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000A),
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000B),
|
|
/* 04 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000C),
|
|
/* 05 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000D),
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0296,
|
|
/* 01 */ 0x0295,
|
|
/* 02 */ 0x02F2,
|
|
/* 03 */ 0x053C,
|
|
/* 04 */ 0x06C0,
|
|
/* 05 */ 0x06BF,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ 0x0055,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ 0x02F7,
|
|
/* 06 */ 0x0310,
|
|
/* 07 */ 0x0515,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ 0x0043,
|
|
/* 05 */ 0x0049,
|
|
/* 06 */ 0x0047,
|
|
/* 07 */ 0x0045,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0006),
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0015),
|
|
/* 07 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0016),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0017),
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0018),
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x04D3,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x000F,
|
|
/* 01 */ 0x0392,
|
|
/* 02 */ 0x0005,
|
|
/* 03 */ 0x04FF,
|
|
/* 04 */ 0x0028,
|
|
/* 05 */ 0x0544,
|
|
/* 06 */ 0x06BC,
|
|
/* 07 */ 0x006E,
|
|
},
|
|
{
|
|
/* 00 */ 0x0013,
|
|
/* 01 */ 0x0391,
|
|
/* 02 */ 0x0009,
|
|
/* 03 */ 0x0500,
|
|
/* 04 */ 0x0029,
|
|
/* 05 */ 0x0543,
|
|
/* 06 */ 0x06B5,
|
|
/* 07 */ 0x0072,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0015),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0016),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0017),
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0018),
|
|
/* 04 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0019),
|
|
/* 05 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001A),
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001B),
|
|
/* 07 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001C),
|
|
},
|
|
{
|
|
/* 00 */ 0x0012,
|
|
/* 01 */ 0x0397,
|
|
/* 02 */ 0x0008,
|
|
/* 03 */ 0x04FD,
|
|
/* 04 */ 0x002B,
|
|
/* 05 */ 0x0545,
|
|
/* 06 */ 0x06B4,
|
|
/* 07 */ 0x0071,
|
|
},
|
|
{
|
|
/* 00 */ 0x0440,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04DE,
|
|
/* 01 */ 0x04E6,
|
|
/* 02 */ 0x04C6,
|
|
/* 03 */ 0x04D0,
|
|
/* 04 */ 0x0517,
|
|
/* 05 */ 0x0526,
|
|
/* 06 */ 0x051D,
|
|
/* 07 */ 0x04F3,
|
|
},
|
|
{
|
|
/* 00 */ 0x04DF,
|
|
/* 01 */ 0x04E7,
|
|
/* 02 */ 0x04C7,
|
|
/* 03 */ 0x04CE,
|
|
/* 04 */ 0x051C,
|
|
/* 05 */ 0x0528,
|
|
/* 06 */ 0x051E,
|
|
/* 07 */ 0x04F6,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x068C,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x066A,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ 0x0664,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0001),
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x0666,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ 0x0661,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0002),
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x0668,
|
|
/* 03 */ 0x0667,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0003),
|
|
/* 07 */ 0x065C,
|
|
},
|
|
{
|
|
/* 00 */ 0x0333,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0332,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04DD,
|
|
/* 01 */ 0x04E5,
|
|
/* 02 */ 0x04C8,
|
|
/* 03 */ 0x04CD,
|
|
/* 04 */ 0x0522,
|
|
/* 05 */ 0x0527,
|
|
/* 06 */ 0x051F,
|
|
/* 07 */ 0x04F1,
|
|
},
|
|
{
|
|
/* 00 */ 0x04DC,
|
|
/* 01 */ 0x04E2,
|
|
/* 02 */ 0x04C5,
|
|
/* 03 */ 0x04CF,
|
|
/* 04 */ 0x0520,
|
|
/* 05 */ 0x052A,
|
|
/* 06 */ 0x0519,
|
|
/* 07 */ 0x04F4,
|
|
},
|
|
{
|
|
/* 00 */ 0x04E1,
|
|
/* 01 */ 0x04E3,
|
|
/* 02 */ 0x04C3,
|
|
/* 03 */ 0x04CC,
|
|
/* 04 */ 0x0521,
|
|
/* 05 */ 0x0529,
|
|
/* 06 */ 0x051A,
|
|
/* 07 */ 0x04F2,
|
|
},
|
|
{
|
|
/* 00 */ 0x04E0,
|
|
/* 01 */ 0x04E4,
|
|
/* 02 */ 0x04C4,
|
|
/* 03 */ 0x04CB,
|
|
/* 04 */ 0x0518,
|
|
/* 05 */ 0x0525,
|
|
/* 06 */ 0x051B,
|
|
/* 07 */ 0x04F5,
|
|
},
|
|
{
|
|
/* 00 */ 0x00BB,
|
|
/* 01 */ 0x01CF,
|
|
/* 02 */ 0x0119,
|
|
/* 03 */ 0x013D,
|
|
/* 04 */ 0x022C,
|
|
/* 05 */ 0x0245,
|
|
/* 06 */ 0x0166,
|
|
/* 07 */ 0x0171,
|
|
},
|
|
{
|
|
/* 00 */ 0x01BC,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x01FF,
|
|
/* 03 */ 0x020B,
|
|
/* 04 */ 0x01C3,
|
|
/* 05 */ 0x01C2,
|
|
/* 06 */ 0x01EB,
|
|
/* 07 */ 0x01EA,
|
|
},
|
|
{
|
|
/* 00 */ 0x019A,
|
|
/* 01 */ 0x01A8,
|
|
/* 02 */ 0x019C,
|
|
/* 03 */ 0x019F,
|
|
/* 04 */ 0x01B3,
|
|
/* 05 */ 0x01B5,
|
|
/* 06 */ 0x01A1,
|
|
/* 07 */ 0x01A3,
|
|
},
|
|
{
|
|
/* 00 */ 0x01A4,
|
|
/* 01 */ 0x01B1,
|
|
/* 02 */ 0x01AB,
|
|
/* 03 */ 0x01AD,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ 0x01BA,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ 0x020A,
|
|
},
|
|
{
|
|
/* 00 */ 0x00BA,
|
|
/* 01 */ 0x01D2,
|
|
/* 02 */ 0x0118,
|
|
/* 03 */ 0x013E,
|
|
/* 04 */ 0x022B,
|
|
/* 05 */ 0x0243,
|
|
/* 06 */ 0x0158,
|
|
/* 07 */ 0x017A,
|
|
},
|
|
{
|
|
/* 00 */ 0x01BB,
|
|
/* 01 */ 0x01AF,
|
|
/* 02 */ 0x01FE,
|
|
/* 03 */ 0x0209,
|
|
/* 04 */ 0x01F3,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ 0x01E8,
|
|
/* 07 */ 0x01ED,
|
|
},
|
|
{
|
|
/* 00 */ 0x019B,
|
|
/* 01 */ 0x01A7,
|
|
/* 02 */ 0x019D,
|
|
/* 03 */ 0x019E,
|
|
/* 04 */ 0x01B2,
|
|
/* 05 */ 0x01B4,
|
|
/* 06 */ 0x01A0,
|
|
/* 07 */ 0x01A2,
|
|
},
|
|
{
|
|
/* 00 */ 0x01A6,
|
|
/* 01 */ 0x01B0,
|
|
/* 02 */ 0x01AA,
|
|
/* 03 */ 0x01AE,
|
|
/* 04 */ 0x00D2,
|
|
/* 05 */ 0x01A5,
|
|
/* 06 */ 0x00D3,
|
|
/* 07 */ 0x01AC,
|
|
},
|
|
{
|
|
/* 00 */ 0x0557,
|
|
/* 01 */ 0x0558,
|
|
/* 02 */ 0x038E,
|
|
/* 03 */ 0x0385,
|
|
/* 04 */ 0x037E,
|
|
/* 05 */ 0x02A5,
|
|
/* 06 */ 0x00AC,
|
|
/* 07 */ 0x02A0,
|
|
},
|
|
{
|
|
/* 00 */ 0x0559,
|
|
/* 01 */ 0x055A,
|
|
/* 02 */ 0x038D,
|
|
/* 03 */ 0x0384,
|
|
/* 04 */ 0x037D,
|
|
/* 05 */ 0x02A3,
|
|
/* 06 */ 0x00AB,
|
|
/* 07 */ 0x02A1,
|
|
},
|
|
{
|
|
/* 00 */ 0x02AF,
|
|
/* 01 */ 0x00A4,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02B0,
|
|
/* 01 */ 0x00A5,
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x002C),
|
|
/* 03 */ 0x004C,
|
|
/* 04 */ 0x02D9,
|
|
/* 05 */ 0x02DA,
|
|
/* 06 */ 0x04B8,
|
|
/* 07 */ INVALID,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeModrmRm[][8] =
|
|
{
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0000),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0001),
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0002),
|
|
/* 04 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0003),
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0315,
|
|
/* 01 */ 0x0383,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06B1,
|
|
/* 01 */ 0x06C1,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0004),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0005),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0006),
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0007),
|
|
/* 04 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0008),
|
|
/* 05 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0009),
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000A),
|
|
/* 07 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000B),
|
|
},
|
|
{
|
|
/* 00 */ 0x0550,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000C),
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0316,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06C2,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06C3,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06C4,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06AF,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06AC,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06AE,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06AD,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06B0,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeMandatory[][4] =
|
|
{
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0000),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0001),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0002),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02F0,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0307,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0551,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0058,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0556,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02BD,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x069E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0561,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0454,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0189,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0379,
|
|
/* 01 */ 0x0368,
|
|
/* 02 */ 0x0371,
|
|
/* 03 */ 0x0377,
|
|
},
|
|
{
|
|
/* 00 */ 0x0378,
|
|
/* 01 */ 0x036A,
|
|
/* 02 */ 0x0370,
|
|
/* 03 */ 0x0376,
|
|
},
|
|
{
|
|
/* 00 */ 0x0355,
|
|
/* 01 */ 0x0345,
|
|
/* 02 */ 0x036D,
|
|
/* 03 */ 0x0353,
|
|
},
|
|
{
|
|
/* 00 */ 0x034C,
|
|
/* 01 */ 0x0346,
|
|
/* 02 */ 0x036E,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0354,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0352,
|
|
},
|
|
{
|
|
/* 00 */ 0x0565,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0564,
|
|
},
|
|
{
|
|
/* 00 */ 0x0563,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0562,
|
|
},
|
|
{
|
|
/* 00 */ 0x0350,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x036B,
|
|
/* 03 */ 0x034E,
|
|
},
|
|
{
|
|
/* 00 */ 0x0351,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x036C,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x034F,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x034D,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0003),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x038A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x038B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x038C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0389,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0386,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0387,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0388,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0325,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0328,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0327,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0326,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x033A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0338,
|
|
},
|
|
{
|
|
/* 00 */ 0x0339,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0337,
|
|
},
|
|
{
|
|
/* 00 */ 0x008D,
|
|
/* 01 */ 0x0093,
|
|
/* 02 */ 0x0094,
|
|
/* 03 */ 0x008C,
|
|
},
|
|
{
|
|
/* 00 */ 0x035C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x035B,
|
|
},
|
|
{
|
|
/* 00 */ 0x009A,
|
|
/* 01 */ 0x009B,
|
|
/* 02 */ 0x009C,
|
|
/* 03 */ 0x0098,
|
|
},
|
|
{
|
|
/* 00 */ 0x0090,
|
|
/* 01 */ 0x0091,
|
|
/* 02 */ 0x0096,
|
|
/* 03 */ 0x008A,
|
|
},
|
|
{
|
|
/* 00 */ 0x0560,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x055F,
|
|
},
|
|
{
|
|
/* 00 */ 0x0082,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0081,
|
|
},
|
|
{
|
|
/* 00 */ 0x069F,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04D4,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04D1,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04D2,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0003),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0004),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x029A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x045B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x045C,
|
|
},
|
|
{
|
|
/* 00 */ 0x03FD,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03FE,
|
|
},
|
|
{
|
|
/* 00 */ 0x03FA,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03F9,
|
|
},
|
|
{
|
|
/* 00 */ 0x03FB,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03FC,
|
|
},
|
|
{
|
|
/* 00 */ 0x040E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x040F,
|
|
},
|
|
{
|
|
/* 00 */ 0x0405,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0404,
|
|
},
|
|
{
|
|
/* 00 */ 0x0400,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0401,
|
|
},
|
|
{
|
|
/* 00 */ 0x0402,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0403,
|
|
},
|
|
{
|
|
/* 00 */ 0x0461,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0462,
|
|
},
|
|
{
|
|
/* 00 */ 0x0466,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0465,
|
|
},
|
|
{
|
|
/* 00 */ 0x0464,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0463,
|
|
},
|
|
{
|
|
/* 00 */ 0x0431,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0432,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03CA,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0037,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0036,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x049A,
|
|
},
|
|
{
|
|
/* 00 */ 0x03A3,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03A2,
|
|
},
|
|
{
|
|
/* 00 */ 0x03A6,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03A7,
|
|
},
|
|
{
|
|
/* 00 */ 0x03A4,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03A5,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0426,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0424,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0425,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0428,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0429,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0427,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0430,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03D1,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0359,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03AC,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x042C,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x042A,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x042B,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x042E,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x042F,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x042D,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03DA,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x041A,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x041B,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0421,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0420,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0412,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0413,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0419,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0418,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0438,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03FF,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0005),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0006),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0023,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0021,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0022,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x001F,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0020,
|
|
},
|
|
{
|
|
/* 00 */ 0x033B,
|
|
/* 01 */ 0x0086,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x033C,
|
|
/* 01 */ 0x0085,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04E9,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04E8,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04EB,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04EA,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0035,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0034,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03CB,
|
|
},
|
|
{
|
|
/* 00 */ 0x03BF,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03C0,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03DF,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03E3,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0000),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x00B5,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0408,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x02B7,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0001),
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x00B2,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x00B1,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x037C,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03CC,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03D5,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03D4,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03DE,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03DD,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0024,
|
|
},
|
|
{
|
|
/* 00 */ 0x0067,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0064,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x005C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x005B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x005E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0063,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x005D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x005A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0069,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0066,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0068,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0065,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0061,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0060,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0062,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x005F,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0357,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0356,
|
|
},
|
|
{
|
|
/* 00 */ 0x0535,
|
|
/* 01 */ 0x0536,
|
|
/* 02 */ 0x0537,
|
|
/* 03 */ 0x0534,
|
|
},
|
|
{
|
|
/* 00 */ 0x04ED,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x04EE,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04C9,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x04CA,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0032,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0031,
|
|
},
|
|
{
|
|
/* 00 */ 0x0030,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x002F,
|
|
},
|
|
{
|
|
/* 00 */ 0x039A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0399,
|
|
},
|
|
{
|
|
/* 00 */ 0x06BE,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x06BD,
|
|
},
|
|
{
|
|
/* 00 */ 0x001A,
|
|
/* 01 */ 0x001B,
|
|
/* 02 */ 0x001C,
|
|
/* 03 */ 0x0019,
|
|
},
|
|
{
|
|
/* 00 */ 0x0380,
|
|
/* 01 */ 0x0381,
|
|
/* 02 */ 0x0382,
|
|
/* 03 */ 0x037F,
|
|
},
|
|
{
|
|
/* 00 */ 0x008F,
|
|
/* 01 */ 0x0092,
|
|
/* 02 */ 0x0095,
|
|
/* 03 */ 0x008B,
|
|
},
|
|
{
|
|
/* 00 */ 0x0088,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x0099,
|
|
/* 03 */ 0x008E,
|
|
},
|
|
{
|
|
/* 00 */ 0x054D,
|
|
/* 01 */ 0x054E,
|
|
/* 02 */ 0x054F,
|
|
/* 03 */ 0x054C,
|
|
},
|
|
{
|
|
/* 00 */ 0x0312,
|
|
/* 01 */ 0x0313,
|
|
/* 02 */ 0x0314,
|
|
/* 03 */ 0x0311,
|
|
},
|
|
{
|
|
/* 00 */ 0x00AE,
|
|
/* 01 */ 0x00AF,
|
|
/* 02 */ 0x00B0,
|
|
/* 03 */ 0x00AD,
|
|
},
|
|
{
|
|
/* 00 */ 0x030D,
|
|
/* 01 */ 0x030E,
|
|
/* 02 */ 0x030F,
|
|
/* 03 */ 0x030C,
|
|
},
|
|
{
|
|
/* 00 */ 0x04A2,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04A3,
|
|
},
|
|
{
|
|
/* 00 */ 0x04A7,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04A8,
|
|
},
|
|
{
|
|
/* 00 */ 0x04A5,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04A4,
|
|
},
|
|
{
|
|
/* 00 */ 0x03AA,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03AB,
|
|
},
|
|
{
|
|
/* 00 */ 0x03D7,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03D6,
|
|
},
|
|
{
|
|
/* 00 */ 0x03DC,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03DB,
|
|
},
|
|
{
|
|
/* 00 */ 0x03D8,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03D9,
|
|
},
|
|
{
|
|
/* 00 */ 0x03AD,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03AE,
|
|
},
|
|
{
|
|
/* 00 */ 0x049B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x049C,
|
|
},
|
|
{
|
|
/* 00 */ 0x04A1,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04A0,
|
|
},
|
|
{
|
|
/* 00 */ 0x049E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x049D,
|
|
},
|
|
{
|
|
/* 00 */ 0x03A8,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03A9,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04A6,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x049F,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0002),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0003),
|
|
},
|
|
{
|
|
/* 00 */ 0x0363,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x034A,
|
|
/* 03 */ 0x0348,
|
|
},
|
|
{
|
|
/* 00 */ 0x0460,
|
|
/* 01 */ 0x045F,
|
|
/* 02 */ 0x045E,
|
|
/* 03 */ 0x045D,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0004),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0005),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0006),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0007),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0008),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0009),
|
|
},
|
|
{
|
|
/* 00 */ 0x03CD,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03CE,
|
|
},
|
|
{
|
|
/* 00 */ 0x03D2,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03D3,
|
|
},
|
|
{
|
|
/* 00 */ 0x03D0,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03CF,
|
|
},
|
|
{
|
|
/* 00 */ 0x00B3,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0013),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0014),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x029C,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x029B,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x029F,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x029E,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0004),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x035F,
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0005),
|
|
},
|
|
{
|
|
/* 00 */ 0x0362,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x034B,
|
|
/* 03 */ 0x0349,
|
|
},
|
|
{
|
|
/* 00 */ 0x02E9,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02E3,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02C9,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02DF,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02CF,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02E0,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02CC,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02C8,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02EE,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02E7,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02EA,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02E4,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02D6,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02D4,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02D7,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02D2,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0512,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x050F,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0507,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0506,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0509,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x050E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0508,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0505,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0514,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0511,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0513,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0510,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x050C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x050B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x050D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x050A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04B5,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x044A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0083,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0044,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0524,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0523,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000A),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000B),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04B6,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0444,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04EC,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x004A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x052C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x052B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000C),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000D),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02A2,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x007C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x007D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0308,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0048,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02F8,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02FA,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x037B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x037A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ 0x044D,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000E),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0046,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0039,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x003A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0373,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0374,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06A1,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06A0,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0075,
|
|
/* 01 */ 0x0077,
|
|
/* 02 */ 0x007A,
|
|
/* 03 */ 0x0074,
|
|
},
|
|
{
|
|
/* 00 */ 0x035A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x040D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x040C,
|
|
},
|
|
{
|
|
/* 00 */ 0x03E4,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03E5,
|
|
},
|
|
{
|
|
/* 00 */ 0x052E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x052D,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000F),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0010),
|
|
/* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0011),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0012),
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x003F,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x003D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0040,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x003C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x003E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x003B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0042,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0041,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x001E,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x001D,
|
|
},
|
|
{
|
|
/* 00 */ 0x0487,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0488,
|
|
},
|
|
{
|
|
/* 00 */ 0x047D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x047F,
|
|
},
|
|
{
|
|
/* 00 */ 0x0483,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0484,
|
|
},
|
|
{
|
|
/* 00 */ 0x03B3,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03B4,
|
|
},
|
|
{
|
|
/* 00 */ 0x0439,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x043A,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x0347,
|
|
/* 02 */ 0x0366,
|
|
/* 03 */ 0x0361,
|
|
},
|
|
{
|
|
/* 00 */ 0x0422,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0423,
|
|
},
|
|
{
|
|
/* 00 */ 0x0494,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0493,
|
|
},
|
|
{
|
|
/* 00 */ 0x0496,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0495,
|
|
},
|
|
{
|
|
/* 00 */ 0x041E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x041F,
|
|
},
|
|
{
|
|
/* 00 */ 0x03C1,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03C2,
|
|
},
|
|
{
|
|
/* 00 */ 0x03BA,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03B9,
|
|
},
|
|
{
|
|
/* 00 */ 0x03BB,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03BC,
|
|
},
|
|
{
|
|
/* 00 */ 0x0417,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0416,
|
|
},
|
|
{
|
|
/* 00 */ 0x03C3,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03C4,
|
|
},
|
|
{
|
|
/* 00 */ 0x03C5,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03C6,
|
|
},
|
|
{
|
|
/* 00 */ 0x047A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x047B,
|
|
},
|
|
{
|
|
/* 00 */ 0x0477,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0474,
|
|
},
|
|
{
|
|
/* 00 */ 0x03C8,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03C9,
|
|
},
|
|
{
|
|
/* 00 */ 0x0434,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0435,
|
|
},
|
|
{
|
|
/* 00 */ 0x0436,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0437,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x0089,
|
|
/* 02 */ 0x0087,
|
|
/* 03 */ 0x0097,
|
|
},
|
|
{
|
|
/* 00 */ 0x035D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0358,
|
|
},
|
|
{
|
|
/* 00 */ 0x048F,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0490,
|
|
},
|
|
{
|
|
/* 00 */ 0x0492,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0491,
|
|
},
|
|
{
|
|
/* 00 */ 0x041C,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x041D,
|
|
},
|
|
{
|
|
/* 00 */ 0x0453,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0452,
|
|
},
|
|
{
|
|
/* 00 */ 0x03B6,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03B5,
|
|
},
|
|
{
|
|
/* 00 */ 0x03B8,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03B7,
|
|
},
|
|
{
|
|
/* 00 */ 0x0414,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0415,
|
|
},
|
|
{
|
|
/* 00 */ 0x04C1,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x04C2,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x02F1,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0472,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0471,
|
|
},
|
|
{
|
|
/* 00 */ 0x0469,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0467,
|
|
},
|
|
{
|
|
/* 00 */ 0x046E,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x046F,
|
|
},
|
|
{
|
|
/* 00 */ 0x043B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x043C,
|
|
},
|
|
{
|
|
/* 00 */ 0x0411,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0410,
|
|
},
|
|
{
|
|
/* 00 */ 0x045A,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0459,
|
|
},
|
|
{
|
|
/* 00 */ 0x030B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x030A,
|
|
},
|
|
{
|
|
/* 00 */ 0x0489,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x048A,
|
|
},
|
|
{
|
|
/* 00 */ 0x0498,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x0497,
|
|
},
|
|
{
|
|
/* 00 */ 0x048B,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x048C,
|
|
},
|
|
{
|
|
/* 00 */ 0x048D,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x048E,
|
|
},
|
|
{
|
|
/* 00 */ 0x03AF,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03B0,
|
|
},
|
|
{
|
|
/* 00 */ 0x03BE,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03BD,
|
|
},
|
|
{
|
|
/* 00 */ 0x03B1,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ 0x03B2,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeX87[][64] =
|
|
{
|
|
{
|
|
/* 00 */ 0x00BC,
|
|
/* 01 */ 0x00BF,
|
|
/* 02 */ 0x00C2,
|
|
/* 03 */ 0x00C1,
|
|
/* 04 */ 0x00C0,
|
|
/* 05 */ 0x00C5,
|
|
/* 06 */ 0x00C3,
|
|
/* 07 */ 0x00C4,
|
|
/* 08 */ 0x01CE,
|
|
/* 09 */ 0x01CD,
|
|
/* 0A */ 0x01D9,
|
|
/* 0B */ 0x01DA,
|
|
/* 0C */ 0x01DB,
|
|
/* 0D */ 0x01D6,
|
|
/* 0E */ 0x01D7,
|
|
/* 0F */ 0x01D8,
|
|
/* 10 */ 0x011A,
|
|
/* 11 */ 0x011C,
|
|
/* 12 */ 0x011B,
|
|
/* 13 */ 0x0117,
|
|
/* 14 */ 0x0116,
|
|
/* 15 */ 0x011D,
|
|
/* 16 */ 0x011F,
|
|
/* 17 */ 0x011E,
|
|
/* 18 */ 0x013A,
|
|
/* 19 */ 0x0141,
|
|
/* 1A */ 0x013C,
|
|
/* 1B */ 0x0138,
|
|
/* 1C */ 0x013B,
|
|
/* 1D */ 0x0140,
|
|
/* 1E */ 0x013F,
|
|
/* 1F */ 0x0139,
|
|
/* 20 */ 0x022E,
|
|
/* 21 */ 0x0226,
|
|
/* 22 */ 0x0229,
|
|
/* 23 */ 0x0232,
|
|
/* 24 */ 0x0231,
|
|
/* 25 */ 0x022D,
|
|
/* 26 */ 0x022A,
|
|
/* 27 */ 0x0227,
|
|
/* 28 */ 0x0246,
|
|
/* 29 */ 0x024B,
|
|
/* 2A */ 0x024C,
|
|
/* 2B */ 0x024A,
|
|
/* 2C */ 0x0248,
|
|
/* 2D */ 0x0249,
|
|
/* 2E */ 0x0250,
|
|
/* 2F */ 0x0251,
|
|
/* 30 */ 0x0161,
|
|
/* 31 */ 0x0162,
|
|
/* 32 */ 0x0155,
|
|
/* 33 */ 0x015A,
|
|
/* 34 */ 0x0159,
|
|
/* 35 */ 0x0156,
|
|
/* 36 */ 0x0157,
|
|
/* 37 */ 0x0163,
|
|
/* 38 */ 0x0172,
|
|
/* 39 */ 0x016F,
|
|
/* 3A */ 0x0170,
|
|
/* 3B */ 0x0173,
|
|
/* 3C */ 0x0176,
|
|
/* 3D */ 0x0177,
|
|
/* 3E */ 0x0174,
|
|
/* 3F */ 0x0175,
|
|
},
|
|
{
|
|
/* 00 */ 0x01BD,
|
|
/* 01 */ 0x01C0,
|
|
/* 02 */ 0x01BF,
|
|
/* 03 */ 0x01BE,
|
|
/* 04 */ 0x01B7,
|
|
/* 05 */ 0x01B6,
|
|
/* 06 */ 0x01B9,
|
|
/* 07 */ 0x01B8,
|
|
/* 08 */ 0x0281,
|
|
/* 09 */ 0x0282,
|
|
/* 0A */ 0x0283,
|
|
/* 0B */ 0x0280,
|
|
/* 0C */ 0x027D,
|
|
/* 0D */ 0x027E,
|
|
/* 0E */ 0x027F,
|
|
/* 0F */ 0x0284,
|
|
/* 10 */ 0x01E7,
|
|
/* 11 */ INVALID,
|
|
/* 12 */ INVALID,
|
|
/* 13 */ INVALID,
|
|
/* 14 */ INVALID,
|
|
/* 15 */ INVALID,
|
|
/* 16 */ INVALID,
|
|
/* 17 */ INVALID,
|
|
/* 18 */ 0x0213,
|
|
/* 19 */ 0x0212,
|
|
/* 1A */ 0x0215,
|
|
/* 1B */ 0x0214,
|
|
/* 1C */ 0x020F,
|
|
/* 1D */ 0x020E,
|
|
/* 1E */ 0x0211,
|
|
/* 1F */ 0x0210,
|
|
/* 20 */ 0x00D4,
|
|
/* 21 */ 0x00B7,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ 0x025A,
|
|
/* 25 */ 0x027C,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ 0x01C1,
|
|
/* 29 */ 0x01C5,
|
|
/* 2A */ 0x01C4,
|
|
/* 2B */ 0x01C8,
|
|
/* 2C */ 0x01C6,
|
|
/* 2D */ 0x01C7,
|
|
/* 2E */ 0x01C9,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ 0x00B6,
|
|
/* 31 */ 0x0298,
|
|
/* 32 */ 0x01F1,
|
|
/* 33 */ 0x01EE,
|
|
/* 34 */ 0x0297,
|
|
/* 35 */ 0x01F0,
|
|
/* 36 */ 0x0154,
|
|
/* 37 */ 0x01A9,
|
|
/* 38 */ 0x01EF,
|
|
/* 39 */ 0x0299,
|
|
/* 3A */ 0x01F8,
|
|
/* 3B */ 0x01F7,
|
|
/* 3C */ 0x01F2,
|
|
/* 3D */ 0x01F5,
|
|
/* 3E */ 0x01F6,
|
|
/* 3F */ 0x0153,
|
|
},
|
|
{
|
|
/* 00 */ 0x00D9,
|
|
/* 01 */ 0x00DA,
|
|
/* 02 */ 0x00DB,
|
|
/* 03 */ 0x00D6,
|
|
/* 04 */ 0x00D7,
|
|
/* 05 */ 0x00D8,
|
|
/* 06 */ 0x00DD,
|
|
/* 07 */ 0x00DC,
|
|
/* 08 */ 0x00E6,
|
|
/* 09 */ 0x00E7,
|
|
/* 0A */ 0x00E8,
|
|
/* 0B */ 0x00EC,
|
|
/* 0C */ 0x00ED,
|
|
/* 0D */ 0x00EB,
|
|
/* 0E */ 0x00E9,
|
|
/* 0F */ 0x00EA,
|
|
/* 10 */ 0x00E4,
|
|
/* 11 */ 0x00E5,
|
|
/* 12 */ 0x00E2,
|
|
/* 13 */ 0x00E3,
|
|
/* 14 */ 0x00DF,
|
|
/* 15 */ 0x00DE,
|
|
/* 16 */ 0x00E0,
|
|
/* 17 */ 0x00E1,
|
|
/* 18 */ 0x0113,
|
|
/* 19 */ 0x0114,
|
|
/* 1A */ 0x0115,
|
|
/* 1B */ 0x010F,
|
|
/* 1C */ 0x010E,
|
|
/* 1D */ 0x0110,
|
|
/* 1E */ 0x0111,
|
|
/* 1F */ 0x0112,
|
|
/* 20 */ INVALID,
|
|
/* 21 */ INVALID,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ INVALID,
|
|
/* 29 */ 0x027B,
|
|
/* 2A */ INVALID,
|
|
/* 2B */ INVALID,
|
|
/* 2C */ INVALID,
|
|
/* 2D */ INVALID,
|
|
/* 2E */ INVALID,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x00F0,
|
|
/* 01 */ 0x00F1,
|
|
/* 02 */ 0x00EE,
|
|
/* 03 */ 0x00EF,
|
|
/* 04 */ 0x00F4,
|
|
/* 05 */ 0x00F5,
|
|
/* 06 */ 0x00F2,
|
|
/* 07 */ 0x00F3,
|
|
/* 08 */ 0x0103,
|
|
/* 09 */ 0x0102,
|
|
/* 0A */ 0x0105,
|
|
/* 0B */ 0x0104,
|
|
/* 0C */ 0x00FF,
|
|
/* 0D */ 0x00FE,
|
|
/* 0E */ 0x0101,
|
|
/* 0F */ 0x0100,
|
|
/* 10 */ 0x00F8,
|
|
/* 11 */ 0x00F9,
|
|
/* 12 */ 0x00F6,
|
|
/* 13 */ 0x00F7,
|
|
/* 14 */ 0x00FC,
|
|
/* 15 */ 0x00FD,
|
|
/* 16 */ 0x00FA,
|
|
/* 17 */ 0x00FB,
|
|
/* 18 */ 0x010B,
|
|
/* 19 */ 0x010A,
|
|
/* 1A */ 0x010D,
|
|
/* 1B */ 0x010C,
|
|
/* 1C */ 0x0107,
|
|
/* 1D */ 0x0106,
|
|
/* 1E */ 0x0109,
|
|
/* 1F */ 0x0108,
|
|
/* 20 */ 0x01E5,
|
|
/* 21 */ 0x01E4,
|
|
/* 22 */ 0x00D5,
|
|
/* 23 */ 0x01E6,
|
|
/* 24 */ 0x01E9,
|
|
/* 25 */ 0x01F4,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ 0x0269,
|
|
/* 29 */ 0x026A,
|
|
/* 2A */ 0x0265,
|
|
/* 2B */ 0x0264,
|
|
/* 2C */ 0x0263,
|
|
/* 2D */ 0x0268,
|
|
/* 2E */ 0x0267,
|
|
/* 2F */ 0x0266,
|
|
/* 30 */ 0x0129,
|
|
/* 31 */ 0x0128,
|
|
/* 32 */ 0x012B,
|
|
/* 33 */ 0x012A,
|
|
/* 34 */ 0x012F,
|
|
/* 35 */ 0x012E,
|
|
/* 36 */ 0x012D,
|
|
/* 37 */ 0x012C,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x00B9,
|
|
/* 01 */ 0x00B8,
|
|
/* 02 */ 0x00C6,
|
|
/* 03 */ 0x00C9,
|
|
/* 04 */ 0x00C8,
|
|
/* 05 */ 0x00C7,
|
|
/* 06 */ 0x00BE,
|
|
/* 07 */ 0x00BD,
|
|
/* 08 */ 0x01D1,
|
|
/* 09 */ 0x01D0,
|
|
/* 0A */ 0x01D5,
|
|
/* 0B */ 0x01D4,
|
|
/* 0C */ 0x01D3,
|
|
/* 0D */ 0x01CC,
|
|
/* 0E */ 0x01CB,
|
|
/* 0F */ 0x01CA,
|
|
/* 10 */ 0x0125,
|
|
/* 11 */ 0x0124,
|
|
/* 12 */ 0x0127,
|
|
/* 13 */ 0x0126,
|
|
/* 14 */ 0x0121,
|
|
/* 15 */ 0x0120,
|
|
/* 16 */ 0x0123,
|
|
/* 17 */ 0x0122,
|
|
/* 18 */ 0x0148,
|
|
/* 19 */ 0x0142,
|
|
/* 1A */ 0x0145,
|
|
/* 1B */ 0x0144,
|
|
/* 1C */ 0x0143,
|
|
/* 1D */ 0x0147,
|
|
/* 1E */ 0x0146,
|
|
/* 1F */ 0x0149,
|
|
/* 20 */ 0x024F,
|
|
/* 21 */ 0x0247,
|
|
/* 22 */ 0x0241,
|
|
/* 23 */ 0x0242,
|
|
/* 24 */ 0x0240,
|
|
/* 25 */ 0x024E,
|
|
/* 26 */ 0x024D,
|
|
/* 27 */ 0x0244,
|
|
/* 28 */ 0x0228,
|
|
/* 29 */ 0x0235,
|
|
/* 2A */ 0x0234,
|
|
/* 2B */ 0x0237,
|
|
/* 2C */ 0x0236,
|
|
/* 2D */ 0x0233,
|
|
/* 2E */ 0x0230,
|
|
/* 2F */ 0x022F,
|
|
/* 30 */ 0x017B,
|
|
/* 31 */ 0x0178,
|
|
/* 32 */ 0x0179,
|
|
/* 33 */ 0x017C,
|
|
/* 34 */ 0x017F,
|
|
/* 35 */ 0x0180,
|
|
/* 36 */ 0x017D,
|
|
/* 37 */ 0x017E,
|
|
/* 38 */ 0x015E,
|
|
/* 39 */ 0x015F,
|
|
/* 3A */ 0x0160,
|
|
/* 3B */ 0x015B,
|
|
/* 3C */ 0x015C,
|
|
/* 3D */ 0x015D,
|
|
/* 3E */ 0x0164,
|
|
/* 3F */ 0x0165,
|
|
},
|
|
{
|
|
/* 00 */ 0x018F,
|
|
/* 01 */ 0x018E,
|
|
/* 02 */ 0x0191,
|
|
/* 03 */ 0x0190,
|
|
/* 04 */ 0x018B,
|
|
/* 05 */ 0x018A,
|
|
/* 06 */ 0x018D,
|
|
/* 07 */ 0x018C,
|
|
/* 08 */ 0x028A,
|
|
/* 09 */ 0x0289,
|
|
/* 0A */ 0x028C,
|
|
/* 0B */ 0x028B,
|
|
/* 0C */ 0x0286,
|
|
/* 0D */ 0x0285,
|
|
/* 0E */ 0x0288,
|
|
/* 0F */ 0x0287,
|
|
/* 10 */ 0x0200,
|
|
/* 11 */ 0x0202,
|
|
/* 12 */ 0x0201,
|
|
/* 13 */ 0x01FA,
|
|
/* 14 */ 0x01F9,
|
|
/* 15 */ 0x01FB,
|
|
/* 16 */ 0x01FD,
|
|
/* 17 */ 0x01FC,
|
|
/* 18 */ 0x020D,
|
|
/* 19 */ 0x020C,
|
|
/* 1A */ 0x0208,
|
|
/* 1B */ 0x0204,
|
|
/* 1C */ 0x0203,
|
|
/* 1D */ 0x0205,
|
|
/* 1E */ 0x0207,
|
|
/* 1F */ 0x0206,
|
|
/* 20 */ 0x025D,
|
|
/* 21 */ 0x025C,
|
|
/* 22 */ 0x025B,
|
|
/* 23 */ 0x025E,
|
|
/* 24 */ 0x0261,
|
|
/* 25 */ 0x0262,
|
|
/* 26 */ 0x025F,
|
|
/* 27 */ 0x0260,
|
|
/* 28 */ 0x0278,
|
|
/* 29 */ 0x0277,
|
|
/* 2A */ 0x027A,
|
|
/* 2B */ 0x0279,
|
|
/* 2C */ 0x0274,
|
|
/* 2D */ 0x0273,
|
|
/* 2E */ 0x0276,
|
|
/* 2F */ 0x0275,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x00CC,
|
|
/* 01 */ 0x00CD,
|
|
/* 02 */ 0x00CA,
|
|
/* 03 */ 0x00CB,
|
|
/* 04 */ 0x00D0,
|
|
/* 05 */ 0x00D1,
|
|
/* 06 */ 0x00CE,
|
|
/* 07 */ 0x00CF,
|
|
/* 08 */ 0x01E1,
|
|
/* 09 */ 0x01E0,
|
|
/* 0A */ 0x01E3,
|
|
/* 0B */ 0x01E2,
|
|
/* 0C */ 0x01DD,
|
|
/* 0D */ 0x01DC,
|
|
/* 0E */ 0x01DF,
|
|
/* 0F */ 0x01DE,
|
|
/* 10 */ 0x014F,
|
|
/* 11 */ 0x014E,
|
|
/* 12 */ 0x0151,
|
|
/* 13 */ 0x0150,
|
|
/* 14 */ 0x014B,
|
|
/* 15 */ 0x014A,
|
|
/* 16 */ 0x014D,
|
|
/* 17 */ 0x014C,
|
|
/* 18 */ INVALID,
|
|
/* 19 */ 0x0152,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ INVALID,
|
|
/* 1D */ INVALID,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ 0x0258,
|
|
/* 21 */ 0x0259,
|
|
/* 22 */ 0x0256,
|
|
/* 23 */ 0x0257,
|
|
/* 24 */ 0x0253,
|
|
/* 25 */ 0x0252,
|
|
/* 26 */ 0x0255,
|
|
/* 27 */ 0x0254,
|
|
/* 28 */ 0x023B,
|
|
/* 29 */ 0x023D,
|
|
/* 2A */ 0x023C,
|
|
/* 2B */ 0x0239,
|
|
/* 2C */ 0x0238,
|
|
/* 2D */ 0x023A,
|
|
/* 2E */ 0x023E,
|
|
/* 2F */ 0x023F,
|
|
/* 30 */ 0x0186,
|
|
/* 31 */ 0x0185,
|
|
/* 32 */ 0x0188,
|
|
/* 33 */ 0x0187,
|
|
/* 34 */ 0x0182,
|
|
/* 35 */ 0x0181,
|
|
/* 36 */ 0x0184,
|
|
/* 37 */ 0x0183,
|
|
/* 38 */ 0x016C,
|
|
/* 39 */ 0x016B,
|
|
/* 3A */ 0x016E,
|
|
/* 3B */ 0x016D,
|
|
/* 3C */ 0x0168,
|
|
/* 3D */ 0x0167,
|
|
/* 3E */ 0x016A,
|
|
/* 3F */ 0x0169,
|
|
},
|
|
{
|
|
/* 00 */ 0x0199,
|
|
/* 01 */ 0x0196,
|
|
/* 02 */ 0x0197,
|
|
/* 03 */ 0x0198,
|
|
/* 04 */ 0x0193,
|
|
/* 05 */ 0x0192,
|
|
/* 06 */ 0x0195,
|
|
/* 07 */ 0x0194,
|
|
/* 08 */ 0x028F,
|
|
/* 09 */ 0x0290,
|
|
/* 0A */ 0x028D,
|
|
/* 0B */ 0x028E,
|
|
/* 0C */ 0x0293,
|
|
/* 0D */ 0x0294,
|
|
/* 0E */ 0x0291,
|
|
/* 0F */ 0x0292,
|
|
/* 10 */ 0x021B,
|
|
/* 11 */ 0x021A,
|
|
/* 12 */ 0x021D,
|
|
/* 13 */ 0x021C,
|
|
/* 14 */ 0x0217,
|
|
/* 15 */ 0x0216,
|
|
/* 16 */ 0x0219,
|
|
/* 17 */ 0x0218,
|
|
/* 18 */ 0x0220,
|
|
/* 19 */ 0x0221,
|
|
/* 1A */ 0x021E,
|
|
/* 1B */ 0x021F,
|
|
/* 1C */ 0x0224,
|
|
/* 1D */ 0x0225,
|
|
/* 1E */ 0x0222,
|
|
/* 1F */ 0x0223,
|
|
/* 20 */ 0x01EC,
|
|
/* 21 */ INVALID,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ 0x0271,
|
|
/* 29 */ 0x0272,
|
|
/* 2A */ 0x026D,
|
|
/* 2B */ 0x026C,
|
|
/* 2C */ 0x026B,
|
|
/* 2D */ 0x0270,
|
|
/* 2E */ 0x026F,
|
|
/* 2F */ 0x026E,
|
|
/* 30 */ 0x0136,
|
|
/* 31 */ 0x0137,
|
|
/* 32 */ 0x0133,
|
|
/* 33 */ 0x0134,
|
|
/* 34 */ 0x0135,
|
|
/* 35 */ 0x0130,
|
|
/* 36 */ 0x0131,
|
|
/* 37 */ 0x0132,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeAddressSize[][3] =
|
|
{
|
|
{
|
|
/* 00 */ 0x02CD,
|
|
/* 01 */ 0x02D0,
|
|
/* 02 */ 0x02EC,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeOperandSize[][3] =
|
|
{
|
|
{
|
|
/* 00 */ 0x03E0,
|
|
/* 01 */ 0x03E1,
|
|
/* 02 */ 0x03E2,
|
|
},
|
|
{
|
|
/* 00 */ 0x0409,
|
|
/* 01 */ 0x040A,
|
|
/* 02 */ 0x040B,
|
|
},
|
|
{
|
|
/* 00 */ 0x033D,
|
|
/* 01 */ 0x0343,
|
|
/* 02 */ 0x035E,
|
|
},
|
|
{
|
|
/* 00 */ 0x0341,
|
|
/* 01 */ 0x0342,
|
|
/* 02 */ 0x0364,
|
|
},
|
|
{
|
|
/* 00 */ 0x0344,
|
|
/* 01 */ 0x033E,
|
|
/* 02 */ 0x0365,
|
|
},
|
|
{
|
|
/* 00 */ 0x0340,
|
|
/* 01 */ 0x033F,
|
|
/* 02 */ 0x0360,
|
|
},
|
|
{
|
|
/* 00 */ 0x007F,
|
|
/* 01 */ 0x0080,
|
|
/* 02 */ 0x007E,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000F),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0010),
|
|
/* 02 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0011),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0012),
|
|
/* 02 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02B8,
|
|
/* 01 */ 0x02B6,
|
|
/* 02 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x03A1,
|
|
/* 01 */ 0x03A0,
|
|
/* 02 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0050,
|
|
/* 01 */ 0x009E,
|
|
/* 02 */ 0x0052,
|
|
},
|
|
{
|
|
/* 00 */ 0x009D,
|
|
/* 01 */ 0x0051,
|
|
/* 02 */ 0x0084,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001E),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001F),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0020),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0021),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0022),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0023),
|
|
},
|
|
{
|
|
/* 00 */ 0x0372,
|
|
/* 01 */ 0x0369,
|
|
/* 02 */ 0x036F,
|
|
},
|
|
{
|
|
/* 00 */ 0x007B,
|
|
/* 01 */ 0x0078,
|
|
/* 02 */ 0x0079,
|
|
},
|
|
{
|
|
/* 00 */ 0x0540,
|
|
/* 01 */ 0x053E,
|
|
/* 02 */ 0x053F,
|
|
},
|
|
{
|
|
/* 00 */ 0x0303,
|
|
/* 01 */ 0x0301,
|
|
/* 02 */ 0x0302,
|
|
},
|
|
{
|
|
/* 00 */ 0x0504,
|
|
/* 01 */ 0x0502,
|
|
/* 02 */ 0x0503,
|
|
},
|
|
{
|
|
/* 00 */ 0x05BB,
|
|
/* 01 */ 0x05BA,
|
|
/* 02 */ 0x05D5,
|
|
},
|
|
{
|
|
/* 00 */ 0x05B9,
|
|
/* 01 */ 0x05BC,
|
|
/* 02 */ 0x05D6,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000E),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000F),
|
|
/* 02 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0010),
|
|
},
|
|
{
|
|
/* 00 */ 0x02C6,
|
|
/* 01 */ 0x02C4,
|
|
/* 02 */ 0x02C5,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeMode[][2] =
|
|
{
|
|
{
|
|
/* 00 */ 0x04AA,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0445,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04AD,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0553,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000D),
|
|
},
|
|
{
|
|
/* 00 */ 0x0555,
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000E),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000F),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0010),
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0011),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0012),
|
|
},
|
|
{
|
|
/* 00 */ 0x04AC,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0446,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04A9,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0443,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x009F,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x00A0,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0001,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0004,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04BA,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04BB,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x044B,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x044C,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0038,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0033,
|
|
/* 01 */ 0x0375,
|
|
},
|
|
{
|
|
/* 00 */ 0x0011,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0398,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0007,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04FC,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x002A,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0546,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x06B3,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0073,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x004F,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04C0,
|
|
/* 01 */ 0x04BF,
|
|
},
|
|
{
|
|
/* 00 */ 0x04BC,
|
|
/* 01 */ 0x04BE,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x04BD,
|
|
},
|
|
{
|
|
/* 00 */ 0x0451,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x044E,
|
|
/* 01 */ 0x0450,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x044F,
|
|
},
|
|
{
|
|
/* 00 */ 0x02F6,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0014),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0015),
|
|
},
|
|
{
|
|
/* 00 */ 0x02F3,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02BC,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0003,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0002,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04F0,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02DC,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x004D,
|
|
/* 01 */ 0x004B,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeVendor[][2] =
|
|
{
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05AC,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05B2,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05EB,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05F3,
|
|
},
|
|
{
|
|
/* 00 */ 0x05EC,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05B4,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05B3,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05ED,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x053A,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0056,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0530,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x02C1,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x04D5,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x0552,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x0554,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x02BE,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x02BF,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x02C3,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x02C2,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05EA,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05F2,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05E8,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05E9,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05F4,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05AD,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optree3dnow[][256] =
|
|
{
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ INVALID,
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ INVALID,
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
/* 08 */ INVALID,
|
|
/* 09 */ INVALID,
|
|
/* 0A */ INVALID,
|
|
/* 0B */ INVALID,
|
|
/* 0C */ 0x0407,
|
|
/* 0D */ 0x0406,
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
/* 10 */ INVALID,
|
|
/* 11 */ INVALID,
|
|
/* 12 */ INVALID,
|
|
/* 13 */ INVALID,
|
|
/* 14 */ INVALID,
|
|
/* 15 */ INVALID,
|
|
/* 16 */ INVALID,
|
|
/* 17 */ INVALID,
|
|
/* 18 */ INVALID,
|
|
/* 19 */ INVALID,
|
|
/* 1A */ INVALID,
|
|
/* 1B */ INVALID,
|
|
/* 1C */ 0x03E7,
|
|
/* 1D */ 0x03E6,
|
|
/* 1E */ INVALID,
|
|
/* 1F */ INVALID,
|
|
/* 20 */ INVALID,
|
|
/* 21 */ INVALID,
|
|
/* 22 */ INVALID,
|
|
/* 23 */ INVALID,
|
|
/* 24 */ INVALID,
|
|
/* 25 */ INVALID,
|
|
/* 26 */ INVALID,
|
|
/* 27 */ INVALID,
|
|
/* 28 */ INVALID,
|
|
/* 29 */ INVALID,
|
|
/* 2A */ INVALID,
|
|
/* 2B */ INVALID,
|
|
/* 2C */ INVALID,
|
|
/* 2D */ INVALID,
|
|
/* 2E */ INVALID,
|
|
/* 2F */ INVALID,
|
|
/* 30 */ INVALID,
|
|
/* 31 */ INVALID,
|
|
/* 32 */ INVALID,
|
|
/* 33 */ INVALID,
|
|
/* 34 */ INVALID,
|
|
/* 35 */ INVALID,
|
|
/* 36 */ INVALID,
|
|
/* 37 */ INVALID,
|
|
/* 38 */ INVALID,
|
|
/* 39 */ INVALID,
|
|
/* 3A */ INVALID,
|
|
/* 3B */ INVALID,
|
|
/* 3C */ INVALID,
|
|
/* 3D */ INVALID,
|
|
/* 3E */ INVALID,
|
|
/* 3F */ INVALID,
|
|
/* 40 */ INVALID,
|
|
/* 41 */ INVALID,
|
|
/* 42 */ INVALID,
|
|
/* 43 */ INVALID,
|
|
/* 44 */ INVALID,
|
|
/* 45 */ INVALID,
|
|
/* 46 */ INVALID,
|
|
/* 47 */ INVALID,
|
|
/* 48 */ INVALID,
|
|
/* 49 */ INVALID,
|
|
/* 4A */ INVALID,
|
|
/* 4B */ INVALID,
|
|
/* 4C */ INVALID,
|
|
/* 4D */ INVALID,
|
|
/* 4E */ INVALID,
|
|
/* 4F */ INVALID,
|
|
/* 50 */ INVALID,
|
|
/* 51 */ INVALID,
|
|
/* 52 */ INVALID,
|
|
/* 53 */ INVALID,
|
|
/* 54 */ INVALID,
|
|
/* 55 */ INVALID,
|
|
/* 56 */ INVALID,
|
|
/* 57 */ INVALID,
|
|
/* 58 */ INVALID,
|
|
/* 59 */ INVALID,
|
|
/* 5A */ INVALID,
|
|
/* 5B */ INVALID,
|
|
/* 5C */ INVALID,
|
|
/* 5D */ INVALID,
|
|
/* 5E */ INVALID,
|
|
/* 5F */ INVALID,
|
|
/* 60 */ INVALID,
|
|
/* 61 */ INVALID,
|
|
/* 62 */ INVALID,
|
|
/* 63 */ INVALID,
|
|
/* 64 */ INVALID,
|
|
/* 65 */ INVALID,
|
|
/* 66 */ INVALID,
|
|
/* 67 */ INVALID,
|
|
/* 68 */ INVALID,
|
|
/* 69 */ INVALID,
|
|
/* 6A */ INVALID,
|
|
/* 6B */ INVALID,
|
|
/* 6C */ INVALID,
|
|
/* 6D */ INVALID,
|
|
/* 6E */ INVALID,
|
|
/* 6F */ INVALID,
|
|
/* 70 */ INVALID,
|
|
/* 71 */ INVALID,
|
|
/* 72 */ INVALID,
|
|
/* 73 */ INVALID,
|
|
/* 74 */ INVALID,
|
|
/* 75 */ INVALID,
|
|
/* 76 */ INVALID,
|
|
/* 77 */ INVALID,
|
|
/* 78 */ INVALID,
|
|
/* 79 */ INVALID,
|
|
/* 7A */ INVALID,
|
|
/* 7B */ INVALID,
|
|
/* 7C */ INVALID,
|
|
/* 7D */ INVALID,
|
|
/* 7E */ INVALID,
|
|
/* 7F */ INVALID,
|
|
/* 80 */ INVALID,
|
|
/* 81 */ INVALID,
|
|
/* 82 */ INVALID,
|
|
/* 83 */ INVALID,
|
|
/* 84 */ INVALID,
|
|
/* 85 */ INVALID,
|
|
/* 86 */ INVALID,
|
|
/* 87 */ INVALID,
|
|
/* 88 */ INVALID,
|
|
/* 89 */ INVALID,
|
|
/* 8A */ 0x03F0,
|
|
/* 8B */ INVALID,
|
|
/* 8C */ INVALID,
|
|
/* 8D */ INVALID,
|
|
/* 8E */ 0x03F1,
|
|
/* 8F */ INVALID,
|
|
/* 90 */ 0x03EB,
|
|
/* 91 */ INVALID,
|
|
/* 92 */ INVALID,
|
|
/* 93 */ INVALID,
|
|
/* 94 */ 0x03EE,
|
|
/* 95 */ INVALID,
|
|
/* 96 */ 0x03F2,
|
|
/* 97 */ 0x03F6,
|
|
/* 98 */ INVALID,
|
|
/* 99 */ INVALID,
|
|
/* 9A */ 0x03F7,
|
|
/* 9B */ INVALID,
|
|
/* 9C */ INVALID,
|
|
/* 9D */ INVALID,
|
|
/* 9E */ 0x03E9,
|
|
/* 9F */ INVALID,
|
|
/* A0 */ 0x03EC,
|
|
/* A1 */ INVALID,
|
|
/* A2 */ INVALID,
|
|
/* A3 */ INVALID,
|
|
/* A4 */ 0x03ED,
|
|
/* A5 */ INVALID,
|
|
/* A6 */ 0x03F3,
|
|
/* A7 */ 0x03F5,
|
|
/* A8 */ INVALID,
|
|
/* A9 */ INVALID,
|
|
/* AA */ 0x03F8,
|
|
/* AB */ INVALID,
|
|
/* AC */ INVALID,
|
|
/* AD */ INVALID,
|
|
/* AE */ 0x03E8,
|
|
/* AF */ INVALID,
|
|
/* B0 */ 0x03EA,
|
|
/* B1 */ INVALID,
|
|
/* B2 */ INVALID,
|
|
/* B3 */ INVALID,
|
|
/* B4 */ 0x03EF,
|
|
/* B5 */ INVALID,
|
|
/* B6 */ 0x03F4,
|
|
/* B7 */ 0x0433,
|
|
/* B8 */ INVALID,
|
|
/* B9 */ INVALID,
|
|
/* BA */ INVALID,
|
|
/* BB */ 0x0499,
|
|
/* BC */ INVALID,
|
|
/* BD */ INVALID,
|
|
/* BE */ INVALID,
|
|
/* BF */ 0x03C7,
|
|
/* C0 */ INVALID,
|
|
/* C1 */ INVALID,
|
|
/* C2 */ INVALID,
|
|
/* C3 */ INVALID,
|
|
/* C4 */ INVALID,
|
|
/* C5 */ INVALID,
|
|
/* C6 */ INVALID,
|
|
/* C7 */ INVALID,
|
|
/* C8 */ INVALID,
|
|
/* C9 */ INVALID,
|
|
/* CA */ INVALID,
|
|
/* CB */ INVALID,
|
|
/* CC */ INVALID,
|
|
/* CD */ INVALID,
|
|
/* CE */ INVALID,
|
|
/* CF */ INVALID,
|
|
/* D0 */ INVALID,
|
|
/* D1 */ INVALID,
|
|
/* D2 */ INVALID,
|
|
/* D3 */ INVALID,
|
|
/* D4 */ INVALID,
|
|
/* D5 */ INVALID,
|
|
/* D6 */ INVALID,
|
|
/* D7 */ INVALID,
|
|
/* D8 */ INVALID,
|
|
/* D9 */ INVALID,
|
|
/* DA */ INVALID,
|
|
/* DB */ INVALID,
|
|
/* DC */ INVALID,
|
|
/* DD */ INVALID,
|
|
/* DE */ INVALID,
|
|
/* DF */ INVALID,
|
|
/* E0 */ INVALID,
|
|
/* E1 */ INVALID,
|
|
/* E2 */ INVALID,
|
|
/* E3 */ INVALID,
|
|
/* E4 */ INVALID,
|
|
/* E5 */ INVALID,
|
|
/* E6 */ INVALID,
|
|
/* E7 */ INVALID,
|
|
/* E8 */ INVALID,
|
|
/* E9 */ INVALID,
|
|
/* EA */ INVALID,
|
|
/* EB */ INVALID,
|
|
/* EC */ INVALID,
|
|
/* ED */ INVALID,
|
|
/* EE */ INVALID,
|
|
/* EF */ INVALID,
|
|
/* F0 */ INVALID,
|
|
/* F1 */ INVALID,
|
|
/* F2 */ INVALID,
|
|
/* F3 */ INVALID,
|
|
/* F4 */ INVALID,
|
|
/* F5 */ INVALID,
|
|
/* F6 */ INVALID,
|
|
/* F7 */ INVALID,
|
|
/* F8 */ INVALID,
|
|
/* F9 */ INVALID,
|
|
/* FA */ INVALID,
|
|
/* FB */ INVALID,
|
|
/* FC */ INVALID,
|
|
/* FD */ INVALID,
|
|
/* FE */ INVALID,
|
|
/* FF */ INVALID,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeVex[][16] =
|
|
{
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0024),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0004),
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0005),
|
|
/* 06 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0006),
|
|
/* 07 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0007),
|
|
/* 08 */ INVALID,
|
|
/* 09 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0008),
|
|
/* 0A */ INVALID,
|
|
/* 0B */ INVALID,
|
|
/* 0C */ INVALID,
|
|
/* 0D */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0009),
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0026),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0004),
|
|
/* 02 */ INVALID,
|
|
/* 03 */ INVALID,
|
|
/* 04 */ INVALID,
|
|
/* 05 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0005),
|
|
/* 06 */ INVALID,
|
|
/* 07 */ INVALID,
|
|
/* 08 */ INVALID,
|
|
/* 09 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0008),
|
|
/* 0A */ INVALID,
|
|
/* 0B */ INVALID,
|
|
/* 0C */ INVALID,
|
|
/* 0D */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0009),
|
|
/* 0E */ INVALID,
|
|
/* 0F */ INVALID,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeVexW[][2] =
|
|
{
|
|
{
|
|
/* 00 */ 0x061D,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x061C,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0692,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0691,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x057B,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0008),
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05A6,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05A5,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05A7,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x05A4,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x061E,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x061B,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0009),
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x061F,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0620,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0621,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x0622,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000A),
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000B),
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000C),
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000D),
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000E),
|
|
/* 01 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000F),
|
|
},
|
|
{
|
|
/* 00 */ 0x0579,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x0578,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x060B,
|
|
/* 01 */ INVALID,
|
|
},
|
|
};
|
|
|
|
const VXOpcodeTreeNode optreeVexL[][2] =
|
|
{
|
|
{
|
|
/* 00 */ 0x069C,
|
|
/* 01 */ 0x069B,
|
|
},
|
|
{
|
|
/* 00 */ 0x0660,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x065A,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x065E,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x063F,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x065F,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x065B,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x065D,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x057A,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x061A,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x05A0,
|
|
},
|
|
{
|
|
/* 00 */ INVALID,
|
|
/* 01 */ 0x059A,
|
|
},
|
|
{
|
|
/* 00 */ 0x062C,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x062E,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x062D,
|
|
/* 01 */ INVALID,
|
|
},
|
|
{
|
|
/* 00 */ 0x062F,
|
|
/* 01 */ INVALID,
|
|
},
|
|
};
|
|
|
|
#undef INVALID
|
|
#undef NODE
|
|
|
|
#define OPI_NONE { VXDefinedOperandType::NONE, VXDefinedOperandSize::NA }
|
|
#define OPI_AL { VXDefinedOperandType::AL, VXDefinedOperandSize::B }
|
|
#define OPI_AX { VXDefinedOperandType::AX, VXDefinedOperandSize::W }
|
|
#define OPI_Av { VXDefinedOperandType::A, VXDefinedOperandSize::V }
|
|
#define OPI_C { VXDefinedOperandType::C, VXDefinedOperandSize::NA }
|
|
#define OPI_CL { VXDefinedOperandType::CL, VXDefinedOperandSize::B }
|
|
#define OPI_CS { VXDefinedOperandType::CS, VXDefinedOperandSize::NA }
|
|
#define OPI_CX { VXDefinedOperandType::CX, VXDefinedOperandSize::W }
|
|
#define OPI_D { VXDefinedOperandType::D, VXDefinedOperandSize::NA }
|
|
#define OPI_DL { VXDefinedOperandType::DL, VXDefinedOperandSize::B }
|
|
#define OPI_DS { VXDefinedOperandType::DS, VXDefinedOperandSize::NA }
|
|
#define OPI_DX { VXDefinedOperandType::DX, VXDefinedOperandSize::W }
|
|
#define OPI_E { VXDefinedOperandType::E, VXDefinedOperandSize::NA }
|
|
#define OPI_ES { VXDefinedOperandType::ES, VXDefinedOperandSize::NA }
|
|
#define OPI_Eb { VXDefinedOperandType::E, VXDefinedOperandSize::B }
|
|
#define OPI_Ed { VXDefinedOperandType::E, VXDefinedOperandSize::D }
|
|
#define OPI_Eq { VXDefinedOperandType::E, VXDefinedOperandSize::Q }
|
|
#define OPI_Ev { VXDefinedOperandType::E, VXDefinedOperandSize::V }
|
|
#define OPI_Ew { VXDefinedOperandType::E, VXDefinedOperandSize::W }
|
|
#define OPI_Ey { VXDefinedOperandType::E, VXDefinedOperandSize::Y }
|
|
#define OPI_Ez { VXDefinedOperandType::E, VXDefinedOperandSize::Z }
|
|
#define OPI_FS { VXDefinedOperandType::FS, VXDefinedOperandSize::NA }
|
|
#define OPI_Fv { VXDefinedOperandType::F, VXDefinedOperandSize::V }
|
|
#define OPI_G { VXDefinedOperandType::G, VXDefinedOperandSize::NA }
|
|
#define OPI_GS { VXDefinedOperandType::GS, VXDefinedOperandSize::NA }
|
|
#define OPI_Gb { VXDefinedOperandType::G, VXDefinedOperandSize::B }
|
|
#define OPI_Gd { VXDefinedOperandType::G, VXDefinedOperandSize::D }
|
|
#define OPI_Gq { VXDefinedOperandType::G, VXDefinedOperandSize::Q }
|
|
#define OPI_Gv { VXDefinedOperandType::G, VXDefinedOperandSize::V }
|
|
#define OPI_Gw { VXDefinedOperandType::G, VXDefinedOperandSize::W }
|
|
#define OPI_Gy { VXDefinedOperandType::G, VXDefinedOperandSize::Y }
|
|
#define OPI_Gz { VXDefinedOperandType::G, VXDefinedOperandSize::Z }
|
|
#define OPI_H { VXDefinedOperandType::H, VXDefinedOperandSize::X }
|
|
#define OPI_Hqq { VXDefinedOperandType::H, VXDefinedOperandSize::QQ }
|
|
#define OPI_Hx { VXDefinedOperandType::H, VXDefinedOperandSize::X }
|
|
#define OPI_I1 { VXDefinedOperandType::I1, VXDefinedOperandSize::NA }
|
|
#define OPI_Ib { VXDefinedOperandType::I, VXDefinedOperandSize::B }
|
|
#define OPI_Iv { VXDefinedOperandType::I, VXDefinedOperandSize::V }
|
|
#define OPI_Iw { VXDefinedOperandType::I, VXDefinedOperandSize::W }
|
|
#define OPI_Iz { VXDefinedOperandType::I, VXDefinedOperandSize::Z }
|
|
#define OPI_Jb { VXDefinedOperandType::J, VXDefinedOperandSize::B }
|
|
#define OPI_Jv { VXDefinedOperandType::J, VXDefinedOperandSize::V }
|
|
#define OPI_Jz { VXDefinedOperandType::J, VXDefinedOperandSize::Z }
|
|
#define OPI_L { VXDefinedOperandType::L, VXDefinedOperandSize::O }
|
|
#define OPI_Lx { VXDefinedOperandType::L, VXDefinedOperandSize::X }
|
|
#define OPI_M { VXDefinedOperandType::M, VXDefinedOperandSize::NA }
|
|
#define OPI_Mb { VXDefinedOperandType::M, VXDefinedOperandSize::B }
|
|
#define OPI_MbRd { VXDefinedOperandType::MR, VXDefinedOperandSize::BD }
|
|
#define OPI_MbRv { VXDefinedOperandType::MR, VXDefinedOperandSize::BV }
|
|
#define OPI_Md { VXDefinedOperandType::M, VXDefinedOperandSize::D }
|
|
#define OPI_MdRy { VXDefinedOperandType::MR, VXDefinedOperandSize::DY }
|
|
#define OPI_MdU { VXDefinedOperandType::MU, VXDefinedOperandSize::DO }
|
|
#define OPI_Mdq { VXDefinedOperandType::M, VXDefinedOperandSize::DQ }
|
|
#define OPI_Mo { VXDefinedOperandType::M, VXDefinedOperandSize::O }
|
|
#define OPI_Mq { VXDefinedOperandType::M, VXDefinedOperandSize::Q }
|
|
#define OPI_MqU { VXDefinedOperandType::MU, VXDefinedOperandSize::QO }
|
|
#define OPI_Ms { VXDefinedOperandType::M, VXDefinedOperandSize::W }
|
|
#define OPI_Mt { VXDefinedOperandType::M, VXDefinedOperandSize::T }
|
|
#define OPI_Mv { VXDefinedOperandType::M, VXDefinedOperandSize::V }
|
|
#define OPI_Mw { VXDefinedOperandType::M, VXDefinedOperandSize::W }
|
|
#define OPI_MwRd { VXDefinedOperandType::MR, VXDefinedOperandSize::WD }
|
|
#define OPI_MwRv { VXDefinedOperandType::MR, VXDefinedOperandSize::WV }
|
|
#define OPI_MwRy { VXDefinedOperandType::MR, VXDefinedOperandSize::WY }
|
|
#define OPI_MwU { VXDefinedOperandType::MU, VXDefinedOperandSize::WO }
|
|
#define OPI_N { VXDefinedOperandType::N, VXDefinedOperandSize::Q }
|
|
#define OPI_Ob { VXDefinedOperandType::O, VXDefinedOperandSize::B }
|
|
#define OPI_Ov { VXDefinedOperandType::O, VXDefinedOperandSize::V }
|
|
#define OPI_Ow { VXDefinedOperandType::O, VXDefinedOperandSize::W }
|
|
#define OPI_P { VXDefinedOperandType::P, VXDefinedOperandSize::Q }
|
|
#define OPI_Q { VXDefinedOperandType::Q, VXDefinedOperandSize::Q }
|
|
#define OPI_R { VXDefinedOperandType::R, VXDefinedOperandSize::RDQ }
|
|
#define OPI_R0b { VXDefinedOperandType::R0, VXDefinedOperandSize::B }
|
|
#define OPI_R0v { VXDefinedOperandType::R0, VXDefinedOperandSize::V }
|
|
#define OPI_R0w { VXDefinedOperandType::R0, VXDefinedOperandSize::W }
|
|
#define OPI_R0y { VXDefinedOperandType::R0, VXDefinedOperandSize::Y }
|
|
#define OPI_R0z { VXDefinedOperandType::R0, VXDefinedOperandSize::Z }
|
|
#define OPI_R1b { VXDefinedOperandType::R1, VXDefinedOperandSize::B }
|
|
#define OPI_R1v { VXDefinedOperandType::R1, VXDefinedOperandSize::V }
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#define OPI_R1w { VXDefinedOperandType::R1, VXDefinedOperandSize::W }
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#define OPI_R1y { VXDefinedOperandType::R1, VXDefinedOperandSize::Y }
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#define OPI_R1z { VXDefinedOperandType::R1, VXDefinedOperandSize::Z }
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#define OPI_R2b { VXDefinedOperandType::R2, VXDefinedOperandSize::B }
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#define OPI_R2v { VXDefinedOperandType::R2, VXDefinedOperandSize::V }
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#define OPI_R2w { VXDefinedOperandType::R2, VXDefinedOperandSize::W }
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#define OPI_R2y { VXDefinedOperandType::R2, VXDefinedOperandSize::Y }
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#define OPI_R2z { VXDefinedOperandType::R2, VXDefinedOperandSize::Z }
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#define OPI_R3b { VXDefinedOperandType::R3, VXDefinedOperandSize::B }
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#define OPI_R3v { VXDefinedOperandType::R3, VXDefinedOperandSize::V }
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#define OPI_R3w { VXDefinedOperandType::R3, VXDefinedOperandSize::W }
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#define OPI_R3y { VXDefinedOperandType::R3, VXDefinedOperandSize::Y }
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#define OPI_R3z { VXDefinedOperandType::R3, VXDefinedOperandSize::Z }
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#define OPI_R4b { VXDefinedOperandType::R4, VXDefinedOperandSize::B }
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#define OPI_R4v { VXDefinedOperandType::R4, VXDefinedOperandSize::V }
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#define OPI_R4w { VXDefinedOperandType::R4, VXDefinedOperandSize::W }
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#define OPI_R4y { VXDefinedOperandType::R4, VXDefinedOperandSize::Y }
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#define OPI_R4z { VXDefinedOperandType::R4, VXDefinedOperandSize::Z }
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#define OPI_R5b { VXDefinedOperandType::R5, VXDefinedOperandSize::B }
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#define OPI_R5v { VXDefinedOperandType::R5, VXDefinedOperandSize::V }
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#define OPI_R5w { VXDefinedOperandType::R5, VXDefinedOperandSize::W }
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#define OPI_R5y { VXDefinedOperandType::R5, VXDefinedOperandSize::Y }
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#define OPI_R5z { VXDefinedOperandType::R5, VXDefinedOperandSize::Z }
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#define OPI_R6b { VXDefinedOperandType::R6, VXDefinedOperandSize::B }
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#define OPI_R6v { VXDefinedOperandType::R6, VXDefinedOperandSize::V }
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#define OPI_R6w { VXDefinedOperandType::R6, VXDefinedOperandSize::W }
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#define OPI_R6y { VXDefinedOperandType::R6, VXDefinedOperandSize::Y }
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#define OPI_R6z { VXDefinedOperandType::R6, VXDefinedOperandSize::Z }
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#define OPI_R7b { VXDefinedOperandType::R7, VXDefinedOperandSize::B }
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#define OPI_R7v { VXDefinedOperandType::R7, VXDefinedOperandSize::V }
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#define OPI_R7w { VXDefinedOperandType::R7, VXDefinedOperandSize::W }
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#define OPI_R7y { VXDefinedOperandType::R7, VXDefinedOperandSize::Y }
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#define OPI_R7z { VXDefinedOperandType::R7, VXDefinedOperandSize::Z }
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#define OPI_S { VXDefinedOperandType::S, VXDefinedOperandSize::W }
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#define OPI_SS { VXDefinedOperandType::SS, VXDefinedOperandSize::NA }
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#define OPI_ST0 { VXDefinedOperandType::ST0, VXDefinedOperandSize::NA }
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#define OPI_ST1 { VXDefinedOperandType::ST1, VXDefinedOperandSize::NA }
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#define OPI_ST2 { VXDefinedOperandType::ST2, VXDefinedOperandSize::NA }
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#define OPI_ST3 { VXDefinedOperandType::ST3, VXDefinedOperandSize::NA }
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#define OPI_ST4 { VXDefinedOperandType::ST4, VXDefinedOperandSize::NA }
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#define OPI_ST5 { VXDefinedOperandType::ST5, VXDefinedOperandSize::NA }
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#define OPI_ST6 { VXDefinedOperandType::ST6, VXDefinedOperandSize::NA }
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#define OPI_ST7 { VXDefinedOperandType::ST7, VXDefinedOperandSize::NA }
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#define OPI_U { VXDefinedOperandType::U, VXDefinedOperandSize::O }
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#define OPI_Ux { VXDefinedOperandType::U, VXDefinedOperandSize::X }
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#define OPI_V { VXDefinedOperandType::V, VXDefinedOperandSize::DQ }
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#define OPI_Vdq { VXDefinedOperandType::V, VXDefinedOperandSize::DQ }
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#define OPI_Vqq { VXDefinedOperandType::V, VXDefinedOperandSize::QQ }
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#define OPI_Vsd { VXDefinedOperandType::V, VXDefinedOperandSize::Q }
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#define OPI_Vx { VXDefinedOperandType::V, VXDefinedOperandSize::X }
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#define OPI_W { VXDefinedOperandType::W, VXDefinedOperandSize::DQ }
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#define OPI_Wdq { VXDefinedOperandType::W, VXDefinedOperandSize::DQ }
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#define OPI_Wqq { VXDefinedOperandType::W, VXDefinedOperandSize::QQ }
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#define OPI_Wsd { VXDefinedOperandType::W, VXDefinedOperandSize::Q }
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#define OPI_Wx { VXDefinedOperandType::W, VXDefinedOperandSize::X }
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#define OPI_eAX { VXDefinedOperandType::EAX, VXDefinedOperandSize::Z }
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#define OPI_eCX { VXDefinedOperandType::ECX, VXDefinedOperandSize::Z }
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#define OPI_eDX { VXDefinedOperandType::EDX, VXDefinedOperandSize::Z }
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#define OPI_rAX { VXDefinedOperandType::RAX, VXDefinedOperandSize::V }
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#define OPI_rCX { VXDefinedOperandType::RCX, VXDefinedOperandSize::V }
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#define OPI_rDX { VXDefinedOperandType::RDX, VXDefinedOperandSize::V }
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#define OPI_sIb { VXDefinedOperandType::sI, VXDefinedOperandSize::B }
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#define OPI_sIz { VXDefinedOperandType::sI, VXDefinedOperandSize::Z }
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const VXInstructionDefinition instrDefinitions[] =
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{
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/* 000 */ { VXInstructionMnemonic::INVALID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 001 */ { VXInstructionMnemonic::AAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 002 */ { VXInstructionMnemonic::AAD, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 003 */ { VXInstructionMnemonic::AAM, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 004 */ { VXInstructionMnemonic::AAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 005 */ { VXInstructionMnemonic::ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 006 */ { VXInstructionMnemonic::ADC, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE },
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/* 007 */ { VXInstructionMnemonic::ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE },
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/* 008 */ { VXInstructionMnemonic::ADC, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 009 */ { VXInstructionMnemonic::ADC, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 00A */ { VXInstructionMnemonic::ADC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 00B */ { VXInstructionMnemonic::ADC, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 00C */ { VXInstructionMnemonic::ADC, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 00D */ { VXInstructionMnemonic::ADC, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 00E */ { VXInstructionMnemonic::ADC, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 00F */ { VXInstructionMnemonic::ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 010 */ { VXInstructionMnemonic::ADD, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE },
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/* 011 */ { VXInstructionMnemonic::ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE },
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/* 012 */ { VXInstructionMnemonic::ADD, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 013 */ { VXInstructionMnemonic::ADD, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 014 */ { VXInstructionMnemonic::ADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 015 */ { VXInstructionMnemonic::ADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 016 */ { VXInstructionMnemonic::ADD, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 017 */ { VXInstructionMnemonic::ADD, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 018 */ { VXInstructionMnemonic::ADD, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 019 */ { VXInstructionMnemonic::ADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 01A */ { VXInstructionMnemonic::ADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 01B */ { VXInstructionMnemonic::ADDSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 01C */ { VXInstructionMnemonic::ADDSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 01D */ { VXInstructionMnemonic::ADDSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 01E */ { VXInstructionMnemonic::ADDSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 01F */ { VXInstructionMnemonic::AESDEC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 020 */ { VXInstructionMnemonic::AESDECLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 021 */ { VXInstructionMnemonic::AESENC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 022 */ { VXInstructionMnemonic::AESENCLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 023 */ { VXInstructionMnemonic::AESIMC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 024 */ { VXInstructionMnemonic::AESKEYGENASSIST, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 025 */ { VXInstructionMnemonic::AND, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 026 */ { VXInstructionMnemonic::AND, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 027 */ { VXInstructionMnemonic::AND, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 028 */ { VXInstructionMnemonic::AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 029 */ { VXInstructionMnemonic::AND, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 02A */ { VXInstructionMnemonic::AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE },
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/* 02B */ { VXInstructionMnemonic::AND, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 02C */ { VXInstructionMnemonic::AND, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 02D */ { VXInstructionMnemonic::AND, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 02E */ { VXInstructionMnemonic::AND, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE },
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/* 02F */ { VXInstructionMnemonic::ANDNPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 030 */ { VXInstructionMnemonic::ANDNPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 031 */ { VXInstructionMnemonic::ANDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 032 */ { VXInstructionMnemonic::ANDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 033 */ { VXInstructionMnemonic::ARPL, { OPI_Ew, OPI_Gw, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_OPERAND1_WRITE },
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/* 034 */ { VXInstructionMnemonic::BLENDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 035 */ { VXInstructionMnemonic::BLENDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 036 */ { VXInstructionMnemonic::BLENDVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 037 */ { VXInstructionMnemonic::BLENDVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 038 */ { VXInstructionMnemonic::BOUND, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 039 */ { VXInstructionMnemonic::BSF, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 03A */ { VXInstructionMnemonic::BSR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 03B */ { VXInstructionMnemonic::BSWAP, { OPI_R5y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 03C */ { VXInstructionMnemonic::BSWAP, { OPI_R3y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 03D */ { VXInstructionMnemonic::BSWAP, { OPI_R1y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 03E */ { VXInstructionMnemonic::BSWAP, { OPI_R4y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 03F */ { VXInstructionMnemonic::BSWAP, { OPI_R0y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 040 */ { VXInstructionMnemonic::BSWAP, { OPI_R2y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 041 */ { VXInstructionMnemonic::BSWAP, { OPI_R7y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 042 */ { VXInstructionMnemonic::BSWAP, { OPI_R6y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 043 */ { VXInstructionMnemonic::BT, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 044 */ { VXInstructionMnemonic::BT, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 045 */ { VXInstructionMnemonic::BTC, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 046 */ { VXInstructionMnemonic::BTC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 047 */ { VXInstructionMnemonic::BTR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 048 */ { VXInstructionMnemonic::BTR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 049 */ { VXInstructionMnemonic::BTS, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 04A */ { VXInstructionMnemonic::BTS, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 04B */ { VXInstructionMnemonic::CALL, { OPI_Eq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 04C */ { VXInstructionMnemonic::CALL, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 04D */ { VXInstructionMnemonic::CALL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 04E */ { VXInstructionMnemonic::CALL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 },
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/* 04F */ { VXInstructionMnemonic::CALL, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 050 */ { VXInstructionMnemonic::CBW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 051 */ { VXInstructionMnemonic::CDQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 052 */ { VXInstructionMnemonic::CDQE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 053 */ { VXInstructionMnemonic::CLC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 054 */ { VXInstructionMnemonic::CLD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 055 */ { VXInstructionMnemonic::CLFLUSH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 056 */ { VXInstructionMnemonic::CLGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 057 */ { VXInstructionMnemonic::CLI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 058 */ { VXInstructionMnemonic::CLTS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 059 */ { VXInstructionMnemonic::CMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 05A */ { VXInstructionMnemonic::CMOVA, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 05B */ { VXInstructionMnemonic::CMOVAE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 05C */ { VXInstructionMnemonic::CMOVB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 05D */ { VXInstructionMnemonic::CMOVBE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 05E */ { VXInstructionMnemonic::CMOVE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 05F */ { VXInstructionMnemonic::CMOVG, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 060 */ { VXInstructionMnemonic::CMOVGE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 061 */ { VXInstructionMnemonic::CMOVL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 062 */ { VXInstructionMnemonic::CMOVLE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 063 */ { VXInstructionMnemonic::CMOVNE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 064 */ { VXInstructionMnemonic::CMOVNO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 065 */ { VXInstructionMnemonic::CMOVNP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 066 */ { VXInstructionMnemonic::CMOVNS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 067 */ { VXInstructionMnemonic::CMOVO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 068 */ { VXInstructionMnemonic::CMOVP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 069 */ { VXInstructionMnemonic::CMOVS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 06A */ { VXInstructionMnemonic::CMP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 06B */ { VXInstructionMnemonic::CMP, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 06C */ { VXInstructionMnemonic::CMP, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 06D */ { VXInstructionMnemonic::CMP, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 06E */ { VXInstructionMnemonic::CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 06F */ { VXInstructionMnemonic::CMP, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 070 */ { VXInstructionMnemonic::CMP, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 },
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/* 071 */ { VXInstructionMnemonic::CMP, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 072 */ { VXInstructionMnemonic::CMP, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 073 */ { VXInstructionMnemonic::CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 },
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/* 074 */ { VXInstructionMnemonic::CMPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 075 */ { VXInstructionMnemonic::CMPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 076 */ { VXInstructionMnemonic::CMPSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 077 */ { VXInstructionMnemonic::CMPSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 078 */ { VXInstructionMnemonic::CMPSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 079 */ { VXInstructionMnemonic::CMPSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 07A */ { VXInstructionMnemonic::CMPSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 07B */ { VXInstructionMnemonic::CMPSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 07C */ { VXInstructionMnemonic::CMPXCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 07D */ { VXInstructionMnemonic::CMPXCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 07E */ { VXInstructionMnemonic::CMPXCHG16B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 07F */ { VXInstructionMnemonic::CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 080 */ { VXInstructionMnemonic::CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 081 */ { VXInstructionMnemonic::COMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 082 */ { VXInstructionMnemonic::COMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 083 */ { VXInstructionMnemonic::CPUID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 084 */ { VXInstructionMnemonic::CQO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 085 */ { VXInstructionMnemonic::CRC32, { OPI_Gy, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 086 */ { VXInstructionMnemonic::CRC32, { OPI_Gy, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 087 */ { VXInstructionMnemonic::CVTDQ2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 088 */ { VXInstructionMnemonic::CVTDQ2PS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 089 */ { VXInstructionMnemonic::CVTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 08A */ { VXInstructionMnemonic::CVTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 08B */ { VXInstructionMnemonic::CVTPD2PS, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 08C */ { VXInstructionMnemonic::CVTPI2PD, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 08D */ { VXInstructionMnemonic::CVTPI2PS, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 08E */ { VXInstructionMnemonic::CVTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 08F */ { VXInstructionMnemonic::CVTPS2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 090 */ { VXInstructionMnemonic::CVTPS2PI, { OPI_P, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 091 */ { VXInstructionMnemonic::CVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 092 */ { VXInstructionMnemonic::CVTSD2SS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 093 */ { VXInstructionMnemonic::CVTSI2SD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 094 */ { VXInstructionMnemonic::CVTSI2SS, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 095 */ { VXInstructionMnemonic::CVTSS2SD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 096 */ { VXInstructionMnemonic::CVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 097 */ { VXInstructionMnemonic::CVTTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 098 */ { VXInstructionMnemonic::CVTTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 099 */ { VXInstructionMnemonic::CVTTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 09A */ { VXInstructionMnemonic::CVTTPS2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 09B */ { VXInstructionMnemonic::CVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 09C */ { VXInstructionMnemonic::CVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 09D */ { VXInstructionMnemonic::CWD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 09E */ { VXInstructionMnemonic::CWDE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 09F */ { VXInstructionMnemonic::DAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 },
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/* 0A0 */ { VXInstructionMnemonic::DAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 },
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/* 0A1 */ { VXInstructionMnemonic::DEC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0A2 */ { VXInstructionMnemonic::DEC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0A3 */ { VXInstructionMnemonic::DEC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0A4 */ { VXInstructionMnemonic::DEC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0A5 */ { VXInstructionMnemonic::DEC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0A6 */ { VXInstructionMnemonic::DEC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0A7 */ { VXInstructionMnemonic::DEC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0A8 */ { VXInstructionMnemonic::DEC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0A9 */ { VXInstructionMnemonic::DEC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0AA */ { VXInstructionMnemonic::DEC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 0AB */ { VXInstructionMnemonic::DIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 0AC */ { VXInstructionMnemonic::DIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 0AD */ { VXInstructionMnemonic::DIVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0AE */ { VXInstructionMnemonic::DIVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0AF */ { VXInstructionMnemonic::DIVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0B0 */ { VXInstructionMnemonic::DIVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0B1 */ { VXInstructionMnemonic::DPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0B2 */ { VXInstructionMnemonic::DPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 0B3 */ { VXInstructionMnemonic::EMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 0B4 */ { VXInstructionMnemonic::ENTER, { OPI_Iw, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 },
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/* 0B5 */ { VXInstructionMnemonic::EXTRACTPS, { OPI_MdRy, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 0B6 */ { VXInstructionMnemonic::F2XM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 0B7 */ { VXInstructionMnemonic::FABS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 0B8 */ { VXInstructionMnemonic::FADD, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0B9 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0BA */ { VXInstructionMnemonic::FADD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 0BB */ { VXInstructionMnemonic::FADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 0BC */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0BD */ { VXInstructionMnemonic::FADD, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0BE */ { VXInstructionMnemonic::FADD, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0BF */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 0C0 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 0C1 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 0C2 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 0C3 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 0C4 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 0C5 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 0C6 */ { VXInstructionMnemonic::FADD, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0C7 */ { VXInstructionMnemonic::FADD, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0C8 */ { VXInstructionMnemonic::FADD, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0C9 */ { VXInstructionMnemonic::FADD, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0CA */ { VXInstructionMnemonic::FADDP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0CB */ { VXInstructionMnemonic::FADDP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0CC */ { VXInstructionMnemonic::FADDP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0CD */ { VXInstructionMnemonic::FADDP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0CE */ { VXInstructionMnemonic::FADDP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0CF */ { VXInstructionMnemonic::FADDP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0D0 */ { VXInstructionMnemonic::FADDP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0D1 */ { VXInstructionMnemonic::FADDP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0D2 */ { VXInstructionMnemonic::FBLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 0D3 */ { VXInstructionMnemonic::FBSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 0D4 */ { VXInstructionMnemonic::FCHS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 0D5 */ { VXInstructionMnemonic::FCLEX, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 0D6 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 0D7 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 0D8 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 0D9 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0DA */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 0DB */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 0DC */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 0DD */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 0DE */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 0DF */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 0E0 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 0E1 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 0E2 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 0E3 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 0E4 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0E5 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 0E6 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0E7 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 0E8 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 0E9 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 0EA */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 0EB */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 0EC */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 0ED */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 0EE */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 0EF */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 0F0 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0F1 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 0F2 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 0F3 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 0F4 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 0F5 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 0F6 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 0F7 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 0F8 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 0F9 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 0FA */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 0FB */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 0FC */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 0FD */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 0FE */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 0FF */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 100 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 101 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 102 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 103 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 104 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 105 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 106 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 107 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 108 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 109 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 10A */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 10B */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 10C */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 10D */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 10E */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 10F */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 110 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 111 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 112 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 113 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 114 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 115 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 116 */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 117 */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 118 */ { VXInstructionMnemonic::FCOM, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 119 */ { VXInstructionMnemonic::FCOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 11A */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 11B */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 11C */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 11D */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 11E */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 11F */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 120 */ { VXInstructionMnemonic::FCOM2, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 121 */ { VXInstructionMnemonic::FCOM2, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 122 */ { VXInstructionMnemonic::FCOM2, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 123 */ { VXInstructionMnemonic::FCOM2, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 124 */ { VXInstructionMnemonic::FCOM2, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 125 */ { VXInstructionMnemonic::FCOM2, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 126 */ { VXInstructionMnemonic::FCOM2, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 127 */ { VXInstructionMnemonic::FCOM2, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 128 */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 129 */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 12A */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 12B */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 12C */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 12D */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 12E */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 12F */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 130 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 131 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 132 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 133 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 134 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 135 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 136 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 137 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 138 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 139 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 13A */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 13B */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 13C */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 13D */ { VXInstructionMnemonic::FCOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 13E */ { VXInstructionMnemonic::FCOMP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 13F */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 140 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 141 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 142 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 143 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 144 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 145 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 146 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 147 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 148 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 149 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 14A */ { VXInstructionMnemonic::FCOMP5, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 14B */ { VXInstructionMnemonic::FCOMP5, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 14C */ { VXInstructionMnemonic::FCOMP5, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 14D */ { VXInstructionMnemonic::FCOMP5, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 14E */ { VXInstructionMnemonic::FCOMP5, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 14F */ { VXInstructionMnemonic::FCOMP5, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 150 */ { VXInstructionMnemonic::FCOMP5, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 151 */ { VXInstructionMnemonic::FCOMP5, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 152 */ { VXInstructionMnemonic::FCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 153 */ { VXInstructionMnemonic::FCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 154 */ { VXInstructionMnemonic::FDECSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 155 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 156 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 157 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 158 */ { VXInstructionMnemonic::FDIV, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 159 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 15A */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 15B */ { VXInstructionMnemonic::FDIV, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 15C */ { VXInstructionMnemonic::FDIV, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 15D */ { VXInstructionMnemonic::FDIV, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 15E */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 15F */ { VXInstructionMnemonic::FDIV, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 160 */ { VXInstructionMnemonic::FDIV, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 161 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 162 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 163 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 164 */ { VXInstructionMnemonic::FDIV, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 165 */ { VXInstructionMnemonic::FDIV, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 166 */ { VXInstructionMnemonic::FDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 167 */ { VXInstructionMnemonic::FDIVP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 168 */ { VXInstructionMnemonic::FDIVP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 169 */ { VXInstructionMnemonic::FDIVP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 16A */ { VXInstructionMnemonic::FDIVP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 16B */ { VXInstructionMnemonic::FDIVP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 16C */ { VXInstructionMnemonic::FDIVP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 16D */ { VXInstructionMnemonic::FDIVP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 16E */ { VXInstructionMnemonic::FDIVP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 16F */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 170 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 171 */ { VXInstructionMnemonic::FDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 172 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 173 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 174 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 175 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 176 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 177 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 178 */ { VXInstructionMnemonic::FDIVR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 179 */ { VXInstructionMnemonic::FDIVR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 17A */ { VXInstructionMnemonic::FDIVR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 17B */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 17C */ { VXInstructionMnemonic::FDIVR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 17D */ { VXInstructionMnemonic::FDIVR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 17E */ { VXInstructionMnemonic::FDIVR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 17F */ { VXInstructionMnemonic::FDIVR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 180 */ { VXInstructionMnemonic::FDIVR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 181 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 182 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 183 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 184 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 185 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 186 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 187 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 188 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 189 */ { VXInstructionMnemonic::FEMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 18A */ { VXInstructionMnemonic::FFREE, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 18B */ { VXInstructionMnemonic::FFREE, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 18C */ { VXInstructionMnemonic::FFREE, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 18D */ { VXInstructionMnemonic::FFREE, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 18E */ { VXInstructionMnemonic::FFREE, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 18F */ { VXInstructionMnemonic::FFREE, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 190 */ { VXInstructionMnemonic::FFREE, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 191 */ { VXInstructionMnemonic::FFREE, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 192 */ { VXInstructionMnemonic::FFREEP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 193 */ { VXInstructionMnemonic::FFREEP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 194 */ { VXInstructionMnemonic::FFREEP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 195 */ { VXInstructionMnemonic::FFREEP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 196 */ { VXInstructionMnemonic::FFREEP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 197 */ { VXInstructionMnemonic::FFREEP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 198 */ { VXInstructionMnemonic::FFREEP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 199 */ { VXInstructionMnemonic::FFREEP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 19A */ { VXInstructionMnemonic::FIADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 19B */ { VXInstructionMnemonic::FIADD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 19C */ { VXInstructionMnemonic::FICOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 19D */ { VXInstructionMnemonic::FICOM, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 19E */ { VXInstructionMnemonic::FICOMP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 19F */ { VXInstructionMnemonic::FICOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A0 */ { VXInstructionMnemonic::FIDIV, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A1 */ { VXInstructionMnemonic::FIDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A2 */ { VXInstructionMnemonic::FIDIVR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A3 */ { VXInstructionMnemonic::FIDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A4 */ { VXInstructionMnemonic::FILD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A5 */ { VXInstructionMnemonic::FILD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A6 */ { VXInstructionMnemonic::FILD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A7 */ { VXInstructionMnemonic::FIMUL, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A8 */ { VXInstructionMnemonic::FIMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1A9 */ { VXInstructionMnemonic::FINCSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1AA */ { VXInstructionMnemonic::FIST, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1AB */ { VXInstructionMnemonic::FIST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1AC */ { VXInstructionMnemonic::FISTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1AD */ { VXInstructionMnemonic::FISTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1AE */ { VXInstructionMnemonic::FISTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1AF */ { VXInstructionMnemonic::FISTTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1B0 */ { VXInstructionMnemonic::FISTTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1B1 */ { VXInstructionMnemonic::FISTTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1B2 */ { VXInstructionMnemonic::FISUB, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1B3 */ { VXInstructionMnemonic::FISUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1B4 */ { VXInstructionMnemonic::FISUBR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1B5 */ { VXInstructionMnemonic::FISUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1B6 */ { VXInstructionMnemonic::FLD, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1B7 */ { VXInstructionMnemonic::FLD, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1B8 */ { VXInstructionMnemonic::FLD, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1B9 */ { VXInstructionMnemonic::FLD, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1BA */ { VXInstructionMnemonic::FLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1BB */ { VXInstructionMnemonic::FLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1BC */ { VXInstructionMnemonic::FLD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1BD */ { VXInstructionMnemonic::FLD, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1BE */ { VXInstructionMnemonic::FLD, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1BF */ { VXInstructionMnemonic::FLD, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C0 */ { VXInstructionMnemonic::FLD, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C1 */ { VXInstructionMnemonic::FLD1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C2 */ { VXInstructionMnemonic::FLDCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1C3 */ { VXInstructionMnemonic::FLDENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1C4 */ { VXInstructionMnemonic::FLDL2E, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C5 */ { VXInstructionMnemonic::FLDL2T, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C6 */ { VXInstructionMnemonic::FLDLG2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C7 */ { VXInstructionMnemonic::FLDLN2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C8 */ { VXInstructionMnemonic::FLDPI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1C9 */ { VXInstructionMnemonic::FLDZ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1CA */ { VXInstructionMnemonic::FMUL, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1CB */ { VXInstructionMnemonic::FMUL, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1CC */ { VXInstructionMnemonic::FMUL, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1CD */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 1CE */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1CF */ { VXInstructionMnemonic::FMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1D0 */ { VXInstructionMnemonic::FMUL, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1D1 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1D2 */ { VXInstructionMnemonic::FMUL, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1D3 */ { VXInstructionMnemonic::FMUL, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1D4 */ { VXInstructionMnemonic::FMUL, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1D5 */ { VXInstructionMnemonic::FMUL, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1D6 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 1D7 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 1D8 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 1D9 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 1DA */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 1DB */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 1DC */ { VXInstructionMnemonic::FMULP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1DD */ { VXInstructionMnemonic::FMULP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1DE */ { VXInstructionMnemonic::FMULP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1DF */ { VXInstructionMnemonic::FMULP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1E0 */ { VXInstructionMnemonic::FMULP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1E1 */ { VXInstructionMnemonic::FMULP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1E2 */ { VXInstructionMnemonic::FMULP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1E3 */ { VXInstructionMnemonic::FMULP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 1E4 */ { VXInstructionMnemonic::FNDISI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1E5 */ { VXInstructionMnemonic::FNENI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1E6 */ { VXInstructionMnemonic::FNINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1E7 */ { VXInstructionMnemonic::FNOP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1E8 */ { VXInstructionMnemonic::FNSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1E9 */ { VXInstructionMnemonic::FNSETPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1EA */ { VXInstructionMnemonic::FNSTCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1EB */ { VXInstructionMnemonic::FNSTENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1EC */ { VXInstructionMnemonic::FNSTSW, { OPI_AX, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1ED */ { VXInstructionMnemonic::FNSTSW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1EE */ { VXInstructionMnemonic::FPATAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1EF */ { VXInstructionMnemonic::FPREM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F0 */ { VXInstructionMnemonic::FPREM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F1 */ { VXInstructionMnemonic::FPTAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F2 */ { VXInstructionMnemonic::FRNDINT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F3 */ { VXInstructionMnemonic::FRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1F4 */ { VXInstructionMnemonic::FRSTPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F5 */ { VXInstructionMnemonic::FSCALE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F6 */ { VXInstructionMnemonic::FSIN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F7 */ { VXInstructionMnemonic::FSINCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F8 */ { VXInstructionMnemonic::FSQRT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1F9 */ { VXInstructionMnemonic::FST, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1FA */ { VXInstructionMnemonic::FST, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1FB */ { VXInstructionMnemonic::FST, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1FC */ { VXInstructionMnemonic::FST, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1FD */ { VXInstructionMnemonic::FST, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 1FE */ { VXInstructionMnemonic::FST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 1FF */ { VXInstructionMnemonic::FST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 200 */ { VXInstructionMnemonic::FST, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 201 */ { VXInstructionMnemonic::FST, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 202 */ { VXInstructionMnemonic::FST, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 203 */ { VXInstructionMnemonic::FSTP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 204 */ { VXInstructionMnemonic::FSTP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 205 */ { VXInstructionMnemonic::FSTP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 206 */ { VXInstructionMnemonic::FSTP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 207 */ { VXInstructionMnemonic::FSTP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 208 */ { VXInstructionMnemonic::FSTP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 209 */ { VXInstructionMnemonic::FSTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 20A */ { VXInstructionMnemonic::FSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 20B */ { VXInstructionMnemonic::FSTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 20C */ { VXInstructionMnemonic::FSTP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 20D */ { VXInstructionMnemonic::FSTP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 20E */ { VXInstructionMnemonic::FSTP1, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 20F */ { VXInstructionMnemonic::FSTP1, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 210 */ { VXInstructionMnemonic::FSTP1, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 211 */ { VXInstructionMnemonic::FSTP1, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 212 */ { VXInstructionMnemonic::FSTP1, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 213 */ { VXInstructionMnemonic::FSTP1, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 214 */ { VXInstructionMnemonic::FSTP1, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 215 */ { VXInstructionMnemonic::FSTP1, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 216 */ { VXInstructionMnemonic::FSTP8, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 217 */ { VXInstructionMnemonic::FSTP8, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 218 */ { VXInstructionMnemonic::FSTP8, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 219 */ { VXInstructionMnemonic::FSTP8, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 21A */ { VXInstructionMnemonic::FSTP8, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 21B */ { VXInstructionMnemonic::FSTP8, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 21C */ { VXInstructionMnemonic::FSTP8, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 21D */ { VXInstructionMnemonic::FSTP8, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 21E */ { VXInstructionMnemonic::FSTP9, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 21F */ { VXInstructionMnemonic::FSTP9, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 220 */ { VXInstructionMnemonic::FSTP9, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 221 */ { VXInstructionMnemonic::FSTP9, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 222 */ { VXInstructionMnemonic::FSTP9, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 223 */ { VXInstructionMnemonic::FSTP9, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 224 */ { VXInstructionMnemonic::FSTP9, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 225 */ { VXInstructionMnemonic::FSTP9, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 226 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 227 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 228 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 229 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 22A */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 22B */ { VXInstructionMnemonic::FSUB, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 22C */ { VXInstructionMnemonic::FSUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 22D */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 22E */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 22F */ { VXInstructionMnemonic::FSUB, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 230 */ { VXInstructionMnemonic::FSUB, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 231 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 232 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 233 */ { VXInstructionMnemonic::FSUB, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 234 */ { VXInstructionMnemonic::FSUB, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 235 */ { VXInstructionMnemonic::FSUB, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 236 */ { VXInstructionMnemonic::FSUB, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 237 */ { VXInstructionMnemonic::FSUB, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 238 */ { VXInstructionMnemonic::FSUBP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 239 */ { VXInstructionMnemonic::FSUBP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 23A */ { VXInstructionMnemonic::FSUBP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 23B */ { VXInstructionMnemonic::FSUBP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 23C */ { VXInstructionMnemonic::FSUBP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 23D */ { VXInstructionMnemonic::FSUBP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 23E */ { VXInstructionMnemonic::FSUBP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 23F */ { VXInstructionMnemonic::FSUBP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 240 */ { VXInstructionMnemonic::FSUBR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 241 */ { VXInstructionMnemonic::FSUBR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 242 */ { VXInstructionMnemonic::FSUBR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 243 */ { VXInstructionMnemonic::FSUBR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 244 */ { VXInstructionMnemonic::FSUBR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 245 */ { VXInstructionMnemonic::FSUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 246 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 247 */ { VXInstructionMnemonic::FSUBR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 248 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 249 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 24A */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 24B */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 24C */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 24D */ { VXInstructionMnemonic::FSUBR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 24E */ { VXInstructionMnemonic::FSUBR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 24F */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 250 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 251 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 252 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 253 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 254 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 255 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 256 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 257 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 258 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 259 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 25A */ { VXInstructionMnemonic::FTST, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 25B */ { VXInstructionMnemonic::FUCOM, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 25C */ { VXInstructionMnemonic::FUCOM, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 25D */ { VXInstructionMnemonic::FUCOM, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 25E */ { VXInstructionMnemonic::FUCOM, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 25F */ { VXInstructionMnemonic::FUCOM, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 260 */ { VXInstructionMnemonic::FUCOM, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 261 */ { VXInstructionMnemonic::FUCOM, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 262 */ { VXInstructionMnemonic::FUCOM, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 263 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 264 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 265 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 266 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 267 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 268 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 269 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 26A */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 26B */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 26C */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 26D */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 26E */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 26F */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 270 */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 271 */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 272 */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 273 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 274 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 275 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 276 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 277 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 278 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 279 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 27A */ { VXInstructionMnemonic::FUCOMP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 27B */ { VXInstructionMnemonic::FUCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 27C */ { VXInstructionMnemonic::FXAM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 27D */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 },
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/* 27E */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 },
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/* 27F */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 },
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/* 280 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 },
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/* 281 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 },
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/* 282 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 },
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/* 283 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 },
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/* 284 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 },
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/* 285 */ { VXInstructionMnemonic::FXCH4, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 286 */ { VXInstructionMnemonic::FXCH4, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 287 */ { VXInstructionMnemonic::FXCH4, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 288 */ { VXInstructionMnemonic::FXCH4, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 289 */ { VXInstructionMnemonic::FXCH4, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 28A */ { VXInstructionMnemonic::FXCH4, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 28B */ { VXInstructionMnemonic::FXCH4, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 28C */ { VXInstructionMnemonic::FXCH4, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 28D */ { VXInstructionMnemonic::FXCH7, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 28E */ { VXInstructionMnemonic::FXCH7, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 28F */ { VXInstructionMnemonic::FXCH7, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 290 */ { VXInstructionMnemonic::FXCH7, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 291 */ { VXInstructionMnemonic::FXCH7, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 292 */ { VXInstructionMnemonic::FXCH7, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 293 */ { VXInstructionMnemonic::FXCH7, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 294 */ { VXInstructionMnemonic::FXCH7, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 295 */ { VXInstructionMnemonic::FXRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 296 */ { VXInstructionMnemonic::FXSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 297 */ { VXInstructionMnemonic::FXTRACT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 298 */ { VXInstructionMnemonic::FYL2X, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 299 */ { VXInstructionMnemonic::FYL2XP1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 29A */ { VXInstructionMnemonic::GETSEC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 29B */ { VXInstructionMnemonic::HADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 29C */ { VXInstructionMnemonic::HADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 29D */ { VXInstructionMnemonic::HLT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 29E */ { VXInstructionMnemonic::HSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 29F */ { VXInstructionMnemonic::HSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2A0 */ { VXInstructionMnemonic::IDIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2A1 */ { VXInstructionMnemonic::IDIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2A2 */ { VXInstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2A3 */ { VXInstructionMnemonic::IMUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2A4 */ { VXInstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_Iz, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2A5 */ { VXInstructionMnemonic::IMUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2A6 */ { VXInstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_sIb, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2A7 */ { VXInstructionMnemonic::IN, { OPI_AL, OPI_DX, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE },
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/* 2A8 */ { VXInstructionMnemonic::IN, { OPI_eAX, OPI_DX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE },
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/* 2A9 */ { VXInstructionMnemonic::IN, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE },
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/* 2AA */ { VXInstructionMnemonic::IN, { OPI_eAX, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE },
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/* 2AB */ { VXInstructionMnemonic::INC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2AC */ { VXInstructionMnemonic::INC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2AD */ { VXInstructionMnemonic::INC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2AE */ { VXInstructionMnemonic::INC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2AF */ { VXInstructionMnemonic::INC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2B0 */ { VXInstructionMnemonic::INC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 2B1 */ { VXInstructionMnemonic::INC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2B2 */ { VXInstructionMnemonic::INC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2B3 */ { VXInstructionMnemonic::INC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2B4 */ { VXInstructionMnemonic::INC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE },
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/* 2B5 */ { VXInstructionMnemonic::INSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 2B6 */ { VXInstructionMnemonic::INSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 2B7 */ { VXInstructionMnemonic::INSERTPS, { OPI_V, OPI_Md, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 2B8 */ { VXInstructionMnemonic::INSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 2B9 */ { VXInstructionMnemonic::INT, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2BA */ { VXInstructionMnemonic::INT1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2BB */ { VXInstructionMnemonic::INT3, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2BC */ { VXInstructionMnemonic::INTO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 },
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/* 2BD */ { VXInstructionMnemonic::INVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2BE */ { VXInstructionMnemonic::INVEPT, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 },
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/* 2BF */ { VXInstructionMnemonic::INVEPT, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 },
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/* 2C0 */ { VXInstructionMnemonic::INVLPG, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2C1 */ { VXInstructionMnemonic::INVLPGA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2C2 */ { VXInstructionMnemonic::INVVPID, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 },
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/* 2C3 */ { VXInstructionMnemonic::INVVPID, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 },
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/* 2C4 */ { VXInstructionMnemonic::IRETD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 2C5 */ { VXInstructionMnemonic::IRETQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 2C6 */ { VXInstructionMnemonic::IRETW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 2C7 */ { VXInstructionMnemonic::JA, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2C8 */ { VXInstructionMnemonic::JA, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2C9 */ { VXInstructionMnemonic::JB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2CA */ { VXInstructionMnemonic::JB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2CB */ { VXInstructionMnemonic::JBE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2CC */ { VXInstructionMnemonic::JBE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2CD */ { VXInstructionMnemonic::JCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX },
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/* 2CE */ { VXInstructionMnemonic::JE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2CF */ { VXInstructionMnemonic::JE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2D0 */ { VXInstructionMnemonic::JECXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX },
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/* 2D1 */ { VXInstructionMnemonic::JG, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2D2 */ { VXInstructionMnemonic::JG, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2D3 */ { VXInstructionMnemonic::JGE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2D4 */ { VXInstructionMnemonic::JGE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2D5 */ { VXInstructionMnemonic::JL, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2D6 */ { VXInstructionMnemonic::JL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2D7 */ { VXInstructionMnemonic::JLE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2D8 */ { VXInstructionMnemonic::JLE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2D9 */ { VXInstructionMnemonic::JMP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 2DA */ { VXInstructionMnemonic::JMP, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2DB */ { VXInstructionMnemonic::JMP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 },
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/* 2DC */ { VXInstructionMnemonic::JMP, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 2DD */ { VXInstructionMnemonic::JMP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 },
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/* 2DE */ { VXInstructionMnemonic::JNB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2DF */ { VXInstructionMnemonic::JNB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2E0 */ { VXInstructionMnemonic::JNE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2E1 */ { VXInstructionMnemonic::JNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2E2 */ { VXInstructionMnemonic::JNO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2E3 */ { VXInstructionMnemonic::JNO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2E4 */ { VXInstructionMnemonic::JNP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2E5 */ { VXInstructionMnemonic::JNP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2E6 */ { VXInstructionMnemonic::JNS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2E7 */ { VXInstructionMnemonic::JNS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2E8 */ { VXInstructionMnemonic::JO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2E9 */ { VXInstructionMnemonic::JO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2EA */ { VXInstructionMnemonic::JP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2EB */ { VXInstructionMnemonic::JP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2EC */ { VXInstructionMnemonic::JRCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX },
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/* 2ED */ { VXInstructionMnemonic::JS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2EE */ { VXInstructionMnemonic::JS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 2EF */ { VXInstructionMnemonic::LAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2F0 */ { VXInstructionMnemonic::LAR, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 2F1 */ { VXInstructionMnemonic::LDDQU, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 2F2 */ { VXInstructionMnemonic::LDMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2F3 */ { VXInstructionMnemonic::LDS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE },
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/* 2F4 */ { VXInstructionMnemonic::LEA, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 2F5 */ { VXInstructionMnemonic::LEAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2F6 */ { VXInstructionMnemonic::LES, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE },
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/* 2F7 */ { VXInstructionMnemonic::LFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 2F8 */ { VXInstructionMnemonic::LFS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 2F9 */ { VXInstructionMnemonic::LGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2FA */ { VXInstructionMnemonic::LGS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 2FB */ { VXInstructionMnemonic::LIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2FC */ { VXInstructionMnemonic::LLDT, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2FD */ { VXInstructionMnemonic::LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2FE */ { VXInstructionMnemonic::LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 2FF */ { VXInstructionMnemonic::LOCK, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 300 */ { VXInstructionMnemonic::LODSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 301 */ { VXInstructionMnemonic::LODSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 302 */ { VXInstructionMnemonic::LODSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 303 */ { VXInstructionMnemonic::LODSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 304 */ { VXInstructionMnemonic::LOOP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 305 */ { VXInstructionMnemonic::LOOPE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 306 */ { VXInstructionMnemonic::LOOPNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 307 */ { VXInstructionMnemonic::LSL, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 308 */ { VXInstructionMnemonic::LSS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 309 */ { VXInstructionMnemonic::LTR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 30A */ { VXInstructionMnemonic::MASKMOVDQU, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 30B */ { VXInstructionMnemonic::MASKMOVQ, { OPI_P, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 30C */ { VXInstructionMnemonic::MAXPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 30D */ { VXInstructionMnemonic::MAXPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 30E */ { VXInstructionMnemonic::MAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 30F */ { VXInstructionMnemonic::MAXSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 310 */ { VXInstructionMnemonic::MFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 311 */ { VXInstructionMnemonic::MINPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 312 */ { VXInstructionMnemonic::MINPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 313 */ { VXInstructionMnemonic::MINSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 314 */ { VXInstructionMnemonic::MINSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 315 */ { VXInstructionMnemonic::MONITOR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 316 */ { VXInstructionMnemonic::MONTMUL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 317 */ { VXInstructionMnemonic::MOV, { OPI_R0b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 318 */ { VXInstructionMnemonic::MOV, { OPI_R2b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 319 */ { VXInstructionMnemonic::MOV, { OPI_R3b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 31A */ { VXInstructionMnemonic::MOV, { OPI_R1b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 31B */ { VXInstructionMnemonic::MOV, { OPI_AL, OPI_Ob, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE },
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/* 31C */ { VXInstructionMnemonic::MOV, { OPI_S, OPI_MwRv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 31D */ { VXInstructionMnemonic::MOV, { OPI_MwRv, OPI_S, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 31E */ { VXInstructionMnemonic::MOV, { OPI_Ov, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE },
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/* 31F */ { VXInstructionMnemonic::MOV, { OPI_Ob, OPI_AL, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE },
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/* 320 */ { VXInstructionMnemonic::MOV, { OPI_rAX, OPI_Ov, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE },
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/* 321 */ { VXInstructionMnemonic::MOV, { OPI_R4b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 322 */ { VXInstructionMnemonic::MOV, { OPI_R7v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 323 */ { VXInstructionMnemonic::MOV, { OPI_R6v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 324 */ { VXInstructionMnemonic::MOV, { OPI_R5v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 325 */ { VXInstructionMnemonic::MOV, { OPI_R, OPI_C, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 326 */ { VXInstructionMnemonic::MOV, { OPI_D, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 327 */ { VXInstructionMnemonic::MOV, { OPI_C, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 328 */ { VXInstructionMnemonic::MOV, { OPI_R, OPI_D, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 329 */ { VXInstructionMnemonic::MOV, { OPI_R4v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 32A */ { VXInstructionMnemonic::MOV, { OPI_R7b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 32B */ { VXInstructionMnemonic::MOV, { OPI_R6b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 32C */ { VXInstructionMnemonic::MOV, { OPI_R5b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 32D */ { VXInstructionMnemonic::MOV, { OPI_R0v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 32E */ { VXInstructionMnemonic::MOV, { OPI_R3v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 32F */ { VXInstructionMnemonic::MOV, { OPI_R2v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 330 */ { VXInstructionMnemonic::MOV, { OPI_R1v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 331 */ { VXInstructionMnemonic::MOV, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 332 */ { VXInstructionMnemonic::MOV, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 333 */ { VXInstructionMnemonic::MOV, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 334 */ { VXInstructionMnemonic::MOV, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 335 */ { VXInstructionMnemonic::MOV, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 336 */ { VXInstructionMnemonic::MOV, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 337 */ { VXInstructionMnemonic::MOVAPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 338 */ { VXInstructionMnemonic::MOVAPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 339 */ { VXInstructionMnemonic::MOVAPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 33A */ { VXInstructionMnemonic::MOVAPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 33B */ { VXInstructionMnemonic::MOVBE, { OPI_Gv, OPI_Mv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 33C */ { VXInstructionMnemonic::MOVBE, { OPI_Mv, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 33D */ { VXInstructionMnemonic::MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 33E */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 33F */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 340 */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 341 */ { VXInstructionMnemonic::MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 342 */ { VXInstructionMnemonic::MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 343 */ { VXInstructionMnemonic::MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 344 */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 345 */ { VXInstructionMnemonic::MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 346 */ { VXInstructionMnemonic::MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 347 */ { VXInstructionMnemonic::MOVDQ2Q, { OPI_P, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 348 */ { VXInstructionMnemonic::MOVDQA, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 349 */ { VXInstructionMnemonic::MOVDQA, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 34A */ { VXInstructionMnemonic::MOVDQU, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 34B */ { VXInstructionMnemonic::MOVDQU, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 34C */ { VXInstructionMnemonic::MOVHLPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 34D */ { VXInstructionMnemonic::MOVHPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 34E */ { VXInstructionMnemonic::MOVHPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 34F */ { VXInstructionMnemonic::MOVHPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 350 */ { VXInstructionMnemonic::MOVHPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 351 */ { VXInstructionMnemonic::MOVLHPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 352 */ { VXInstructionMnemonic::MOVLPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 353 */ { VXInstructionMnemonic::MOVLPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 354 */ { VXInstructionMnemonic::MOVLPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 355 */ { VXInstructionMnemonic::MOVLPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 356 */ { VXInstructionMnemonic::MOVMSKPD, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 357 */ { VXInstructionMnemonic::MOVMSKPS, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 358 */ { VXInstructionMnemonic::MOVNTDQ, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 359 */ { VXInstructionMnemonic::MOVNTDQA, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 35A */ { VXInstructionMnemonic::MOVNTI, { OPI_M, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 35B */ { VXInstructionMnemonic::MOVNTPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 35C */ { VXInstructionMnemonic::MOVNTPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 35D */ { VXInstructionMnemonic::MOVNTQ, { OPI_M, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 35E */ { VXInstructionMnemonic::MOVQ, { OPI_P, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 35F */ { VXInstructionMnemonic::MOVQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 360 */ { VXInstructionMnemonic::MOVQ, { OPI_Eq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 361 */ { VXInstructionMnemonic::MOVQ, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 362 */ { VXInstructionMnemonic::MOVQ, { OPI_Q, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 363 */ { VXInstructionMnemonic::MOVQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 364 */ { VXInstructionMnemonic::MOVQ, { OPI_V, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 365 */ { VXInstructionMnemonic::MOVQ, { OPI_Eq, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 366 */ { VXInstructionMnemonic::MOVQ2DQ, { OPI_V, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_OPERAND1_WRITE },
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/* 367 */ { VXInstructionMnemonic::MOVSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_OPERAND1_WRITE },
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/* 368 */ { VXInstructionMnemonic::MOVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 369 */ { VXInstructionMnemonic::MOVSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE },
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/* 36A */ { VXInstructionMnemonic::MOVSD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 36B */ { VXInstructionMnemonic::MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 36C */ { VXInstructionMnemonic::MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 36D */ { VXInstructionMnemonic::MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 36E */ { VXInstructionMnemonic::MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 36F */ { VXInstructionMnemonic::MOVSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE },
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/* 370 */ { VXInstructionMnemonic::MOVSS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 371 */ { VXInstructionMnemonic::MOVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 372 */ { VXInstructionMnemonic::MOVSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE },
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/* 373 */ { VXInstructionMnemonic::MOVSX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 374 */ { VXInstructionMnemonic::MOVSX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 375 */ { VXInstructionMnemonic::MOVSXD, { OPI_Gq, OPI_Ed, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 376 */ { VXInstructionMnemonic::MOVUPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 377 */ { VXInstructionMnemonic::MOVUPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 378 */ { VXInstructionMnemonic::MOVUPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 379 */ { VXInstructionMnemonic::MOVUPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 37A */ { VXInstructionMnemonic::MOVZX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 37B */ { VXInstructionMnemonic::MOVZX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 37C */ { VXInstructionMnemonic::MPSADBW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 37D */ { VXInstructionMnemonic::MUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 37E */ { VXInstructionMnemonic::MUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 37F */ { VXInstructionMnemonic::MULPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 380 */ { VXInstructionMnemonic::MULPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 381 */ { VXInstructionMnemonic::MULSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 382 */ { VXInstructionMnemonic::MULSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 383 */ { VXInstructionMnemonic::MWAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 384 */ { VXInstructionMnemonic::NEG, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 385 */ { VXInstructionMnemonic::NEG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 386 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 387 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 388 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 389 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 38A */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 38B */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 38C */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 38D */ { VXInstructionMnemonic::NOT, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 38E */ { VXInstructionMnemonic::NOT, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 38F */ { VXInstructionMnemonic::OR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE },
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/* 390 */ { VXInstructionMnemonic::OR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 391 */ { VXInstructionMnemonic::OR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 392 */ { VXInstructionMnemonic::OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 393 */ { VXInstructionMnemonic::OR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 394 */ { VXInstructionMnemonic::OR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 395 */ { VXInstructionMnemonic::OR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 396 */ { VXInstructionMnemonic::OR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 397 */ { VXInstructionMnemonic::OR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 398 */ { VXInstructionMnemonic::OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 399 */ { VXInstructionMnemonic::ORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 39A */ { VXInstructionMnemonic::ORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 39B */ { VXInstructionMnemonic::OUT, { OPI_DX, OPI_AL, OPI_NONE, OPI_NONE }, 0 },
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/* 39C */ { VXInstructionMnemonic::OUT, { OPI_DX, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 39D */ { VXInstructionMnemonic::OUT, { OPI_Ib, OPI_AL, OPI_NONE, OPI_NONE }, 0 },
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/* 39E */ { VXInstructionMnemonic::OUT, { OPI_Ib, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 39F */ { VXInstructionMnemonic::OUTSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 3A0 */ { VXInstructionMnemonic::OUTSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 3A1 */ { VXInstructionMnemonic::OUTSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 3A2 */ { VXInstructionMnemonic::PABSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3A3 */ { VXInstructionMnemonic::PABSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3A4 */ { VXInstructionMnemonic::PABSD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3A5 */ { VXInstructionMnemonic::PABSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3A6 */ { VXInstructionMnemonic::PABSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3A7 */ { VXInstructionMnemonic::PABSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3A8 */ { VXInstructionMnemonic::PACKSSDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3A9 */ { VXInstructionMnemonic::PACKSSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3AA */ { VXInstructionMnemonic::PACKSSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3AB */ { VXInstructionMnemonic::PACKSSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3AC */ { VXInstructionMnemonic::PACKUSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3AD */ { VXInstructionMnemonic::PACKUSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3AE */ { VXInstructionMnemonic::PACKUSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3AF */ { VXInstructionMnemonic::PADDB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B0 */ { VXInstructionMnemonic::PADDB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B1 */ { VXInstructionMnemonic::PADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B2 */ { VXInstructionMnemonic::PADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B3 */ { VXInstructionMnemonic::PADDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B4 */ { VXInstructionMnemonic::PADDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B5 */ { VXInstructionMnemonic::PADDSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B6 */ { VXInstructionMnemonic::PADDSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B7 */ { VXInstructionMnemonic::PADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B8 */ { VXInstructionMnemonic::PADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3B9 */ { VXInstructionMnemonic::PADDUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3BA */ { VXInstructionMnemonic::PADDUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3BB */ { VXInstructionMnemonic::PADDUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3BC */ { VXInstructionMnemonic::PADDUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3BD */ { VXInstructionMnemonic::PADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3BE */ { VXInstructionMnemonic::PADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3BF */ { VXInstructionMnemonic::PALIGNR, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C0 */ { VXInstructionMnemonic::PALIGNR, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C1 */ { VXInstructionMnemonic::PAND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C2 */ { VXInstructionMnemonic::PAND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C3 */ { VXInstructionMnemonic::PANDN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C4 */ { VXInstructionMnemonic::PANDN, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C5 */ { VXInstructionMnemonic::PAVGB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C6 */ { VXInstructionMnemonic::PAVGB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C7 */ { VXInstructionMnemonic::PAVGUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C8 */ { VXInstructionMnemonic::PAVGW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3C9 */ { VXInstructionMnemonic::PAVGW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3CA */ { VXInstructionMnemonic::PBLENDVB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3CB */ { VXInstructionMnemonic::PBLENDW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3CC */ { VXInstructionMnemonic::PCLMULQDQ, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3CD */ { VXInstructionMnemonic::PCMPEQB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3CE */ { VXInstructionMnemonic::PCMPEQB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3CF */ { VXInstructionMnemonic::PCMPEQD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3D0 */ { VXInstructionMnemonic::PCMPEQD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3D1 */ { VXInstructionMnemonic::PCMPEQQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 3D2 */ { VXInstructionMnemonic::PCMPEQW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3D3 */ { VXInstructionMnemonic::PCMPEQW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3D4 */ { VXInstructionMnemonic::PCMPESTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 3D5 */ { VXInstructionMnemonic::PCMPESTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 3D6 */ { VXInstructionMnemonic::PCMPGTB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3D7 */ { VXInstructionMnemonic::PCMPGTB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3D8 */ { VXInstructionMnemonic::PCMPGTD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3D9 */ { VXInstructionMnemonic::PCMPGTD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3DA */ { VXInstructionMnemonic::PCMPGTQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 3DB */ { VXInstructionMnemonic::PCMPGTW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3DC */ { VXInstructionMnemonic::PCMPGTW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3DD */ { VXInstructionMnemonic::PCMPISTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 3DE */ { VXInstructionMnemonic::PCMPISTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 3DF */ { VXInstructionMnemonic::PEXTRB, { OPI_MbRv, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 3E0 */ { VXInstructionMnemonic::PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3E1 */ { VXInstructionMnemonic::PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3E2 */ { VXInstructionMnemonic::PEXTRQ, { OPI_Eq, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 3E3 */ { VXInstructionMnemonic::PEXTRW, { OPI_MwRd, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3E4 */ { VXInstructionMnemonic::PEXTRW, { OPI_Gd, OPI_N, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3E5 */ { VXInstructionMnemonic::PEXTRW, { OPI_Gd, OPI_U, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3E6 */ { VXInstructionMnemonic::PF2ID, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3E7 */ { VXInstructionMnemonic::PF2IW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3E8 */ { VXInstructionMnemonic::PFACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3E9 */ { VXInstructionMnemonic::PFADD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3EA */ { VXInstructionMnemonic::PFCMPEQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3EB */ { VXInstructionMnemonic::PFCMPGE, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3EC */ { VXInstructionMnemonic::PFCMPGT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3ED */ { VXInstructionMnemonic::PFMAX, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3EE */ { VXInstructionMnemonic::PFMIN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3EF */ { VXInstructionMnemonic::PFMUL, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3F0 */ { VXInstructionMnemonic::PFNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3F1 */ { VXInstructionMnemonic::PFPNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3F2 */ { VXInstructionMnemonic::PFRCP, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3F3 */ { VXInstructionMnemonic::PFRCPIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3F4 */ { VXInstructionMnemonic::PFRCPIT2, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3F5 */ { VXInstructionMnemonic::PFRSQIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3F6 */ { VXInstructionMnemonic::PFRSQRT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 3F7 */ { VXInstructionMnemonic::PFSUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3F8 */ { VXInstructionMnemonic::PFSUBR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3F9 */ { VXInstructionMnemonic::PHADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3FA */ { VXInstructionMnemonic::PHADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3FB */ { VXInstructionMnemonic::PHADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3FC */ { VXInstructionMnemonic::PHADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3FD */ { VXInstructionMnemonic::PHADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3FE */ { VXInstructionMnemonic::PHADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 3FF */ { VXInstructionMnemonic::PHMINPOSUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 400 */ { VXInstructionMnemonic::PHSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 401 */ { VXInstructionMnemonic::PHSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 402 */ { VXInstructionMnemonic::PHSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 403 */ { VXInstructionMnemonic::PHSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 404 */ { VXInstructionMnemonic::PHSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 405 */ { VXInstructionMnemonic::PHSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 406 */ { VXInstructionMnemonic::PI2FD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 407 */ { VXInstructionMnemonic::PI2FW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 408 */ { VXInstructionMnemonic::PINSRB, { OPI_V, OPI_MbRd, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 409 */ { VXInstructionMnemonic::PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 40A */ { VXInstructionMnemonic::PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 40B */ { VXInstructionMnemonic::PINSRQ, { OPI_V, OPI_Eq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 40C */ { VXInstructionMnemonic::PINSRW, { OPI_V, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 40D */ { VXInstructionMnemonic::PINSRW, { OPI_P, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 40E */ { VXInstructionMnemonic::PMADDUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 40F */ { VXInstructionMnemonic::PMADDUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 410 */ { VXInstructionMnemonic::PMADDWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 411 */ { VXInstructionMnemonic::PMADDWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 412 */ { VXInstructionMnemonic::PMAXSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 413 */ { VXInstructionMnemonic::PMAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 414 */ { VXInstructionMnemonic::PMAXSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 415 */ { VXInstructionMnemonic::PMAXSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 416 */ { VXInstructionMnemonic::PMAXUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 417 */ { VXInstructionMnemonic::PMAXUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 418 */ { VXInstructionMnemonic::PMAXUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 419 */ { VXInstructionMnemonic::PMAXUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 41A */ { VXInstructionMnemonic::PMINSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 41B */ { VXInstructionMnemonic::PMINSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 41C */ { VXInstructionMnemonic::PMINSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 41D */ { VXInstructionMnemonic::PMINSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 41E */ { VXInstructionMnemonic::PMINUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 41F */ { VXInstructionMnemonic::PMINUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 420 */ { VXInstructionMnemonic::PMINUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 421 */ { VXInstructionMnemonic::PMINUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 422 */ { VXInstructionMnemonic::PMOVMSKB, { OPI_Gd, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 423 */ { VXInstructionMnemonic::PMOVMSKB, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 424 */ { VXInstructionMnemonic::PMOVSXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 425 */ { VXInstructionMnemonic::PMOVSXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 426 */ { VXInstructionMnemonic::PMOVSXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 427 */ { VXInstructionMnemonic::PMOVSXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 428 */ { VXInstructionMnemonic::PMOVSXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 429 */ { VXInstructionMnemonic::PMOVSXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 42A */ { VXInstructionMnemonic::PMOVZXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 42B */ { VXInstructionMnemonic::PMOVZXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 42C */ { VXInstructionMnemonic::PMOVZXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 42D */ { VXInstructionMnemonic::PMOVZXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 42E */ { VXInstructionMnemonic::PMOVZXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 42F */ { VXInstructionMnemonic::PMOVZXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 430 */ { VXInstructionMnemonic::PMULDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 431 */ { VXInstructionMnemonic::PMULHRSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 432 */ { VXInstructionMnemonic::PMULHRSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 433 */ { VXInstructionMnemonic::PMULHRW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 434 */ { VXInstructionMnemonic::PMULHUW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 435 */ { VXInstructionMnemonic::PMULHUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 436 */ { VXInstructionMnemonic::PMULHW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 437 */ { VXInstructionMnemonic::PMULHW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 438 */ { VXInstructionMnemonic::PMULLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 439 */ { VXInstructionMnemonic::PMULLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 43A */ { VXInstructionMnemonic::PMULLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 43B */ { VXInstructionMnemonic::PMULUDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 43C */ { VXInstructionMnemonic::PMULUDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 43D */ { VXInstructionMnemonic::POP, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 43E */ { VXInstructionMnemonic::POP, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 43F */ { VXInstructionMnemonic::POP, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 440 */ { VXInstructionMnemonic::POP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 441 */ { VXInstructionMnemonic::POP, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 442 */ { VXInstructionMnemonic::POP, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 443 */ { VXInstructionMnemonic::POP, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE },
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/* 444 */ { VXInstructionMnemonic::POP, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE },
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/* 445 */ { VXInstructionMnemonic::POP, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE },
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/* 446 */ { VXInstructionMnemonic::POP, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE },
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/* 447 */ { VXInstructionMnemonic::POP, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 448 */ { VXInstructionMnemonic::POP, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 449 */ { VXInstructionMnemonic::POP, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 44A */ { VXInstructionMnemonic::POP, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE },
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/* 44B */ { VXInstructionMnemonic::POPA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 },
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/* 44C */ { VXInstructionMnemonic::POPAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 },
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/* 44D */ { VXInstructionMnemonic::POPCNT, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 44E */ { VXInstructionMnemonic::POPFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 44F */ { VXInstructionMnemonic::POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 450 */ { VXInstructionMnemonic::POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 451 */ { VXInstructionMnemonic::POPFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 452 */ { VXInstructionMnemonic::POR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 453 */ { VXInstructionMnemonic::POR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 454 */ { VXInstructionMnemonic::PREFETCH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 455 */ { VXInstructionMnemonic::PREFETCHNTA, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 456 */ { VXInstructionMnemonic::PREFETCHT0, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 457 */ { VXInstructionMnemonic::PREFETCHT1, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 458 */ { VXInstructionMnemonic::PREFETCHT2, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 459 */ { VXInstructionMnemonic::PSADBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 45A */ { VXInstructionMnemonic::PSADBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 45B */ { VXInstructionMnemonic::PSHUFB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 45C */ { VXInstructionMnemonic::PSHUFB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 45D */ { VXInstructionMnemonic::PSHUFD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 45E */ { VXInstructionMnemonic::PSHUFHW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 45F */ { VXInstructionMnemonic::PSHUFLW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 460 */ { VXInstructionMnemonic::PSHUFW, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 461 */ { VXInstructionMnemonic::PSIGNB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 462 */ { VXInstructionMnemonic::PSIGNB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 463 */ { VXInstructionMnemonic::PSIGND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 464 */ { VXInstructionMnemonic::PSIGND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 465 */ { VXInstructionMnemonic::PSIGNW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 466 */ { VXInstructionMnemonic::PSIGNW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 467 */ { VXInstructionMnemonic::PSLLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 468 */ { VXInstructionMnemonic::PSLLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 469 */ { VXInstructionMnemonic::PSLLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 46A */ { VXInstructionMnemonic::PSLLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 46B */ { VXInstructionMnemonic::PSLLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 46C */ { VXInstructionMnemonic::PSLLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 46D */ { VXInstructionMnemonic::PSLLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 46E */ { VXInstructionMnemonic::PSLLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 46F */ { VXInstructionMnemonic::PSLLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 470 */ { VXInstructionMnemonic::PSLLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 471 */ { VXInstructionMnemonic::PSLLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 472 */ { VXInstructionMnemonic::PSLLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 473 */ { VXInstructionMnemonic::PSLLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 474 */ { VXInstructionMnemonic::PSRAD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 475 */ { VXInstructionMnemonic::PSRAD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 476 */ { VXInstructionMnemonic::PSRAD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 477 */ { VXInstructionMnemonic::PSRAD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 478 */ { VXInstructionMnemonic::PSRAW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 479 */ { VXInstructionMnemonic::PSRAW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 47A */ { VXInstructionMnemonic::PSRAW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 47B */ { VXInstructionMnemonic::PSRAW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 47C */ { VXInstructionMnemonic::PSRLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 47D */ { VXInstructionMnemonic::PSRLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 47E */ { VXInstructionMnemonic::PSRLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 47F */ { VXInstructionMnemonic::PSRLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 480 */ { VXInstructionMnemonic::PSRLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 481 */ { VXInstructionMnemonic::PSRLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 482 */ { VXInstructionMnemonic::PSRLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 483 */ { VXInstructionMnemonic::PSRLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 484 */ { VXInstructionMnemonic::PSRLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 485 */ { VXInstructionMnemonic::PSRLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 486 */ { VXInstructionMnemonic::PSRLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 487 */ { VXInstructionMnemonic::PSRLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 488 */ { VXInstructionMnemonic::PSRLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 489 */ { VXInstructionMnemonic::PSUBB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 48A */ { VXInstructionMnemonic::PSUBB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 48B */ { VXInstructionMnemonic::PSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 48C */ { VXInstructionMnemonic::PSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 48D */ { VXInstructionMnemonic::PSUBQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 48E */ { VXInstructionMnemonic::PSUBQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 48F */ { VXInstructionMnemonic::PSUBSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 490 */ { VXInstructionMnemonic::PSUBSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 491 */ { VXInstructionMnemonic::PSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 492 */ { VXInstructionMnemonic::PSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 493 */ { VXInstructionMnemonic::PSUBUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 494 */ { VXInstructionMnemonic::PSUBUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 495 */ { VXInstructionMnemonic::PSUBUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 496 */ { VXInstructionMnemonic::PSUBUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 497 */ { VXInstructionMnemonic::PSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 498 */ { VXInstructionMnemonic::PSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 499 */ { VXInstructionMnemonic::PSWAPD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 49A */ { VXInstructionMnemonic::PTEST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 49B */ { VXInstructionMnemonic::PUNPCKHBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 49C */ { VXInstructionMnemonic::PUNPCKHBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 49D */ { VXInstructionMnemonic::PUNPCKHDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 49E */ { VXInstructionMnemonic::PUNPCKHDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 49F */ { VXInstructionMnemonic::PUNPCKHQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A0 */ { VXInstructionMnemonic::PUNPCKHWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A1 */ { VXInstructionMnemonic::PUNPCKHWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A2 */ { VXInstructionMnemonic::PUNPCKLBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A3 */ { VXInstructionMnemonic::PUNPCKLBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A4 */ { VXInstructionMnemonic::PUNPCKLDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A5 */ { VXInstructionMnemonic::PUNPCKLDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A6 */ { VXInstructionMnemonic::PUNPCKLQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A7 */ { VXInstructionMnemonic::PUNPCKLWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A8 */ { VXInstructionMnemonic::PUNPCKLWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4A9 */ { VXInstructionMnemonic::PUSH, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 },
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/* 4AA */ { VXInstructionMnemonic::PUSH, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 },
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/* 4AB */ { VXInstructionMnemonic::PUSH, { OPI_sIb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 },
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/* 4AC */ { VXInstructionMnemonic::PUSH, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 },
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/* 4AD */ { VXInstructionMnemonic::PUSH, { OPI_CS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 },
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/* 4AE */ { VXInstructionMnemonic::PUSH, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4AF */ { VXInstructionMnemonic::PUSH, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4B0 */ { VXInstructionMnemonic::PUSH, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4B1 */ { VXInstructionMnemonic::PUSH, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4B2 */ { VXInstructionMnemonic::PUSH, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4B3 */ { VXInstructionMnemonic::PUSH, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4B4 */ { VXInstructionMnemonic::PUSH, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4B5 */ { VXInstructionMnemonic::PUSH, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4B6 */ { VXInstructionMnemonic::PUSH, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4B7 */ { VXInstructionMnemonic::PUSH, { OPI_sIz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 },
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/* 4B8 */ { VXInstructionMnemonic::PUSH, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4B9 */ { VXInstructionMnemonic::PUSH, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 4BA */ { VXInstructionMnemonic::PUSHA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 },
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/* 4BB */ { VXInstructionMnemonic::PUSHAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 },
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/* 4BC */ { VXInstructionMnemonic::PUSHFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 4BD */ { VXInstructionMnemonic::PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 },
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/* 4BE */ { VXInstructionMnemonic::PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 },
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/* 4BF */ { VXInstructionMnemonic::PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 },
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/* 4C0 */ { VXInstructionMnemonic::PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX },
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/* 4C1 */ { VXInstructionMnemonic::PXOR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C2 */ { VXInstructionMnemonic::PXOR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C3 */ { VXInstructionMnemonic::RCL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C4 */ { VXInstructionMnemonic::RCL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C5 */ { VXInstructionMnemonic::RCL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C6 */ { VXInstructionMnemonic::RCL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C7 */ { VXInstructionMnemonic::RCL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C8 */ { VXInstructionMnemonic::RCL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4C9 */ { VXInstructionMnemonic::RCPPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4CA */ { VXInstructionMnemonic::RCPSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4CB */ { VXInstructionMnemonic::RCR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4CC */ { VXInstructionMnemonic::RCR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4CD */ { VXInstructionMnemonic::RCR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4CE */ { VXInstructionMnemonic::RCR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4CF */ { VXInstructionMnemonic::RCR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4D0 */ { VXInstructionMnemonic::RCR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4D1 */ { VXInstructionMnemonic::RDMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4D2 */ { VXInstructionMnemonic::RDPMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4D3 */ { VXInstructionMnemonic::RDRAND, { OPI_R, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4D4 */ { VXInstructionMnemonic::RDTSC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4D5 */ { VXInstructionMnemonic::RDTSCP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4D6 */ { VXInstructionMnemonic::REP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4D7 */ { VXInstructionMnemonic::REPNE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4D8 */ { VXInstructionMnemonic::RET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4D9 */ { VXInstructionMnemonic::RET, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4DA */ { VXInstructionMnemonic::RETF, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4DB */ { VXInstructionMnemonic::RETF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4DC */ { VXInstructionMnemonic::ROL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4DD */ { VXInstructionMnemonic::ROL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4DE */ { VXInstructionMnemonic::ROL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4DF */ { VXInstructionMnemonic::ROL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E0 */ { VXInstructionMnemonic::ROL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E1 */ { VXInstructionMnemonic::ROL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E2 */ { VXInstructionMnemonic::ROR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E3 */ { VXInstructionMnemonic::ROR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E4 */ { VXInstructionMnemonic::ROR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E5 */ { VXInstructionMnemonic::ROR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E6 */ { VXInstructionMnemonic::ROR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E7 */ { VXInstructionMnemonic::ROR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4E8 */ { VXInstructionMnemonic::ROUNDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4E9 */ { VXInstructionMnemonic::ROUNDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4EA */ { VXInstructionMnemonic::ROUNDSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4EB */ { VXInstructionMnemonic::ROUNDSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4EC */ { VXInstructionMnemonic::RSM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4ED */ { VXInstructionMnemonic::RSQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4EE */ { VXInstructionMnemonic::RSQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4EF */ { VXInstructionMnemonic::SAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 4F0 */ { VXInstructionMnemonic::SALC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_READWRITE },
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/* 4F1 */ { VXInstructionMnemonic::SAR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4F2 */ { VXInstructionMnemonic::SAR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4F3 */ { VXInstructionMnemonic::SAR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4F4 */ { VXInstructionMnemonic::SAR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4F5 */ { VXInstructionMnemonic::SAR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4F6 */ { VXInstructionMnemonic::SAR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 4F7 */ { VXInstructionMnemonic::SBB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4F8 */ { VXInstructionMnemonic::SBB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4F9 */ { VXInstructionMnemonic::SBB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE },
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/* 4FA */ { VXInstructionMnemonic::SBB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE },
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/* 4FB */ { VXInstructionMnemonic::SBB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4FC */ { VXInstructionMnemonic::SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_WRITE },
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/* 4FD */ { VXInstructionMnemonic::SBB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4FE */ { VXInstructionMnemonic::SBB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 4FF */ { VXInstructionMnemonic::SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 500 */ { VXInstructionMnemonic::SBB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 501 */ { VXInstructionMnemonic::SCASB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 502 */ { VXInstructionMnemonic::SCASD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 503 */ { VXInstructionMnemonic::SCASQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 504 */ { VXInstructionMnemonic::SCASW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 505 */ { VXInstructionMnemonic::SETA, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 506 */ { VXInstructionMnemonic::SETAE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 507 */ { VXInstructionMnemonic::SETB, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 508 */ { VXInstructionMnemonic::SETBE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 509 */ { VXInstructionMnemonic::SETE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 50A */ { VXInstructionMnemonic::SETG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 50B */ { VXInstructionMnemonic::SETGE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 50C */ { VXInstructionMnemonic::SETL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 50D */ { VXInstructionMnemonic::SETLE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 50E */ { VXInstructionMnemonic::SETNE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 50F */ { VXInstructionMnemonic::SETNO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 510 */ { VXInstructionMnemonic::SETNP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 511 */ { VXInstructionMnemonic::SETNS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 512 */ { VXInstructionMnemonic::SETO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 513 */ { VXInstructionMnemonic::SETP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 514 */ { VXInstructionMnemonic::SETS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 515 */ { VXInstructionMnemonic::SFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 516 */ { VXInstructionMnemonic::SGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 517 */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 518 */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 519 */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 51A */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 51B */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 51C */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 51D */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 51E */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 51F */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 520 */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 521 */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 522 */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 523 */ { VXInstructionMnemonic::SHLD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 524 */ { VXInstructionMnemonic::SHLD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 525 */ { VXInstructionMnemonic::SHR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 526 */ { VXInstructionMnemonic::SHR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 527 */ { VXInstructionMnemonic::SHR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 528 */ { VXInstructionMnemonic::SHR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 529 */ { VXInstructionMnemonic::SHR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 52A */ { VXInstructionMnemonic::SHR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 52B */ { VXInstructionMnemonic::SHRD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 52C */ { VXInstructionMnemonic::SHRD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 52D */ { VXInstructionMnemonic::SHUFPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 52E */ { VXInstructionMnemonic::SHUFPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 52F */ { VXInstructionMnemonic::SIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 530 */ { VXInstructionMnemonic::SKINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 531 */ { VXInstructionMnemonic::SLDT, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 532 */ { VXInstructionMnemonic::SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 533 */ { VXInstructionMnemonic::SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 534 */ { VXInstructionMnemonic::SQRTPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 535 */ { VXInstructionMnemonic::SQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 536 */ { VXInstructionMnemonic::SQRTSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 537 */ { VXInstructionMnemonic::SQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 538 */ { VXInstructionMnemonic::STC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 539 */ { VXInstructionMnemonic::STD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 53A */ { VXInstructionMnemonic::STGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 53B */ { VXInstructionMnemonic::STI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 53C */ { VXInstructionMnemonic::STMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 53D */ { VXInstructionMnemonic::STOSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX },
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/* 53E */ { VXInstructionMnemonic::STOSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 53F */ { VXInstructionMnemonic::STOSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 540 */ { VXInstructionMnemonic::STOSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 541 */ { VXInstructionMnemonic::STR, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 542 */ { VXInstructionMnemonic::SUB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 543 */ { VXInstructionMnemonic::SUB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 544 */ { VXInstructionMnemonic::SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 545 */ { VXInstructionMnemonic::SUB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 546 */ { VXInstructionMnemonic::SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE },
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/* 547 */ { VXInstructionMnemonic::SUB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE },
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/* 548 */ { VXInstructionMnemonic::SUB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 549 */ { VXInstructionMnemonic::SUB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 54A */ { VXInstructionMnemonic::SUB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
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/* 54B */ { VXInstructionMnemonic::SUB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 54C */ { VXInstructionMnemonic::SUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 54D */ { VXInstructionMnemonic::SUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 54E */ { VXInstructionMnemonic::SUBSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 54F */ { VXInstructionMnemonic::SUBSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 550 */ { VXInstructionMnemonic::SWAPGS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 551 */ { VXInstructionMnemonic::SYSCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 552 */ { VXInstructionMnemonic::SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 553 */ { VXInstructionMnemonic::SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 554 */ { VXInstructionMnemonic::SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 555 */ { VXInstructionMnemonic::SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 556 */ { VXInstructionMnemonic::SYSRET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 557 */ { VXInstructionMnemonic::TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 558 */ { VXInstructionMnemonic::TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 559 */ { VXInstructionMnemonic::TEST, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 55A */ { VXInstructionMnemonic::TEST, { OPI_Ev, OPI_Iz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 55B */ { VXInstructionMnemonic::TEST, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW },
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/* 55C */ { VXInstructionMnemonic::TEST, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 55D */ { VXInstructionMnemonic::TEST, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 55E */ { VXInstructionMnemonic::TEST, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 },
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/* 55F */ { VXInstructionMnemonic::UCOMISD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 560 */ { VXInstructionMnemonic::UCOMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 561 */ { VXInstructionMnemonic::UD2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 562 */ { VXInstructionMnemonic::UNPCKHPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 563 */ { VXInstructionMnemonic::UNPCKHPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 564 */ { VXInstructionMnemonic::UNPCKLPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 565 */ { VXInstructionMnemonic::UNPCKLPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 566 */ { VXInstructionMnemonic::VADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 567 */ { VXInstructionMnemonic::VADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 568 */ { VXInstructionMnemonic::VADDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 569 */ { VXInstructionMnemonic::VADDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 56A */ { VXInstructionMnemonic::VADDSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 56B */ { VXInstructionMnemonic::VADDSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 56C */ { VXInstructionMnemonic::VAESDEC, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 56D */ { VXInstructionMnemonic::VAESDECLAST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 56E */ { VXInstructionMnemonic::VAESENC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 56F */ { VXInstructionMnemonic::VAESENCLAST, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 570 */ { VXInstructionMnemonic::VAESIMC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 571 */ { VXInstructionMnemonic::VAESKEYGENASSIST, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 572 */ { VXInstructionMnemonic::VANDNPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 573 */ { VXInstructionMnemonic::VANDNPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 574 */ { VXInstructionMnemonic::VANDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 575 */ { VXInstructionMnemonic::VANDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 576 */ { VXInstructionMnemonic::VBLENDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 577 */ { VXInstructionMnemonic::VBLENDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 578 */ { VXInstructionMnemonic::VBLENDVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 579 */ { VXInstructionMnemonic::VBLENDVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 57A */ { VXInstructionMnemonic::VBROADCASTSD, { OPI_Vqq, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 57B */ { VXInstructionMnemonic::VBROADCASTSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 57C */ { VXInstructionMnemonic::VCMPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 57D */ { VXInstructionMnemonic::VCMPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 57E */ { VXInstructionMnemonic::VCMPSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 57F */ { VXInstructionMnemonic::VCMPSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 580 */ { VXInstructionMnemonic::VCOMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 581 */ { VXInstructionMnemonic::VCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 582 */ { VXInstructionMnemonic::VCVTDQ2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 583 */ { VXInstructionMnemonic::VCVTDQ2PS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 584 */ { VXInstructionMnemonic::VCVTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 585 */ { VXInstructionMnemonic::VCVTPD2PS, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 586 */ { VXInstructionMnemonic::VCVTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 587 */ { VXInstructionMnemonic::VCVTPS2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 588 */ { VXInstructionMnemonic::VCVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 589 */ { VXInstructionMnemonic::VCVTSD2SS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 58A */ { VXInstructionMnemonic::VCVTSI2SD, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 58B */ { VXInstructionMnemonic::VCVTSI2SS, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 58C */ { VXInstructionMnemonic::VCVTSS2SD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 58D */ { VXInstructionMnemonic::VCVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 58E */ { VXInstructionMnemonic::VCVTTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 58F */ { VXInstructionMnemonic::VCVTTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 590 */ { VXInstructionMnemonic::VCVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 591 */ { VXInstructionMnemonic::VCVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 592 */ { VXInstructionMnemonic::VDIVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 593 */ { VXInstructionMnemonic::VDIVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 594 */ { VXInstructionMnemonic::VDIVSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 595 */ { VXInstructionMnemonic::VDIVSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 596 */ { VXInstructionMnemonic::VDPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 597 */ { VXInstructionMnemonic::VDPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 598 */ { VXInstructionMnemonic::VERR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 599 */ { VXInstructionMnemonic::VERW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 59A */ { VXInstructionMnemonic::VEXTRACTF128, { OPI_Wdq, OPI_Vqq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 59B */ { VXInstructionMnemonic::VEXTRACTPS, { OPI_MdRy, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 59C */ { VXInstructionMnemonic::VHADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 59D */ { VXInstructionMnemonic::VHADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 59E */ { VXInstructionMnemonic::VHSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 59F */ { VXInstructionMnemonic::VHSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5A0 */ { VXInstructionMnemonic::VINSERTF128, { OPI_Vqq, OPI_Hqq, OPI_Wdq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5A1 */ { VXInstructionMnemonic::VINSERTPS, { OPI_Vx, OPI_Hx, OPI_Md, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5A2 */ { VXInstructionMnemonic::VLDDQU, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5A3 */ { VXInstructionMnemonic::VMASKMOVDQU, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 5A4 */ { VXInstructionMnemonic::VMASKMOVPD, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5A5 */ { VXInstructionMnemonic::VMASKMOVPD, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5A6 */ { VXInstructionMnemonic::VMASKMOVPS, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5A7 */ { VXInstructionMnemonic::VMASKMOVPS, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5A8 */ { VXInstructionMnemonic::VMAXPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5A9 */ { VXInstructionMnemonic::VMAXPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5AA */ { VXInstructionMnemonic::VMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 5AB */ { VXInstructionMnemonic::VMAXSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 5AC */ { VXInstructionMnemonic::VMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5AD */ { VXInstructionMnemonic::VMCLEAR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 5AE */ { VXInstructionMnemonic::VMINPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5AF */ { VXInstructionMnemonic::VMINPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 5B0 */ { VXInstructionMnemonic::VMINSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 5B1 */ { VXInstructionMnemonic::VMINSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 5B2 */ { VXInstructionMnemonic::VMLAUNCH, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5B3 */ { VXInstructionMnemonic::VMLOAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5B4 */ { VXInstructionMnemonic::VMMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5B5 */ { VXInstructionMnemonic::VMOVAPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5B6 */ { VXInstructionMnemonic::VMOVAPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5B7 */ { VXInstructionMnemonic::VMOVAPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5B8 */ { VXInstructionMnemonic::VMOVAPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5B9 */ { VXInstructionMnemonic::VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5BA */ { VXInstructionMnemonic::VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5BB */ { VXInstructionMnemonic::VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5BC */ { VXInstructionMnemonic::VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5BD */ { VXInstructionMnemonic::VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5BE */ { VXInstructionMnemonic::VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5BF */ { VXInstructionMnemonic::VMOVDQA, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5C0 */ { VXInstructionMnemonic::VMOVDQA, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5C1 */ { VXInstructionMnemonic::VMOVDQU, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5C2 */ { VXInstructionMnemonic::VMOVDQU, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5C3 */ { VXInstructionMnemonic::VMOVHLPS, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5C4 */ { VXInstructionMnemonic::VMOVHPD, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5C5 */ { VXInstructionMnemonic::VMOVHPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5C6 */ { VXInstructionMnemonic::VMOVHPS, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5C7 */ { VXInstructionMnemonic::VMOVHPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5C8 */ { VXInstructionMnemonic::VMOVLHPS, { OPI_Vx, OPI_Hx, OPI_Ux, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5C9 */ { VXInstructionMnemonic::VMOVLPD, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5CA */ { VXInstructionMnemonic::VMOVLPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5CB */ { VXInstructionMnemonic::VMOVLPS, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5CC */ { VXInstructionMnemonic::VMOVLPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5CD */ { VXInstructionMnemonic::VMOVMSKPD, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5CE */ { VXInstructionMnemonic::VMOVMSKPS, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5CF */ { VXInstructionMnemonic::VMOVNTDQ, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5D0 */ { VXInstructionMnemonic::VMOVNTDQA, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5D1 */ { VXInstructionMnemonic::VMOVNTPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5D2 */ { VXInstructionMnemonic::VMOVNTPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5D3 */ { VXInstructionMnemonic::VMOVQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5D4 */ { VXInstructionMnemonic::VMOVQ, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5D5 */ { VXInstructionMnemonic::VMOVQ, { OPI_Vx, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5D6 */ { VXInstructionMnemonic::VMOVQ, { OPI_Eq, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5D7 */ { VXInstructionMnemonic::VMOVSD, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5D8 */ { VXInstructionMnemonic::VMOVSD, { OPI_Mq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5D9 */ { VXInstructionMnemonic::VMOVSD, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5DA */ { VXInstructionMnemonic::VMOVSD, { OPI_V, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5DB */ { VXInstructionMnemonic::VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5DC */ { VXInstructionMnemonic::VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5DD */ { VXInstructionMnemonic::VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5DE */ { VXInstructionMnemonic::VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5DF */ { VXInstructionMnemonic::VMOVSS, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5E0 */ { VXInstructionMnemonic::VMOVSS, { OPI_Md, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5E1 */ { VXInstructionMnemonic::VMOVSS, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5E2 */ { VXInstructionMnemonic::VMOVSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 5E3 */ { VXInstructionMnemonic::VMOVUPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5E4 */ { VXInstructionMnemonic::VMOVUPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5E5 */ { VXInstructionMnemonic::VMOVUPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5E6 */ { VXInstructionMnemonic::VMOVUPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5E7 */ { VXInstructionMnemonic::VMPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5E8 */ { VXInstructionMnemonic::VMPTRLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 5E9 */ { VXInstructionMnemonic::VMPTRST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 5EA */ { VXInstructionMnemonic::VMREAD, { OPI_Ey, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 5EB */ { VXInstructionMnemonic::VMRESUME, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5EC */ { VXInstructionMnemonic::VMRUN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5ED */ { VXInstructionMnemonic::VMSAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5EE */ { VXInstructionMnemonic::VMULPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5EF */ { VXInstructionMnemonic::VMULPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5F0 */ { VXInstructionMnemonic::VMULSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 5F1 */ { VXInstructionMnemonic::VMULSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 5F2 */ { VXInstructionMnemonic::VMWRITE, { OPI_Gy, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 },
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/* 5F3 */ { VXInstructionMnemonic::VMXOFF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 5F4 */ { VXInstructionMnemonic::VMXON, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 5F5 */ { VXInstructionMnemonic::VORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5F6 */ { VXInstructionMnemonic::VORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL },
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/* 5F7 */ { VXInstructionMnemonic::VPABSB, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5F8 */ { VXInstructionMnemonic::VPABSD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5F9 */ { VXInstructionMnemonic::VPABSW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 5FA */ { VXInstructionMnemonic::VPACKSSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5FB */ { VXInstructionMnemonic::VPACKSSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5FC */ { VXInstructionMnemonic::VPACKUSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5FD */ { VXInstructionMnemonic::VPACKUSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5FE */ { VXInstructionMnemonic::VPADDB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 5FF */ { VXInstructionMnemonic::VPADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 600 */ { VXInstructionMnemonic::VPADDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 601 */ { VXInstructionMnemonic::VPADDSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 602 */ { VXInstructionMnemonic::VPADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 603 */ { VXInstructionMnemonic::VPADDUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 604 */ { VXInstructionMnemonic::VPADDUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 605 */ { VXInstructionMnemonic::VPADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 606 */ { VXInstructionMnemonic::VPALIGNR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 607 */ { VXInstructionMnemonic::VPAND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 608 */ { VXInstructionMnemonic::VPANDN, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 609 */ { VXInstructionMnemonic::VPAVGB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 60A */ { VXInstructionMnemonic::VPAVGW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 60B */ { VXInstructionMnemonic::VPBLENDVB, { OPI_V, OPI_H, OPI_W, OPI_L }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 60C */ { VXInstructionMnemonic::VPBLENDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 60D */ { VXInstructionMnemonic::VPCLMULQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 60E */ { VXInstructionMnemonic::VPCMPEQB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 60F */ { VXInstructionMnemonic::VPCMPEQD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 610 */ { VXInstructionMnemonic::VPCMPEQQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 611 */ { VXInstructionMnemonic::VPCMPEQW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 612 */ { VXInstructionMnemonic::VPCMPESTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 613 */ { VXInstructionMnemonic::VPCMPESTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 614 */ { VXInstructionMnemonic::VPCMPGTB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 615 */ { VXInstructionMnemonic::VPCMPGTD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 616 */ { VXInstructionMnemonic::VPCMPGTQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 617 */ { VXInstructionMnemonic::VPCMPGTW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 618 */ { VXInstructionMnemonic::VPCMPISTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 619 */ { VXInstructionMnemonic::VPCMPISTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 61A */ { VXInstructionMnemonic::VPERM2F128, { OPI_Vqq, OPI_Hqq, OPI_Wqq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 61B */ { VXInstructionMnemonic::VPERMILPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 61C */ { VXInstructionMnemonic::VPERMILPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 61D */ { VXInstructionMnemonic::VPERMILPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 61E */ { VXInstructionMnemonic::VPERMILPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 61F */ { VXInstructionMnemonic::VPEXTRB, { OPI_MbRv, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 620 */ { VXInstructionMnemonic::VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 621 */ { VXInstructionMnemonic::VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 622 */ { VXInstructionMnemonic::VPEXTRQ, { OPI_Eq, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 623 */ { VXInstructionMnemonic::VPEXTRW, { OPI_Gd, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 624 */ { VXInstructionMnemonic::VPEXTRW, { OPI_MwRd, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 625 */ { VXInstructionMnemonic::VPHADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 626 */ { VXInstructionMnemonic::VPHADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 627 */ { VXInstructionMnemonic::VPHADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 628 */ { VXInstructionMnemonic::VPHMINPOSUW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 629 */ { VXInstructionMnemonic::VPHSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 62A */ { VXInstructionMnemonic::VPHSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 62B */ { VXInstructionMnemonic::VPHSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 62C */ { VXInstructionMnemonic::VPINSRB, { OPI_V, OPI_H, OPI_MbRd, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 62D */ { VXInstructionMnemonic::VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 62E */ { VXInstructionMnemonic::VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 62F */ { VXInstructionMnemonic::VPINSRQ, { OPI_V, OPI_H, OPI_Eq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 630 */ { VXInstructionMnemonic::VPINSRW, { OPI_Vx, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE },
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/* 631 */ { VXInstructionMnemonic::VPMADDUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 632 */ { VXInstructionMnemonic::VPMADDWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 633 */ { VXInstructionMnemonic::VPMAXSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 634 */ { VXInstructionMnemonic::VPMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 635 */ { VXInstructionMnemonic::VPMAXSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 636 */ { VXInstructionMnemonic::VPMAXUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 637 */ { VXInstructionMnemonic::VPMAXUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 638 */ { VXInstructionMnemonic::VPMAXUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 639 */ { VXInstructionMnemonic::VPMINSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 63A */ { VXInstructionMnemonic::VPMINSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 63B */ { VXInstructionMnemonic::VPMINSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 63C */ { VXInstructionMnemonic::VPMINUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 63D */ { VXInstructionMnemonic::VPMINUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 63E */ { VXInstructionMnemonic::VPMINUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 63F */ { VXInstructionMnemonic::VPMOVMSKB, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 640 */ { VXInstructionMnemonic::VPMOVSXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 641 */ { VXInstructionMnemonic::VPMOVSXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 642 */ { VXInstructionMnemonic::VPMOVSXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 643 */ { VXInstructionMnemonic::VPMOVSXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 644 */ { VXInstructionMnemonic::VPMOVSXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 645 */ { VXInstructionMnemonic::VPMOVZXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 646 */ { VXInstructionMnemonic::VPMOVZXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 647 */ { VXInstructionMnemonic::VPMOVZXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 648 */ { VXInstructionMnemonic::VPMOVZXDQ, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 649 */ { VXInstructionMnemonic::VPMOVZXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 64A */ { VXInstructionMnemonic::VPMOVZXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 64B */ { VXInstructionMnemonic::VPMULDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 64C */ { VXInstructionMnemonic::VPMULHRSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 64D */ { VXInstructionMnemonic::VPMULHUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 64E */ { VXInstructionMnemonic::VPMULHW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 64F */ { VXInstructionMnemonic::VPMULLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 650 */ { VXInstructionMnemonic::VPMULLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 651 */ { VXInstructionMnemonic::VPOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 652 */ { VXInstructionMnemonic::VPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 653 */ { VXInstructionMnemonic::VPSHUFB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 654 */ { VXInstructionMnemonic::VPSHUFD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 655 */ { VXInstructionMnemonic::VPSHUFHW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 656 */ { VXInstructionMnemonic::VPSHUFLW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 657 */ { VXInstructionMnemonic::VPSIGNB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 658 */ { VXInstructionMnemonic::VPSIGND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 659 */ { VXInstructionMnemonic::VPSIGNW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 65A */ { VXInstructionMnemonic::VPSLLD, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 65B */ { VXInstructionMnemonic::VPSLLD, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 65C */ { VXInstructionMnemonic::VPSLLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 65D */ { VXInstructionMnemonic::VPSLLQ, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 65E */ { VXInstructionMnemonic::VPSLLQ, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 65F */ { VXInstructionMnemonic::VPSLLW, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 660 */ { VXInstructionMnemonic::VPSLLW, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 661 */ { VXInstructionMnemonic::VPSRAD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 662 */ { VXInstructionMnemonic::VPSRAD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 663 */ { VXInstructionMnemonic::VPSRAW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 664 */ { VXInstructionMnemonic::VPSRAW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 665 */ { VXInstructionMnemonic::VPSRLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 666 */ { VXInstructionMnemonic::VPSRLD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 667 */ { VXInstructionMnemonic::VPSRLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 668 */ { VXInstructionMnemonic::VPSRLQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 669 */ { VXInstructionMnemonic::VPSRLQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 66A */ { VXInstructionMnemonic::VPSRLW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 66B */ { VXInstructionMnemonic::VPSRLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 66C */ { VXInstructionMnemonic::VPSUBB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 66D */ { VXInstructionMnemonic::VPSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 66E */ { VXInstructionMnemonic::VPSUBQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 66F */ { VXInstructionMnemonic::VPSUBSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 670 */ { VXInstructionMnemonic::VPSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 671 */ { VXInstructionMnemonic::VPSUBUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 672 */ { VXInstructionMnemonic::VPSUBUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 673 */ { VXInstructionMnemonic::VPSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 674 */ { VXInstructionMnemonic::VPTEST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL },
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/* 675 */ { VXInstructionMnemonic::VPUNPCKHBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 676 */ { VXInstructionMnemonic::VPUNPCKHDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 677 */ { VXInstructionMnemonic::VPUNPCKHQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 678 */ { VXInstructionMnemonic::VPUNPCKHWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 679 */ { VXInstructionMnemonic::VPUNPCKLBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 67A */ { VXInstructionMnemonic::VPUNPCKLDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 67B */ { VXInstructionMnemonic::VPUNPCKLQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 67C */ { VXInstructionMnemonic::VPUNPCKLWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 67D */ { VXInstructionMnemonic::VPXOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 67E */ { VXInstructionMnemonic::VRCPPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 67F */ { VXInstructionMnemonic::VRCPSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 680 */ { VXInstructionMnemonic::VROUNDPD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 681 */ { VXInstructionMnemonic::VROUNDPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 682 */ { VXInstructionMnemonic::VROUNDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 683 */ { VXInstructionMnemonic::VROUNDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 684 */ { VXInstructionMnemonic::VRSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 685 */ { VXInstructionMnemonic::VRSQRTSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 686 */ { VXInstructionMnemonic::VSHUFPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 687 */ { VXInstructionMnemonic::VSHUFPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 688 */ { VXInstructionMnemonic::VSQRTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 689 */ { VXInstructionMnemonic::VSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE },
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/* 68A */ { VXInstructionMnemonic::VSQRTSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 68B */ { VXInstructionMnemonic::VSQRTSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 68C */ { VXInstructionMnemonic::VSTMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE },
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/* 68D */ { VXInstructionMnemonic::VSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 68E */ { VXInstructionMnemonic::VSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 68F */ { VXInstructionMnemonic::VSUBSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 690 */ { VXInstructionMnemonic::VSUBSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 691 */ { VXInstructionMnemonic::VTESTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL },
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/* 692 */ { VXInstructionMnemonic::VTESTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL },
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/* 693 */ { VXInstructionMnemonic::VUCOMISD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 694 */ { VXInstructionMnemonic::VUCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
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/* 695 */ { VXInstructionMnemonic::VUNPCKHPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 696 */ { VXInstructionMnemonic::VUNPCKHPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 697 */ { VXInstructionMnemonic::VUNPCKLPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 698 */ { VXInstructionMnemonic::VUNPCKLPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 699 */ { VXInstructionMnemonic::VXORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE },
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/* 69A */ { VXInstructionMnemonic::VXORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
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/* 69B */ { VXInstructionMnemonic::VZEROALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 69C */ { VXInstructionMnemonic::VZEROUPPER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 69D */ { VXInstructionMnemonic::WAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 69E */ { VXInstructionMnemonic::WBINVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 69F */ { VXInstructionMnemonic::WRMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
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/* 6A0 */ { VXInstructionMnemonic::XADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE },
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/* 6A1 */ { VXInstructionMnemonic::XADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE },
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/* 6A2 */ { VXInstructionMnemonic::XCHG, { OPI_R4v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
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/* 6A3 */ { VXInstructionMnemonic::XCHG, { OPI_R3v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
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/* 6A4 */ { VXInstructionMnemonic::XCHG, { OPI_R5v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
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/* 6A5 */ { VXInstructionMnemonic::XCHG, { OPI_R7v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
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/* 6A6 */ { VXInstructionMnemonic::XCHG, { OPI_R6v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
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/* 6A7 */ { VXInstructionMnemonic::XCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
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/* 6A8 */ { VXInstructionMnemonic::XCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
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/* 6A9 */ { VXInstructionMnemonic::XCHG, { OPI_R0v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
|
|
/* 6AA */ { VXInstructionMnemonic::XCHG, { OPI_R2v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
|
|
/* 6AB */ { VXInstructionMnemonic::XCHG, { OPI_R1v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE },
|
|
/* 6AC */ { VXInstructionMnemonic::XCRYPTCBC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6AD */ { VXInstructionMnemonic::XCRYPTCFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6AE */ { VXInstructionMnemonic::XCRYPTCTR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6AF */ { VXInstructionMnemonic::XCRYPTECB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6B0 */ { VXInstructionMnemonic::XCRYPTOFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6B1 */ { VXInstructionMnemonic::XGETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6B2 */ { VXInstructionMnemonic::XLATB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX },
|
|
/* 6B3 */ { VXInstructionMnemonic::XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE },
|
|
/* 6B4 */ { VXInstructionMnemonic::XOR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6B5 */ { VXInstructionMnemonic::XOR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6B6 */ { VXInstructionMnemonic::XOR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6B7 */ { VXInstructionMnemonic::XOR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6B8 */ { VXInstructionMnemonic::XOR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6B9 */ { VXInstructionMnemonic::XOR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6BA */ { VXInstructionMnemonic::XOR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE },
|
|
/* 6BB */ { VXInstructionMnemonic::XOR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE },
|
|
/* 6BC */ { VXInstructionMnemonic::XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6BD */ { VXInstructionMnemonic::XORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6BE */ { VXInstructionMnemonic::XORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE },
|
|
/* 6BF */ { VXInstructionMnemonic::XRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
|
|
/* 6C0 */ { VXInstructionMnemonic::XSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB },
|
|
/* 6C1 */ { VXInstructionMnemonic::XSETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6C2 */ { VXInstructionMnemonic::XSHA1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6C3 */ { VXInstructionMnemonic::XSHA256, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
/* 6C4 */ { VXInstructionMnemonic::XSTORE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 },
|
|
};
|
|
|
|
#undef OPI_NONE
|
|
#undef OPI_AL
|
|
#undef OPI_AX
|
|
#undef OPI_Av
|
|
#undef OPI_C
|
|
#undef OPI_CL
|
|
#undef OPI_CS
|
|
#undef OPI_CX
|
|
#undef OPI_D
|
|
#undef OPI_DL
|
|
#undef OPI_DS
|
|
#undef OPI_DX
|
|
#undef OPI_E
|
|
#undef OPI_ES
|
|
#undef OPI_Eb
|
|
#undef OPI_Ed
|
|
#undef OPI_Eq
|
|
#undef OPI_Ev
|
|
#undef OPI_Ew
|
|
#undef OPI_Ey
|
|
#undef OPI_Ez
|
|
#undef OPI_FS
|
|
#undef OPI_Fv
|
|
#undef OPI_G
|
|
#undef OPI_GS
|
|
#undef OPI_Gb
|
|
#undef OPI_Gd
|
|
#undef OPI_Gq
|
|
#undef OPI_Gv
|
|
#undef OPI_Gw
|
|
#undef OPI_Gy
|
|
#undef OPI_Gz
|
|
#undef OPI_H
|
|
#undef OPI_Hqq
|
|
#undef OPI_Hx
|
|
#undef OPI_I1
|
|
#undef OPI_Ib
|
|
#undef OPI_Iv
|
|
#undef OPI_Iw
|
|
#undef OPI_Iz
|
|
#undef OPI_Jb
|
|
#undef OPI_Jv
|
|
#undef OPI_Jz
|
|
#undef OPI_L
|
|
#undef OPI_Lx
|
|
#undef OPI_M
|
|
#undef OPI_Mb
|
|
#undef OPI_MbRd
|
|
#undef OPI_MbRv
|
|
#undef OPI_Md
|
|
#undef OPI_MdRy
|
|
#undef OPI_MdU
|
|
#undef OPI_Mdq
|
|
#undef OPI_Mo
|
|
#undef OPI_Mq
|
|
#undef OPI_MqU
|
|
#undef OPI_Ms
|
|
#undef OPI_Mt
|
|
#undef OPI_Mv
|
|
#undef OPI_Mw
|
|
#undef OPI_MwRd
|
|
#undef OPI_MwRv
|
|
#undef OPI_MwRy
|
|
#undef OPI_MwU
|
|
#undef OPI_N
|
|
#undef OPI_Ob
|
|
#undef OPI_Ov
|
|
#undef OPI_Ow
|
|
#undef OPI_P
|
|
#undef OPI_Q
|
|
#undef OPI_R
|
|
#undef OPI_R0b
|
|
#undef OPI_R0v
|
|
#undef OPI_R0w
|
|
#undef OPI_R0y
|
|
#undef OPI_R0z
|
|
#undef OPI_R1b
|
|
#undef OPI_R1v
|
|
#undef OPI_R1w
|
|
#undef OPI_R1y
|
|
#undef OPI_R1z
|
|
#undef OPI_R2b
|
|
#undef OPI_R2v
|
|
#undef OPI_R2w
|
|
#undef OPI_R2y
|
|
#undef OPI_R2z
|
|
#undef OPI_R3b
|
|
#undef OPI_R3v
|
|
#undef OPI_R3w
|
|
#undef OPI_R3y
|
|
#undef OPI_R3z
|
|
#undef OPI_R4b
|
|
#undef OPI_R4v
|
|
#undef OPI_R4w
|
|
#undef OPI_R4y
|
|
#undef OPI_R4z
|
|
#undef OPI_R5b
|
|
#undef OPI_R5v
|
|
#undef OPI_R5w
|
|
#undef OPI_R5y
|
|
#undef OPI_R5z
|
|
#undef OPI_R6b
|
|
#undef OPI_R6v
|
|
#undef OPI_R6w
|
|
#undef OPI_R6y
|
|
#undef OPI_R6z
|
|
#undef OPI_R7b
|
|
#undef OPI_R7v
|
|
#undef OPI_R7w
|
|
#undef OPI_R7y
|
|
#undef OPI_R7z
|
|
#undef OPI_S
|
|
#undef OPI_SS
|
|
#undef OPI_ST0
|
|
#undef OPI_ST1
|
|
#undef OPI_ST2
|
|
#undef OPI_ST3
|
|
#undef OPI_ST4
|
|
#undef OPI_ST5
|
|
#undef OPI_ST6
|
|
#undef OPI_ST7
|
|
#undef OPI_U
|
|
#undef OPI_Ux
|
|
#undef OPI_V
|
|
#undef OPI_Vdq
|
|
#undef OPI_Vqq
|
|
#undef OPI_Vsd
|
|
#undef OPI_Vx
|
|
#undef OPI_W
|
|
#undef OPI_Wdq
|
|
#undef OPI_Wqq
|
|
#undef OPI_Wsd
|
|
#undef OPI_Wx
|
|
#undef OPI_eAX
|
|
#undef OPI_eCX
|
|
#undef OPI_eDX
|
|
#undef OPI_rAX
|
|
#undef OPI_rCX
|
|
#undef OPI_rDX
|
|
#undef OPI_sIb
|
|
#undef OPI_sIz
|
|
|
|
const char* instrMnemonicStrings[] =
|
|
{
|
|
/* 000 */ "invalid",
|
|
/* 001 */ "aaa",
|
|
/* 002 */ "aad",
|
|
/* 003 */ "aam",
|
|
/* 004 */ "aas",
|
|
/* 005 */ "adc",
|
|
/* 006 */ "add",
|
|
/* 007 */ "addpd",
|
|
/* 008 */ "addps",
|
|
/* 009 */ "addsd",
|
|
/* 00A */ "addss",
|
|
/* 00B */ "addsubpd",
|
|
/* 00C */ "addsubps",
|
|
/* 00D */ "aesdec",
|
|
/* 00E */ "aesdeclast",
|
|
/* 00F */ "aesenc",
|
|
/* 010 */ "aesenclast",
|
|
/* 011 */ "aesimc",
|
|
/* 012 */ "aeskeygenassist",
|
|
/* 013 */ "and",
|
|
/* 014 */ "andnpd",
|
|
/* 015 */ "andnps",
|
|
/* 016 */ "andpd",
|
|
/* 017 */ "andps",
|
|
/* 018 */ "arpl",
|
|
/* 019 */ "blendpd",
|
|
/* 01A */ "blendps",
|
|
/* 01B */ "blendvpd",
|
|
/* 01C */ "blendvps",
|
|
/* 01D */ "bound",
|
|
/* 01E */ "bsf",
|
|
/* 01F */ "bsr",
|
|
/* 020 */ "bswap",
|
|
/* 021 */ "bt",
|
|
/* 022 */ "btc",
|
|
/* 023 */ "btr",
|
|
/* 024 */ "bts",
|
|
/* 025 */ "call",
|
|
/* 026 */ "cbw",
|
|
/* 027 */ "cdq",
|
|
/* 028 */ "cdqe",
|
|
/* 029 */ "clc",
|
|
/* 02A */ "cld",
|
|
/* 02B */ "clflush",
|
|
/* 02C */ "clgi",
|
|
/* 02D */ "cli",
|
|
/* 02E */ "clts",
|
|
/* 02F */ "cmc",
|
|
/* 030 */ "cmova",
|
|
/* 031 */ "cmovae",
|
|
/* 032 */ "cmovb",
|
|
/* 033 */ "cmovbe",
|
|
/* 034 */ "cmove",
|
|
/* 035 */ "cmovg",
|
|
/* 036 */ "cmovge",
|
|
/* 037 */ "cmovl",
|
|
/* 038 */ "cmovle",
|
|
/* 039 */ "cmovne",
|
|
/* 03A */ "cmovno",
|
|
/* 03B */ "cmovnp",
|
|
/* 03C */ "cmovns",
|
|
/* 03D */ "cmovo",
|
|
/* 03E */ "cmovp",
|
|
/* 03F */ "cmovs",
|
|
/* 040 */ "cmp",
|
|
/* 041 */ "cmppd",
|
|
/* 042 */ "cmpps",
|
|
/* 043 */ "cmpsb",
|
|
/* 044 */ "cmpsd",
|
|
/* 045 */ "cmpsq",
|
|
/* 046 */ "cmpss",
|
|
/* 047 */ "cmpsw",
|
|
/* 048 */ "cmpxchg",
|
|
/* 049 */ "cmpxchg16b",
|
|
/* 04A */ "cmpxchg8b",
|
|
/* 04B */ "comisd",
|
|
/* 04C */ "comiss",
|
|
/* 04D */ "cpuid",
|
|
/* 04E */ "cqo",
|
|
/* 04F */ "crc32",
|
|
/* 050 */ "cvtdq2pd",
|
|
/* 051 */ "cvtdq2ps",
|
|
/* 052 */ "cvtpd2dq",
|
|
/* 053 */ "cvtpd2pi",
|
|
/* 054 */ "cvtpd2ps",
|
|
/* 055 */ "cvtpi2pd",
|
|
/* 056 */ "cvtpi2ps",
|
|
/* 057 */ "cvtps2dq",
|
|
/* 058 */ "cvtps2pd",
|
|
/* 059 */ "cvtps2pi",
|
|
/* 05A */ "cvtsd2si",
|
|
/* 05B */ "cvtsd2ss",
|
|
/* 05C */ "cvtsi2sd",
|
|
/* 05D */ "cvtsi2ss",
|
|
/* 05E */ "cvtss2sd",
|
|
/* 05F */ "cvtss2si",
|
|
/* 060 */ "cvttpd2dq",
|
|
/* 061 */ "cvttpd2pi",
|
|
/* 062 */ "cvttps2dq",
|
|
/* 063 */ "cvttps2pi",
|
|
/* 064 */ "cvttsd2si",
|
|
/* 065 */ "cvttss2si",
|
|
/* 066 */ "cwd",
|
|
/* 067 */ "cwde",
|
|
/* 068 */ "daa",
|
|
/* 069 */ "das",
|
|
/* 06A */ "dec",
|
|
/* 06B */ "div",
|
|
/* 06C */ "divpd",
|
|
/* 06D */ "divps",
|
|
/* 06E */ "divsd",
|
|
/* 06F */ "divss",
|
|
/* 070 */ "dppd",
|
|
/* 071 */ "dpps",
|
|
/* 072 */ "emms",
|
|
/* 073 */ "enter",
|
|
/* 074 */ "extractps",
|
|
/* 075 */ "f2xm1",
|
|
/* 076 */ "fabs",
|
|
/* 077 */ "fadd",
|
|
/* 078 */ "faddp",
|
|
/* 079 */ "fbld",
|
|
/* 07A */ "fbstp",
|
|
/* 07B */ "fchs",
|
|
/* 07C */ "fclex",
|
|
/* 07D */ "fcmovb",
|
|
/* 07E */ "fcmovbe",
|
|
/* 07F */ "fcmove",
|
|
/* 080 */ "fcmovnb",
|
|
/* 081 */ "fcmovnbe",
|
|
/* 082 */ "fcmovne",
|
|
/* 083 */ "fcmovnu",
|
|
/* 084 */ "fcmovu",
|
|
/* 085 */ "fcom",
|
|
/* 086 */ "fcom2",
|
|
/* 087 */ "fcomi",
|
|
/* 088 */ "fcomip",
|
|
/* 089 */ "fcomp",
|
|
/* 08A */ "fcomp3",
|
|
/* 08B */ "fcomp5",
|
|
/* 08C */ "fcompp",
|
|
/* 08D */ "fcos",
|
|
/* 08E */ "fdecstp",
|
|
/* 08F */ "fdiv",
|
|
/* 090 */ "fdivp",
|
|
/* 091 */ "fdivr",
|
|
/* 092 */ "fdivrp",
|
|
/* 093 */ "femms",
|
|
/* 094 */ "ffree",
|
|
/* 095 */ "ffreep",
|
|
/* 096 */ "fiadd",
|
|
/* 097 */ "ficom",
|
|
/* 098 */ "ficomp",
|
|
/* 099 */ "fidiv",
|
|
/* 09A */ "fidivr",
|
|
/* 09B */ "fild",
|
|
/* 09C */ "fimul",
|
|
/* 09D */ "fincstp",
|
|
/* 09E */ "fist",
|
|
/* 09F */ "fistp",
|
|
/* 0A0 */ "fisttp",
|
|
/* 0A1 */ "fisub",
|
|
/* 0A2 */ "fisubr",
|
|
/* 0A3 */ "fld",
|
|
/* 0A4 */ "fld1",
|
|
/* 0A5 */ "fldcw",
|
|
/* 0A6 */ "fldenv",
|
|
/* 0A7 */ "fldl2e",
|
|
/* 0A8 */ "fldl2t",
|
|
/* 0A9 */ "fldlg2",
|
|
/* 0AA */ "fldln2",
|
|
/* 0AB */ "fldpi",
|
|
/* 0AC */ "fldz",
|
|
/* 0AD */ "fmul",
|
|
/* 0AE */ "fmulp",
|
|
/* 0AF */ "fndisi",
|
|
/* 0B0 */ "fneni",
|
|
/* 0B1 */ "fninit",
|
|
/* 0B2 */ "fnop",
|
|
/* 0B3 */ "fnsave",
|
|
/* 0B4 */ "fnsetpm",
|
|
/* 0B5 */ "fnstcw",
|
|
/* 0B6 */ "fnstenv",
|
|
/* 0B7 */ "fnstsw",
|
|
/* 0B8 */ "fpatan",
|
|
/* 0B9 */ "fprem",
|
|
/* 0BA */ "fprem1",
|
|
/* 0BB */ "fptan",
|
|
/* 0BC */ "frndint",
|
|
/* 0BD */ "frstor",
|
|
/* 0BE */ "frstpm",
|
|
/* 0BF */ "fscale",
|
|
/* 0C0 */ "fsin",
|
|
/* 0C1 */ "fsincos",
|
|
/* 0C2 */ "fsqrt",
|
|
/* 0C3 */ "fst",
|
|
/* 0C4 */ "fstp",
|
|
/* 0C5 */ "fstp1",
|
|
/* 0C6 */ "fstp8",
|
|
/* 0C7 */ "fstp9",
|
|
/* 0C8 */ "fsub",
|
|
/* 0C9 */ "fsubp",
|
|
/* 0CA */ "fsubr",
|
|
/* 0CB */ "fsubrp",
|
|
/* 0CC */ "ftst",
|
|
/* 0CD */ "fucom",
|
|
/* 0CE */ "fucomi",
|
|
/* 0CF */ "fucomip",
|
|
/* 0D0 */ "fucomp",
|
|
/* 0D1 */ "fucompp",
|
|
/* 0D2 */ "fxam",
|
|
/* 0D3 */ "fxch",
|
|
/* 0D4 */ "fxch4",
|
|
/* 0D5 */ "fxch7",
|
|
/* 0D6 */ "fxrstor",
|
|
/* 0D7 */ "fxsave",
|
|
/* 0D8 */ "fxtract",
|
|
/* 0D9 */ "fyl2x",
|
|
/* 0DA */ "fyl2xp1",
|
|
/* 0DB */ "getsec",
|
|
/* 0DC */ "haddpd",
|
|
/* 0DD */ "haddps",
|
|
/* 0DE */ "hlt",
|
|
/* 0DF */ "hsubpd",
|
|
/* 0E0 */ "hsubps",
|
|
/* 0E1 */ "idiv",
|
|
/* 0E2 */ "imul",
|
|
/* 0E3 */ "in",
|
|
/* 0E4 */ "inc",
|
|
/* 0E5 */ "insb",
|
|
/* 0E6 */ "insd",
|
|
/* 0E7 */ "insertps",
|
|
/* 0E8 */ "insw",
|
|
/* 0E9 */ "int",
|
|
/* 0EA */ "int1",
|
|
/* 0EB */ "int3",
|
|
/* 0EC */ "into",
|
|
/* 0ED */ "invd",
|
|
/* 0EE */ "invept",
|
|
/* 0EF */ "invlpg",
|
|
/* 0F0 */ "invlpga",
|
|
/* 0F1 */ "invvpid",
|
|
/* 0F2 */ "iretd",
|
|
/* 0F3 */ "iretq",
|
|
/* 0F4 */ "iretw",
|
|
/* 0F5 */ "ja",
|
|
/* 0F6 */ "jb",
|
|
/* 0F7 */ "jbe",
|
|
/* 0F8 */ "jcxz",
|
|
/* 0F9 */ "je",
|
|
/* 0FA */ "jecxz",
|
|
/* 0FB */ "jg",
|
|
/* 0FC */ "jge",
|
|
/* 0FD */ "jl",
|
|
/* 0FE */ "jle",
|
|
/* 0FF */ "jmp",
|
|
/* 100 */ "jnb",
|
|
/* 101 */ "jne",
|
|
/* 102 */ "jno",
|
|
/* 103 */ "jnp",
|
|
/* 104 */ "jns",
|
|
/* 105 */ "jo",
|
|
/* 106 */ "jp",
|
|
/* 107 */ "jrcxz",
|
|
/* 108 */ "js",
|
|
/* 109 */ "lahf",
|
|
/* 10A */ "lar",
|
|
/* 10B */ "lddqu",
|
|
/* 10C */ "ldmxcsr",
|
|
/* 10D */ "lds",
|
|
/* 10E */ "lea",
|
|
/* 10F */ "leave",
|
|
/* 110 */ "les",
|
|
/* 111 */ "lfence",
|
|
/* 112 */ "lfs",
|
|
/* 113 */ "lgdt",
|
|
/* 114 */ "lgs",
|
|
/* 115 */ "lidt",
|
|
/* 116 */ "lldt",
|
|
/* 117 */ "lmsw",
|
|
/* 118 */ "lock",
|
|
/* 119 */ "lodsb",
|
|
/* 11A */ "lodsd",
|
|
/* 11B */ "lodsq",
|
|
/* 11C */ "lodsw",
|
|
/* 11D */ "loop",
|
|
/* 11E */ "loope",
|
|
/* 11F */ "loopne",
|
|
/* 120 */ "lsl",
|
|
/* 121 */ "lss",
|
|
/* 122 */ "ltr",
|
|
/* 123 */ "maskmovdqu",
|
|
/* 124 */ "maskmovq",
|
|
/* 125 */ "maxpd",
|
|
/* 126 */ "maxps",
|
|
/* 127 */ "maxsd",
|
|
/* 128 */ "maxss",
|
|
/* 129 */ "mfence",
|
|
/* 12A */ "minpd",
|
|
/* 12B */ "minps",
|
|
/* 12C */ "minsd",
|
|
/* 12D */ "minss",
|
|
/* 12E */ "monitor",
|
|
/* 12F */ "montmul",
|
|
/* 130 */ "mov",
|
|
/* 131 */ "movapd",
|
|
/* 132 */ "movaps",
|
|
/* 133 */ "movbe",
|
|
/* 134 */ "movd",
|
|
/* 135 */ "movddup",
|
|
/* 136 */ "movdq2q",
|
|
/* 137 */ "movdqa",
|
|
/* 138 */ "movdqu",
|
|
/* 139 */ "movhlps",
|
|
/* 13A */ "movhpd",
|
|
/* 13B */ "movhps",
|
|
/* 13C */ "movlhps",
|
|
/* 13D */ "movlpd",
|
|
/* 13E */ "movlps",
|
|
/* 13F */ "movmskpd",
|
|
/* 140 */ "movmskps",
|
|
/* 141 */ "movntdq",
|
|
/* 142 */ "movntdqa",
|
|
/* 143 */ "movnti",
|
|
/* 144 */ "movntpd",
|
|
/* 145 */ "movntps",
|
|
/* 146 */ "movntq",
|
|
/* 147 */ "movq",
|
|
/* 148 */ "movq2dq",
|
|
/* 149 */ "movsb",
|
|
/* 14A */ "movsd",
|
|
/* 14B */ "movshdup",
|
|
/* 14C */ "movsldup",
|
|
/* 14D */ "movsq",
|
|
/* 14E */ "movss",
|
|
/* 14F */ "movsw",
|
|
/* 150 */ "movsx",
|
|
/* 151 */ "movsxd",
|
|
/* 152 */ "movupd",
|
|
/* 153 */ "movups",
|
|
/* 154 */ "movzx",
|
|
/* 155 */ "mpsadbw",
|
|
/* 156 */ "mul",
|
|
/* 157 */ "mulpd",
|
|
/* 158 */ "mulps",
|
|
/* 159 */ "mulsd",
|
|
/* 15A */ "mulss",
|
|
/* 15B */ "mwait",
|
|
/* 15C */ "neg",
|
|
/* 15D */ "nop",
|
|
/* 15E */ "not",
|
|
/* 15F */ "or",
|
|
/* 160 */ "orpd",
|
|
/* 161 */ "orps",
|
|
/* 162 */ "out",
|
|
/* 163 */ "outsb",
|
|
/* 164 */ "outsd",
|
|
/* 165 */ "outsw",
|
|
/* 166 */ "pabsb",
|
|
/* 167 */ "pabsd",
|
|
/* 168 */ "pabsw",
|
|
/* 169 */ "packssdw",
|
|
/* 16A */ "packsswb",
|
|
/* 16B */ "packusdw",
|
|
/* 16C */ "packuswb",
|
|
/* 16D */ "paddb",
|
|
/* 16E */ "paddd",
|
|
/* 16F */ "paddq",
|
|
/* 170 */ "paddsb",
|
|
/* 171 */ "paddsw",
|
|
/* 172 */ "paddusb",
|
|
/* 173 */ "paddusw",
|
|
/* 174 */ "paddw",
|
|
/* 175 */ "palignr",
|
|
/* 176 */ "pand",
|
|
/* 177 */ "pandn",
|
|
/* 178 */ "pause",
|
|
/* 179 */ "pavgb",
|
|
/* 17A */ "pavgusb",
|
|
/* 17B */ "pavgw",
|
|
/* 17C */ "pblendvb",
|
|
/* 17D */ "pblendw",
|
|
/* 17E */ "pclmulqdq",
|
|
/* 17F */ "pcmpeqb",
|
|
/* 180 */ "pcmpeqd",
|
|
/* 181 */ "pcmpeqq",
|
|
/* 182 */ "pcmpeqw",
|
|
/* 183 */ "pcmpestri",
|
|
/* 184 */ "pcmpestrm",
|
|
/* 185 */ "pcmpgtb",
|
|
/* 186 */ "pcmpgtd",
|
|
/* 187 */ "pcmpgtq",
|
|
/* 188 */ "pcmpgtw",
|
|
/* 189 */ "pcmpistri",
|
|
/* 18A */ "pcmpistrm",
|
|
/* 18B */ "pextrb",
|
|
/* 18C */ "pextrd",
|
|
/* 18D */ "pextrq",
|
|
/* 18E */ "pextrw",
|
|
/* 18F */ "pf2id",
|
|
/* 190 */ "pf2iw",
|
|
/* 191 */ "pfacc",
|
|
/* 192 */ "pfadd",
|
|
/* 193 */ "pfcmpeq",
|
|
/* 194 */ "pfcmpge",
|
|
/* 195 */ "pfcmpgt",
|
|
/* 196 */ "pfmax",
|
|
/* 197 */ "pfmin",
|
|
/* 198 */ "pfmul",
|
|
/* 199 */ "pfnacc",
|
|
/* 19A */ "pfpnacc",
|
|
/* 19B */ "pfrcp",
|
|
/* 19C */ "pfrcpit1",
|
|
/* 19D */ "pfrcpit2",
|
|
/* 19E */ "pfrsqit1",
|
|
/* 19F */ "pfrsqrt",
|
|
/* 1A0 */ "pfsub",
|
|
/* 1A1 */ "pfsubr",
|
|
/* 1A2 */ "phaddd",
|
|
/* 1A3 */ "phaddsw",
|
|
/* 1A4 */ "phaddw",
|
|
/* 1A5 */ "phminposuw",
|
|
/* 1A6 */ "phsubd",
|
|
/* 1A7 */ "phsubsw",
|
|
/* 1A8 */ "phsubw",
|
|
/* 1A9 */ "pi2fd",
|
|
/* 1AA */ "pi2fw",
|
|
/* 1AB */ "pinsrb",
|
|
/* 1AC */ "pinsrd",
|
|
/* 1AD */ "pinsrq",
|
|
/* 1AE */ "pinsrw",
|
|
/* 1AF */ "pmaddubsw",
|
|
/* 1B0 */ "pmaddwd",
|
|
/* 1B1 */ "pmaxsb",
|
|
/* 1B2 */ "pmaxsd",
|
|
/* 1B3 */ "pmaxsw",
|
|
/* 1B4 */ "pmaxub",
|
|
/* 1B5 */ "pmaxud",
|
|
/* 1B6 */ "pmaxuw",
|
|
/* 1B7 */ "pminsb",
|
|
/* 1B8 */ "pminsd",
|
|
/* 1B9 */ "pminsw",
|
|
/* 1BA */ "pminub",
|
|
/* 1BB */ "pminud",
|
|
/* 1BC */ "pminuw",
|
|
/* 1BD */ "pmovmskb",
|
|
/* 1BE */ "pmovsxbd",
|
|
/* 1BF */ "pmovsxbq",
|
|
/* 1C0 */ "pmovsxbw",
|
|
/* 1C1 */ "pmovsxdq",
|
|
/* 1C2 */ "pmovsxwd",
|
|
/* 1C3 */ "pmovsxwq",
|
|
/* 1C4 */ "pmovzxbd",
|
|
/* 1C5 */ "pmovzxbq",
|
|
/* 1C6 */ "pmovzxbw",
|
|
/* 1C7 */ "pmovzxdq",
|
|
/* 1C8 */ "pmovzxwd",
|
|
/* 1C9 */ "pmovzxwq",
|
|
/* 1CA */ "pmuldq",
|
|
/* 1CB */ "pmulhrsw",
|
|
/* 1CC */ "pmulhrw",
|
|
/* 1CD */ "pmulhuw",
|
|
/* 1CE */ "pmulhw",
|
|
/* 1CF */ "pmulld",
|
|
/* 1D0 */ "pmullw",
|
|
/* 1D1 */ "pmuludq",
|
|
/* 1D2 */ "pop",
|
|
/* 1D3 */ "popa",
|
|
/* 1D4 */ "popad",
|
|
/* 1D5 */ "popcnt",
|
|
/* 1D6 */ "popfd",
|
|
/* 1D7 */ "popfq",
|
|
/* 1D8 */ "popfw",
|
|
/* 1D9 */ "por",
|
|
/* 1DA */ "prefetch",
|
|
/* 1DB */ "prefetchnta",
|
|
/* 1DC */ "prefetcht0",
|
|
/* 1DD */ "prefetcht1",
|
|
/* 1DE */ "prefetcht2",
|
|
/* 1DF */ "psadbw",
|
|
/* 1E0 */ "pshufb",
|
|
/* 1E1 */ "pshufd",
|
|
/* 1E2 */ "pshufhw",
|
|
/* 1E3 */ "pshuflw",
|
|
/* 1E4 */ "pshufw",
|
|
/* 1E5 */ "psignb",
|
|
/* 1E6 */ "psignd",
|
|
/* 1E7 */ "psignw",
|
|
/* 1E8 */ "pslld",
|
|
/* 1E9 */ "pslldq",
|
|
/* 1EA */ "psllq",
|
|
/* 1EB */ "psllw",
|
|
/* 1EC */ "psrad",
|
|
/* 1ED */ "psraw",
|
|
/* 1EE */ "psrld",
|
|
/* 1EF */ "psrldq",
|
|
/* 1F0 */ "psrlq",
|
|
/* 1F1 */ "psrlw",
|
|
/* 1F2 */ "psubb",
|
|
/* 1F3 */ "psubd",
|
|
/* 1F4 */ "psubq",
|
|
/* 1F5 */ "psubsb",
|
|
/* 1F6 */ "psubsw",
|
|
/* 1F7 */ "psubusb",
|
|
/* 1F8 */ "psubusw",
|
|
/* 1F9 */ "psubw",
|
|
/* 1FA */ "pswapd",
|
|
/* 1FB */ "ptest",
|
|
/* 1FC */ "punpckhbw",
|
|
/* 1FD */ "punpckhdq",
|
|
/* 1FE */ "punpckhqdq",
|
|
/* 1FF */ "punpckhwd",
|
|
/* 200 */ "punpcklbw",
|
|
/* 201 */ "punpckldq",
|
|
/* 202 */ "punpcklqdq",
|
|
/* 203 */ "punpcklwd",
|
|
/* 204 */ "push",
|
|
/* 205 */ "pusha",
|
|
/* 206 */ "pushad",
|
|
/* 207 */ "pushfd",
|
|
/* 208 */ "pushfq",
|
|
/* 209 */ "pushfw",
|
|
/* 20A */ "pxor",
|
|
/* 20B */ "rcl",
|
|
/* 20C */ "rcpps",
|
|
/* 20D */ "rcpss",
|
|
/* 20E */ "rcr",
|
|
/* 20F */ "rdmsr",
|
|
/* 210 */ "rdpmc",
|
|
/* 211 */ "rdrand",
|
|
/* 212 */ "rdtsc",
|
|
/* 213 */ "rdtscp",
|
|
/* 214 */ "rep",
|
|
/* 215 */ "repne",
|
|
/* 216 */ "ret",
|
|
/* 217 */ "retf",
|
|
/* 218 */ "rol",
|
|
/* 219 */ "ror",
|
|
/* 21A */ "roundpd",
|
|
/* 21B */ "roundps",
|
|
/* 21C */ "roundsd",
|
|
/* 21D */ "roundss",
|
|
/* 21E */ "rsm",
|
|
/* 21F */ "rsqrtps",
|
|
/* 220 */ "rsqrtss",
|
|
/* 221 */ "sahf",
|
|
/* 222 */ "salc",
|
|
/* 223 */ "sar",
|
|
/* 224 */ "sbb",
|
|
/* 225 */ "scasb",
|
|
/* 226 */ "scasd",
|
|
/* 227 */ "scasq",
|
|
/* 228 */ "scasw",
|
|
/* 229 */ "seta",
|
|
/* 22A */ "setae",
|
|
/* 22B */ "setb",
|
|
/* 22C */ "setbe",
|
|
/* 22D */ "sete",
|
|
/* 22E */ "setg",
|
|
/* 22F */ "setge",
|
|
/* 230 */ "setl",
|
|
/* 231 */ "setle",
|
|
/* 232 */ "setne",
|
|
/* 233 */ "setno",
|
|
/* 234 */ "setnp",
|
|
/* 235 */ "setns",
|
|
/* 236 */ "seto",
|
|
/* 237 */ "setp",
|
|
/* 238 */ "sets",
|
|
/* 239 */ "sfence",
|
|
/* 23A */ "sgdt",
|
|
/* 23B */ "shl",
|
|
/* 23C */ "shld",
|
|
/* 23D */ "shr",
|
|
/* 23E */ "shrd",
|
|
/* 23F */ "shufpd",
|
|
/* 240 */ "shufps",
|
|
/* 241 */ "sidt",
|
|
/* 242 */ "skinit",
|
|
/* 243 */ "sldt",
|
|
/* 244 */ "smsw",
|
|
/* 245 */ "sqrtpd",
|
|
/* 246 */ "sqrtps",
|
|
/* 247 */ "sqrtsd",
|
|
/* 248 */ "sqrtss",
|
|
/* 249 */ "stc",
|
|
/* 24A */ "std",
|
|
/* 24B */ "stgi",
|
|
/* 24C */ "sti",
|
|
/* 24D */ "stmxcsr",
|
|
/* 24E */ "stosb",
|
|
/* 24F */ "stosd",
|
|
/* 250 */ "stosq",
|
|
/* 251 */ "stosw",
|
|
/* 252 */ "str",
|
|
/* 253 */ "sub",
|
|
/* 254 */ "subpd",
|
|
/* 255 */ "subps",
|
|
/* 256 */ "subsd",
|
|
/* 257 */ "subss",
|
|
/* 258 */ "swapgs",
|
|
/* 259 */ "syscall",
|
|
/* 25A */ "sysenter",
|
|
/* 25B */ "sysexit",
|
|
/* 25C */ "sysret",
|
|
/* 25D */ "test",
|
|
/* 25E */ "ucomisd",
|
|
/* 25F */ "ucomiss",
|
|
/* 260 */ "ud2",
|
|
/* 261 */ "unpckhpd",
|
|
/* 262 */ "unpckhps",
|
|
/* 263 */ "unpcklpd",
|
|
/* 264 */ "unpcklps",
|
|
/* 265 */ "vaddpd",
|
|
/* 266 */ "vaddps",
|
|
/* 267 */ "vaddsd",
|
|
/* 268 */ "vaddss",
|
|
/* 269 */ "vaddsubpd",
|
|
/* 26A */ "vaddsubps",
|
|
/* 26B */ "vaesdec",
|
|
/* 26C */ "vaesdeclast",
|
|
/* 26D */ "vaesenc",
|
|
/* 26E */ "vaesenclast",
|
|
/* 26F */ "vaesimc",
|
|
/* 270 */ "vaeskeygenassist",
|
|
/* 271 */ "vandnpd",
|
|
/* 272 */ "vandnps",
|
|
/* 273 */ "vandpd",
|
|
/* 274 */ "vandps",
|
|
/* 275 */ "vblendpd",
|
|
/* 276 */ "vblendps",
|
|
/* 277 */ "vblendvpd",
|
|
/* 278 */ "vblendvps",
|
|
/* 279 */ "vbroadcastsd",
|
|
/* 27A */ "vbroadcastss",
|
|
/* 27B */ "vcmppd",
|
|
/* 27C */ "vcmpps",
|
|
/* 27D */ "vcmpsd",
|
|
/* 27E */ "vcmpss",
|
|
/* 27F */ "vcomisd",
|
|
/* 280 */ "vcomiss",
|
|
/* 281 */ "vcvtdq2pd",
|
|
/* 282 */ "vcvtdq2ps",
|
|
/* 283 */ "vcvtpd2dq",
|
|
/* 284 */ "vcvtpd2ps",
|
|
/* 285 */ "vcvtps2dq",
|
|
/* 286 */ "vcvtps2pd",
|
|
/* 287 */ "vcvtsd2si",
|
|
/* 288 */ "vcvtsd2ss",
|
|
/* 289 */ "vcvtsi2sd",
|
|
/* 28A */ "vcvtsi2ss",
|
|
/* 28B */ "vcvtss2sd",
|
|
/* 28C */ "vcvtss2si",
|
|
/* 28D */ "vcvttpd2dq",
|
|
/* 28E */ "vcvttps2dq",
|
|
/* 28F */ "vcvttsd2si",
|
|
/* 290 */ "vcvttss2si",
|
|
/* 291 */ "vdivpd",
|
|
/* 292 */ "vdivps",
|
|
/* 293 */ "vdivsd",
|
|
/* 294 */ "vdivss",
|
|
/* 295 */ "vdppd",
|
|
/* 296 */ "vdpps",
|
|
/* 297 */ "verr",
|
|
/* 298 */ "verw",
|
|
/* 299 */ "vextractf128",
|
|
/* 29A */ "vextractps",
|
|
/* 29B */ "vhaddpd",
|
|
/* 29C */ "vhaddps",
|
|
/* 29D */ "vhsubpd",
|
|
/* 29E */ "vhsubps",
|
|
/* 29F */ "vinsertf128",
|
|
/* 2A0 */ "vinsertps",
|
|
/* 2A1 */ "vlddqu",
|
|
/* 2A2 */ "vmaskmovdqu",
|
|
/* 2A3 */ "vmaskmovpd",
|
|
/* 2A4 */ "vmaskmovps",
|
|
/* 2A5 */ "vmaxpd",
|
|
/* 2A6 */ "vmaxps",
|
|
/* 2A7 */ "vmaxsd",
|
|
/* 2A8 */ "vmaxss",
|
|
/* 2A9 */ "vmcall",
|
|
/* 2AA */ "vmclear",
|
|
/* 2AB */ "vminpd",
|
|
/* 2AC */ "vminps",
|
|
/* 2AD */ "vminsd",
|
|
/* 2AE */ "vminss",
|
|
/* 2AF */ "vmlaunch",
|
|
/* 2B0 */ "vmload",
|
|
/* 2B1 */ "vmmcall",
|
|
/* 2B2 */ "vmovapd",
|
|
/* 2B3 */ "vmovaps",
|
|
/* 2B4 */ "vmovd",
|
|
/* 2B5 */ "vmovddup",
|
|
/* 2B6 */ "vmovdqa",
|
|
/* 2B7 */ "vmovdqu",
|
|
/* 2B8 */ "vmovhlps",
|
|
/* 2B9 */ "vmovhpd",
|
|
/* 2BA */ "vmovhps",
|
|
/* 2BB */ "vmovlhps",
|
|
/* 2BC */ "vmovlpd",
|
|
/* 2BD */ "vmovlps",
|
|
/* 2BE */ "vmovmskpd",
|
|
/* 2BF */ "vmovmskps",
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|
/* 2C0 */ "vmovntdq",
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|
/* 2C1 */ "vmovntdqa",
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|
/* 2C2 */ "vmovntpd",
|
|
/* 2C3 */ "vmovntps",
|
|
/* 2C4 */ "vmovq",
|
|
/* 2C5 */ "vmovsd",
|
|
/* 2C6 */ "vmovshdup",
|
|
/* 2C7 */ "vmovsldup",
|
|
/* 2C8 */ "vmovss",
|
|
/* 2C9 */ "vmovupd",
|
|
/* 2CA */ "vmovups",
|
|
/* 2CB */ "vmpsadbw",
|
|
/* 2CC */ "vmptrld",
|
|
/* 2CD */ "vmptrst",
|
|
/* 2CE */ "vmread",
|
|
/* 2CF */ "vmresume",
|
|
/* 2D0 */ "vmrun",
|
|
/* 2D1 */ "vmsave",
|
|
/* 2D2 */ "vmulpd",
|
|
/* 2D3 */ "vmulps",
|
|
/* 2D4 */ "vmulsd",
|
|
/* 2D5 */ "vmulss",
|
|
/* 2D6 */ "vmwrite",
|
|
/* 2D7 */ "vmxoff",
|
|
/* 2D8 */ "vmxon",
|
|
/* 2D9 */ "vorpd",
|
|
/* 2DA */ "vorps",
|
|
/* 2DB */ "vpabsb",
|
|
/* 2DC */ "vpabsd",
|
|
/* 2DD */ "vpabsw",
|
|
/* 2DE */ "vpackssdw",
|
|
/* 2DF */ "vpacksswb",
|
|
/* 2E0 */ "vpackusdw",
|
|
/* 2E1 */ "vpackuswb",
|
|
/* 2E2 */ "vpaddb",
|
|
/* 2E3 */ "vpaddd",
|
|
/* 2E4 */ "vpaddq",
|
|
/* 2E5 */ "vpaddsb",
|
|
/* 2E6 */ "vpaddsw",
|
|
/* 2E7 */ "vpaddusb",
|
|
/* 2E8 */ "vpaddusw",
|
|
/* 2E9 */ "vpaddw",
|
|
/* 2EA */ "vpalignr",
|
|
/* 2EB */ "vpand",
|
|
/* 2EC */ "vpandn",
|
|
/* 2ED */ "vpavgb",
|
|
/* 2EE */ "vpavgw",
|
|
/* 2EF */ "vpblendvb",
|
|
/* 2F0 */ "vpblendw",
|
|
/* 2F1 */ "vpclmulqdq",
|
|
/* 2F2 */ "vpcmpeqb",
|
|
/* 2F3 */ "vpcmpeqd",
|
|
/* 2F4 */ "vpcmpeqq",
|
|
/* 2F5 */ "vpcmpeqw",
|
|
/* 2F6 */ "vpcmpestri",
|
|
/* 2F7 */ "vpcmpestrm",
|
|
/* 2F8 */ "vpcmpgtb",
|
|
/* 2F9 */ "vpcmpgtd",
|
|
/* 2FA */ "vpcmpgtq",
|
|
/* 2FB */ "vpcmpgtw",
|
|
/* 2FC */ "vpcmpistri",
|
|
/* 2FD */ "vpcmpistrm",
|
|
/* 2FE */ "vperm2f128",
|
|
/* 2FF */ "vpermilpd",
|
|
/* 300 */ "vpermilps",
|
|
/* 301 */ "vpextrb",
|
|
/* 302 */ "vpextrd",
|
|
/* 303 */ "vpextrq",
|
|
/* 304 */ "vpextrw",
|
|
/* 305 */ "vphaddd",
|
|
/* 306 */ "vphaddsw",
|
|
/* 307 */ "vphaddw",
|
|
/* 308 */ "vphminposuw",
|
|
/* 309 */ "vphsubd",
|
|
/* 30A */ "vphsubsw",
|
|
/* 30B */ "vphsubw",
|
|
/* 30C */ "vpinsrb",
|
|
/* 30D */ "vpinsrd",
|
|
/* 30E */ "vpinsrq",
|
|
/* 30F */ "vpinsrw",
|
|
/* 310 */ "vpmaddubsw",
|
|
/* 311 */ "vpmaddwd",
|
|
/* 312 */ "vpmaxsb",
|
|
/* 313 */ "vpmaxsd",
|
|
/* 314 */ "vpmaxsw",
|
|
/* 315 */ "vpmaxub",
|
|
/* 316 */ "vpmaxud",
|
|
/* 317 */ "vpmaxuw",
|
|
/* 318 */ "vpminsb",
|
|
/* 319 */ "vpminsd",
|
|
/* 31A */ "vpminsw",
|
|
/* 31B */ "vpminub",
|
|
/* 31C */ "vpminud",
|
|
/* 31D */ "vpminuw",
|
|
/* 31E */ "vpmovmskb",
|
|
/* 31F */ "vpmovsxbd",
|
|
/* 320 */ "vpmovsxbq",
|
|
/* 321 */ "vpmovsxbw",
|
|
/* 322 */ "vpmovsxwd",
|
|
/* 323 */ "vpmovsxwq",
|
|
/* 324 */ "vpmovzxbd",
|
|
/* 325 */ "vpmovzxbq",
|
|
/* 326 */ "vpmovzxbw",
|
|
/* 327 */ "vpmovzxdq",
|
|
/* 328 */ "vpmovzxwd",
|
|
/* 329 */ "vpmovzxwq",
|
|
/* 32A */ "vpmuldq",
|
|
/* 32B */ "vpmulhrsw",
|
|
/* 32C */ "vpmulhuw",
|
|
/* 32D */ "vpmulhw",
|
|
/* 32E */ "vpmulld",
|
|
/* 32F */ "vpmullw",
|
|
/* 330 */ "vpor",
|
|
/* 331 */ "vpsadbw",
|
|
/* 332 */ "vpshufb",
|
|
/* 333 */ "vpshufd",
|
|
/* 334 */ "vpshufhw",
|
|
/* 335 */ "vpshuflw",
|
|
/* 336 */ "vpsignb",
|
|
/* 337 */ "vpsignd",
|
|
/* 338 */ "vpsignw",
|
|
/* 339 */ "vpslld",
|
|
/* 33A */ "vpslldq",
|
|
/* 33B */ "vpsllq",
|
|
/* 33C */ "vpsllw",
|
|
/* 33D */ "vpsrad",
|
|
/* 33E */ "vpsraw",
|
|
/* 33F */ "vpsrld",
|
|
/* 340 */ "vpsrldq",
|
|
/* 341 */ "vpsrlq",
|
|
/* 342 */ "vpsrlw",
|
|
/* 343 */ "vpsubb",
|
|
/* 344 */ "vpsubd",
|
|
/* 345 */ "vpsubq",
|
|
/* 346 */ "vpsubsb",
|
|
/* 347 */ "vpsubsw",
|
|
/* 348 */ "vpsubusb",
|
|
/* 349 */ "vpsubusw",
|
|
/* 34A */ "vpsubw",
|
|
/* 34B */ "vptest",
|
|
/* 34C */ "vpunpckhbw",
|
|
/* 34D */ "vpunpckhdq",
|
|
/* 34E */ "vpunpckhqdq",
|
|
/* 34F */ "vpunpckhwd",
|
|
/* 350 */ "vpunpcklbw",
|
|
/* 351 */ "vpunpckldq",
|
|
/* 352 */ "vpunpcklqdq",
|
|
/* 353 */ "vpunpcklwd",
|
|
/* 354 */ "vpxor",
|
|
/* 355 */ "vrcpps",
|
|
/* 356 */ "vrcpss",
|
|
/* 357 */ "vroundpd",
|
|
/* 358 */ "vroundps",
|
|
/* 359 */ "vroundsd",
|
|
/* 35A */ "vroundss",
|
|
/* 35B */ "vrsqrtps",
|
|
/* 35C */ "vrsqrtss",
|
|
/* 35D */ "vshufpd",
|
|
/* 35E */ "vshufps",
|
|
/* 35F */ "vsqrtpd",
|
|
/* 360 */ "vsqrtps",
|
|
/* 361 */ "vsqrtsd",
|
|
/* 362 */ "vsqrtss",
|
|
/* 363 */ "vstmxcsr",
|
|
/* 364 */ "vsubpd",
|
|
/* 365 */ "vsubps",
|
|
/* 366 */ "vsubsd",
|
|
/* 367 */ "vsubss",
|
|
/* 368 */ "vtestpd",
|
|
/* 369 */ "vtestps",
|
|
/* 36A */ "vucomisd",
|
|
/* 36B */ "vucomiss",
|
|
/* 36C */ "vunpckhpd",
|
|
/* 36D */ "vunpckhps",
|
|
/* 36E */ "vunpcklpd",
|
|
/* 36F */ "vunpcklps",
|
|
/* 370 */ "vxorpd",
|
|
/* 371 */ "vxorps",
|
|
/* 372 */ "vzeroall",
|
|
/* 373 */ "vzeroupper",
|
|
/* 374 */ "wait",
|
|
/* 375 */ "wbinvd",
|
|
/* 376 */ "wrmsr",
|
|
/* 377 */ "xadd",
|
|
/* 378 */ "xchg",
|
|
/* 379 */ "xcryptcbc",
|
|
/* 37A */ "xcryptcfb",
|
|
/* 37B */ "xcryptctr",
|
|
/* 37C */ "xcryptecb",
|
|
/* 37D */ "xcryptofb",
|
|
/* 37E */ "xgetbv",
|
|
/* 37F */ "xlatb",
|
|
/* 380 */ "xor",
|
|
/* 381 */ "xorpd",
|
|
/* 382 */ "xorps",
|
|
/* 383 */ "xrstor",
|
|
/* 384 */ "xsave",
|
|
/* 385 */ "xsetbv",
|
|
/* 386 */ "xsha1",
|
|
/* 387 */ "xsha256",
|
|
/* 388 */ "xstore",
|
|
};
|
|
|
|
}
|
|
|
|
}
|