x64dbg
/
zydis
mirror of https://github.com/x64dbg/zydis
1
0
Fork 0
Code Releases Activity
312 Commits 3 Branches 1 Tag 8.5 MiB
Commit Graph

312 Commits

Author SHA1 Message Date
Joel Höner 0a50bb9daa Implemented encoding for XOP, VEX and EVEX 2017-01-20 21:18:13 +01:00
Joel Höner 46077709f8 Completed SIB encoding 2017-01-20 00:54:48 +01:00
flobernd 98d34d0c62 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-01-20 00:03:28 +01:00
flobernd dc70ee7eb2 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-01-20 00:02:21 +01:00
flobernd 4b54158aa2 Minor bugfixes 2017-01-20 00:01:56 +01:00
Joel Höner c0f53a3a69 More encoder progress, minor refactoring 
- Added encoding support for more X86 features (IMMs, SIB, ..)
- Added ZYDIS_ARRAY_SIZE macro
- Moved ZYDIS_MAX_INSTRUCTION_LENGTH (Decoder.h -> InstructionInfo.h)
- Renamed ZydisInstructionEncoder -> ZydisEncoderContext
- Various bug-fixes
 2017-01-19 17:37:05 +01:00
Joel Höner 14848083ae More encoder progress 2017-01-17 20:53:34 +01:00
flobernd 5ead1d9345 Minor refactorings 
- The instruction pointer is now directly passed to the ZydisDecoderDecodeInstruction function
- Removed the user-data pointer in the ZydisOperandInfo struct
 2017-01-12 20:14:12 +01:00
Joel Höner 689708fbd3 Refactored docstrings to use uppercase abbreviations 2017-01-12 19:37:57 +01:00
Joel Höner a9514fbfea Minor documentation and style fixes 2017-01-12 18:54:16 +01:00
Joel Höner 0793090388 Implemented basic prefix encoding 2017-01-12 18:53:28 +01:00
Joel Höner 3d2365b6ed Added encoder stub, made decoder input const 2017-01-12 15:12:09 +01:00
Joel Höner 67231ccdff Increased read buffer size in tools 2017-01-12 10:29:42 +01:00
flobernd 3b56c867fc Updated mask-policy definitions for EVEX instructions 2017-01-11 22:11:30 +01:00
flobernd 794a769800 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-01-11 17:29:36 +01:00
flobernd 5af25eee4b Fixed a bug in ZYDIS_CHECK that caused functions to run more than once on certain conditions 2017-01-11 17:29:26 +01:00
Joel Höner 4d0caac923 Fixed build for tools 2017-01-11 12:18:26 +01:00
flobernd 9804bf1d3e Fixed CMake file 2017-01-11 11:51:18 +01:00
flobernd c0528d5cb0 Exposed ZYDIS_MAX_INSTRUCTION_LENGTH constant 2017-01-11 11:24:10 +01:00
flobernd 9073b3a415 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2017-01-11 11:20:45 +01:00
flobernd 4165c3b9b2 Removed Input-struct. The input buffer is now directly passed to the ZydisDecodeInstruction function. 2017-01-11 11:20:24 +01:00
Joel Höner c11929a5f7 Prefixed CMake options 2017-01-10 06:01:04 +01:00
Joel Höner b291c8a760 Use size_t instead of uint64_t for memory input 2017-01-07 00:29:16 +01:00
Joel Höner 2e11b44ddf Minor CMake and C++ compatibility fixes 2017-01-06 02:06:08 +01:00
Joel Höner cbc9460547 Added tool for testing Zydis against CPU behaviour (Intel PIN) 2017-01-06 02:04:21 +01:00
flobernd 5b63557f3c Fixed decoding of instructions with EVEX high-16 register specifiers (R', X, V') 2016-12-05 21:06:29 +01:00
flobernd d4dd176438 Refactorings and bugfixes 
- Added support for the BOUND prefix
- Added support for more detailed operand-actions (read, write, readwrite, cond. read, cond. write, read + cond. write, write + cond. read)
- Added operand-visibility info (explicit, implicit, hidden)
- Fixed some bugs in the prefix-decoding routines
- Removed stdbool.h dependency and introduced custom boolean-type for better portability
 2016-12-05 02:24:01 +01:00
flobernd bb913f1272 Fixed some instruction-definitions and re-generated tables 2016-11-29 23:48:10 +01:00
flobernd 879f456b03 Fixed some instruction-definitions 2016-11-29 18:30:39 +01:00
flobernd 2e58e13d81 Fixed some instruction-definitions 2016-11-29 13:50:15 +01:00
flobernd 5480ad0aaf Fixed some instruction-definitions 2016-11-29 13:21:09 +01:00
flobernd 425a0d6cd7 Fixed some operand-definitions 2016-11-29 12:38:01 +01:00
flobernd bcfb84e59b Minor refactorings 2016-11-29 11:49:38 +01:00
flobernd e926c26d6e Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2016-11-29 11:47:32 +01:00
Joel Höner e655e8a1b8 Fixed broken enum typedef 2016-11-29 04:09:41 +01:00
Joel Höner cb333fffef Fixed formatter hook example build on LP64 targets 2016-11-29 01:27:39 +01:00
Joel Höner 75921f9ca6 Altered instruction DB format 
- support for multiple flag operations
- various definition fixes based on newly enabled editor heuristics
 2016-11-28 23:25:26 +01:00
flobernd fbbbcbadb8 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2016-11-28 19:58:01 +01:00
Joel Höner f4959072dc Renamed ZydisFormatFlags -> ZydisFormatterFlags 2016-11-28 19:13:01 +01:00
Joel Höner 4e78d04788 Fixed lib build with clang, fixed tools 2016-11-28 18:56:39 +01:00
flobernd bfcbe3e8c1 Minor bugfixes and refactorings 2016-11-28 15:03:39 +01:00
flobernd 477a908bb0 Added more formatter-hooks 
- ZYDIS_FORMATTER_HOOK_PRINT_DISPLACEMENT
- ZYDIS_FORMATTER_HOOK_PRINT_IMMEDIATE
 2016-11-28 11:14:47 +01:00
flobernd 805a407395 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2016-11-28 10:48:10 +01:00
Joel Höner 05d36bd39b fixed many inaccurate flag definitions 2016-11-28 02:44:17 +01:00
flobernd 25f5dfeff1 Added missing x86-flags 2016-11-27 23:54:55 +01:00
flobernd 9a0b1da975 Added missing registers and CPUID feature-flags 2016-11-27 23:24:43 +01:00
Joel Höner 90538a8040 ignore .DS_Store 2016-11-27 22:36:38 +01:00
Joel Höner 9ce1ba1b3b regs and flags for Intel VT-x instructions 2016-11-27 22:35:38 +01:00
flobernd 8dafd68211 Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop 2016-11-27 20:15:19 +01:00
Joel Höner e4f89a05ee regs and flags for VSCALEFPD - XTEST 2016-11-27 19:40:22 +01:00