3 Commits

Author	SHA1	Message	Date
flobernd	778b47c02f	Minor bugfixes ... - Fixed segment register for implicit memory-operands - Fixed decoding of `MOV CR, GPR`, `MOV GPR, CR`, `MOV DR, GPR` and `MOV GPR, DR`	2017-06-28 22:18:12 +02:00
flobernd	702f6b8d53	Reimplemented a basic version of semantic operand-decoding	2017-06-13 20:17:20 +02:00
flobernd	8740b1e50f	Major changes to the instruction decoder ... - Decoupled semantic operand decoding (optional) from physical instruction decoding - Several optimizations of the internal structures - Further preparations for MVEX-support	2017-06-12 19:16:01 +02:00