flobernd
3b56c867fc
Updated mask-policy definitions for EVEX instructions
2017-01-11 22:11:30 +01:00
flobernd
794a769800
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-01-11 17:29:36 +01:00
flobernd
5af25eee4b
Fixed a bug in ZYDIS_CHECK that caused functions to run more than once on certain conditions
2017-01-11 17:29:26 +01:00
Joel Höner
4d0caac923
Fixed build for tools
2017-01-11 12:18:26 +01:00
flobernd
9804bf1d3e
Fixed CMake file
2017-01-11 11:51:18 +01:00
flobernd
c0528d5cb0
Exposed ZYDIS_MAX_INSTRUCTION_LENGTH constant
2017-01-11 11:24:10 +01:00
flobernd
9073b3a415
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2017-01-11 11:20:45 +01:00
flobernd
4165c3b9b2
Removed Input-struct. The input buffer is now directly passed to the ZydisDecodeInstruction function.
2017-01-11 11:20:24 +01:00
Joel Höner
c11929a5f7
Prefixed CMake options
2017-01-10 06:01:04 +01:00
Joel Höner
b291c8a760
Use size_t instead of uint64_t for memory input
2017-01-07 00:29:16 +01:00
Joel Höner
2e11b44ddf
Minor CMake and C++ compatibility fixes
2017-01-06 02:06:08 +01:00
Joel Höner
cbc9460547
Added tool for testing Zydis against CPU behaviour (Intel PIN)
2017-01-06 02:04:21 +01:00
flobernd
5b63557f3c
Fixed decoding of instructions with EVEX high-16 register specifiers (R', X, V')
2016-12-05 21:06:29 +01:00
flobernd
d4dd176438
Refactorings and bugfixes
...
- Added support for the BOUND prefix
- Added support for more detailed operand-actions (read, write, readwrite, cond. read, cond. write, read + cond. write, write + cond. read)
- Added operand-visibility info (explicit, implicit, hidden)
- Fixed some bugs in the prefix-decoding routines
- Removed stdbool.h dependency and introduced custom boolean-type for better portability
2016-12-05 02:24:01 +01:00
flobernd
bb913f1272
Fixed some instruction-definitions and re-generated tables
2016-11-29 23:48:10 +01:00
flobernd
879f456b03
Fixed some instruction-definitions
2016-11-29 18:30:39 +01:00
flobernd
2e58e13d81
Fixed some instruction-definitions
2016-11-29 13:50:15 +01:00
flobernd
5480ad0aaf
Fixed some instruction-definitions
2016-11-29 13:21:09 +01:00
flobernd
425a0d6cd7
Fixed some operand-definitions
2016-11-29 12:38:01 +01:00
flobernd
bcfb84e59b
Minor refactorings
2016-11-29 11:49:38 +01:00
flobernd
e926c26d6e
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2016-11-29 11:47:32 +01:00
Joel Höner
e655e8a1b8
Fixed broken enum typedef
2016-11-29 04:09:41 +01:00
Joel Höner
cb333fffef
Fixed formatter hook example build on LP64 targets
2016-11-29 01:27:39 +01:00
Joel Höner
75921f9ca6
Altered instruction DB format
...
- support for multiple flag operations
- various definition fixes based on newly enabled editor heuristics
2016-11-28 23:25:26 +01:00
flobernd
fbbbcbadb8
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2016-11-28 19:58:01 +01:00
Joel Höner
f4959072dc
Renamed ZydisFormatFlags -> ZydisFormatterFlags
2016-11-28 19:13:01 +01:00
Joel Höner
4e78d04788
Fixed lib build with clang, fixed tools
2016-11-28 18:56:39 +01:00
flobernd
bfcbe3e8c1
Minor bugfixes and refactorings
2016-11-28 15:03:39 +01:00
flobernd
477a908bb0
Added more formatter-hooks
...
- ZYDIS_FORMATTER_HOOK_PRINT_DISPLACEMENT
- ZYDIS_FORMATTER_HOOK_PRINT_IMMEDIATE
2016-11-28 11:14:47 +01:00
flobernd
805a407395
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2016-11-28 10:48:10 +01:00
Joel Höner
05d36bd39b
fixed many inaccurate flag definitions
2016-11-28 02:44:17 +01:00
flobernd
25f5dfeff1
Added missing x86-flags
2016-11-27 23:54:55 +01:00
flobernd
9a0b1da975
Added missing registers and CPUID feature-flags
2016-11-27 23:24:43 +01:00
Joel Höner
90538a8040
ignore .DS_Store
2016-11-27 22:36:38 +01:00
Joel Höner
9ce1ba1b3b
regs and flags for Intel VT-x instructions
2016-11-27 22:35:38 +01:00
flobernd
8dafd68211
Merge branch 'develop' of github.com:zyantific/zyan-disassembler-engine into develop
2016-11-27 20:15:19 +01:00
Joel Höner
e4f89a05ee
regs and flags for VSCALEFPD - XTEST
2016-11-27 19:40:22 +01:00
Joel Höner
08d7a198f3
regs and flags for VFNMADD132PD - VRSQRT28SS
2016-11-27 00:14:27 +01:00
Joel Höner
6240bb8f7d
regs and flags for SYSCALL - VFMSUB231SS
2016-11-26 20:43:33 +01:00
flobernd
e481c3e401
Minor refactorings and changes to the instruction-formatter
...
- The formatter now makes use of the format-macros in inttypes.h for better portability
- Added formatter-hook ZYDIS_FORMATTER_HOOK_PRINT_SEGMENT
2016-11-26 18:41:58 +01:00
Joel Höner
9a39623411
regs and flags for RCL - SWAPGS
2016-11-26 17:38:33 +01:00
flobernd
83f41f0f55
Removed unneeded files
2016-11-26 13:15:35 +01:00
flobernd
816bb570c7
Complete rewrite of the instruction-formatter
...
- Added hooking functionality to support custom instruction-formatting
- Added FormatterHooks demo that demonstrates the hooking functionality
InstructionEditor:
- Fixed issues with still non-deterministic output on code-generation
2016-11-26 13:08:37 +01:00
Joel Höner
03b4d69b08
regs and flags PTWRITE - PXOR
2016-11-26 01:16:08 +01:00
Joel Höner
e2a9329781
regs and flags for PABS - PTEST
2016-11-25 20:45:17 +01:00
Joel Höner
d3d4c05246
fixed definitions for OUTS, INS
2016-11-25 18:21:09 +01:00
Joel Höner
39c1f3591e
regs and flags for MOV - OUT
2016-11-25 18:13:04 +01:00
Joel Höner
4cbc832e5c
fixed definitions for MOVS, LODS, STOS, CMPS, SCAS
...
plus added a few definitions forgotten in my last commit
2016-11-25 17:13:46 +01:00
flobernd
7f1c0bd8f1
Minor refactorings and bugfixes
2016-11-24 10:57:23 +01:00
flobernd
659ead2280
Fixed second operand missing for IVLPGA
2016-11-24 10:53:00 +01:00