flobernd
							
						 
						
							 
							
							
								
								
							
							
							
								
							
							
								57ccc70415 
								
							 
						 
						
							
							
								
								Optimized detection of bad register values  
							
							 
							
							
							
						 
						
							2018-01-11 22:30:23 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
								
								
							
							
							
								
							
							
								7fb7eea11f 
								
							 
						 
						
							
							
								
								Bugfixes and table changes  
							
							 
							
							... 
							
							
							
							- Fixed `SSE4A` ISA-set and ISA-ext
- Added missing `VEX`-encoded `GFNI` instructions
- Added check for invalid `GATHER`/`SCATTER` registers 
							
						 
						
							2018-01-11 02:17:17 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
								
								
							
							
							
								
							
							
								203dee3bfb 
								
							 
						 
						
							
							
								
								Bugfixes and table changes  
							
							 
							
							... 
							
							
							
							- Fixed decoding of `XOP` instructions
- Fixed handling of illegal `LOCK` prefixes for `XOP/VEX/EVEX/MVEX` instructions
- Significantly improved detection of bad register values
- Added SSE4a instructions (`EXTRQ`, `INSERTQ`, `MOVNTSD` and `MOVNTSS`)
- Added `VPOPCNTD`/`VPOPCNTQ` instructions with 128- and 256-bit vector-length
- Fixed exception-class of some `GFNI` instructions
- Fixed `RDRAND` and `RDSEED` instructions
- Fixed `SYSRET` instruction 
							
						 
						
							2018-01-10 23:04:57 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
								
								
							
							
							
								
							
							
								fb519fe933 
								
							 
						 
						
							
							
								
								Internal refactorings and performance optimizations  
							
							 
							
							
							
						 
						
							2018-01-10 17:02:11 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								451d7fb1a8 
								
							 
						 
						
							
							
								
								Fixed and refactored some enums  
							
							 
							
							... 
							
							
							
							- Fixed `ZydisRegister` enum and string-table
- Renamed `ZYDIS_XXX_MAX_BITS` in `ZYDIS_XXX_MIN_BITS` 
							
						 
						
							2017-12-03 22:38:20 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								39facdf5fe 
								
							 
						 
						
							
							
								
								Reworked `ZydisString`  
							
							 
							
							
							
						 
						
							2017-12-03 22:38:20 +01:00  
						
					 
				
					
						
							
							
								 
								Joel Höner
							
						 
						
							 
							
							
							
							
								
							
							
								346b7fec10 
								
							 
						 
						
							
							
								
								Moved internal headers  
							
							 
							
							
							
						 
						
							2017-12-03 22:38:20 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
								
								
							
							
							
								
							
							
								02030c3b92 
								
							 
						 
						
							
							
								
								Various changes and refactorings  
							
							 
							
							... 
							
							
							
							- Moved types and functions from `FormatHelper.h/c` to `String.h/c`
- Added `ZydisMnemonicGetStringEx` function that returns the mnemonic-string as `ZydisString` struct
- Added `ZYDIS_UNUSED_PARAMETER` macro
- Fixed omitting of operands in custom formatter-hooks
- Fixed `FormatterHooks` example
- Refactored some code 
							
						 
						
							2017-12-02 06:36:12 +01:00  
						
					 
				
					
						
							
							
								 
								Joel Höner
							
						 
						
							 
							
							
							
							
								
							
							
								7ba6ea0596 
								
							 
						 
						
							
							
								
								Moved private headers to `src` directory  
							
							 
							
							
							
						 
						
							2017-07-03 04:16:38 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								ad8e5ce6a9 
								
							 
						 
						
							
							
								
								Minor refactorings  
							
							 
							
							
							
						 
						
							2017-07-01 01:10:03 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								aca1ad1414 
								
							 
						 
						
							
							
								
								Minor bugfixes  
							
							 
							
							
							
						 
						
							2017-06-29 20:52:35 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								d7c81e5104 
								
							 
						 
						
							
							
								
								Fixed operand-size of some special MVEX instructions  
							
							 
							
							
							
						 
						
							2017-06-29 20:40:48 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								65fe4a4e6c 
								
							 
						 
						
							
							
								
								Improved instruction decoding  
							
							 
							
							... 
							
							
							
							- Decoding of EVEX/MVEX instructions without a NDS/NDD-operand encoded in `.vvvv` and without a VSIB-operand will now fail, if `.v'` is != 1b
- Added information about XACQUIRE, XRELEASE and BOUND prefixes to the instruction definitions
- Fixed immediate-decoding of the `vpermil2pd` / `vpermil2ps` instruction 
							
						 
						
							2017-06-29 18:09:42 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								73b02f6d12 
								
							 
						 
						
							
							
								
								Updated some instruction-definitions to allow segment-overrides for implicit-memory operands  
							
							 
							
							
							
						 
						
							2017-06-28 22:42:39 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								778b47c02f 
								
							 
						 
						
							
							
								
								Minor bugfixes  
							
							 
							
							... 
							
							
							
							- Fixed segment register for implicit memory-operands
- Fixed decoding of `MOV CR, GPR`, `MOV GPR, CR`, `MOV DR, GPR` and `MOV GPR, DR` 
							
						 
						
							2017-06-28 22:18:12 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								b118637dae 
								
							 
						 
						
							
							
								
								Cleaned up register-decoding code  
							
							 
							
							
							
						 
						
							2017-06-28 19:50:33 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								55400e9206 
								
							 
						 
						
							
							
								
								Improved decoding of XOP/VEX/EVEX/MVEX instructions  
							
							 
							
							... 
							
							
							
							Decoding of XOP/VEX/EVEX/MVEX instructions without a NDS register encoded in .vvvv will now fail, if the .vvvv value is != 1111b 
							
						 
						
							2017-06-27 04:14:17 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								e7a7be70e9 
								
							 
						 
						
							
							
								
								Performance optimizations  
							
							 
							
							
							
						 
						
							2017-06-27 03:32:42 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								99de0f3152 
								
							 
						 
						
							
							
								
								Fixed operand-action for EVEX/MVEX instructions with write-mask (again)  
							
							 
							
							
							
						 
						
							2017-06-26 00:54:49 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								83699fe9d0 
								
							 
						 
						
							
							
								
								Minor bugfixes  
							
							 
							
							
							
						 
						
							2017-06-25 23:24:43 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								f0d1ef9725 
								
							 
						 
						
							
							
								
								Added some missing instructions  
							
							 
							
							
							
						 
						
							2017-06-24 02:11:32 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								b3d508850f 
								
							 
						 
						
							
							
								
								Added information for VEX/EVEX/MVEX instructions with static broadcast-factor  
							
							 
							
							
							
						 
						
							2017-06-23 20:47:34 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								c8c3d29ba4 
								
							 
						 
						
							
							
								
								Added support for MVEX instructions with static broadcast factor  
							
							 
							
							
							
						 
						
							2017-06-23 03:35:12 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								2297c763cf 
								
							 
						 
						
							
							
								
								Added compressed disp8 calculation for MVEX instructions with element-granularity  
							
							 
							
							
							
						 
						
							2017-06-23 01:40:19 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								d8f3843f57 
								
							 
						 
						
							
							
								
								Added compressed disp8 calculation for MVEX instructions without swizzle/broadcast/convert functionality  
							
							 
							
							
							
						 
						
							2017-06-23 01:15:42 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								6c370d29c9 
								
							 
						 
						
							
							
								
								Added support for some MVEX special-cases  
							
							 
							
							
							
						 
						
							2017-06-22 22:10:18 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								4d3a71369b 
								
							 
						 
						
							
							
								
								Removed EVEX tuple-type and element-size from the public info-struct  
							
							 
							
							
							
						 
						
							2017-06-22 19:54:35 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								76f0bcf00d 
								
							 
						 
						
							
							
								
								Improved semantic decoding of MVEX instructions  
							
							 
							
							
							
						 
						
							2017-06-22 19:14:27 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								15f89dc4ea 
								
							 
						 
						
							
							
								
								Fixed a bitfield-size error  
							
							 
							
							
							
						 
						
							2017-06-22 01:40:20 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								5bd81b7f1c 
								
							 
						 
						
							
							
								
								Fixed sign-extension of displacement values  
							
							 
							
							
							
						 
						
							2017-06-22 01:38:41 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								d475231a63 
								
							 
						 
						
							
							
								
								Fixed decoding of implicit "1" immediate (ROL, ROR, RCL, ...)  
							
							 
							
							
							
						 
						
							2017-06-20 22:44:37 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								52e1b59702 
								
							 
						 
						
							
							
								
								Improved EVEX and MVEX encoding  
							
							 
							
							... 
							
							
							
							- Added some MASK related error-conditions
- Added functionality and mask-policy attributes to the MVEX instruction-definition struct
- Added MVEX specific error-condition 
							
						 
						
							2017-06-20 21:23:06 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								95b685a29d 
								
							 
						 
						
							
							
								
								Minor bugfixes  
							
							 
							
							... 
							
							
							
							- Fixed some VEX/EVEX/MVEX-prefix error conditions
- MASK register size is now 64-bit for EVEX- and 16-bit for MVEX-instructions 
							
						 
						
							2017-06-20 17:48:55 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								4487d1b252 
								
							 
						 
						
							
							
								
								Fixed some operand-size related filter-tables  
							
							 
							
							
							
						 
						
							2017-06-20 01:33:07 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								0902068007 
								
							 
						 
						
							
							
								
								Fixed more EVEX tuple-types  
							
							 
							
							
							
						 
						
							2017-06-19 21:06:33 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								ee97ae753c 
								
							 
						 
						
							
							
								
								Fixed some EVEX tuple-types  
							
							 
							
							
							
						 
						
							2017-06-19 20:46:42 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								4bceac86c9 
								
							 
						 
						
							
							
								
								Various bugfixes  
							
							 
							
							... 
							
							
							
							- Fixed operand-size and element-count of AGEN operands
- Fixed decoding of 8-bit modrm.rm register-operands
- Fixed vector-length for EVEX instructions with rounding-semantics 
							
						 
						
							2017-06-19 20:19:21 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								2d2e1acf27 
								
							 
						 
						
							
							
								
								Added T1_4X tuple-type  
							
							 
							
							
							
						 
						
							2017-06-18 22:02:59 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								28a8178559 
								
							 
						 
						
							
							
								
								Fixed compatibility problem  
							
							 
							
							
							
						 
						
							2017-06-16 23:38:06 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								ad35e81eee 
								
							 
						 
						
							
							
								
								Added semantic element-information for operands  
							
							 
							
							
							
						 
						
							2017-06-16 23:19:57 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								44792f2338 
								
							 
						 
						
							
							
								
								Added semantic decoding of implicit memory operands  
							
							 
							
							
							
						 
						
							2017-06-16 16:27:37 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								1db4db9ec2 
								
							 
						 
						
							
							
								
								Added semantic decoding of implicit register operands  
							
							 
							
							
							
						 
						
							2017-06-16 03:25:39 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								6caa68b674 
								
							 
						 
						
							
							
								
								Reimplemented decoding of 3DNOW instructions and improved EVEX decoding  
							
							 
							
							
							
						 
						
							2017-06-13 22:04:29 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								702f6b8d53 
								
							 
						 
						
							
							
								
								Reimplemented a basic version of semantic operand-decoding  
							
							 
							
							
							
						 
						
							2017-06-13 20:17:20 +02:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								8740b1e50f 
								
							 
						 
						
							
							
								
								Major changes to the instruction decoder  
							
							 
							
							... 
							
							
							
							- Decoupled semantic operand decoding (optional) from physical instruction decoding
- Several optimizations of the internal structures
- Further preparations for MVEX-support 
							
						 
						
							2017-06-12 19:16:01 +02:00  
						
					 
				
					
						
							
							
								 
								Joel Höner
							
						 
						
							 
							
							
							
							
								
							
							
								689708fbd3 
								
							 
						 
						
							
							
								
								Refactored docstrings to use uppercase abbreviations  
							
							 
							
							
							
						 
						
							2017-01-12 19:37:57 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								3b56c867fc 
								
							 
						 
						
							
							
								
								Updated mask-policy definitions for EVEX instructions  
							
							 
							
							
							
						 
						
							2017-01-11 22:11:30 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								5b63557f3c 
								
							 
						 
						
							
							
								
								Fixed decoding of instructions with EVEX high-16 register specifiers (R', X, V')  
							
							 
							
							
							
						 
						
							2016-12-05 21:06:29 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								d4dd176438 
								
							 
						 
						
							
							
								
								Refactorings and bugfixes  
							
							 
							
							... 
							
							
							
							- Added support for the BOUND prefix
- Added support for more detailed operand-actions (read, write, readwrite, cond. read, cond. write, read + cond. write, write + cond. read)
- Added operand-visibility info (explicit, implicit, hidden)
- Fixed some bugs in the prefix-decoding routines
- Removed stdbool.h dependency and introduced custom boolean-type for better portability 
							
						 
						
							2016-12-05 02:24:01 +01:00  
						
					 
				
					
						
							
							
								 
								flobernd
							
						 
						
							 
							
							
							
							
								
							
							
								bb913f1272 
								
							 
						 
						
							
							
								
								Fixed some instruction-definitions and re-generated tables  
							
							 
							
							
							
						 
						
							2016-11-29 23:48:10 +01:00