From ff09bd32ebfee44c99c5d651102ce2a6031513da Mon Sep 17 00:00:00 2001 From: Ende! Date: Sun, 15 Mar 2015 23:28:54 +0100 Subject: [PATCH] made c "bindings" independent from c++ library --- ...mblerUtilsC.cpp => VXDisassemblerUtilsC.c} | 50 +- Bindings/C/VXDisassemblerUtilsC.h | 8 +- Bindings/C/VXInstructionDecoderC.c | 1785 +++ Bindings/C/VXInstructionDecoderC.cpp | 259 - Bindings/C/VXInstructionDecoderC.h | 37 +- Bindings/C/VXInstructionFormatterC.c | 856 ++ Bindings/C/VXInstructionFormatterC.cpp | 312 - Bindings/C/VXInstructionFormatterC.h | 62 +- Bindings/C/VXInternalHelpersC.h | 165 + Bindings/C/VXOpcodeTableC.c | 9649 +++++++++++++++++ Bindings/C/VXOpcodeTableC.cpp | 35 - Bindings/C/VXOpcodeTableC.h | 1 + Bindings/C/VXOpcodeTableInternalC.h | 313 + CMakeLists.txt | 12 +- VerteronDisassemblerEngine/VXOpcodeTable.cpp | 6374 +++++------ 15 files changed, 16051 insertions(+), 3867 deletions(-) rename Bindings/C/{VXDisassemblerUtilsC.cpp => VXDisassemblerUtilsC.c} (53%) create mode 100644 Bindings/C/VXInstructionDecoderC.c delete mode 100644 Bindings/C/VXInstructionDecoderC.cpp create mode 100644 Bindings/C/VXInstructionFormatterC.c delete mode 100644 Bindings/C/VXInstructionFormatterC.cpp create mode 100644 Bindings/C/VXInternalHelpersC.h create mode 100644 Bindings/C/VXOpcodeTableC.c delete mode 100644 Bindings/C/VXOpcodeTableC.cpp create mode 100644 Bindings/C/VXOpcodeTableInternalC.h diff --git a/Bindings/C/VXDisassemblerUtilsC.cpp b/Bindings/C/VXDisassemblerUtilsC.c similarity index 53% rename from Bindings/C/VXDisassemblerUtilsC.cpp rename to Bindings/C/VXDisassemblerUtilsC.c index 3a68b6e..9ef2bbb 100644 --- a/Bindings/C/VXDisassemblerUtilsC.cpp +++ b/Bindings/C/VXDisassemblerUtilsC.c @@ -5,10 +5,10 @@ Remarks : Freeware, Copyright must be included - Original Author : athre0z - Modifications : + Original Author : Florian Bernd + Modifications : athre0z - Last change : 04. February 2015 + Last change : 13. March 2015 * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -31,14 +31,44 @@ **************************************************************************************************/ #include "VXDisassemblerUtilsC.h" -#include "VXDisassemblerUtils.h" -static_assert(sizeof(VXInstructionInfo) == sizeof(Verteron::VXInstructionInfo), "struct rekt"); -static_assert(sizeof(VXOperandInfo) == sizeof(Verteron::VXOperandInfo), "struct rekt"); +#include -uint64_t VDECalcAbsoluteTarget(const VXInstructionInfo *info, const VXOperandInfo *operand) +uint64_t VXCalcAbsoluteTarget(const VXInstructionInfo *info, const VXOperandInfo *operand) { - return Verteron::VDECalcAbsoluteTarget( - *reinterpret_cast(info), - *reinterpret_cast(operand)); + assert((operand->type == OPTYPE_REL_IMMEDIATE) || + ((operand->type == OPTYPE_MEMORY) && (operand->base == REG_RIP))); + + uint64_t truncMask = 0xFFFFFFFFFFFFFFFFull; + if (!(info->flags & IF_DISASSEMBLER_MODE_64)) + { + truncMask >>= (64 - info->operand_mode); + } + + uint16_t size = operand->size; + if ((operand->type == OPTYPE_MEMORY) && (operand->base == REG_RIP)) + { + size = operand->offset; + } + + switch (size) + { + case 8: + return (info->instrPointer + operand->lval.sbyte) & truncMask; + case 16: + { + uint32_t delta = operand->lval.sword & truncMask; + if ((info->instrPointer + delta) > 0xFFFF) + { + return (info->instrPointer & 0xF0000) + ((info->instrPointer + delta) & 0xFFFF); + } + return info->instrPointer + delta; + } + case 32: + return (info->instrPointer + operand->lval.sdword) & truncMask; + default: + assert(0); + } + + return 0; } \ No newline at end of file diff --git a/Bindings/C/VXDisassemblerUtilsC.h b/Bindings/C/VXDisassemblerUtilsC.h index 060d4c1..ffc1210 100644 --- a/Bindings/C/VXDisassemblerUtilsC.h +++ b/Bindings/C/VXDisassemblerUtilsC.h @@ -41,13 +41,19 @@ extern "C" { #endif +typedef struct _VXContextDescriptor +{ + uint8_t type; + void *ptr; +} VXContextDescriptor; + /** * @brief Calculates the absolute target address of a relative instruction operand. * @param info The instruction info. * @param operand The operand. * @return The absolute target address. */ -uint64_t VDECalcAbsoluteTarget(const VXInstructionInfo *info, const VXOperandInfo *operand); +uint64_t VXCalcAbsoluteTarget(const VXInstructionInfo *info, const VXOperandInfo *operand); #ifdef __cplusplus } diff --git a/Bindings/C/VXInstructionDecoderC.c b/Bindings/C/VXInstructionDecoderC.c new file mode 100644 index 0000000..8541cc2 --- /dev/null +++ b/Bindings/C/VXInstructionDecoderC.c @@ -0,0 +1,1785 @@ +/************************************************************************************************** + + Verteron Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : athre0z + + Last change : 13. March 2015 + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +**************************************************************************************************/ + +#include "VXInstructionDecoderC.h" +#include "VXInternalHelpersC.h" +#include "VXOpcodeTableInternalC.h" + +#include +#include +#include + +/* Internal interface ========================================================================== */ + +/* VXBaseDataSource ---------------------------------------------------------------------------- */ + +typedef void(*VXBaseDataSource_DestructionCallback)(VXBaseDataSourceContext *ctx); +typedef uint8_t(*VXBaseDataSource_InputCallback)(VXBaseDataSourceContext *ctx); +typedef bool(*VXBaseDataSource_IsEndOfInputCallback)(const VXBaseDataSourceContext *ctx); +typedef uint64_t(*VXBaseDataSource_GetPositionCallback)(const VXBaseDataSourceContext *ctx); +typedef bool(*VXBaseDataSource_SetPositionCallback)( + VXBaseDataSourceContext *ctx, uint64_t position); + +typedef struct _VXBaseDataSource +{ + uint8_t currentInput; + VXBaseDataSource_DestructionCallback destruct; // may be NULL + VXBaseDataSource_InputCallback internalInputPeek; + VXBaseDataSource_InputCallback internalInputNext; + VXBaseDataSource_IsEndOfInputCallback isEndOfInput; + VXBaseDataSource_GetPositionCallback getPosition; + VXBaseDataSource_SetPositionCallback setPosition; +} VXBaseDataSource; + +void VXBaseDataSource_Construct(VXBaseDataSourceContext *ctx); +void VXBaseDataSource_Destruct(VXBaseDataSourceContext *ctx); +void VXBaseDataSource_Release(VXBaseDataSourceContext *ctx); +uint8_t VXBaseDataSource_InputPeek(VXBaseDataSourceContext *ctx, VXInstructionInfo *info); +uint8_t VXBaseDataSource_InputNext8(VXBaseDataSourceContext *ctx, VXInstructionInfo *info); +uint16_t VXBaseDataSource_InputNext16(VXBaseDataSourceContext *ctx, VXInstructionInfo *info); +uint32_t VXBaseDataSource_InputNext32(VXBaseDataSourceContext *ctx, VXInstructionInfo *info); +uint64_t VXBaseDataSource_InputNext64(VXBaseDataSourceContext *ctx, VXInstructionInfo *info); +uint8_t VXBaseDataSource_InputCurrent(const VXBaseDataSourceContext *ctx); + +/* VXMemoryDataSource -------------------------------------------------------------------------- */ + +typedef struct _VXMemoryDataSource +{ + VXBaseDataSource super; + const void *inputBuffer; + uint64_t inputBufferLen; + uint64_t inputBufferPos; +} VXMemoryDataSource; + +void VXMemoryDataSource_Construct(VXBaseDataSourceContext *ctx, const void* buffer, size_t bufferLen); +void VXMemoryDataSource_Destruct(VXBaseDataSourceContext *ctx); +VXBaseDataSourceContext* VXMemoryDataSource_Create(const void* buffer, size_t bufferLen); +uint8_t VXMemoryDataSource_InternalInputPeek(VXBaseDataSourceContext *ctx); +uint8_t VXMemoryDataSource_InternalInputNext(VXBaseDataSourceContext *ctx); +bool VXMemoryDataSource_IsEndOfInput(const VXBaseDataSourceContext *ctx); +uint64_t VXMemoryDataSource_GetPosition(const VXBaseDataSourceContext *ctx); +bool VXMemoryDataSource_SetPosition(VXBaseDataSourceContext *ctx, uint64_t position); + +/* VXInstructionDecoder ------------------------------------------------------------------------ */ + +typedef struct _VXInstructionDecoder +{ + VXBaseDataSourceContext *dataSource; + VXDisassemblerMode disassemblerMode; + VXInstructionSetVendor preferredVendor; + uint64_t instructionPointer; +} VXInstructionDecoder; + +typedef enum _VXRegisterClass /* : uint8_t */ +{ + RC_GENERAL_PURPOSE, + RC_MMX, + RC_CONTROL, + RC_DEBUG, + RC_SEGMENT, + RC_XMM +} VXRegisterClass; + +uint8_t VXInstructionDecoder_InputPeek(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +uint8_t VXInstructionDecoder_InputNext8(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +uint16_t VXInstructionDecoder_InputNext16(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +uint32_t VXInstructionDecoder_InputNext32(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +uint64_t VXInstructionDecoder_InputNext64(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +uint8_t VXInstructionDecoder_InputCurrent(const VXInstructionDecoderContext *ctx); +VXBaseDataSourceContext* VXInstructionDecoder_GetDataSource(const VXInstructionDecoderContext *ctx); +void VXInstructionDecoder_SetDataSource(VXInstructionDecoderContext *ctx, VXBaseDataSourceContext *input); +VXDisassemblerMode VXInstructionDecoder_GetDisassemblerMode(const VXInstructionDecoderContext *ctx); +void VXInstructionDecoder_SetDisassemblerMode(VXInstructionDecoderContext *ctx, VXDisassemblerMode disassemblerMode); +VXInstructionSetVendor VXInstructionDecoder_GetPreferredVendor(const VXInstructionDecoderContext *ctx); +void VXInstructionDecoder_SetPreferredVendor(VXInstructionDecoderContext *ctx, VXInstructionSetVendor preferredVendor); +uint64_t VXInstructionDecoder_GetInstructionPointer(const VXInstructionDecoderContext *ctx); +void VXInstructionDecoder_SetInstructionPointer(VXInstructionDecoderContext *ctx, uint64_t instructionPointer); +bool VXInstructionDecoder_DecodeRegisterOperand(const VXInstructionDecoderContext *ctx, VXInstructionInfo *info, VXOperandInfo *operand, VXRegisterClass registerClass, uint8_t registerId, VXDefinedOperandSize operandSize); +bool VXInstructionDecoder_DecodeRegisterMemoryOperand(VXInstructionDecoderContext *ctx, VXInstructionInfo *info, VXOperandInfo *operand, VXRegisterClass registerClass, VXDefinedOperandSize operandSize); +bool VXInstructionDecoder_DecodeImmediate(VXInstructionDecoderContext *ctx, VXInstructionInfo *info, VXOperandInfo *operand, VXDefinedOperandSize operandSize); +bool VXInstructionDecoder_DecodeDisplacement(VXInstructionDecoderContext *ctx, VXInstructionInfo *info, VXOperandInfo *operand, uint8_t size); +bool VXInstructionDecoder_DecodeModrm(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +bool VXInstructionDecoder_DecodeSIB(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +bool VXInstructionDecoder_DecodeVex(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +uint16_t VXInstructionDecoder_GetEffectiveOperandSize(const VXInstructionDecoderContext *ctx, const VXInstructionInfo *info, VXDefinedOperandSize operandSize); +bool VXInstructionDecoder_DecodeOperands(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +bool VXInstructionDecoder_DecodeOperand(VXInstructionDecoderContext *ctx, VXInstructionInfo *info, VXOperandInfo *operand, VXDefinedOperandType operandType, VXDefinedOperandSize operandSize); +void VXInstructionDecoder_ResolveOperandAndAddressMode(const VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +void VXInstructionDecoder_CalculateEffectiveRexVexValues(const VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +bool VXInstructionDecoder_DecodePrefixes(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +bool VXInstructionDecoder_DecodeOpcode(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); +VXInstructionDecoderContext* VXInstructionDecoder_Create(void); +VXInstructionDecoderContext* VXInstructionDecoder_CreateEx(VXBaseDataSourceContext *input, VXDisassemblerMode disassemblerMode, VXInstructionSetVendor preferredVendor, uint64_t instructionPointer); +bool VXInstructionDecoder_DecodeInstruction(VXInstructionDecoderContext *ctx, VXInstructionInfo *info); + +/* Implementation ============================================================================== */ + +/* VXBaseDataSource ---------------------------------------------------------------------------- */ + +static void VXBaseDataSource_Construct(VXBaseDataSourceContext *ctx) +{ + VXBaseDataSource *thiz = VXBaseDataSource_thiz(ctx); + memset(thiz, 0, sizeof(*thiz)); +} + +static void VXBaseDataSource_Destruct(VXBaseDataSourceContext *ctx) +{ + +} + +void VXBaseDataSource_Release(VXBaseDataSourceContext *ctx) +{ + VXBaseDataSource *thiz = VXBaseDataSource_thiz(ctx); + + if (thiz->destruct) + { + thiz->destruct(ctx); + } + + free(thiz); + free(ctx); +} + +uint8_t VXBaseDataSource_InputPeek(VXBaseDataSourceContext *ctx, VXInstructionInfo *info) +{ + VXBaseDataSource *thiz = VXBaseDataSource_thiz(ctx); + + if (info->length == 15) + { + info->flags |= IF_ERROR_LENGTH; + return 0; + } + if (VXBaseDataSource_IsEndOfInput(ctx)) + { + info->flags |= IF_ERROR_END_OF_INPUT; + return 0; + } + + thiz->currentInput = thiz->internalInputPeek(ctx); + return thiz->currentInput; +} + +static uint8_t VXBaseDataSource_InputNext8(VXBaseDataSourceContext *ctx, VXInstructionInfo *info) +{ + VXBaseDataSource *thiz = VXBaseDataSource_thiz(ctx); + + if (info->length == 15) + { + info->flags |= IF_ERROR_LENGTH; + return 0; + } + if (VXBaseDataSource_IsEndOfInput(ctx)) + { + info->flags |= IF_ERROR_END_OF_INPUT; + return 0; + } + thiz->currentInput = thiz->internalInputNext(ctx); + info->data[info->length] = thiz->currentInput; + info->length++; + return thiz->currentInput; +} + +#define VXBASEDATASOURCE_INPUTNEXT_N(n) \ + static uint##n##_t VXBaseDataSource_InputNext##n( \ + VXBaseDataSourceContext *ctx, VXInstructionInfo *info) \ + { \ + uint##n##_t result = 0; \ + for (unsigned i = 0; i < (sizeof(uint##n##_t) / sizeof(uint8_t)); ++i) \ + { \ + uint##n##_t b = VXBaseDataSource_InputNext8(ctx, info); \ + if (!b && (info->flags & IF_ERROR_MASK)) \ + { \ + return 0; \ + } \ + result |= (b << (i * 8)); \ + } \ + return result; \ + } + +VXBASEDATASOURCE_INPUTNEXT_N(16) +VXBASEDATASOURCE_INPUTNEXT_N(32) +VXBASEDATASOURCE_INPUTNEXT_N(64) +#undef VXBASEDATASOURCE_INPUTNEXT_N + +uint8_t VXBaseDataSource_InputCurrent(const VXBaseDataSourceContext *ctx) +{ + return VXBaseDataSource_cthiz(ctx)->currentInput; +} + +bool VXBaseDataSource_IsEndOfInput(const VXBaseDataSourceContext *ctx) +{ + assert(VXBaseDataSource_cthiz(ctx)->isEndOfInput); + return VXBaseDataSource_cthiz(ctx)->isEndOfInput(ctx); +} + +uint64_t VXBaseDataSource_GetPosition(const VXBaseDataSourceContext *ctx) +{ + assert(VXBaseDataSource_cthiz(ctx)->getPosition); + return VXBaseDataSource_cthiz(ctx)->getPosition(ctx); +} + +bool VXBaseDataSource_SetPosition(VXBaseDataSourceContext *ctx, uint64_t position) +{ + assert(VXBaseDataSource_thiz(ctx)->setPosition); + return VXBaseDataSource_thiz(ctx)->setPosition(ctx, position); +} + +/* VXMemoryDataSource -------------------------------------------------------------------------- */ + +void VXMemoryDataSource_Construct( + VXBaseDataSourceContext *ctx, const void* buffer, size_t bufferLen) +{ + VXBaseDataSource_Construct(ctx); + VXMemoryDataSource *thiz = VXMemoryDataSource_thiz(ctx); + + thiz->super.destruct = &VXMemoryDataSource_Destruct; + thiz->super.internalInputPeek = &VXMemoryDataSource_InternalInputPeek; + thiz->super.internalInputNext = &VXMemoryDataSource_InternalInputNext; + thiz->super.isEndOfInput = &VXMemoryDataSource_IsEndOfInput; + thiz->super.getPosition = &VXMemoryDataSource_GetPosition; + thiz->super.setPosition = &VXMemoryDataSource_SetPosition; + + thiz->inputBuffer = buffer; + thiz->inputBufferLen = bufferLen; + thiz->inputBufferPos = 0; +} + +void VXMemoryDataSource_Destruct(VXBaseDataSourceContext *ctx) +{ + VXMemoryDataSource *thiz = VXMemoryDataSource_thiz(ctx); + + // Nothing to destruct ourselfes, just call parent destructor + VXBaseDataSource_Destruct(ctx); +} + +VXBaseDataSourceContext* VXMemoryDataSource_Create( + const void* buffer, size_t bufferLen) +{ + VXMemoryDataSource *thiz = malloc(sizeof(VXMemoryDataSource)); + VXBaseDataSourceContext *ctx = malloc(sizeof(VXBaseDataSourceContext)); + + ctx->d.type = TYPE_MEMORYDATASOURCE; + ctx->d.ptr = thiz; + + VXMemoryDataSource_Construct(ctx, buffer, bufferLen); + + return ctx; +} + +static uint8_t VXMemoryDataSource_InternalInputPeek(VXBaseDataSourceContext *ctx) +{ + VXMemoryDataSource *thiz = VXMemoryDataSource_thiz(ctx); + return *((const uint8_t*)thiz->inputBuffer + thiz->inputBufferPos); +} + +static uint8_t VXMemoryDataSource_InternalInputNext(VXBaseDataSourceContext *ctx) +{ + VXMemoryDataSource *thiz = VXMemoryDataSource_thiz(ctx); + ++thiz->inputBufferPos; + return *((const uint8_t*)thiz->inputBuffer + thiz->inputBufferPos - 1); +} + +static bool VXMemoryDataSource_IsEndOfInput(const VXBaseDataSourceContext *ctx) +{ + const VXMemoryDataSource *thiz = VXMemoryDataSource_cthiz(ctx); + return (thiz->inputBufferPos >= thiz->inputBufferLen); +} + +static uint64_t VXMemoryDataSource_GetPosition(const VXBaseDataSourceContext *ctx) +{ + return VXMemoryDataSource_cthiz(ctx)->inputBufferPos; +} + +static bool VXMemoryDataSource_SetPosition(VXBaseDataSourceContext *ctx, uint64_t position) +{ + VXMemoryDataSource *thiz = VXMemoryDataSource_thiz(ctx); + thiz->inputBufferPos = position; + return thiz->super.isEndOfInput(ctx); +} + +/* VXInstructionDecoder ------------------------------------------------------------------------ */ + +void VXInstructionDecoder_Construct( + VXInstructionDecoderContext *ctx, + VXBaseDataSourceContext *input, + VXDisassemblerMode disassemblerMode, + VXInstructionSetVendor preferredVendor, + uint64_t instructionPointer) +{ + VXInstructionDecoder *thiz = VXInstructionDecoder_thiz(ctx); + + thiz->dataSource = input; + thiz->disassemblerMode = disassemblerMode; + thiz->preferredVendor = preferredVendor; + thiz->instructionPointer = instructionPointer; +} + +void VXInstructionDecoder_Destruct(VXInstructionDecoderContext *ctx) +{ + +} + +VXInstructionDecoderContext* VXInstructionDecoder_Create(void) +{ + return VXInstructionDecoder_CreateEx(NULL, DM_M32BIT, ISV_ANY, 0); +} + +VXInstructionDecoderContext* VXInstructionDecoder_CreateEx( + VXBaseDataSourceContext *input, + VXDisassemblerMode disassemblerMode, + VXInstructionSetVendor preferredVendor, + uint64_t instructionPointer) +{ + VXInstructionDecoder *thiz = malloc(sizeof(VXInstructionDecoder)); + VXInstructionDecoderContext *ctx = malloc(sizeof(VXInstructionDecoderContext)); + + ctx->d.ptr = thiz; + ctx->d.type = TYPE_INSTRUCTIONDECODER; + + VXInstructionDecoder_Construct(ctx, input, disassemblerMode, + preferredVendor, instructionPointer); + + return ctx; +} + +void VXInstructionDecoder_Release(VXInstructionDecoderContext *ctx) +{ + VXInstructionDecoder_Destruct(ctx); + + free(ctx->d.ptr); + free(ctx); +} + +static uint8_t VXInstructionDecoder_InputPeek( + VXInstructionDecoderContext *ctx, VXInstructionInfo *info) +{ + VXInstructionDecoder *thiz = VXInstructionDecoder_thiz(ctx); + + if (!thiz->dataSource) + { + info->flags |= IF_ERROR_END_OF_INPUT; + return 0; + } + + return VXBaseDataSource_InputPeek(thiz->dataSource, info); +} + +#define VXINSTRUCTIONDECODER_INPUTNEXT_N(n) \ + static uint##n##_t VXInstructionDecoder_InputNext##n( \ + VXInstructionDecoderContext *ctx, VXInstructionInfo *info) \ + { \ + VXInstructionDecoder *thiz = VXInstructionDecoder_thiz(ctx); \ + \ + if (!thiz->dataSource) \ + { \ + info->flags |= IF_ERROR_END_OF_INPUT; \ + return 0; \ + } \ + \ + return VXBaseDataSource_InputNext##n(thiz->dataSource, info); \ + } + +VXINSTRUCTIONDECODER_INPUTNEXT_N(8) +VXINSTRUCTIONDECODER_INPUTNEXT_N(16) +VXINSTRUCTIONDECODER_INPUTNEXT_N(32) +VXINSTRUCTIONDECODER_INPUTNEXT_N(64) +#undef VXINSTRUCTIONDECODER_INPUTNEXT_N + +static uint8_t VXInstructionDecoder_InputCurrent(const VXInstructionDecoderContext *ctx) +{ + const VXInstructionDecoder *thiz = VXInstructionDecoder_cthiz(ctx); + + if (!thiz->dataSource) + { + return 0; + } + + return VXBaseDataSource_InputCurrent(thiz->dataSource); +} + +VXBaseDataSourceContext* VXInstructionDecoder_GetDataSource( + const VXInstructionDecoderContext *ctx) +{ + return VXInstructionDecoder_cthiz(ctx)->dataSource; +} + +void VXInstructionDecoder_SetDataSource( + VXInstructionDecoderContext *ctx, VXBaseDataSourceContext *input) +{ + VXInstructionDecoder_thiz(ctx)->dataSource = input; +} + +VXDisassemblerMode VXInstructionDecoder_GetDisassemblerMode( + const VXInstructionDecoderContext *ctx) +{ + return VXInstructionDecoder_cthiz(ctx)->disassemblerMode; +} + +void VXInstructionDecoder_SetDisassemblerMode(VXInstructionDecoderContext *ctx, + VXDisassemblerMode disassemblerMode) +{ + VXInstructionDecoder_thiz(ctx)->disassemblerMode = disassemblerMode; +} + +VXInstructionSetVendor VXInstructionDecoder_GetPreferredVendor( + const VXInstructionDecoderContext *ctx) +{ + return VXInstructionDecoder_cthiz(ctx)->preferredVendor; +} + +void VXInstructionDecoder_SetPreferredVendor(VXInstructionDecoderContext *ctx, + VXInstructionSetVendor preferredVendor) +{ + VXInstructionDecoder_thiz(ctx)->preferredVendor = preferredVendor; +} + +uint64_t VXInstructionDecoder_GetInstructionPointer( + const VXInstructionDecoderContext *ctx) +{ + return VXInstructionDecoder_cthiz(ctx)->instructionPointer; +} + +void VXInstructionDecoder_SetInstructionPointer(VXInstructionDecoderContext *ctx, + uint64_t instructionPointer) +{ + VXInstructionDecoder_thiz(ctx)->instructionPointer = instructionPointer; +} + +static bool VXInstructionDecoder_DecodeRegisterOperand( + const VXInstructionDecoderContext *ctx, VXInstructionInfo *info, VXOperandInfo *operand, + VXRegisterClass registerClass, uint8_t registerId, VXDefinedOperandSize operandSize) +{ + VXRegister reg = REG_NONE; + uint16_t size = VXInstructionDecoder_GetEffectiveOperandSize(ctx, info, operandSize); + const VXInstructionDecoder *thiz = VXInstructionDecoder_cthiz(ctx); + + switch (registerClass) + { + case RC_GENERAL_PURPOSE: + switch (size) + { + case 64: + reg = REG_RAX + registerId; + break; + case 32: + reg = REG_EAX + registerId; + break; + case 16: + reg = REG_AX + registerId; + break; + case 8: + // TODO: Only REX? Or VEX too? + if (thiz->disassemblerMode == DM_M64BIT && (info->flags & IF_PREFIX_REX)) + { + if (registerId >= 4) + { + reg = REG_SPL + (registerId - 4); + } + else + { + reg = REG_AL + registerId; + } + } + else + { + reg = REG_AL + registerId; + } + break; + case 0: + // TODO: Error? + reg = REG_NONE; + break; + default: + assert(0); + } + break; + case RC_MMX: + reg = REG_MM0 + (registerId & 0x07); + break; + case RC_CONTROL: + reg = REG_CR0 + registerId; + break; + case RC_DEBUG: + reg = REG_DR0 + registerId; + break; + case RC_SEGMENT: + if ((registerId & 7) > 5) + { + info->flags |= IF_ERROR_OPERAND; + return false; + } + reg = REG_ES + (registerId & 0x07); + break; + case RC_XMM: + reg = registerId + ((size == 256) ? REG_YMM0 : REG_XMM0); + break; + default: + assert(0); + } + + operand->type = OPTYPE_REGISTER; + operand->base = reg; + operand->size = size; + + return true; +} + +static bool VXInstructionDecoder_DecodeRegisterMemoryOperand(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info, VXOperandInfo *operand, VXRegisterClass registerClass, + VXDefinedOperandSize operandSize) +{ + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + assert(info->flags & IF_MODRM); + // Decode register operand + if (info->modrm_mod == 3) + { + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, registerClass, + info->modrm_rm_ext, operandSize); + } + // Decode memory operand + uint8_t offset = 0; + operand->type = OPTYPE_MEMORY; + operand->size = VXInstructionDecoder_GetEffectiveOperandSize(ctx, info, operandSize); + switch (info->address_mode) + { + case 16: + { + static const VXRegister bases[] = { + REG_BX, REG_BX, REG_BP, REG_BP, + REG_SI, REG_DI, REG_BP, REG_BX }; + static const VXRegister indices[] = { + REG_SI, REG_DI, REG_SI, REG_DI, + REG_NONE, REG_NONE, REG_NONE, REG_NONE }; + operand->base = bases[info->modrm_rm_ext & 0x07]; + operand->index = indices[info->modrm_rm_ext & 0x07]; + operand->scale = 0; + if (info->modrm_mod == 0 && info->modrm_rm_ext == 6) { + offset = 16; + operand->base = REG_NONE; + } else if (info->modrm_mod == 1) { + offset = 8; + } else if (info->modrm_mod == 2) { + offset = 16; + } + } + break; + case 32: + operand->base = REG_EAX + info->modrm_rm_ext; + switch (info->modrm_mod) + { + case 0: + if (info->modrm_rm_ext == 5) + { + operand->base = REG_NONE; + offset = 32; + } + break; + case 1: + offset = 8; + break; + case 2: + offset = 32; + break; + default: + assert(0); + } + if ((info->modrm_rm_ext & 0x07) == 4) + { + if (!VXInstructionDecoder_DecodeSIB(ctx, info)) + { + return false; + } + operand->base = REG_EAX + info->sib_base_ext; + operand->index = REG_EAX + info->sib_index_ext; + operand->scale = (1 << info->sib_scale) & ~1; + if (operand->index == REG_ESP) + { + operand->index = REG_NONE; + operand->scale = 0; + } + if (operand->base == REG_EBP) + { + if (info->modrm_mod == 0) + { + operand->base = REG_NONE; + } + + if (info->modrm_mod == 1) + { + offset = 8; + } + else + { + offset = 32; + } + } + } + else + { + operand->index = REG_NONE; + operand->scale = 0; + } + break; + case 64: + operand->base = REG_RAX + info->modrm_rm_ext; + switch (info->modrm_mod) + { + case 0: + if ((info->modrm_rm_ext & 0x07) == 5) + { + info->flags |= IF_RELATIVE; + operand->base = REG_RIP; + offset = 32; + } + break; + case 1: + offset = 8; + break; + case 2: + offset = 32; + break; + default: + assert(0); + } + if ((info->modrm_rm_ext & 0x07) == 4) + { + if (!VXInstructionDecoder_DecodeSIB(ctx, info)) + { + return false; + } + + operand->base = REG_RAX + info->sib_base_ext; + operand->index = REG_RAX + info->sib_index_ext; + if (operand->index == REG_RSP) + { + operand->index = REG_NONE; + operand->scale = 0; + } + else + { + operand->scale = (1 << info->sib_scale) & ~1; + } + + if ((operand->base == REG_RBP) || (operand->base == REG_R13)) + { + if (info->modrm_mod == 0) + { + operand->base = REG_NONE; + } + + if (info->modrm_mod == 1) + { + offset = 8; + } + else + { + offset = 32; + } + } + } else + { + operand->index = REG_NONE; + operand->scale = 0; + } + break; + } + if (offset) + { + if (!VXInstructionDecoder_DecodeDisplacement(ctx, info, operand, offset)) + { + return false; + } + } else + { + operand->offset = 0; + } + return true; +} + +static bool VXInstructionDecoder_DecodeImmediate(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info, VXOperandInfo *operand, VXDefinedOperandSize operandSize) +{ + operand->type = OPTYPE_IMMEDIATE; + operand->size = VXInstructionDecoder_GetEffectiveOperandSize(ctx, info, operandSize); + switch (operand->size) + { + case 8: + operand->lval.ubyte = VXInstructionDecoder_InputNext8(ctx, info); + break; + case 16: + operand->lval.uword = VXInstructionDecoder_InputNext16(ctx, info); + break; + case 32: + operand->lval.udword = VXInstructionDecoder_InputNext32(ctx, info); + break; + case 64: + operand->lval.uqword = VXInstructionDecoder_InputNext64(ctx, info); + break; + default: + // TODO: Maybe return false instead of assert + assert(0); + } + if (!operand->lval.uqword && (info->flags & IF_ERROR_MASK)) + { + return false; + } + return true; +} + +static bool VXInstructionDecoder_DecodeDisplacement(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info, VXOperandInfo *operand, uint8_t size) +{ + switch (size) + { + case 8: + operand->offset = 8; + operand->lval.ubyte = VXInstructionDecoder_InputNext8(ctx, info); + break; + case 16: + operand->offset = 16; + operand->lval.uword = VXInstructionDecoder_InputNext16(ctx, info); + break; + case 32: + operand->offset = 32; + operand->lval.udword = VXInstructionDecoder_InputNext32(ctx, info); + break; + case 64: + operand->offset = 64; + operand->lval.uqword = VXInstructionDecoder_InputNext64(ctx, info); + break; + default: + // TODO: Maybe return false instead of assert + assert(0); + } + if (!operand->lval.uqword && (info->flags & IF_ERROR_MASK)) + { + return false; + } + return true; +} + +static bool VXInstructionDecoder_DecodeModrm(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info) +{ + if (!(info->flags & IF_MODRM)) + { + info->modrm = VXInstructionDecoder_InputNext8(ctx, info); + if (!info->modrm && (info->flags & IF_ERROR_MASK)) + { + return false; + } + info->flags |= IF_MODRM; + info->modrm_mod = (info->modrm >> 6) & 0x03; + info->modrm_reg = (info->modrm >> 3) & 0x07; + info->modrm_rm = (info->modrm >> 0) & 0x07; + } + + // The @c decodeModrm method might get called multiple times during the opcode- and the + // operand decoding, but the effective REX/VEX fields are not initialized before the end of + // the opcode decoding process-> As the extended values are only used for the operand decoding, + // we should have no problems-> + info->modrm_reg_ext = (info->eff_rexvex_r << 3) | info->modrm_reg; + info->modrm_rm_ext = (info->eff_rexvex_b << 3) | info->modrm_rm; + return true; +} + +static bool VXInstructionDecoder_DecodeSIB(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info) +{ + assert(info->flags & IF_MODRM); + assert((info->modrm_rm & 0x7) == 4); + if (!(info->flags & IF_SIB)) + { + info->sib = VXInstructionDecoder_InputNext8(ctx, info); + if (!info->sib && (info->flags & IF_ERROR_MASK)) + { + return false; + } + info->flags |= IF_SIB; + info->sib_scale = (info->sib >> 6) & 0x03; + info->sib_index = (info->sib >> 3) & 0x07; + info->sib_base = (info->sib >> 0) & 0x07; + // The @c decodeSib method is only called during the operand decoding, so updating the + // extended values at this point should be safe-> + info->sib_index_ext = (info->eff_rexvex_x << 3) | info->sib_index; + info->sib_base_ext = (info->eff_rexvex_b << 3) | info->sib_base; + } + return true; +} + +static bool VXInstructionDecoder_DecodeVex(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info) +{ + if (!(info->flags & IF_PREFIX_VEX)) + { + info->vex_op = VXInstructionDecoder_InputCurrent(ctx); + switch (info->vex_op) + { + case 0xC4: + info->vex_b1 = VXInstructionDecoder_InputNext8(ctx, info); + if (!info->vex_b1 || (info->flags & IF_ERROR_MASK)) + { + return false; + } + + info->vex_b2 = VXInstructionDecoder_InputNext8(ctx, info); + if (!info->vex_b2 || (info->flags & IF_ERROR_MASK)) + { + return false; + } + + info->vex_r = (info->vex_b1 >> 7) & 0x01; + info->vex_x = (info->vex_b1 >> 6) & 0x01; + info->vex_b = (info->vex_b1 >> 5) & 0x01; + info->vex_m_mmmm = (info->vex_b1 >> 0) & 0x1F; + info->vex_w = (info->vex_b2 >> 7) & 0x01; + info->vex_vvvv = (info->vex_b2 >> 3) & 0x0F; + info->vex_l = (info->vex_b2 >> 2) & 0x01; + info->vex_pp = (info->vex_b2 >> 0) & 0x03; + break; + case 0xC5: + info->vex_b1 = VXInstructionDecoder_InputNext8(ctx, info); + if (!info->vex_b1 || (info->flags & IF_ERROR_MASK)) + { + return false; + } + + info->vex_r = (info->vex_b1 >> 7) & 0x01; + info->vex_x = 1; + info->vex_b = 1; + info->vex_m_mmmm = 1; + info->vex_w = 0; + info->vex_vvvv = (info->vex_b1 >> 3) & 0x0F; + info->vex_l = (info->vex_b1 >> 2) & 0x01; + info->vex_pp = (info->vex_b1 >> 0) & 0x03; + break; + default: + assert(0); + } + if (info->vex_m_mmmm > 3) + { + // TODO: Add proper error flag + info->flags |= IF_ERROR_MASK; + return false; + } + info->flags |= IF_PREFIX_VEX; + } + return true; +} + +static uint16_t VXInstructionDecoder_GetEffectiveOperandSize( + const VXInstructionDecoderContext *ctx, const VXInstructionInfo *info, + VXDefinedOperandSize operandSize) +{ + const VXInstructionDecoder *thiz = VXInstructionDecoder_cthiz(ctx); + + switch (operandSize) + { + case DOS_NA: + return 0; + case DOS_Z: + return (info->operand_mode == 16) ? 16 : 32; + case DOS_V: + return info->operand_mode; + case DOS_Y: + return (info->operand_mode == 16) ? 32 : info->operand_mode; + case DOS_X: + assert(info->vex_op != 0); + return (info->eff_vex_l) ? + VXInstructionDecoder_GetEffectiveOperandSize(ctx, info, DOS_QQ) : + VXInstructionDecoder_GetEffectiveOperandSize(ctx, info, DOS_DQ); + case DOS_RDQ: + return (thiz->disassemblerMode == DM_M64BIT) ? 64 : 32; + default: + return VXGetSimpleOperandSize(operandSize); + } +} + +static bool VXInstructionDecoder_DecodeOperands(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info) +{ + assert(info->instrDefinition); + // Always try to decode the first operand + if (!VXInstructionDecoder_DecodeOperand(ctx, info, &info->operand[0], + info->instrDefinition->operand[0].type, info->instrDefinition->operand[0].size)) + { + return false; + } + + // Decode other operands on demand + for (unsigned int i = 1; i < 4; ++i) + { + if (info->operand[i - 1].type != OPTYPE_NONE) + { + if (!VXInstructionDecoder_DecodeOperand(ctx, info, &info->operand[i], + info->instrDefinition->operand[i].type, info->instrDefinition->operand[i].size)) + { + return false; + } + } + } + + // Update operand access modes + for (unsigned int i = 0; i < 4; ++i) + { + if (info->operand[i].type != OPTYPE_NONE) + { + info->operand[i].access_mode = OPACCESSMODE_READ; + if (i == 0) + { + if (info->instrDefinition->flags & IDF_OPERAND1_WRITE) + { + info->operand[0].access_mode = OPACCESSMODE_WRITE; + } + else if (info->instrDefinition->flags & IDF_OPERAND1_READWRITE) + { + info->operand[0].access_mode = OPACCESSMODE_READWRITE; + } + } + else if (i == 1) + { + if (info->instrDefinition->flags & IDF_OPERAND2_WRITE) + { + info->operand[1].access_mode = OPACCESSMODE_WRITE; + } + else if (info->instrDefinition->flags & IDF_OPERAND2_READWRITE) + { + info->operand[1].access_mode = OPACCESSMODE_READWRITE; + } + } + } + } + + return true; +} + +static bool VXInstructionDecoder_DecodeOperand(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info, VXOperandInfo *operand, VXDefinedOperandType operandType, + VXDefinedOperandSize operandSize) +{ + const VXInstructionDecoder *thiz = VXInstructionDecoder_thiz(ctx); + + operand->type = OPTYPE_NONE; + switch (operandType) + { + case DOT_NONE: + break; + case DOT_A: + operand->type = OPTYPE_POINTER; + if (info->operand_mode == 16) + { + operand->size = 32; + operand->lval.ptr.off = VXInstructionDecoder_InputNext16(ctx, info); + operand->lval.ptr.seg = VXInstructionDecoder_InputNext16(ctx, info); + } + else + { + operand->size = 48; + operand->lval.ptr.off = VXInstructionDecoder_InputNext32(ctx, info); + operand->lval.ptr.seg = VXInstructionDecoder_InputNext16(ctx, info); + } + + if ((!operand->lval.ptr.off || !operand->lval.ptr.seg) && (info->flags & IF_ERROR_MASK)) + { + return false; + } + + break; + case DOT_C: + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_CONTROL, + info->modrm_reg_ext, operandSize); + case DOT_D: + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_DEBUG, + info->modrm_reg_ext, operandSize); + case DOT_F: + // TODO: FAR flag + case DOT_M: + // ModR/M byte may refer only to a register + if (info->modrm_mod == 3) + { + info->flags |= IF_ERROR_OPERAND; + return false; + } + case DOT_E: + return VXInstructionDecoder_DecodeRegisterMemoryOperand(ctx, info, operand, + RC_GENERAL_PURPOSE, operandSize); + case DOT_G: + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_GENERAL_PURPOSE, + info->modrm_reg_ext, operandSize); + case DOT_H: + assert(info->vex_op != 0); + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_XMM, + (0xF & ~info->vex_vvvv), operandSize); + case DOT_sI: + operand->signed_lval = true; + case DOT_I: + return VXInstructionDecoder_DecodeImmediate(ctx, info, operand, operandSize); + case DOT_I1: + operand->type = OPTYPE_CONSTANT; + operand->lval.udword = 1; + break; + case DOT_J: + if (!VXInstructionDecoder_DecodeImmediate(ctx, info, operand, operandSize)) + { + return false; + } + operand->type = OPTYPE_REL_IMMEDIATE; + operand->signed_lval = true; + info->flags |= IF_RELATIVE; + break; + case DOT_L: + { + assert(info->vex_op != 0); + uint8_t imm = VXInstructionDecoder_InputNext8(ctx, info); + if (!imm && (info->flags & IF_ERROR_MASK)) + { + return false; + } + uint8_t mask = (thiz->disassemblerMode == DM_M64BIT) ? 0xF : 0x7; + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_XMM, + mask & (imm >> 4), operandSize); + } + case DOT_MR: + return VXInstructionDecoder_DecodeRegisterMemoryOperand(ctx, info, operand, + RC_GENERAL_PURPOSE, info->modrm_mod == 3 ? + VXGetComplexOperandRegSize(operandSize) : VXGetComplexOperandMemSize(operandSize)); + case DOT_MU: + return VXInstructionDecoder_DecodeRegisterMemoryOperand(ctx, info, operand, RC_XMM, + info->modrm_mod == 3 ? + VXGetComplexOperandRegSize(operandSize) : VXGetComplexOperandMemSize(operandSize)); + case DOT_N: + // ModR/M byte may refer only to memory + if (info->modrm_mod != 3) + { + info->flags |= IF_ERROR_OPERAND; + return false; + } + case DOT_Q: + return VXInstructionDecoder_DecodeRegisterMemoryOperand(ctx, info, operand, RC_MMX, + operandSize); + case DOT_O: + operand->type = OPTYPE_MEMORY; + operand->base = REG_NONE; + operand->index = REG_NONE; + operand->scale = 0; + operand->size = VXInstructionDecoder_GetEffectiveOperandSize(ctx, info, operandSize); + return VXInstructionDecoder_DecodeDisplacement(ctx, info, operand, info->address_mode); + case DOT_P: + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_MMX, + info->modrm_reg_ext, operandSize); + case DOT_R: + // ModR/M byte may refer only to memory + if (info->modrm_mod != 3) + { + info->flags |= IF_ERROR_OPERAND; + return false; + } + return VXInstructionDecoder_DecodeRegisterMemoryOperand(ctx, info, operand, + RC_GENERAL_PURPOSE, operandSize); + case DOT_S: + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_SEGMENT, + info->modrm_reg_ext, operandSize); + case DOT_U: + // ModR/M byte may refer only to memory + if (info->modrm_mod != 3) + { + info->flags |= IF_ERROR_OPERAND; + return false; + } + case DOT_W: + return VXInstructionDecoder_DecodeRegisterMemoryOperand(ctx, info, operand, RC_XMM, + operandSize); + case DOT_V: + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_XMM, + info->modrm_reg_ext, operandSize); + case DOT_R0: + case DOT_R1: + case DOT_R2: + case DOT_R3: + case DOT_R4: + case DOT_R5: + case DOT_R6: + case DOT_R7: + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_GENERAL_PURPOSE, + ((info->eff_rexvex_b << 3) | operandType - DOT_R0), operandSize); + case DOT_AL: + case DOT_AX: + case DOT_EAX: + case DOT_RAX: + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_GENERAL_PURPOSE, + 0, operandSize); + case DOT_CL: + case DOT_CX: + case DOT_ECX: + case DOT_RCX: + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_GENERAL_PURPOSE, + 1, operandSize); + case DOT_DL: + case DOT_DX: + case DOT_EDX: + case DOT_RDX: + return VXInstructionDecoder_DecodeRegisterOperand(ctx, info, operand, RC_GENERAL_PURPOSE, + 2, operandSize); + case DOT_ES: + case DOT_CS: + case DOT_SS: + case DOT_DS: + case DOT_FS: + case DOT_GS: + if (thiz->disassemblerMode == DM_M64BIT) + { + if ((operandType != DOT_FS) && (operandType != DOT_GS)) + { + info->flags |= IF_ERROR_OPERAND; + return false; + } + } + operand->type = OPTYPE_REGISTER; + operand->base = operandType - DOT_ES + REG_ES; + operand->size = 16; + break; + case DOT_ST0: + case DOT_ST1: + case DOT_ST2: + case DOT_ST3: + case DOT_ST4: + case DOT_ST5: + case DOT_ST6: + case DOT_ST7: + operand->type = OPTYPE_REGISTER; + operand->base = operandType - DOT_ST0 + REG_ST0; + operand->size = 80; + break; + default: + assert(0); + } + return true; +} + +static void VXInstructionDecoder_ResolveOperandAndAddressMode( + const VXInstructionDecoderContext *ctx, VXInstructionInfo *info) +{ + const VXInstructionDecoder *thiz = VXInstructionDecoder_cthiz(ctx); + + assert(info->instrDefinition); + switch (thiz->disassemblerMode) + { + case DM_M16BIT: + info->operand_mode = (info->flags & IF_PREFIX_OPERAND_SIZE) ? 32 : 16; + info->address_mode = (info->flags & IF_PREFIX_ADDRESS_SIZE) ? 32 : 16; + break; + case DM_M32BIT: + info->operand_mode = (info->flags & IF_PREFIX_OPERAND_SIZE) ? 16 : 32; + info->address_mode = (info->flags & IF_PREFIX_ADDRESS_SIZE) ? 16 : 32; + break; + case DM_M64BIT: + if (info->eff_rexvex_w) + { + info->operand_mode = 64; + } + else if ((info->flags & IF_PREFIX_OPERAND_SIZE)) + { + info->operand_mode = 16; + } + else + { + info->operand_mode = (info->instrDefinition->flags & IDF_DEFAULT_64) ? 64 : 32; + } + + info->address_mode = (info->flags & IF_PREFIX_ADDRESS_SIZE) ? 32 : 64; + break; + default: + assert(0); + } +} + +static void VXInstructionDecoder_CalculateEffectiveRexVexValues( + const VXInstructionDecoderContext *ctx, VXInstructionInfo *info) +{ + assert(info->instrDefinition); + uint8_t rex = info->rex; + if (info->flags & IF_PREFIX_VEX) + { + switch (info->vex_op) + { + case 0xC4: + rex = ((~(info->vex_b1 >> 5) & 0x07) | ((info->vex_b2 >> 4) & 0x08)); + break; + case 0xC5: + rex = (~(info->vex_b1 >> 5)) & 4; + break; + default: + assert(0); + } + } + rex &= (info->instrDefinition->flags & 0x000F); + info->eff_rexvex_w = (rex >> 3) & 0x01; + info->eff_rexvex_r = (rex >> 2) & 0x01; + info->eff_rexvex_x = (rex >> 1) & 0x01; + info->eff_rexvex_b = (rex >> 0) & 0x01; + info->eff_vex_l = info->vex_l && (info->instrDefinition->flags & IDF_ACCEPTS_VEXL); +} + +static bool VXInstructionDecoder_DecodePrefixes(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info) +{ + VXInstructionDecoder *thiz = VXInstructionDecoder_thiz(ctx); + + bool done = false; + do + { + switch (VXInstructionDecoder_InputPeek(ctx, info)) + { + case 0xF0: + info->flags |= IF_PREFIX_LOCK; + break; + case 0xF2: + // REPNZ and REPZ are mutally exclusive. The one that comes later has precedence. + info->flags |= IF_PREFIX_REP; + info->flags &= ~IF_PREFIX_REPNE; + break; + case 0xF3: + // REPNZ and REPZ are mutally exclusive. The one that comes later has precedence. + info->flags |= IF_PREFIX_REP; + info->flags &= ~IF_PREFIX_REPNE; + break; + case 0x2E: + info->flags |= IF_PREFIX_SEGMENT; + info->segment = REG_CS; + break; + case 0x36: + info->flags |= IF_PREFIX_SEGMENT; + info->segment = REG_SS; + break; + case 0x3E: + info->flags |= IF_PREFIX_SEGMENT; + info->segment = REG_DS; + break; + case 0x26: + info->flags |= IF_PREFIX_SEGMENT; + info->segment = REG_ES; + break; + case 0x64: + info->flags |= IF_PREFIX_SEGMENT; + info->segment = REG_FS; + break; + case 0x65: + info->flags |= IF_PREFIX_SEGMENT; + info->segment = REG_GS; + break; + case 0x66: + info->flags |= IF_PREFIX_OPERAND_SIZE; + break; + case 0x67: + info->flags |= IF_PREFIX_ADDRESS_SIZE; + break; + default: + if ((thiz->disassemblerMode == DM_M64BIT) && + (VXInstructionDecoder_InputCurrent(ctx) & 0xF0) == 0x40) + { + info->flags |= IF_PREFIX_REX; + info->rex = VXInstructionDecoder_InputCurrent(ctx); + } + else + { + done = true; + } + break; + } + // Increase the input offset, if a prefix was found + if (!done) + { + if (!VXInstructionDecoder_InputNext8(ctx, info) && (info->flags & IF_ERROR_MASK)) + { + return false; + } + } + } while (!done); + // TODO: Check for multiple prefixes of the same group + // Parse REX Prefix + if (info->flags & IF_PREFIX_REX) + { + info->rex_w = (info->rex >> 3) & 0x01; + info->rex_r = (info->rex >> 2) & 0x01; + info->rex_x = (info->rex >> 1) & 0x01; + info->rex_b = (info->rex >> 0) & 0x01; + } + return true; +} + +static bool VXInstructionDecoder_DecodeOpcode(VXInstructionDecoderContext *ctx, + VXInstructionInfo *info) +{ + VXInstructionDecoder *thiz = VXInstructionDecoder_thiz(ctx); + + // Read first opcode byte + if (!VXInstructionDecoder_InputNext8(ctx, info) && (info->flags & IF_ERROR_MASK)) + { + return false; + } + + // Update instruction info + info->opcode[0] = VXInstructionDecoder_InputCurrent(ctx); + info->opcode_length = 1; + + // Iterate through opcode tree + VXOpcodeTreeNode node = VXGetOpcodeTreeChild(VXGetOpcodeTreeRoot(), + VXInstructionDecoder_InputCurrent(ctx)); + VXOpcodeTreeNodeType nodeType; + + do + { + uint16_t index = 0; + nodeType = VXGetOpcodeNodeType(node); + switch (nodeType) + { + case OTNT_INSTRUCTION_DEFINITION: + { + // Check for invalid instruction + if (VXGetOpcodeNodeValue(node) == 0) + { + info->flags |= IF_ERROR_INVALID; + return false; + } + // Get instruction definition + const VXInstructionDefinition *instrDefinition = VXGetInstructionDefinition(node); + // Check for invalid 64 bit instruction + if ((thiz->disassemblerMode == DM_M64BIT) && + (instrDefinition->flags & IDF_INVALID_64)) + { + info->flags |= IF_ERROR_INVALID_64; + return false; + } + // Update instruction info + info->instrDefinition = instrDefinition; + info->mnemonic = instrDefinition->mnemonic; + // Update effective REX/VEX values + VXInstructionDecoder_CalculateEffectiveRexVexValues(ctx, info); + // Resolve operand and address mode + VXInstructionDecoder_ResolveOperandAndAddressMode(ctx, info); + // Decode operands + if (!VXInstructionDecoder_DecodeOperands(ctx, info)) + { + return false; + } + } + return true; + case OTNT_TABLE: + // Read next opcode byte + if (!VXInstructionDecoder_InputNext8(ctx, info) && (info->flags & IF_ERROR_MASK)) + { + return false; + } + // Update instruction info + assert((info->opcode_length > 0) && (info->opcode_length < 3)); + info->opcode[info->opcode_length] = VXInstructionDecoder_InputCurrent(ctx); + info->opcode_length++; + // Set child node index for next iteration + index = VXInstructionDecoder_InputCurrent(ctx); + break; + case OTNT_MODRM_MOD: + // Decode modrm byte + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + index = (info->modrm_mod == 0x3) ? 1 : 0; + break; + case OTNT_MODRM_REG: + // Decode modrm byte + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + index = info->modrm_reg; + break; + case OTNT_MODRM_RM: + // Decode modrm byte + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + index = info->modrm_rm; + break; + case OTNT_MANDATORY: + // Check if there are any prefixes present + if (info->flags & IF_PREFIX_REP) + { + index = 1; // F2 + } + else if (info->flags & IF_PREFIX_REPNE) + { + index = 2; // F3 + } + else if (info->flags & IF_PREFIX_OPERAND_SIZE) + { + index = 3; // 66 + } + + if (VXGetOpcodeTreeChild(node, index) == 0) + { + index = 0; + } + + if (index && (VXGetOpcodeTreeChild(node, index) != 0)) + { + // Remove REP and REPNE prefix + info->flags &= ~IF_PREFIX_REP; + info->flags &= ~IF_PREFIX_REPNE; + // Remove OPERAND_SIZE prefix, if it was used as mandatory prefix for the + // instruction + if (index == 3) + { + info->flags &= ~IF_PREFIX_OPERAND_SIZE; + } + } + break; + case OTNT_X87: + // Decode modrm byte + if (!VXInstructionDecoder_DecodeModrm(ctx, info)) + { + return false; + } + index = info->modrm - 0xC0; + break; + case OTNT_ADDRESS_SIZE: + switch (thiz->disassemblerMode) + { + case DM_M16BIT: + index = (info->flags & IF_PREFIX_ADDRESS_SIZE) ? 1 : 0; + break; + case DM_M32BIT: + index = (info->flags & IF_PREFIX_ADDRESS_SIZE) ? 0 : 1; + break; + case DM_M64BIT: + index = (info->flags & IF_PREFIX_ADDRESS_SIZE) ? 1 : 2; + break; + default: + assert(0); + } + break; + case OTNT_OPERAND_SIZE: + switch (thiz->disassemblerMode) + { + case DM_M16BIT: + index = (info->flags & IF_PREFIX_OPERAND_SIZE) ? 1 : 0; + break; + case DM_M32BIT: + index = (info->flags & IF_PREFIX_OPERAND_SIZE) ? 0 : 1; + break; + case DM_M64BIT: + index = (info->rex_w) ? 2 : ((info->flags & IF_PREFIX_OPERAND_SIZE) ? 0 : 1); + break; + default: + assert(0); + } + break; + case OTNT_MODE: + index = (thiz->disassemblerMode != DM_M64BIT) ? 0 : 1; + break; + case OTNT_VENDOR: + switch (thiz->preferredVendor) + { + case ISV_ANY: + index = (VXGetOpcodeTreeChild(node, 0) != 0) ? 0 : 1; + break; + case ISV_INTEL: + index = 1; + break; + case ISV_AMD: + index = 0; + break; + default: + assert(0); + } + break; + case OTNT_AMD3DNOW: + { + // As all 3dnow instructions got the same operands and flag definitions, we just + // decode a random instruction and determine the specific opcode later-> + assert(VXGetOpcodeTreeChild(node, 0x0C) != 0); + const VXInstructionDefinition *instrDefinition = + VXGetInstructionDefinition(VXGetOpcodeTreeChild(node, 0x0C)); + // Update instruction info + info->instrDefinition = instrDefinition; + info->mnemonic = instrDefinition->mnemonic; + // Update effective REX/VEX values + VXInstructionDecoder_CalculateEffectiveRexVexValues(ctx, info); + // Resolve operand and address mode + VXInstructionDecoder_ResolveOperandAndAddressMode(ctx, info); + // Decode operands + if (!VXInstructionDecoder_DecodeOperands(ctx, info)) + { + return false; + } + // Read the actual 3dnow opcode + info->opcode[2] = VXInstructionDecoder_InputNext8(ctx, info); + if (!info->opcode[2] && (info->flags & IF_ERROR_MASK)) + { + return false; + } + // Update instruction info + instrDefinition = + VXGetInstructionDefinition(VXGetOpcodeTreeChild(node, info->opcode[2])); + if (!instrDefinition || + (instrDefinition->mnemonic == MNEM_INVALID)) + { + info->flags |= IF_ERROR_INVALID; + return false; + } + info->instrDefinition = instrDefinition; + info->mnemonic = instrDefinition->mnemonic; + // Update operand access modes + for (unsigned int i = 0; i < 4; ++i) + { + if (info->operand[i].type != OPTYPE_NONE) + { + info->operand[i - 1].access_mode = OPACCESSMODE_READ; + } + } + if (info->operand[0].type != OPTYPE_NONE) + { + if (info->instrDefinition->flags & IDF_OPERAND1_WRITE) + { + info->operand[0].access_mode = OPACCESSMODE_WRITE; + } else if (info->instrDefinition->flags & IDF_OPERAND1_READWRITE) + { + info->operand[0].access_mode = OPACCESSMODE_READWRITE; + } + } + if (info->operand[1].type != OPTYPE_NONE) + { + if (info->instrDefinition->flags & IDF_OPERAND2_WRITE) + { + info->operand[1].access_mode = OPACCESSMODE_WRITE; + } else if (info->instrDefinition->flags & IDF_OPERAND2_READWRITE) + { + info->operand[1].access_mode = OPACCESSMODE_READWRITE; + } + } + // Terminate loop + return true; + } + case OTNT_VEX: + if ((thiz->disassemblerMode == DM_M64BIT) + || (((VXInstructionDecoder_InputCurrent(ctx) >> 6) & 0x03) == 0x03)) + { + // Decode vex prefix + if (!VXInstructionDecoder_DecodeVex(ctx, info)) + { + return false; + } + + // Update instruction info (error cases are checked by the @c decodeVex method) + switch (info->vex_m_mmmm) + { + case 1: + info->opcode_length = 1; + info->opcode[0] = 0x0F; + break; + case 2: + info->opcode_length = 2; + info->opcode[0] = 0x0F; + info->opcode[1] = 0x38; + break; + case 3: + info->opcode_length = 2; + info->opcode[0] = 0x0F; + info->opcode[1] = 0x3A; + break; + } + + // Set child node index for next iteration + index = info->vex_m_mmmm + (info->vex_pp << 2); + } else + { + index = 0; + } + break; + case OTNT_VEXW: + assert(info->flags & IF_PREFIX_VEX); + index = info->vex_w; + break; + case OTNT_VEXL: + assert(info->flags & IF_PREFIX_VEX); + index = info->vex_l; + break; + default: + assert(0); + } + node = VXGetOpcodeTreeChild(node, index); + } while (nodeType != OTNT_INSTRUCTION_DEFINITION); + return false; +} + +bool VXInstructionDecoder_DecodeInstruction( + VXInstructionDecoderContext *ctx, + VXInstructionInfo *info) +{ + VXInstructionDecoder *thiz = VXInstructionDecoder_thiz(ctx); + + // Clear instruction info + memset(info, 0, sizeof(*info)); + + // Set disassembler mode flags + switch (thiz->disassemblerMode) + { + case DM_M16BIT: + info->flags |= IF_DISASSEMBLER_MODE_16; + break; + case DM_M32BIT: + info->flags |= IF_DISASSEMBLER_MODE_32; + break; + case DM_M64BIT: + info->flags |= IF_DISASSEMBLER_MODE_64; + break; + default: + assert(0); + } + + // Set instruction address + info->instrAddress = thiz->instructionPointer; + + // Decode + if (!VXInstructionDecoder_DecodePrefixes(ctx, info) + || !VXInstructionDecoder_DecodeOpcode(ctx, info)) + { + goto DecodeError; + } + + // SWAPGS is only valid in 64 bit mode + if ((info->mnemonic == MNEM_SWAPGS) && + (thiz->disassemblerMode != DM_M64BIT)) + { + info->flags &= IF_ERROR_INVALID; + goto DecodeError; + } + + // Handle aliases + if (info->mnemonic == MNEM_XCHG) + { + if ((info->operand[0].type == OPTYPE_REGISTER && + info->operand[0].base == REG_AX && + info->operand[1].type == OPTYPE_REGISTER && + info->operand[1].base == REG_AX) || + (info->operand[0].type == OPTYPE_REGISTER && + info->operand[0].base == REG_EAX && + info->operand[1].type == OPTYPE_REGISTER && + info->operand[1].base == REG_EAX)) + { + info->mnemonic = MNEM_NOP; + info->operand[0].type = OPTYPE_NONE; + info->operand[1].type = OPTYPE_NONE; + info->operand[0].access_mode = OPACCESSMODE_NA; + info->operand[1].access_mode = OPACCESSMODE_NA; + } + } + + if ((info->mnemonic == MNEM_NOP) && (info->flags & IF_PREFIX_REP)) + { + info->mnemonic = MNEM_PAUSE; + info->flags &= ~IF_PREFIX_REP; + } + + // Increment instruction pointer + thiz->instructionPointer += info->length; + // Set instruction pointer + info->instrPointer = thiz->instructionPointer; + return true; + +DecodeError: + ++thiz->instructionPointer; + + // Backup all error flags, the instruction length and the instruction address + uint32_t flags = info->flags & (IF_ERROR_MASK | 0x00000007); + uint8_t length = info->length; + uint8_t firstByte = info->data[0]; + uint64_t instrAddress = info->instrAddress; + + // Clear instruction info + memset(info, 0, sizeof(*info)); + + // Restore saved values + info->flags = flags; + info->length = length; + info->data[0] = firstByte; + info->instrAddress = instrAddress; + info->instrDefinition = VXGetInstructionDefinition(0); + + // Return with error, if the end of the input source was reached while decoding the + // invalid instruction + if (info->flags & IF_ERROR_END_OF_INPUT) + { + info->length = 0; + return false; + } + + // Decrement the input position, if more than one byte was read from the input data + // source while decoding the invalid instruction + if (info->length != 1) + { + VXBaseDataSource_SetPosition(thiz->dataSource, + VXBaseDataSource_GetPosition(thiz->dataSource) - info->length + 1); + info->length = 1; + } + + return true; +} + +/* ============================================================================================= */ \ No newline at end of file diff --git a/Bindings/C/VXInstructionDecoderC.cpp b/Bindings/C/VXInstructionDecoderC.cpp deleted file mode 100644 index 94aa7b1..0000000 --- a/Bindings/C/VXInstructionDecoderC.cpp +++ /dev/null @@ -1,259 +0,0 @@ -/************************************************************************************************** - - Verteron Disassembler Engine - Version 1.0 - - Remarks : Freeware, Copyright must be included - - Original Author : athre0z - Modifications : - - Last change : 04. February 2015 - - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - -**************************************************************************************************/ - -#include "VXInstructionDecoderC.h" -#include "VXInstructionDecoder.h" -#include "VXDisassemblerTypes.h" - -/* Helpers ===================================================================================== */ - -namespace -{ - -inline Verteron::VXBaseDataSource* VXBaseDataSource_CppPtr( - VXBaseDataSourceContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline const Verteron::VXBaseDataSource* VXBaseDataSource_CppPtr( - const VXBaseDataSourceContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline VXBaseDataSourceContext* VXBaseDataSource_CPtr( - Verteron::VXBaseDataSource *ptr) -{ - return reinterpret_cast(ptr); -} - -inline const VXBaseDataSourceContext* VXBaseDataSource_CPtr( - const Verteron::VXBaseDataSource *ptr) -{ - return reinterpret_cast(ptr); -} - -inline Verteron::VXInstructionInfo* VXInstructionInfo_CppPtr( - VXInstructionInfo *ptr) -{ - static_assert(sizeof(*ptr) == sizeof(Verteron::VXInstructionInfo), "broken struct"); - return reinterpret_cast(ptr); -} - -inline const Verteron::VXInstructionInfo* VXInstructionInfo_CppPtr( - const VXInstructionInfo *ptr) -{ - static_assert(sizeof(*ptr) == sizeof(Verteron::VXInstructionInfo), "broken struct"); - return reinterpret_cast(ptr); -} - -inline VXInstructionDecoderContext* VXInstructionDecoder_CPtr( - Verteron::VXInstructionDecoder *ptr) -{ - return reinterpret_cast(ptr); -} - -inline const VXInstructionDecoderContext* VXInstructionDecoder_CPtr( - const Verteron::VXInstructionDecoder *ptr) -{ - return reinterpret_cast(ptr); -} - -inline Verteron::VXInstructionDecoder* VXInstructionDecoder_CppPtr( - VXInstructionDecoderContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline const Verteron::VXInstructionDecoder* VXInstructionDecoder_CppPtr( - const VXInstructionDecoderContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline Verteron::VXDisassemblerMode VXDisassemblerMode_CppRepr( - VXDisassemblerMode val) -{ - return static_cast(val); -} - -inline VXDisassemblerMode VXDisassemblerMode_CRepr( - Verteron::VXDisassemblerMode val) -{ - return static_cast(val); -} - -inline Verteron::VXInstructionSetVendor VXInstructionSetVendor_CppRepr( - VXInstructionSetVendor val) -{ - return static_cast(val); -} - -inline VXInstructionSetVendor VXInstructionSetVendor_CRepr( - Verteron::VXInstructionSetVendor val) -{ - return static_cast(val); -} - -} - -/* VXBaseDataSource ============================================================================ */ - -void VXBaseDataSource_Release(VXBaseDataSourceContext *ctx) -{ - delete VXBaseDataSource_CppPtr(ctx); -} - -uint8_t VXBaseDataSource_InputPeek(VXBaseDataSourceContext *ctx, VXInstructionInfo *info) -{ - return VXBaseDataSource_CppPtr(ctx)->inputPeek(*VXInstructionInfo_CppPtr(info)); -} - -uint8_t VXBaseDataSource_InputNext(VXBaseDataSourceContext *ctx, VXInstructionInfo *info) -{ - return VXBaseDataSource_CppPtr(ctx)->inputNext(*VXInstructionInfo_CppPtr(info)); -} - -uint8_t VXBaseDataSource_InputCurrent(const VXBaseDataSourceContext *ctx) -{ - return VXBaseDataSource_CppPtr(ctx)->inputCurrent(); -} - -bool VXBaseDataSource_IsEndOfInput(const VXBaseDataSourceContext *ctx) -{ - return VXBaseDataSource_CppPtr(ctx)->isEndOfInput(); -} - -uint64_t VXBaseDataSource_GetPosition(const VXBaseDataSourceContext *ctx) -{ - return VXBaseDataSource_CppPtr(ctx)->getPosition(); -} - -bool VXBaseDataSource_SetPosition(VXBaseDataSourceContext *ctx, uint64_t position) -{ - return VXBaseDataSource_CppPtr(ctx)->setPosition(position); -} - -/* VXMemoryDataSource ========================================================================== */ - -VXBaseDataSourceContext* VXMemoryDataSource_Create(const void* buffer, size_t bufferLen) -{ - return reinterpret_cast( - new Verteron::VXMemoryDataSource(buffer, bufferLen)); -} - -/* VXInstructionDecoder ======================================================================== */ - -VXInstructionDecoderContext* VXInstructionDecoder_Create() -{ - return reinterpret_cast(new Verteron::VXInstructionDecoder); -} - -VXInstructionDecoderContext* VXInstructionDecoder_CreateEx( - VXBaseDataSourceContext *input, - VXDisassemblerMode disassemblerMode, - VXInstructionSetVendor preferredVendor, - uint64_t instructionPointer) -{ - return VXInstructionDecoder_CPtr(new Verteron::VXInstructionDecoder( - VXBaseDataSource_CppPtr(input), - VXDisassemblerMode_CppRepr(disassemblerMode), - VXInstructionSetVendor_CppRepr(preferredVendor), - instructionPointer)); -} - -void VXInstructionDecoder_Release(VXInstructionDecoderContext *ctx) -{ - delete VXInstructionDecoder_CppPtr(ctx); -} - -bool VXInstructionDecoder_DecodeInstruction( - VXInstructionDecoderContext *ctx, VXInstructionInfo *info) -{ - return VXInstructionDecoder_CppPtr(ctx)->decodeInstruction( - *VXInstructionInfo_CppPtr(info)); -} - -VXBaseDataSourceContext* VXInstructionDecoder_GetDataSource( - const VXInstructionDecoderContext *ctx) -{ - return VXBaseDataSource_CPtr(VXInstructionDecoder_CppPtr(ctx)->getDataSource()); -} - -void VXInstructionDecoder_SetDataSource( - VXInstructionDecoderContext *ctx, VXBaseDataSourceContext *input) -{ - VXInstructionDecoder_CppPtr(ctx)->setDataSource(VXBaseDataSource_CppPtr(input)); -} - -VXDisassemblerMode VXInstructionDecoder_GetDisassemblerMode(VXInstructionDecoderContext *ctx) -{ - return VXDisassemblerMode_CRepr(VXInstructionDecoder_CppPtr(ctx)->getDisassemblerMode()); -} - -void VXInstructionDecoder_SetDisassemblerMode( - VXInstructionDecoderContext *ctx, - VXDisassemblerMode disassemblerMode) -{ - VXInstructionDecoder_CppPtr(ctx)->setDisassemblerMode( - VXDisassemblerMode_CppRepr(disassemblerMode)); -} - -VXInstructionSetVendor VXInstructionDecoder_GetPreferredVendor( - const VXInstructionDecoderContext *ctx) -{ - return VXInstructionSetVendor_CRepr(VXInstructionDecoder_CppPtr(ctx)->getPreferredVendor()); -} - -void VXInstructionDecoder_SetPreferredVendor( - VXInstructionDecoderContext *ctx, - VXInstructionSetVendor preferredVendor) -{ - return VXInstructionDecoder_CppPtr(ctx)->setPreferredVendor( - VXInstructionSetVendor_CppRepr(preferredVendor)); -} - -uint64_t VXInstructionDecoder_GetInstructionPointer( - VXInstructionDecoderContext *ctx) -{ - return VXInstructionDecoder_CppPtr(ctx)->getInstructionPointer(); -} - -void VXInstructionDecoder_SetInstructionPointer( - VXInstructionDecoderContext *ctx, - uint64_t instructionPointer) -{ - VXInstructionDecoder_CppPtr(ctx)->setInstructionPointer(instructionPointer); -} - -/* ============================================================================================= */ \ No newline at end of file diff --git a/Bindings/C/VXInstructionDecoderC.h b/Bindings/C/VXInstructionDecoderC.h index e6a2333..b3a6607 100644 --- a/Bindings/C/VXInstructionDecoderC.h +++ b/Bindings/C/VXInstructionDecoderC.h @@ -8,7 +8,7 @@ Original Author : Florian Bernd Modifications : athre0z - Last change : 04. February 2015 + Last change : 14. March 2015 * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -34,6 +34,7 @@ #define _VDE_VXINSTRUCTIONDECODERC_H_ #include "VXDisassemblerTypesC.h" +#include "VXDisassemblerUtilsC.h" #include #include @@ -45,7 +46,7 @@ extern "C" /* VXBaseDataSource ============================================================================ */ -typedef struct _VXBaseDataSourceContext { int a; } VXBaseDataSourceContext; +typedef struct _VXBaseDataSourceContext { VXContextDescriptor d; } VXBaseDataSourceContext; /** * @brief Releases a data source. @@ -79,7 +80,28 @@ uint8_t VXBaseDataSource_InputPeek( * parameter. This function also appends the new byte to to @c data field of the @c info * parameter. */ -uint8_t VXBaseDataSource_InputNext( +uint8_t VXBaseDataSource_InputNext8( + VXBaseDataSourceContext *ctx, + VXInstructionInfo *info); + +/** + * @copydoc VXBaseDataSource_InputNext8 + */ +uint16_t VXBaseDataSource_InputNext16( + VXBaseDataSourceContext *ctx, + VXInstructionInfo *info); + +/** + * @copydoc VXBaseDataSource_InputNext8 + */ +uint32_t VXBaseDataSource_InputNext32( + VXBaseDataSourceContext *ctx, + VXInstructionInfo *info); + +/** + * @copydoc VXBaseDataSource_InputNext8 + */ +uint64_t VXBaseDataSource_InputNext64( VXBaseDataSourceContext *ctx, VXInstructionInfo *info); @@ -157,7 +179,10 @@ typedef enum _VXInstructionSetVendor /* : uint8_t */ /* VXInstructionDecoder ======================================================================== */ -typedef struct _VXInstructionDecoderContext { int a; } VXInstructionDecoderContext; +typedef struct _VXInstructionDecoderContext +{ + VXContextDescriptor d; +} VXInstructionDecoderContext; /** * @brief Creates an instruction decoder. @@ -225,7 +250,7 @@ void VXInstructionDecoder_SetDataSource( * @return The current disassembler mode. */ VXDisassemblerMode VXInstructionDecoder_GetDisassemblerMode( - VXInstructionDecoderContext *ctx); + const VXInstructionDecoderContext *ctx); /** * @brief Sets the current disassembler mode. @@ -259,7 +284,7 @@ void VXInstructionDecoder_SetPreferredVendor( * @return The current instruction pointer. */ uint64_t VXInstructionDecoder_GetInstructionPointer( - VXInstructionDecoderContext *ctx); + const VXInstructionDecoderContext *ctx); /** * @brief Sets a new instruction pointer. diff --git a/Bindings/C/VXInstructionFormatterC.c b/Bindings/C/VXInstructionFormatterC.c new file mode 100644 index 0000000..68f46c0 --- /dev/null +++ b/Bindings/C/VXInstructionFormatterC.c @@ -0,0 +1,856 @@ +/************************************************************************************************** + + Verteron Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : athre0z + + Last change : 14. March 2014 + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +**************************************************************************************************/ + +#include "VXInstructionFormatterC.h" +#include "VXDisassemblerUtilsC.h" +#include "VXInternalHelpersC.h" +#include "VXOpcodeTableInternalC.h" + +#include +#include +#include +#include +#include + +/* Interface =================================================================================== */ + +/* VXBaseSymbolResolver ------------------------------------------------------------------------ */ + +typedef const char* (*VXBaseSymbolResolver_DestructionCallback)( + VXBaseSymbolResolverContext *ctx); +typedef const char* (*VXBaseSymbolResolver_ResolveSymbolCallback)( + VXBaseSymbolResolverContext *ctx, + const VXInstructionInfo *info, + uint64_t address, uint64_t *offset); + +typedef struct _VXBaseSymbolResolver +{ + VXBaseSymbolResolver_DestructionCallback destruct; // may be NULL + VXBaseSymbolResolver_ResolveSymbolCallback resolveCallback; +} VXBaseSymbolResolver; + +void VXBaseSymbolResolver_Release(VXBaseSymbolResolverContext *ctx); +const char* VXBaseSymbolResolver_ResolveSymbol(VXBaseSymbolResolverContext *ctx, const VXInstructionInfo *info, uint64_t address, uint64_t *offset); + +/* VXBaseInstructionFormatter ------------------------------------------------------------------ */ + +typedef void(*VXBaseInstructionFormatter_DestructionCallback)( + VXBaseInstructionFormatterContext *ctx); +typedef void(*VXBaseInstructionFormatter_InternalFormatInstructionCallback)( + VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info); + +typedef struct _VXBaseInstructionFormatter +{ + VXBaseInstructionFormatter_DestructionCallback destruct; // may be NULL + VXBaseInstructionFormatter_InternalFormatInstructionCallback internalFormat; + VXBaseSymbolResolverContext *symbolResolver; + char *outputBuffer; + size_t outputBufferCapacity; + size_t outputStringLen; + bool outputUppercase; +} VXBaseInstructionFormatter; + +void VXBaseInstructionFormatter_Construct(VXBaseInstructionFormatterContext *ctx, VXBaseSymbolResolverContext *symbolResolver); +void VXBaseInstructionFormatter_Destruct(VXBaseInstructionFormatterContext *ctx); +void VXBaseInstructionFormatter_Release(VXBaseInstructionFormatterContext *ctx); +void VXBaseInstructionFormatter_OutputSetUppercase(VXBaseInstructionFormatterContext *ctx, bool uppercase); +char const* VXBaseInstructionFormatter_RegisterToString(const VXBaseInstructionFormatterContext *ctx, VXRegister reg); +char const* VXBaseInstructionFormatter_ResolveSymbol(const VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, uint64_t address, uint64_t *offset); +VXBaseSymbolResolverContext* VXBaseInstructionFormatter_GetSymbolResolver(const VXBaseInstructionFormatterContext *ctx); +void VXBaseInstructionFormatter_SetSymbolResolver(VXBaseInstructionFormatterContext *ctx, VXBaseSymbolResolverContext *symbolResolver); +const char* VXBaseInstructionFormatter_FormatInstruction(VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info); +void VXBaseInstructionFormatter_OutputClear(VXBaseInstructionFormatterContext *ctx); +char const* VXBaseInstructionFormatter_OutputString(VXBaseInstructionFormatterContext *ctx); +void VXBaseInstructionFormatter_OutputAppend(VXBaseInstructionFormatterContext *ctx, char const *text); +void VXBaseInstructionFormatter_OutputAppendFormatted(VXBaseInstructionFormatterContext *ctx, char const *format, ...); +void VXBaseInstructionFormatter_OutputAppendAddress(VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, uint64_t address, bool resolveSymbols); +void VXBaseInstructionFormatter_OutputAppendImmediate(VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, const VXOperandInfo *operand, bool resolveSymbols); +void VXBaseInstructionFormatter_OutputAppendDisplacement(VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, const VXOperandInfo *operand); + +/* VXIntelInstructionFormatter ----------------------------------------------------------------- */ + +typedef struct _VXIntelInstructionFormatter +{ + VXBaseInstructionFormatter super; +} VXIntelInstructionFormatter; + +void VXIntelInstructionFormatter_Construct(VXBaseInstructionFormatterContext *ctx, VXBaseSymbolResolverContext *symbolResolver); +void VXIntelInstructionFormatter_Destruct(VXBaseInstructionFormatterContext *ctx); +void VXIntelInstructionFormatter_OutputAppendOperandCast(VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, const VXOperandInfo *operand); +void VXIntelInstructionFormatter_FormatOperand(VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, const VXOperandInfo *operand); +void VXIntelInstructionFormatter_InternalFormatInstruction(VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info); + +/* VXExactSymbolResolver ----------------------------------------------------------------------- */ + +typedef struct _VXExactSymbolResolver +{ + VXBaseSymbolResolver super; +} VXExactSymbolResolver; + +// TODO + +/* Implementation ============================================================================== */ + +/* VXBaseSymbolResolver ------------------------------------------------------------------------ */ + +void VXBaseSymbolResolver_Release( + VXBaseSymbolResolverContext *ctx) +{ + VXBaseSymbolResolver *thiz = VXBaseSymbolResolver_thiz(ctx); + + if (thiz->destruct) + { + thiz->destruct(ctx); + } + + free(thiz); + free(ctx); +} + +const char* VXBaseSymbolResolver_ResolveSymbol( + VXBaseSymbolResolverContext *ctx, + const VXInstructionInfo *info, + uint64_t address, + uint64_t *offset) +{ + assert(VXBaseSymbolResolver_thiz(ctx)->resolveCallback); + return VXBaseSymbolResolver_thiz(ctx)->resolveCallback(ctx, info, address, offset); +} + +/* VXBaseInstructionFormatter ------------------------------------------------------------------ */ + +const char* VXBaseInstructionFormatter_registerStrings[] = +{ + /* 8 bit general purpose registers */ + "al", "cl", "dl", "bl", + "ah", "ch", "dh", "bh", + "spl", "bpl", "sil", "dil", + "r8b", "r9b", "r10b", "r11b", + "r12b", "r13b", "r14b", "r15b", + /* 16 bit general purpose registers */ + "ax", "cx", "dx", "bx", + "sp", "bp", "si", "di", + "r8w", "r9w", "r10w", "r11w", + "r12w", "r13w", "r14w", "r15w", + /* 32 bit general purpose registers */ + "eax", "ecx", "edx", "ebx", + "esp", "ebp", "esi", "edi", + "r8d", "r9d", "r10d", "r11d", + "r12d", "r13d", "r14d", "r15d", + /* 64 bit general purpose registers */ + "rax", "rcx", "rdx", "rbx", + "rsp", "rbp", "rsi", "rdi", + "r8", "r9", "r10", "r11", + "r12", "r13", "r14", "r15", + /* segment registers */ + "es", "cs", "ss", + "ds", "fs", "gs", + /* control registers */ + "cr0", "cr1", "cr2", "cr3", + "cr4", "cr5", "cr6", "cr7", + "cr8", "cr9", "cr10", "cr11", + "cr12", "cr13", "cr14", "cr15", + /* debug registers */ + "dr0", "dr1", "dr2", "dr3", + "dr4", "dr5", "dr6", "dr7", + "dr8", "dr9", "dr10", "dr11", + "dr12", "dr13", "dr14", "dr15", + /* mmx registers */ + "mm0", "mm1", "mm2", "mm3", + "mm4", "mm5", "mm6", "mm7", + /* x87 registers */ + "st0", "st1", "st2", "st3", + "st4", "st5", "st6", "st7", + /* extended multimedia registers */ + "xmm0", "xmm1", "xmm2", "xmm3", + "xmm4", "xmm5", "xmm6", "xmm7", + "xmm8", "xmm9", "xmm10", "xmm11", + "xmm12", "xmm13", "xmm14", "xmm15", + /* 256 bit multimedia registers */ + "ymm0", "ymm1", "ymm2", "ymm3", + "ymm4", "ymm5", "ymm6", "ymm7", + "ymm8", "ymm9", "ymm10", "ymm11", + "ymm12", "ymm13", "ymm14", "ymm15", + /* instruction pointer register */ + "rip" +}; + +void VXBaseInstructionFormatter_Construct( + VXBaseInstructionFormatterContext *ctx, VXBaseSymbolResolverContext *symbolResolver) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + thiz->destruct = &VXBaseInstructionFormatter_Destruct; + thiz->internalFormat = NULL; + thiz->symbolResolver = symbolResolver; + thiz->outputStringLen = 0; + thiz->outputUppercase = false; + thiz->outputBufferCapacity = 256; + thiz->outputBuffer = malloc(thiz->outputBufferCapacity); +} + +void VXBaseInstructionFormatter_Destruct(VXBaseInstructionFormatterContext *ctx) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + if (thiz->outputBuffer) + { + free(thiz->outputBuffer); + thiz->outputBuffer = NULL; + } +} + +void VXBaseInstructionFormatter_Release( + VXBaseInstructionFormatterContext *ctx) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + if (thiz->destruct) + { + thiz->destruct(ctx); + } + + free(thiz); + free(ctx); +} + +void VXBaseInstructionFormatter_OutputSetUppercase(VXBaseInstructionFormatterContext *ctx, + bool uppercase) +{ + VXBaseInstructionFormatter_thiz(ctx)->outputUppercase = uppercase; +} + +char const* VXBaseInstructionFormatter_RegisterToString( + const VXBaseInstructionFormatterContext *ctx, VXRegister reg) +{ + if (reg == REG_NONE) + { + return "error"; + } + return VXBaseInstructionFormatter_registerStrings[reg - 1]; +} + +char const* VXBaseInstructionFormatter_ResolveSymbol( + const VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, + uint64_t address, uint64_t *offset) +{ + const VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_cthiz(ctx); + + if (thiz->symbolResolver) + { + return VXBaseSymbolResolver_ResolveSymbol( + thiz->symbolResolver, info, address, offset); + } + + return NULL; +} + +VXBaseSymbolResolverContext* VXBaseInstructionFormatter_GetSymbolResolver( + const VXBaseInstructionFormatterContext *ctx) +{ + return VXBaseInstructionFormatter_cthiz(ctx)->symbolResolver; +} + +void VXBaseInstructionFormatter_SetSymbolResolver( + VXBaseInstructionFormatterContext *ctx, VXBaseSymbolResolverContext *symbolResolver) +{ + VXBaseInstructionFormatter_thiz(ctx)->symbolResolver = symbolResolver; +} + +const char* VXBaseInstructionFormatter_FormatInstruction( + VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + // Clears the internal string buffer + VXBaseInstructionFormatter_OutputClear(ctx); + + // Calls the virtual format method that actually formats the instruction + thiz->internalFormat(ctx, info); + + if (thiz->outputBufferCapacity == 0) + { + // The basic instruction formatter only returns the instruction menmonic. + return VXGetInstructionMnemonicString(info->mnemonic); + } + + // Return the formatted instruction string + return VXBaseInstructionFormatter_OutputString(ctx); +} + +void VXBaseInstructionFormatter_OutputClear(VXBaseInstructionFormatterContext *ctx) +{ + VXBaseInstructionFormatter_thiz(ctx)->outputStringLen = 0; +} + +char const* VXBaseInstructionFormatter_OutputString(VXBaseInstructionFormatterContext *ctx) +{ + return &VXBaseInstructionFormatter_thiz(ctx)->outputBuffer[0]; +} + +void VXBaseInstructionFormatter_OutputAppend( + VXBaseInstructionFormatterContext *ctx, char const *text) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + // Get the string length including the null-terminator char + size_t strLen = strlen(text) + 1; + + // Get the buffer size + size_t bufLen = thiz->outputBufferCapacity; + + // Decrease the offset by one, to exclude already existing null-terminator chars in the + // output buffer + size_t offset = (thiz->outputStringLen) ? thiz->outputStringLen - 1 : 0; + + // Resize capacity of the output buffer on demand and add some extra space to improve the + // performance + if (bufLen <= (thiz->outputStringLen + strLen)) + { + thiz->outputBufferCapacity = bufLen + strLen + 512; + thiz->outputBuffer = realloc(thiz->outputBuffer, thiz->outputBufferCapacity); + } + + // Write the text to the output buffer + memcpy(&thiz->outputBuffer[offset], text, strLen); + + // Increase the string length + thiz->outputStringLen = offset + strLen; + + // Convert to uppercase + if (thiz->outputUppercase) + { + for (size_t i = offset; i < thiz->outputStringLen - 1; ++i) + { + thiz->outputBuffer[i] = toupper(thiz->outputBuffer[i]); + } + } +} + +void VXBaseInstructionFormatter_OutputAppendFormatted( + VXBaseInstructionFormatterContext *ctx, char const *format, ...) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + va_list arguments; + va_start(arguments, format); + + // Get the buffer size + size_t bufLen = thiz->outputBufferCapacity; + + // Decrease the offset by one, to exclude already existing null-terminator chars in the + // output buffer + size_t offset = (thiz->outputStringLen) ? thiz->outputStringLen - 1 : 0; + + // Resize the output buffer on demand and add some extra space to improve the performance + if ((bufLen - thiz->outputStringLen) < 256) + { + bufLen = bufLen + 512; + thiz->outputBuffer = realloc(thiz->outputBuffer, bufLen); + thiz->outputBufferCapacity = bufLen; + } + + int strLen = 0; + do + { + // If the formatted text did not fit in the output buffer, resize it, and try again + if (strLen < 0) + { + thiz->outputBufferCapacity = bufLen + 512; + thiz->outputBuffer = realloc(thiz->outputBuffer, thiz->outputBufferCapacity); + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, format, arguments); + return; + } + // Write the formatted text to the output buffer + assert((bufLen - offset) > 0); + strLen = vsnprintf(&thiz->outputBuffer[offset], bufLen - offset, format, arguments); + } while (strLen < 0); + + // Increase the string length + thiz->outputStringLen = offset + strLen + 1; + + // Convert to uppercase + if (thiz->outputUppercase) + { + for (size_t i = offset; i < thiz->outputStringLen - 1; ++i) + { + thiz->outputBuffer[i] = toupper(thiz->outputBuffer[i]); + } + } + + va_end(arguments); +} + +void VXBaseInstructionFormatter_OutputAppendAddress( + VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, + uint64_t address, bool resolveSymbols) +{ + uint64_t offset = 0; + const char* name = NULL; + + if (resolveSymbols) + { + name = VXBaseInstructionFormatter_ResolveSymbol(ctx, info, address, &offset); + } + + if (name) + { + if (offset) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%s+%.2llX", name, offset); + } + else + { + VXBaseInstructionFormatter_OutputAppend(ctx, name); + } + } + else + { + if (info->flags & IF_DISASSEMBLER_MODE_16) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%.4X", address); + } + else if (info->flags & IF_DISASSEMBLER_MODE_32) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%.8lX", address); + } + else if (info->flags & IF_DISASSEMBLER_MODE_64) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%.16llX", address); + } + else + { + assert(0); + } + } +} + +void VXBaseInstructionFormatter_OutputAppendImmediate(VXBaseInstructionFormatterContext *ctx, + const VXInstructionInfo *info, const VXOperandInfo *operand, bool resolveSymbols) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + assert(operand->type == OPTYPE_IMMEDIATE); + uint64_t value = 0; + if (operand->signed_lval && (operand->size != info->operand_mode)) + { + if (operand->size == 8) + { + value = (int64_t)operand->lval.sbyte; + } + else + { + assert(operand->size == 32); + value = (int64_t)operand->lval.sdword; + } + + if (info->operand_mode < 64) + { + value = value & ((1ull << info->operand_mode) - 1ull); + } + } + else + { + switch (operand->size) + { + case 8: + value = operand->lval.ubyte; + break; + case 16: + value = operand->lval.uword; + break; + case 32: + value = operand->lval.udword; + break; + case 64: + value = operand->lval.uqword; + break; + default: + assert(0); + } + } + + uint64_t offset = 0; + const char* name = NULL; + if (resolveSymbols) + { + name = VXBaseInstructionFormatter_ResolveSymbol(ctx, info, value, &offset); + } + + if (name) + { + if (offset) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%s+%.2llX", name, offset); + } + else + { + VXBaseInstructionFormatter_OutputAppend(ctx, name); + } + } + else + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%.2llX", value); + } +} + +void VXBaseInstructionFormatter_OutputAppendDisplacement( + VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, + const VXOperandInfo *operand) +{ + VXBaseInstructionFormatter *thiz = VXBaseInstructionFormatter_thiz(ctx); + + assert(operand->offset > 0); + if ((operand->base == REG_NONE) && (operand->index == REG_NONE)) + { + // Assume the displacement value is unsigned + assert(operand->scale == 0); + assert(operand->offset != 8); + uint64_t value = 0; + switch (operand->offset) + { + case 16: + value = operand->lval.uword; + break; + case 32: + value = operand->lval.udword; + break; + case 64: + value = operand->lval.uqword; + break; + default: + assert(0); + } + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%.2llX", value); + } else + { + // The displacement value might be negative + assert(operand->offset != 64); + int64_t value = 0; + switch (operand->offset) + { + case 8: + value = operand->lval.sbyte; + break; + case 16: + value = operand->lval.sword; + break; + case 32: + value = operand->lval.sdword; + break; + default: + assert(0); + } + if (value < 0) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "-%.2lX", -value); + } else + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%s%.2lX", + (operand->base != REG_NONE || operand->index != REG_NONE) ? "+" : "", value); + } + } +} + +/* VXIntelInstructionFormatter ----------------------------------------------------------------- */ + +void VXIntelInstructionFormatter_Construct(VXBaseInstructionFormatterContext *ctx, + VXBaseSymbolResolverContext* symbolResolver) +{ + VXBaseInstructionFormatter_Construct(ctx, symbolResolver); + VXIntelInstructionFormatter *thiz = VXIntelInstructionFormatter_thiz(ctx); + + thiz->super.destruct = &VXIntelInstructionFormatter_Destruct; + thiz->super.internalFormat = &VXIntelInstructionFormatter_InternalFormatInstruction; +} + +void VXIntelInstructionFormatter_Destruct(VXBaseInstructionFormatterContext *ctx) +{ + VXBaseInstructionFormatter_Destruct(ctx); +} + +VXBaseInstructionFormatterContext* VXIntelInstructionFormatter_Create(void) +{ + return VXIntelInstructionFormatter_CreateEx(NULL); +} + +VXBaseInstructionFormatterContext* VXIntelInstructionFormatter_CreateEx( + VXBaseSymbolResolverContext *resolver) +{ + VXIntelInstructionFormatter *thiz = malloc(sizeof(VXIntelInstructionFormatter)); + VXBaseInstructionFormatterContext *ctx = malloc(sizeof(VXBaseInstructionFormatterContext)); + + ctx->d.type = TYPE_INTELINSTRUCTIONFORMATTER; + ctx->d.ptr = thiz; + + VXIntelInstructionFormatter_Construct(ctx, resolver); + + return ctx; +} + +void VXIntelInstructionFormatter_OutputAppendOperandCast( + VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, + const VXOperandInfo *operand) +{ + switch(operand->size) + { + case 8: + VXBaseInstructionFormatter_OutputAppend(ctx, "byte ptr " ); + break; + case 16: + VXBaseInstructionFormatter_OutputAppend(ctx, "word ptr " ); + break; + case 32: + VXBaseInstructionFormatter_OutputAppend(ctx, "dword ptr "); + break; + case 64: + VXBaseInstructionFormatter_OutputAppend(ctx, "qword ptr "); + break; + case 80: + VXBaseInstructionFormatter_OutputAppend(ctx, "tword ptr "); + break; + case 128: + VXBaseInstructionFormatter_OutputAppend(ctx, "oword ptr "); + break; + case 256: + VXBaseInstructionFormatter_OutputAppend(ctx, "yword ptr "); + break; + default: + break; + } +} + +void VXIntelInstructionFormatter_FormatOperand( + VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info, + const VXOperandInfo *operand) +{ + switch (operand->type) + { + case OPTYPE_REGISTER: + VXBaseInstructionFormatter_OutputAppend(ctx, + VXBaseInstructionFormatter_RegisterToString(ctx, operand->base)); + break; + case OPTYPE_MEMORY: + if (info->flags & IF_PREFIX_SEGMENT) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, + "%s:", VXBaseInstructionFormatter_RegisterToString(ctx, info->segment)); + } + VXBaseInstructionFormatter_OutputAppend(ctx, "["); + if (operand->base == REG_RIP) + { + // TODO: Add option + VXBaseInstructionFormatter_OutputAppendAddress( + ctx, info, VXCalcAbsoluteTarget(info, operand), true); + } + else + { + if (operand->base != REG_NONE) + { + VXBaseInstructionFormatter_OutputAppend(ctx, + VXBaseInstructionFormatter_RegisterToString(ctx, operand->base)); + } + + if (operand->index != REG_NONE) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%s%s", + operand->base != REG_NONE ? "+" : "", + VXBaseInstructionFormatter_RegisterToString(ctx, operand->index)); + if (operand->scale) + { + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "*%d", operand->scale); + } + } + + if (operand->offset) + { + VXBaseInstructionFormatter_OutputAppendDisplacement(ctx, info, operand); + } + } + VXBaseInstructionFormatter_OutputAppend(ctx, "]"); + break; + case OPTYPE_POINTER: + // TODO: resolve symbols + switch (operand->size) + { + case 32: + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "word %.4X:%.4X", + operand->lval.ptr.seg, operand->lval.ptr.off & 0xFFFF); + break; + case 48: + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "dword %.4X:%.8lX", + operand->lval.ptr.seg, operand->lval.ptr.off); + break; + default: + assert(0); + } + break; + case OPTYPE_IMMEDIATE: + { + VXBaseInstructionFormatter_OutputAppendImmediate(ctx, info, operand, true); + } + break; + case OPTYPE_REL_IMMEDIATE: + { + if (operand->size == 8) + { + VXBaseInstructionFormatter_OutputAppend(ctx, "short "); + } + VXBaseInstructionFormatter_OutputAppendAddress(ctx, info, + VXCalcAbsoluteTarget(info, operand), true); + } + break; + case OPTYPE_CONSTANT: + VXBaseInstructionFormatter_OutputAppendFormatted(ctx, "%.2X", operand->lval.udword); + break; + default: + assert(0); + break; + } +} + +void VXIntelInstructionFormatter_InternalFormatInstruction( + VXBaseInstructionFormatterContext *ctx, const VXInstructionInfo *info) +{ + // Append string prefixes + if (info->flags & IF_PREFIX_LOCK) + { + VXBaseInstructionFormatter_OutputAppend(ctx, "lock "); + } + + if (info->flags & IF_PREFIX_REP) + { + VXBaseInstructionFormatter_OutputAppend(ctx, "rep "); + } + else if (info->flags & IF_PREFIX_REPNE) + { + VXBaseInstructionFormatter_OutputAppend(ctx, "repne "); + } + + // Append the instruction mnemonic + VXBaseInstructionFormatter_OutputAppend(ctx, VXGetInstructionMnemonicString(info->mnemonic)); + + // Append the first operand + if (info->operand[0].type != OPTYPE_NONE) + { + VXBaseInstructionFormatter_OutputAppend(ctx, " "); + bool cast = false; + if (info->operand[0].type == OPTYPE_MEMORY) + { + if (info->operand[1].type == OPTYPE_IMMEDIATE || + info->operand[1].type == OPTYPE_CONSTANT || + info->operand[1].type == OPTYPE_NONE || + (info->operand[0].size != info->operand[1].size)) + { + cast = true; + } + else if (info->operand[1].type == OPTYPE_REGISTER && info->operand[1].base == REG_CL) + { + switch (info->mnemonic) + { + case MNEM_RCL: + case MNEM_ROL: + case MNEM_ROR: + case MNEM_RCR: + case MNEM_SHL: + case MNEM_SHR: + case MNEM_SAR: + cast = true; + break; + default: + break; + } + } + } + + if (cast) + { + VXIntelInstructionFormatter_OutputAppendOperandCast(ctx, info, &info->operand[0]); + } + VXIntelInstructionFormatter_FormatOperand(ctx, info, &info->operand[0]); + } + + // Append the second operand + if (info->operand[1].type != OPTYPE_NONE) + { + VXBaseInstructionFormatter_OutputAppend(ctx, ", "); + bool cast = false; + if (info->operand[1].type == OPTYPE_MEMORY && + info->operand[0].size != info->operand[1].size && + ((info->operand[0].type != OPTYPE_REGISTER) || + ((info->operand[0].base != REG_ES) && + (info->operand[0].base != REG_CS) && + (info->operand[0].base != REG_SS) && + (info->operand[0].base != REG_DS) && + (info->operand[0].base != REG_FS) && + (info->operand[0].base != REG_GS)))) + { + cast = true; + } + + if (cast) + { + VXIntelInstructionFormatter_OutputAppendOperandCast(ctx, info, &info->operand[1]); + } + VXIntelInstructionFormatter_FormatOperand(ctx, info, &info->operand[1]); + } + + // Append the third operand + if (info->operand[2].type != OPTYPE_NONE) + { + VXBaseInstructionFormatter_OutputAppend(ctx, ", "); + bool cast = false; + if (info->operand[2].type == OPTYPE_MEMORY && + (info->operand[2].size != info->operand[1].size)) + { + cast = true; + } + + if (cast) + { + VXIntelInstructionFormatter_OutputAppendOperandCast(ctx, info, &info->operand[2]); + } + + VXIntelInstructionFormatter_FormatOperand(ctx, info, &info->operand[2]); + } + + // Append the fourth operand + if (info->operand[3].type != OPTYPE_NONE) + { + VXBaseInstructionFormatter_OutputAppend(ctx, ", "); + VXIntelInstructionFormatter_FormatOperand(ctx, info, &info->operand[3]); + } +} + +/* --------------------------------------------------------------------------------------------- */ + +/* ============================================================================================= */ diff --git a/Bindings/C/VXInstructionFormatterC.cpp b/Bindings/C/VXInstructionFormatterC.cpp deleted file mode 100644 index 3a0dbb7..0000000 --- a/Bindings/C/VXInstructionFormatterC.cpp +++ /dev/null @@ -1,312 +0,0 @@ -/************************************************************************************************** - - Verteron Disassembler Engine - Version 1.0 - - Remarks : Freeware, Copyright must be included - - Original Author : athre0z - Modifications : - - Last change : 04. February 2015 - - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - -**************************************************************************************************/ - -#include "VXInstructionFormatterC.h" -#include "VXInstructionFormatter.h" - -/* Helpers ===================================================================================== */ - -namespace -{ - -inline Verteron::VXBaseSymbolResolver* VXBaseSymbolResolver_CppPtr( - VXBaseSymbolResolverContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline const Verteron::VXBaseSymbolResolver* VXBaseSymbolResolver_CppPtr( - const VXBaseSymbolResolverContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline VXBaseSymbolResolverContext* VXBaseSymbolResolver_CPtr( - Verteron::VXBaseSymbolResolver *ptr) -{ - return reinterpret_cast(ptr); -} - -inline const VXBaseSymbolResolverContext* VXBaseSymbolResolver_CPtr( - const Verteron::VXBaseSymbolResolver *ptr) -{ - return reinterpret_cast(ptr); -} - -inline Verteron::VXExactSymbolResolver* VXExactSymbolResolver_CppPtr( - VXBaseSymbolResolverContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline const Verteron::VXExactSymbolResolver* VXExactSymbolResolver_CppPtr( - const VXBaseSymbolResolverContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline VXBaseSymbolResolverContext* VXExactSymbolResolver_CPtr( - Verteron::VXExactSymbolResolver *ptr) -{ - return reinterpret_cast(ptr); -} - -inline const VXBaseSymbolResolverContext* VXExactSymbolResolver_CPtr( - const Verteron::VXExactSymbolResolver *ptr) -{ - return reinterpret_cast(ptr); -} - -inline Verteron::VXInstructionInfo* VXInstructionInfo_CppPtr( - VXInstructionInfo *ptr) -{ - static_assert(sizeof(*ptr) == sizeof(Verteron::VXInstructionInfo), "broken struct"); - return reinterpret_cast(ptr); -} - -inline const Verteron::VXInstructionInfo* VXInstructionInfo_CppPtr( - const VXInstructionInfo *ptr) -{ - static_assert(sizeof(*ptr) == sizeof(Verteron::VXInstructionInfo), "broken struct"); - return reinterpret_cast(ptr); -} - -inline VXInstructionInfo* VXInstructionInfo_CPtr( - Verteron::VXInstructionInfo *ptr) -{ - return reinterpret_cast(ptr); -} - -inline const VXInstructionInfo* VXInstructionInfo_CPtr( - const Verteron::VXInstructionInfo *ptr) -{ - return reinterpret_cast(ptr); -} - -inline Verteron::VXBaseInstructionFormatter* VXBaseInstructionFormatter_CppPtr( - VXBaseInstructionFormatterContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline const Verteron::VXBaseInstructionFormatter* VXBaseInstructionFormatter_CppPtr( - const VXBaseInstructionFormatterContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline Verteron::VXBaseInstructionFormatter* VXIntelInstructionFormatter_CppPtr( - VXBaseInstructionFormatterContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline const Verteron::VXBaseInstructionFormatter* VXIntelInstructionFormatter_CppPtr( - const VXBaseInstructionFormatterContext *ctx) -{ - return reinterpret_cast(ctx); -} - -inline VXBaseInstructionFormatterContext* VXIntelInstructionFormatter_CPtr( - Verteron::VXBaseInstructionFormatter *ctx) -{ - return reinterpret_cast(ctx); -} - -inline const VXBaseInstructionFormatterContext* VXIntelInstructionFormatter_CPtr( - const Verteron::VXBaseInstructionFormatter *ctx) -{ - return reinterpret_cast(ctx); -} - -} - -/* VXBaseSymbolResolver ======================================================================== */ - -void VXBaseSymbolResolver_Release( - VXBaseSymbolResolverContext *ctx) -{ - delete VXBaseSymbolResolver_CppPtr(ctx); -} - -const char* VXBaseSymbolResolver_ResolveSymbol( - VXBaseSymbolResolverContext *ctx, - const VXInstructionInfo *info, - uint64_t address, - uint64_t *offset) -{ - return VXBaseSymbolResolver_CppPtr(ctx)->resolveSymbol( - *VXInstructionInfo_CppPtr(info), - address, - *offset); -} - -/* VXExactSymbolResolver ======================================================================= */ - -VXBaseSymbolResolverContext* VXExactSymbolResolver_Create(void) -{ - return VXExactSymbolResolver_CPtr(new Verteron::VXExactSymbolResolver); -} - -bool VXExactSymbolResolver_ContainsSymbol( - VXBaseSymbolResolverContext *ctx, - uint64_t address) -{ - return VXExactSymbolResolver_CppPtr(ctx)->containsSymbol(address); -} - -void VXExactSymbolResolverContext_SetSymbol( - VXBaseSymbolResolverContext *ctx, - uint64_t address, - const char* name) -{ - VXExactSymbolResolver_CppPtr(ctx)->setSymbol(address, name); -} - -void VXExactSymbolResolverContext_RemoveSymbol( - VXBaseSymbolResolverContext *ctx, - uint64_t address) -{ - VXExactSymbolResolver_CppPtr(ctx)->removeSymbol(address); -} - -void VXExactSymbolResolverContext_Clear( - VXBaseSymbolResolverContext *ctx) -{ - VXExactSymbolResolver_CppPtr(ctx)->clear(); -} - -/* VXBaseInstructionFormatter ================================================================== */ - -const char* VXBaseInstructionFormatter_FormatInstruction( - VXBaseInstructionFormatterContext *ctx, - const VXInstructionInfo *info) -{ - return VXBaseInstructionFormatter_CppPtr(ctx)->formatInstruction( - *VXInstructionInfo_CppPtr(info)); -} - -VXBaseSymbolResolverContext* VXBaseInstructionFormatter_GetSymbolResolver( - const VXBaseInstructionFormatterContext *ctx) -{ - return VXBaseSymbolResolver_CPtr( - VXBaseInstructionFormatter_CppPtr(ctx)->getSymbolResolver()); -} - -void VXBaseInstructionFormatter_SetSymbolResolver( - VXBaseInstructionFormatterContext *ctx, - VXBaseSymbolResolverContext *resolver) -{ - VXBaseInstructionFormatter_CppPtr(ctx)->setSymbolResolver( - VXBaseSymbolResolver_CppPtr(resolver)); -} - -void VXBaseInstructionFormatter_Release( - VXBaseInstructionFormatterContext *ctx) -{ - delete VXBaseInstructionFormatter_CppPtr(ctx); -} - -/* VXIntelInstructionFormatter ================================================================ */ - -VXBaseInstructionFormatterContext* VXIntelInstructionFormatter_Create(void) -{ - return VXIntelInstructionFormatter_CPtr(new Verteron::VXIntelInstructionFormatter); -} - -VXBaseInstructionFormatterContext* VXIntelInstructionFormatter_CreateEx( - VXBaseSymbolResolverContext *resolver) -{ - return VXIntelInstructionFormatter_CPtr(new Verteron::VXIntelInstructionFormatter( - VXBaseSymbolResolver_CppPtr(resolver))); -} - -/* VXCustomSymbolResolver ====================================================================== */ - -/* Internal helper class ----------------------------------------------------------------------- */ - -namespace -{ - -class VXCustomSymbolResolver : public Verteron::VXBaseSymbolResolver -{ - VXResolveSymbol_t m_resolverCb; - void *m_userData; -public: - /** - * @brief Constructor. - * @param resolverCb The resolver callback. - * @param userData User provided pointer to arbitrary data passed to resolve callback. - */ - VXCustomSymbolResolver(VXResolveSymbol_t resolverCb, void *userData); - /** - * @brief Destructor. - */ - ~VXCustomSymbolResolver() override = default; -public: - /** - * @brief Resolves a symbol. - * @param info The instruction info. - * @param address The address. - * @param offset Reference to an unsigned 64 bit integer that receives an offset - * relative to the base address of the symbol. - * @return The name of the symbol, if the symbol was found, @c NULL if not. - */ - const char* resolveSymbol(const Verteron::VXInstructionInfo &info, uint64_t address, - uint64_t &offset) override; -}; - -VXCustomSymbolResolver::VXCustomSymbolResolver(VXResolveSymbol_t resolverCb, void *userData) - : m_resolverCb(resolverCb) - , m_userData(userData) -{ - -} - -const char* VXCustomSymbolResolver::resolveSymbol( - const Verteron::VXInstructionInfo &info, uint64_t address, uint64_t &offset) -{ - return m_resolverCb(VXInstructionInfo_CPtr(&info), address, &offset, m_userData); -} - -} // anon namespace - -/* C API implementation ------------------------------------------------------------------------ */ - -VXBaseSymbolResolverContext* VXCustomSymbolResolver_Create( - VXResolveSymbol_t resolverCb, - void *userData) -{ - return VXBaseSymbolResolver_CPtr(new VXCustomSymbolResolver(resolverCb, userData)); -} - -/* ============================================================================================= */ \ No newline at end of file diff --git a/Bindings/C/VXInstructionFormatterC.h b/Bindings/C/VXInstructionFormatterC.h index b0ae0ec..01c168d 100644 --- a/Bindings/C/VXInstructionFormatterC.h +++ b/Bindings/C/VXInstructionFormatterC.h @@ -8,7 +8,7 @@ Original Author : Florian Bernd Modifications : athre0z - Last change : 04. February 2015 + Last change : 14. March 2015 * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -34,6 +34,7 @@ #define _VDE_VXINSTRUCTIONFORMATTERC_H_ #include "VXDisassemblerTypesC.h" +#include "VXDisassemblerUtilsC.h" #ifdef __cplusplus extern "C" @@ -42,7 +43,10 @@ extern "C" /* VXBaseSymbolResolver ======================================================================== */ -typedef struct _VXBaseSymbolResolverContext { int a; } VXBaseSymbolResolverContext; +typedef struct _VXBaseSymbolResolverContext +{ + VXContextDescriptor d; +} VXBaseSymbolResolverContext; /** * @brief Releases a symbol resolver. @@ -67,55 +71,6 @@ const char* VXBaseSymbolResolver_ResolveSymbol( uint64_t address, uint64_t *offset); -/* VXExactSymbolResolver ======================================================================= */ - -/** - * @brief Creates an exact symbol resolver. - * @return @c NULL if it fails, else a symbol resolver context. - * @see VXBaseSymbolResolver_Release - * An exact resolver is a simple symbol resolver that only matches exact addresses. - */ -// TODO: verify return value -VXBaseSymbolResolverContext* VXExactSymbolResolver_Create(void); - -/** - * @brief Query if the given address is a known symbol. - * @param ctx The exact symbol resolver context. - * @param address The address. - * @return @c true if the address is known, @c false if not. - */ -bool VXExactSymbolResolver_ContainsSymbol( - VXBaseSymbolResolverContext *ctx, - uint64_t address); - -/** - * @brief Adds or changes a symbol. - * @param ctx The exact symbol resolver context. - * @param address The address. - * @param name The symbol name. - */ -void VXExactSymbolResolverContext_SetSymbol( - VXBaseSymbolResolverContext *ctx, - uint64_t address, - const char* name); - -/** - * @brief Removes the symbol described by address. - * @param ctx The exact symbol resolver context. - * @param address The address. - * This will invalidate all char-pointers to the affected symbol name. - */ -void VXExactSymbolResolverContext_RemoveSymbol( - VXBaseSymbolResolverContext *ctx, - uint64_t address); - -/** - * @brief Clears the symbol tree. - * @param ctx The exact symbol resolver context. - */ -void VXExactSymbolResolverContext_Clear( - VXBaseSymbolResolverContext *ctx); - /* VXCustomSymbolResolver ====================================================================== */ typedef const char* (*VXResolveSymbol_t)( @@ -137,7 +92,10 @@ VXBaseSymbolResolverContext* VXCustomSymbolResolver_Create( /* VXBaseInstructionFormatter ================================================================== */ -typedef struct _VXBaseInstructionFormatterContext {int a;} VXBaseInstructionFormatterContext; +typedef struct _VXBaseInstructionFormatterContext +{ + VXContextDescriptor d; +} VXBaseInstructionFormatterContext; /** * @brief Formats a decoded instruction. diff --git a/Bindings/C/VXInternalHelpersC.h b/Bindings/C/VXInternalHelpersC.h new file mode 100644 index 0000000..513b84f --- /dev/null +++ b/Bindings/C/VXInternalHelpersC.h @@ -0,0 +1,165 @@ +/************************************************************************************************** + + Verteron Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : athre0z + Modifications : + + Last change : 13. March 2015 + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +**************************************************************************************************/ + +#ifndef _VDE_VXINTERNALHELPERS_H_ +#define _VDE_VXINTERNALHELPERS_H_ + +#include "VXInstructionDecoderC.h" +#include "VXInstructionFormatterC.h" + +#include + +struct _VXBaseDataSource; +struct _VXInstructionDecoder; + +/* Types IDs =================================================================================== */ + +typedef enum _VXTypeId +{ + TYPE_BASEDATASOURCE, + TYPE_MEMORYDATASOURCE, + TYPE_INSTRUCTIONDECODER, + TYPE_BASESYMBOLRESOLVER, + TYPE_EXACTSYMBOLRESOLVER, + TYPE_BASEINSTRUCTIONFORMATTER, + TYPE_INTELINSTRUCTIONFORMATTER, +} VXTypeId; + +/* Context conversion helpers ================================================================== */ + +// TODO: don't use __inline + +__inline struct _VXBaseDataSource* VXBaseDataSource_thiz( + VXBaseDataSourceContext *ctx) +{ + assert(ctx->d.type == TYPE_BASEDATASOURCE + || ctx->d.type == TYPE_MEMORYDATASOURCE); + return (struct _VXBaseDataSource*)ctx->d.ptr; +} + +__inline const struct _VXBaseDataSource* VXBaseDataSource_cthiz( + const VXBaseDataSourceContext *ctx) +{ + assert(ctx->d.type == TYPE_BASEDATASOURCE + || ctx->d.type == TYPE_MEMORYDATASOURCE); + return (const struct _VXBaseDataSource*)ctx->d.ptr; +} + +__inline struct _VXMemoryDataSource* VXMemoryDataSource_thiz( + VXBaseDataSourceContext *ctx) +{ + assert(ctx->d.type == TYPE_MEMORYDATASOURCE); + return (struct _VXMemoryDataSource*)ctx->d.ptr; +} + +__inline const struct _VXMemoryDataSource* VXMemoryDataSource_cthiz( + const VXBaseDataSourceContext *ctx) +{ + assert(ctx->d.type == TYPE_MEMORYDATASOURCE); + return (const struct _VXMemoryDataSource*)ctx->d.ptr; +} + +__inline struct _VXInstructionDecoder* VXInstructionDecoder_thiz( + VXInstructionDecoderContext *ctx) +{ + assert(ctx->d.type == TYPE_INSTRUCTIONDECODER); + return (struct _VXInstructionDecoder*)ctx->d.ptr; +} + +__inline const struct _VXInstructionDecoder* VXInstructionDecoder_cthiz( + const VXInstructionDecoderContext *ctx) +{ + assert(ctx->d.type == TYPE_INSTRUCTIONDECODER); + return (const struct _VXInstructionDecoder*)ctx->d.ptr; +} + +__inline struct _VXBaseSymbolResolver* VXBaseSymbolResolver_thiz( + VXBaseSymbolResolverContext *ctx) +{ + assert(ctx->d.type == TYPE_BASESYMBOLRESOLVER); + return (struct _VXBaseSymbolResolver*)ctx->d.ptr; +} + +__inline const struct _VXBaseSymbolResolver* VXBaseSymbolResolver_cthiz( + const VXBaseSymbolResolverContext *ctx) +{ + assert(ctx->d.type == TYPE_BASESYMBOLRESOLVER); + return (const struct _VXBaseSymbolResolver*)ctx->d.ptr; +} + +__inline struct _VXExactSymbolResolver* VXExactSymbolResolver_thiz( + VXBaseSymbolResolverContext *ctx) +{ + assert(ctx->d.type == TYPE_EXACTSYMBOLRESOLVER); + return (struct _VXExactSymbolResolver*)ctx->d.ptr; +} + +__inline const struct _VXExactSymbolResolver* VXExactSymbolResolver_cthiz( + const VXBaseSymbolResolverContext *ctx) +{ + assert(ctx->d.type == TYPE_EXACTSYMBOLRESOLVER); + return (const struct _VXExactSymbolResolver*)ctx->d.ptr; +} + +__inline struct _VXBaseInstructionFormatter* VXBaseInstructionFormatter_thiz( + VXBaseInstructionFormatterContext *ctx) +{ + assert(ctx->d.type == TYPE_BASEINSTRUCTIONFORMATTER + || ctx->d.type == TYPE_INTELINSTRUCTIONFORMATTER); + return (struct _VXBaseInstructionFormatter*)ctx->d.ptr; +} + +__inline const struct _VXBaseInstructionFormatter* VXBaseInstructionFormatter_cthiz( + const VXBaseInstructionFormatterContext *ctx) +{ + assert(ctx->d.type == TYPE_BASEINSTRUCTIONFORMATTER + || ctx->d.type == TYPE_INTELINSTRUCTIONFORMATTER); + return (const struct _VXBaseInstructionFormatter*)ctx->d.ptr; +} + +__inline struct _VXIntelInstructionFormatter* VXIntelInstructionFormatter_thiz( + VXBaseInstructionFormatterContext *ctx) +{ + assert(ctx->d.type == TYPE_INTELINSTRUCTIONFORMATTER); + return (struct _VXIntelInstructionFormatter*)ctx->d.ptr; +} + +__inline const struct _VXIntelInstructionFormatter* VXIntelInstructionFormatter_cthiz( + const VXBaseInstructionFormatterContext *ctx) +{ + assert(ctx->d.type == TYPE_INTELINSTRUCTIONFORMATTER); + return (const struct _VXIntelInstructionFormatter*)ctx->d.ptr; +} + +/* ============================================================================================= */ + +#endif /* _VDE_VXINTERNALHELPERS_H_ */ \ No newline at end of file diff --git a/Bindings/C/VXOpcodeTableC.c b/Bindings/C/VXOpcodeTableC.c new file mode 100644 index 0000000..c1a90ff --- /dev/null +++ b/Bindings/C/VXOpcodeTableC.c @@ -0,0 +1,9649 @@ +/************************************************************************************************** + + Verteron Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : athre0z + + Last change : 14. March 2015 + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +**************************************************************************************************/ + +#include "VXOpcodeTableC.h" + +#define VX_INVALID 0 +#define VX_NODE(type, n) ((VXOpcodeTreeNode)type << 12 | (n)) + +const VXOpcodeTreeNode vxOptreeTable[][256] = +{ + { + /* 00 */ 0x0015, + /* 01 */ 0x0014, + /* 02 */ 0x0016, + /* 03 */ 0x0018, + /* 04 */ 0x0017, + /* 05 */ 0x0010, + /* 06 */ VX_NODE(OTNT_MODE, 0x0000), + /* 07 */ VX_NODE(OTNT_MODE, 0x0001), + /* 08 */ 0x0394, + /* 09 */ 0x0393, + /* 0A */ 0x0396, + /* 0B */ 0x0395, + /* 0C */ 0x0390, + /* 0D */ 0x038F, + /* 0E */ VX_NODE(OTNT_MODE, 0x0002), + /* 0F */ VX_NODE(OTNT_TABLE, 0x0001), + /* 10 */ 0x000B, + /* 11 */ 0x000A, + /* 12 */ 0x000C, + /* 13 */ 0x000E, + /* 14 */ 0x000D, + /* 15 */ 0x0006, + /* 16 */ VX_NODE(OTNT_MODE, 0x0007), + /* 17 */ VX_NODE(OTNT_MODE, 0x0008), + /* 18 */ 0x04FE, + /* 19 */ 0x04F7, + /* 1A */ 0x04F8, + /* 1B */ 0x04FB, + /* 1C */ 0x04FA, + /* 1D */ 0x04F9, + /* 1E */ VX_NODE(OTNT_MODE, 0x0009), + /* 1F */ VX_NODE(OTNT_MODE, 0x000A), + /* 20 */ 0x0026, + /* 21 */ 0x0027, + /* 22 */ 0x0025, + /* 23 */ 0x002C, + /* 24 */ 0x002D, + /* 25 */ 0x002E, + /* 26 */ VX_INVALID, + /* 27 */ VX_NODE(OTNT_MODE, 0x000B), + /* 28 */ 0x0542, + /* 29 */ 0x0549, + /* 2A */ 0x0548, + /* 2B */ 0x054B, + /* 2C */ 0x054A, + /* 2D */ 0x0547, + /* 2E */ VX_INVALID, + /* 2F */ VX_NODE(OTNT_MODE, 0x000C), + /* 30 */ 0x06B8, + /* 31 */ 0x06B9, + /* 32 */ 0x06B6, + /* 33 */ 0x06B7, + /* 34 */ 0x06BA, + /* 35 */ 0x06BB, + /* 36 */ VX_INVALID, + /* 37 */ VX_NODE(OTNT_MODE, 0x000D), + /* 38 */ 0x006C, + /* 39 */ 0x006D, + /* 3A */ 0x006B, + /* 3B */ 0x006A, + /* 3C */ 0x0070, + /* 3D */ 0x006F, + /* 3E */ VX_INVALID, + /* 3F */ VX_NODE(OTNT_MODE, 0x000E), + /* 40 */ 0x02AB, + /* 41 */ 0x02AC, + /* 42 */ 0x02B2, + /* 43 */ 0x02B1, + /* 44 */ 0x02B3, + /* 45 */ 0x02B4, + /* 46 */ 0x02AE, + /* 47 */ 0x02AD, + /* 48 */ 0x00A7, + /* 49 */ 0x00A6, + /* 4A */ 0x00A8, + /* 4B */ 0x00AA, + /* 4C */ 0x00A9, + /* 4D */ 0x00A2, + /* 4E */ 0x00A1, + /* 4F */ 0x00A3, + /* 50 */ 0x04B4, + /* 51 */ 0x04B9, + /* 52 */ 0x04B3, + /* 53 */ 0x04AE, + /* 54 */ 0x04AF, + /* 55 */ 0x04B0, + /* 56 */ 0x04B1, + /* 57 */ 0x04B2, + /* 58 */ 0x0449, + /* 59 */ 0x0447, + /* 5A */ 0x0448, + /* 5B */ 0x0442, + /* 5C */ 0x043E, + /* 5D */ 0x043D, + /* 5E */ 0x043F, + /* 5F */ 0x0441, + /* 60 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0007), + /* 61 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0008), + /* 62 */ VX_NODE(OTNT_MODE, 0x0013), + /* 63 */ VX_NODE(OTNT_MODE, 0x0014), + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ 0x04B7, + /* 69 */ 0x02A4, + /* 6A */ 0x04AB, + /* 6B */ 0x02A6, + /* 6C */ 0x02B5, + /* 6D */ VX_NODE(OTNT_OPERAND_SIZE, 0x0009), + /* 6E */ 0x039F, + /* 6F */ VX_NODE(OTNT_OPERAND_SIZE, 0x000A), + /* 70 */ 0x02E8, + /* 71 */ 0x02E2, + /* 72 */ 0x02CA, + /* 73 */ 0x02DE, + /* 74 */ 0x02CE, + /* 75 */ 0x02E1, + /* 76 */ 0x02CB, + /* 77 */ 0x02C7, + /* 78 */ 0x02ED, + /* 79 */ 0x02E6, + /* 7A */ 0x02EB, + /* 7B */ 0x02E5, + /* 7C */ 0x02D5, + /* 7D */ 0x02D3, + /* 7E */ 0x02D8, + /* 7F */ 0x02D1, + /* 80 */ VX_NODE(OTNT_MODRM_REG, 0x0013), + /* 81 */ VX_NODE(OTNT_MODRM_REG, 0x0014), + /* 82 */ VX_NODE(OTNT_MODRM_REG, 0x0015), + /* 83 */ VX_NODE(OTNT_MODRM_REG, 0x0016), + /* 84 */ 0x055C, + /* 85 */ 0x055D, + /* 86 */ 0x06A8, + /* 87 */ 0x06A7, + /* 88 */ 0x0334, + /* 89 */ 0x0336, + /* 8A */ 0x0335, + /* 8B */ 0x0331, + /* 8C */ 0x031D, + /* 8D */ 0x02F4, + /* 8E */ 0x031C, + /* 8F */ VX_NODE(OTNT_MODRM_REG, 0x0017), + /* 90 */ 0x06A9, + /* 91 */ 0x06AB, + /* 92 */ 0x06AA, + /* 93 */ 0x06A3, + /* 94 */ 0x06A2, + /* 95 */ 0x06A4, + /* 96 */ 0x06A6, + /* 97 */ 0x06A5, + /* 98 */ VX_NODE(OTNT_OPERAND_SIZE, 0x000B), + /* 99 */ VX_NODE(OTNT_OPERAND_SIZE, 0x000C), + /* 9A */ VX_NODE(OTNT_MODE, 0x001D), + /* 9B */ 0x069D, + /* 9C */ VX_NODE(OTNT_OPERAND_SIZE, 0x000D), + /* 9D */ VX_NODE(OTNT_OPERAND_SIZE, 0x000E), + /* 9E */ 0x04EF, + /* 9F */ 0x02EF, + /* A0 */ 0x031B, + /* A1 */ 0x0320, + /* A2 */ 0x031F, + /* A3 */ 0x031E, + /* A4 */ 0x0367, + /* A5 */ VX_NODE(OTNT_OPERAND_SIZE, 0x000F), + /* A6 */ 0x0076, + /* A7 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0010), + /* A8 */ 0x055E, + /* A9 */ 0x055B, + /* AA */ 0x053D, + /* AB */ VX_NODE(OTNT_OPERAND_SIZE, 0x0011), + /* AC */ 0x0300, + /* AD */ VX_NODE(OTNT_OPERAND_SIZE, 0x0012), + /* AE */ 0x0501, + /* AF */ VX_NODE(OTNT_OPERAND_SIZE, 0x0013), + /* B0 */ 0x0317, + /* B1 */ 0x031A, + /* B2 */ 0x0318, + /* B3 */ 0x0319, + /* B4 */ 0x0321, + /* B5 */ 0x032C, + /* B6 */ 0x032B, + /* B7 */ 0x032A, + /* B8 */ 0x032D, + /* B9 */ 0x0330, + /* BA */ 0x032F, + /* BB */ 0x032E, + /* BC */ 0x0329, + /* BD */ 0x0324, + /* BE */ 0x0323, + /* BF */ 0x0322, + /* C0 */ VX_NODE(OTNT_MODRM_REG, 0x0018), + /* C1 */ VX_NODE(OTNT_MODRM_REG, 0x0019), + /* C2 */ 0x04D9, + /* C3 */ 0x04D8, + /* C4 */ VX_NODE(OTNT_VEX, 0x0000), + /* C5 */ VX_NODE(OTNT_VEX, 0x0001), + /* C6 */ VX_NODE(OTNT_MODRM_REG, 0x001E), + /* C7 */ VX_NODE(OTNT_MODRM_REG, 0x001F), + /* C8 */ 0x00B4, + /* C9 */ 0x02F5, + /* CA */ 0x04DA, + /* CB */ 0x04DB, + /* CC */ 0x02BB, + /* CD */ 0x02B9, + /* CE */ VX_NODE(OTNT_MODE, 0x0027), + /* CF */ VX_NODE(OTNT_OPERAND_SIZE, 0x0017), + /* D0 */ VX_NODE(OTNT_MODRM_REG, 0x0020), + /* D1 */ VX_NODE(OTNT_MODRM_REG, 0x0021), + /* D2 */ VX_NODE(OTNT_MODRM_REG, 0x0022), + /* D3 */ VX_NODE(OTNT_MODRM_REG, 0x0023), + /* D4 */ VX_NODE(OTNT_MODE, 0x0028), + /* D5 */ VX_NODE(OTNT_MODE, 0x0029), + /* D6 */ VX_NODE(OTNT_MODE, 0x002A), + /* D7 */ 0x06B2, + /* D8 */ VX_NODE(OTNT_MODRM_MOD, 0x0015), + /* D9 */ VX_NODE(OTNT_MODRM_MOD, 0x0016), + /* DA */ VX_NODE(OTNT_MODRM_MOD, 0x0017), + /* DB */ VX_NODE(OTNT_MODRM_MOD, 0x0018), + /* DC */ VX_NODE(OTNT_MODRM_MOD, 0x0019), + /* DD */ VX_NODE(OTNT_MODRM_MOD, 0x001A), + /* DE */ VX_NODE(OTNT_MODRM_MOD, 0x001B), + /* DF */ VX_NODE(OTNT_MODRM_MOD, 0x001C), + /* E0 */ 0x0306, + /* E1 */ 0x0305, + /* E2 */ 0x0304, + /* E3 */ VX_NODE(OTNT_ADDRESS_SIZE, 0x0000), + /* E4 */ 0x02A9, + /* E5 */ 0x02AA, + /* E6 */ 0x039D, + /* E7 */ 0x039E, + /* E8 */ 0x004E, + /* E9 */ 0x02DB, + /* EA */ VX_NODE(OTNT_MODE, 0x002B), + /* EB */ 0x02DD, + /* EC */ 0x02A7, + /* ED */ 0x02A8, + /* EE */ 0x039B, + /* EF */ 0x039C, + /* F0 */ 0x02FF, + /* F1 */ 0x02BA, + /* F2 */ 0x04D7, + /* F3 */ 0x04D6, + /* F4 */ 0x029D, + /* F5 */ 0x0059, + /* F6 */ VX_NODE(OTNT_MODRM_REG, 0x002C), + /* F7 */ VX_NODE(OTNT_MODRM_REG, 0x002D), + /* F8 */ 0x0053, + /* F9 */ 0x0538, + /* FA */ 0x0057, + /* FB */ 0x053B, + /* FC */ 0x0054, + /* FD */ 0x0539, + /* FE */ VX_NODE(OTNT_MODRM_REG, 0x002E), + /* FF */ VX_NODE(OTNT_MODRM_REG, 0x002F), + }, + { + /* 00 */ VX_NODE(OTNT_MANDATORY, 0x0000), + /* 01 */ VX_NODE(OTNT_MODRM_MOD, 0x0000), + /* 02 */ VX_NODE(OTNT_MANDATORY, 0x0003), + /* 03 */ VX_NODE(OTNT_MANDATORY, 0x0004), + /* 04 */ VX_INVALID, + /* 05 */ VX_NODE(OTNT_MANDATORY, 0x0005), + /* 06 */ VX_NODE(OTNT_MANDATORY, 0x0006), + /* 07 */ VX_NODE(OTNT_MANDATORY, 0x0007), + /* 08 */ VX_NODE(OTNT_MANDATORY, 0x0008), + /* 09 */ VX_NODE(OTNT_MANDATORY, 0x0009), + /* 0A */ VX_INVALID, + /* 0B */ VX_NODE(OTNT_MANDATORY, 0x000A), + /* 0C */ VX_INVALID, + /* 0D */ VX_NODE(OTNT_MANDATORY, 0x000B), + /* 0E */ VX_NODE(OTNT_MANDATORY, 0x000C), + /* 0F */ VX_NODE(OTNT_AMD3DNOW, 0x0000), + /* 10 */ VX_NODE(OTNT_MANDATORY, 0x000D), + /* 11 */ VX_NODE(OTNT_MANDATORY, 0x000E), + /* 12 */ VX_NODE(OTNT_MODRM_MOD, 0x0001), + /* 13 */ VX_NODE(OTNT_MANDATORY, 0x0011), + /* 14 */ VX_NODE(OTNT_MANDATORY, 0x0012), + /* 15 */ VX_NODE(OTNT_MANDATORY, 0x0013), + /* 16 */ VX_NODE(OTNT_MODRM_MOD, 0x0002), + /* 17 */ VX_NODE(OTNT_MANDATORY, 0x0016), + /* 18 */ VX_NODE(OTNT_MANDATORY, 0x0017), + /* 19 */ VX_NODE(OTNT_MANDATORY, 0x0018), + /* 1A */ VX_NODE(OTNT_MANDATORY, 0x0019), + /* 1B */ VX_NODE(OTNT_MANDATORY, 0x001A), + /* 1C */ VX_NODE(OTNT_MANDATORY, 0x001B), + /* 1D */ VX_NODE(OTNT_MANDATORY, 0x001C), + /* 1E */ VX_NODE(OTNT_MANDATORY, 0x001D), + /* 1F */ VX_NODE(OTNT_MANDATORY, 0x001E), + /* 20 */ VX_NODE(OTNT_MANDATORY, 0x001F), + /* 21 */ VX_NODE(OTNT_MANDATORY, 0x0020), + /* 22 */ VX_NODE(OTNT_MANDATORY, 0x0021), + /* 23 */ VX_NODE(OTNT_MANDATORY, 0x0022), + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_NODE(OTNT_MANDATORY, 0x0023), + /* 29 */ VX_NODE(OTNT_MANDATORY, 0x0024), + /* 2A */ VX_NODE(OTNT_MANDATORY, 0x0025), + /* 2B */ VX_NODE(OTNT_MANDATORY, 0x0026), + /* 2C */ VX_NODE(OTNT_MANDATORY, 0x0027), + /* 2D */ VX_NODE(OTNT_MANDATORY, 0x0028), + /* 2E */ VX_NODE(OTNT_MANDATORY, 0x0029), + /* 2F */ VX_NODE(OTNT_MANDATORY, 0x002A), + /* 30 */ VX_NODE(OTNT_MANDATORY, 0x002B), + /* 31 */ VX_NODE(OTNT_MANDATORY, 0x002C), + /* 32 */ VX_NODE(OTNT_MANDATORY, 0x002D), + /* 33 */ VX_NODE(OTNT_MANDATORY, 0x002E), + /* 34 */ VX_NODE(OTNT_MANDATORY, 0x002F), + /* 35 */ VX_NODE(OTNT_MANDATORY, 0x0030), + /* 36 */ VX_INVALID, + /* 37 */ VX_NODE(OTNT_MANDATORY, 0x0031), + /* 38 */ VX_NODE(OTNT_TABLE, 0x0002), + /* 39 */ VX_INVALID, + /* 3A */ VX_NODE(OTNT_TABLE, 0x0003), + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_NODE(OTNT_MANDATORY, 0x0081), + /* 41 */ VX_NODE(OTNT_MANDATORY, 0x0082), + /* 42 */ VX_NODE(OTNT_MANDATORY, 0x0083), + /* 43 */ VX_NODE(OTNT_MANDATORY, 0x0084), + /* 44 */ VX_NODE(OTNT_MANDATORY, 0x0085), + /* 45 */ VX_NODE(OTNT_MANDATORY, 0x0086), + /* 46 */ VX_NODE(OTNT_MANDATORY, 0x0087), + /* 47 */ VX_NODE(OTNT_MANDATORY, 0x0088), + /* 48 */ VX_NODE(OTNT_MANDATORY, 0x0089), + /* 49 */ VX_NODE(OTNT_MANDATORY, 0x008A), + /* 4A */ VX_NODE(OTNT_MANDATORY, 0x008B), + /* 4B */ VX_NODE(OTNT_MANDATORY, 0x008C), + /* 4C */ VX_NODE(OTNT_MANDATORY, 0x008D), + /* 4D */ VX_NODE(OTNT_MANDATORY, 0x008E), + /* 4E */ VX_NODE(OTNT_MANDATORY, 0x008F), + /* 4F */ VX_NODE(OTNT_MANDATORY, 0x0090), + /* 50 */ VX_NODE(OTNT_MANDATORY, 0x0091), + /* 51 */ VX_NODE(OTNT_MANDATORY, 0x0092), + /* 52 */ VX_NODE(OTNT_MANDATORY, 0x0093), + /* 53 */ VX_NODE(OTNT_MANDATORY, 0x0094), + /* 54 */ VX_NODE(OTNT_MANDATORY, 0x0095), + /* 55 */ VX_NODE(OTNT_MANDATORY, 0x0096), + /* 56 */ VX_NODE(OTNT_MANDATORY, 0x0097), + /* 57 */ VX_NODE(OTNT_MANDATORY, 0x0098), + /* 58 */ VX_NODE(OTNT_MANDATORY, 0x0099), + /* 59 */ VX_NODE(OTNT_MANDATORY, 0x009A), + /* 5A */ VX_NODE(OTNT_MANDATORY, 0x009B), + /* 5B */ VX_NODE(OTNT_MANDATORY, 0x009C), + /* 5C */ VX_NODE(OTNT_MANDATORY, 0x009D), + /* 5D */ VX_NODE(OTNT_MANDATORY, 0x009E), + /* 5E */ VX_NODE(OTNT_MANDATORY, 0x009F), + /* 5F */ VX_NODE(OTNT_MANDATORY, 0x00A0), + /* 60 */ VX_NODE(OTNT_MANDATORY, 0x00A1), + /* 61 */ VX_NODE(OTNT_MANDATORY, 0x00A2), + /* 62 */ VX_NODE(OTNT_MANDATORY, 0x00A3), + /* 63 */ VX_NODE(OTNT_MANDATORY, 0x00A4), + /* 64 */ VX_NODE(OTNT_MANDATORY, 0x00A5), + /* 65 */ VX_NODE(OTNT_MANDATORY, 0x00A6), + /* 66 */ VX_NODE(OTNT_MANDATORY, 0x00A7), + /* 67 */ VX_NODE(OTNT_MANDATORY, 0x00A8), + /* 68 */ VX_NODE(OTNT_MANDATORY, 0x00A9), + /* 69 */ VX_NODE(OTNT_MANDATORY, 0x00AA), + /* 6A */ VX_NODE(OTNT_MANDATORY, 0x00AB), + /* 6B */ VX_NODE(OTNT_MANDATORY, 0x00AC), + /* 6C */ VX_NODE(OTNT_MANDATORY, 0x00AD), + /* 6D */ VX_NODE(OTNT_MANDATORY, 0x00AE), + /* 6E */ VX_NODE(OTNT_MANDATORY, 0x00AF), + /* 6F */ VX_NODE(OTNT_MANDATORY, 0x00B0), + /* 70 */ VX_NODE(OTNT_MANDATORY, 0x00B1), + /* 71 */ VX_NODE(OTNT_MANDATORY, 0x00B2), + /* 72 */ VX_NODE(OTNT_MANDATORY, 0x00B3), + /* 73 */ VX_NODE(OTNT_MANDATORY, 0x00B4), + /* 74 */ VX_NODE(OTNT_MANDATORY, 0x00B5), + /* 75 */ VX_NODE(OTNT_MANDATORY, 0x00B6), + /* 76 */ VX_NODE(OTNT_MANDATORY, 0x00B7), + /* 77 */ VX_NODE(OTNT_MANDATORY, 0x00B8), + /* 78 */ VX_NODE(OTNT_MANDATORY, 0x00B9), + /* 79 */ VX_NODE(OTNT_MANDATORY, 0x00BA), + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_NODE(OTNT_MANDATORY, 0x00BB), + /* 7D */ VX_NODE(OTNT_MANDATORY, 0x00BC), + /* 7E */ VX_NODE(OTNT_MANDATORY, 0x00BD), + /* 7F */ VX_NODE(OTNT_MANDATORY, 0x00BE), + /* 80 */ VX_NODE(OTNT_MANDATORY, 0x00BF), + /* 81 */ VX_NODE(OTNT_MANDATORY, 0x00C0), + /* 82 */ VX_NODE(OTNT_MANDATORY, 0x00C1), + /* 83 */ VX_NODE(OTNT_MANDATORY, 0x00C2), + /* 84 */ VX_NODE(OTNT_MANDATORY, 0x00C3), + /* 85 */ VX_NODE(OTNT_MANDATORY, 0x00C4), + /* 86 */ VX_NODE(OTNT_MANDATORY, 0x00C5), + /* 87 */ VX_NODE(OTNT_MANDATORY, 0x00C6), + /* 88 */ VX_NODE(OTNT_MANDATORY, 0x00C7), + /* 89 */ VX_NODE(OTNT_MANDATORY, 0x00C8), + /* 8A */ VX_NODE(OTNT_MANDATORY, 0x00C9), + /* 8B */ VX_NODE(OTNT_MANDATORY, 0x00CA), + /* 8C */ VX_NODE(OTNT_MANDATORY, 0x00CB), + /* 8D */ VX_NODE(OTNT_MANDATORY, 0x00CC), + /* 8E */ VX_NODE(OTNT_MANDATORY, 0x00CD), + /* 8F */ VX_NODE(OTNT_MANDATORY, 0x00CE), + /* 90 */ VX_NODE(OTNT_MANDATORY, 0x00CF), + /* 91 */ VX_NODE(OTNT_MANDATORY, 0x00D0), + /* 92 */ VX_NODE(OTNT_MANDATORY, 0x00D1), + /* 93 */ VX_NODE(OTNT_MANDATORY, 0x00D2), + /* 94 */ VX_NODE(OTNT_MANDATORY, 0x00D3), + /* 95 */ VX_NODE(OTNT_MANDATORY, 0x00D4), + /* 96 */ VX_NODE(OTNT_MANDATORY, 0x00D5), + /* 97 */ VX_NODE(OTNT_MANDATORY, 0x00D6), + /* 98 */ VX_NODE(OTNT_MANDATORY, 0x00D7), + /* 99 */ VX_NODE(OTNT_MANDATORY, 0x00D8), + /* 9A */ VX_NODE(OTNT_MANDATORY, 0x00D9), + /* 9B */ VX_NODE(OTNT_MANDATORY, 0x00DA), + /* 9C */ VX_NODE(OTNT_MANDATORY, 0x00DB), + /* 9D */ VX_NODE(OTNT_MANDATORY, 0x00DC), + /* 9E */ VX_NODE(OTNT_MANDATORY, 0x00DD), + /* 9F */ VX_NODE(OTNT_MANDATORY, 0x00DE), + /* A0 */ VX_NODE(OTNT_MANDATORY, 0x00DF), + /* A1 */ VX_NODE(OTNT_MANDATORY, 0x00E0), + /* A2 */ VX_NODE(OTNT_MANDATORY, 0x00E1), + /* A3 */ VX_NODE(OTNT_MANDATORY, 0x00E2), + /* A4 */ VX_NODE(OTNT_MANDATORY, 0x00E3), + /* A5 */ VX_NODE(OTNT_MANDATORY, 0x00E4), + /* A6 */ VX_NODE(OTNT_MODRM_MOD, 0x0003), + /* A7 */ VX_NODE(OTNT_MODRM_MOD, 0x0004), + /* A8 */ VX_NODE(OTNT_MANDATORY, 0x00E7), + /* A9 */ VX_NODE(OTNT_MANDATORY, 0x00E8), + /* AA */ VX_NODE(OTNT_MANDATORY, 0x00E9), + /* AB */ VX_NODE(OTNT_MANDATORY, 0x00EA), + /* AC */ VX_NODE(OTNT_MANDATORY, 0x00EB), + /* AD */ VX_NODE(OTNT_MANDATORY, 0x00EC), + /* AE */ VX_NODE(OTNT_MODRM_MOD, 0x0005), + /* AF */ VX_NODE(OTNT_MANDATORY, 0x00EF), + /* B0 */ VX_NODE(OTNT_MANDATORY, 0x00F0), + /* B1 */ VX_NODE(OTNT_MANDATORY, 0x00F1), + /* B2 */ VX_NODE(OTNT_MANDATORY, 0x00F2), + /* B3 */ VX_NODE(OTNT_MANDATORY, 0x00F3), + /* B4 */ VX_NODE(OTNT_MANDATORY, 0x00F4), + /* B5 */ VX_NODE(OTNT_MANDATORY, 0x00F5), + /* B6 */ VX_NODE(OTNT_MANDATORY, 0x00F6), + /* B7 */ VX_NODE(OTNT_MANDATORY, 0x00F7), + /* B8 */ VX_NODE(OTNT_MANDATORY, 0x00F8), + /* B9 */ VX_INVALID, + /* BA */ VX_NODE(OTNT_MANDATORY, 0x00F9), + /* BB */ VX_NODE(OTNT_MANDATORY, 0x00FA), + /* BC */ VX_NODE(OTNT_MANDATORY, 0x00FB), + /* BD */ VX_NODE(OTNT_MANDATORY, 0x00FC), + /* BE */ VX_NODE(OTNT_MANDATORY, 0x00FD), + /* BF */ VX_NODE(OTNT_MANDATORY, 0x00FE), + /* C0 */ VX_NODE(OTNT_MANDATORY, 0x00FF), + /* C1 */ VX_NODE(OTNT_MANDATORY, 0x0100), + /* C2 */ VX_NODE(OTNT_MANDATORY, 0x0101), + /* C3 */ VX_NODE(OTNT_MANDATORY, 0x0102), + /* C4 */ VX_NODE(OTNT_MANDATORY, 0x0103), + /* C5 */ VX_NODE(OTNT_MANDATORY, 0x0104), + /* C6 */ VX_NODE(OTNT_MANDATORY, 0x0105), + /* C7 */ VX_NODE(OTNT_MODRM_MOD, 0x0006), + /* C8 */ VX_NODE(OTNT_MANDATORY, 0x0108), + /* C9 */ VX_NODE(OTNT_MANDATORY, 0x0109), + /* CA */ VX_NODE(OTNT_MANDATORY, 0x010A), + /* CB */ VX_NODE(OTNT_MANDATORY, 0x010B), + /* CC */ VX_NODE(OTNT_MANDATORY, 0x010C), + /* CD */ VX_NODE(OTNT_MANDATORY, 0x010D), + /* CE */ VX_NODE(OTNT_MANDATORY, 0x010E), + /* CF */ VX_NODE(OTNT_MANDATORY, 0x010F), + /* D0 */ VX_NODE(OTNT_MANDATORY, 0x0110), + /* D1 */ VX_NODE(OTNT_MANDATORY, 0x0111), + /* D2 */ VX_NODE(OTNT_MANDATORY, 0x0112), + /* D3 */ VX_NODE(OTNT_MANDATORY, 0x0113), + /* D4 */ VX_NODE(OTNT_MANDATORY, 0x0114), + /* D5 */ VX_NODE(OTNT_MANDATORY, 0x0115), + /* D6 */ VX_NODE(OTNT_MANDATORY, 0x0116), + /* D7 */ VX_NODE(OTNT_MANDATORY, 0x0117), + /* D8 */ VX_NODE(OTNT_MANDATORY, 0x0118), + /* D9 */ VX_NODE(OTNT_MANDATORY, 0x0119), + /* DA */ VX_NODE(OTNT_MANDATORY, 0x011A), + /* DB */ VX_NODE(OTNT_MANDATORY, 0x011B), + /* DC */ VX_NODE(OTNT_MANDATORY, 0x011C), + /* DD */ VX_NODE(OTNT_MANDATORY, 0x011D), + /* DE */ VX_NODE(OTNT_MANDATORY, 0x011E), + /* DF */ VX_NODE(OTNT_MANDATORY, 0x011F), + /* E0 */ VX_NODE(OTNT_MANDATORY, 0x0120), + /* E1 */ VX_NODE(OTNT_MANDATORY, 0x0121), + /* E2 */ VX_NODE(OTNT_MANDATORY, 0x0122), + /* E3 */ VX_NODE(OTNT_MANDATORY, 0x0123), + /* E4 */ VX_NODE(OTNT_MANDATORY, 0x0124), + /* E5 */ VX_NODE(OTNT_MANDATORY, 0x0125), + /* E6 */ VX_NODE(OTNT_MANDATORY, 0x0126), + /* E7 */ VX_NODE(OTNT_MANDATORY, 0x0127), + /* E8 */ VX_NODE(OTNT_MANDATORY, 0x0128), + /* E9 */ VX_NODE(OTNT_MANDATORY, 0x0129), + /* EA */ VX_NODE(OTNT_MANDATORY, 0x012A), + /* EB */ VX_NODE(OTNT_MANDATORY, 0x012B), + /* EC */ VX_NODE(OTNT_MANDATORY, 0x012C), + /* ED */ VX_NODE(OTNT_MANDATORY, 0x012D), + /* EE */ VX_NODE(OTNT_MANDATORY, 0x012E), + /* EF */ VX_NODE(OTNT_MANDATORY, 0x012F), + /* F0 */ VX_NODE(OTNT_MANDATORY, 0x0130), + /* F1 */ VX_NODE(OTNT_MANDATORY, 0x0131), + /* F2 */ VX_NODE(OTNT_MANDATORY, 0x0132), + /* F3 */ VX_NODE(OTNT_MANDATORY, 0x0133), + /* F4 */ VX_NODE(OTNT_MANDATORY, 0x0134), + /* F5 */ VX_NODE(OTNT_MANDATORY, 0x0135), + /* F6 */ VX_NODE(OTNT_MANDATORY, 0x0136), + /* F7 */ VX_NODE(OTNT_MODRM_MOD, 0x0007), + /* F8 */ VX_NODE(OTNT_MANDATORY, 0x0138), + /* F9 */ VX_NODE(OTNT_MANDATORY, 0x0139), + /* FA */ VX_NODE(OTNT_MANDATORY, 0x013A), + /* FB */ VX_NODE(OTNT_MANDATORY, 0x013B), + /* FC */ VX_NODE(OTNT_MANDATORY, 0x013C), + /* FD */ VX_NODE(OTNT_MANDATORY, 0x013D), + /* FE */ VX_NODE(OTNT_MANDATORY, 0x013E), + /* FF */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MANDATORY, 0x0032), + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x0033), + /* 02 */ VX_NODE(OTNT_MANDATORY, 0x0034), + /* 03 */ VX_NODE(OTNT_MANDATORY, 0x0035), + /* 04 */ VX_NODE(OTNT_MANDATORY, 0x0036), + /* 05 */ VX_NODE(OTNT_MANDATORY, 0x0037), + /* 06 */ VX_NODE(OTNT_MANDATORY, 0x0038), + /* 07 */ VX_NODE(OTNT_MANDATORY, 0x0039), + /* 08 */ VX_NODE(OTNT_MANDATORY, 0x003A), + /* 09 */ VX_NODE(OTNT_MANDATORY, 0x003B), + /* 0A */ VX_NODE(OTNT_MANDATORY, 0x003C), + /* 0B */ VX_NODE(OTNT_MANDATORY, 0x003D), + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + /* 10 */ VX_NODE(OTNT_MANDATORY, 0x003E), + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_NODE(OTNT_MANDATORY, 0x003F), + /* 15 */ VX_NODE(OTNT_MANDATORY, 0x0040), + /* 16 */ VX_INVALID, + /* 17 */ VX_NODE(OTNT_MANDATORY, 0x0041), + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_NODE(OTNT_MANDATORY, 0x0042), + /* 1D */ VX_NODE(OTNT_MANDATORY, 0x0043), + /* 1E */ VX_NODE(OTNT_MANDATORY, 0x0044), + /* 1F */ VX_INVALID, + /* 20 */ VX_NODE(OTNT_MANDATORY, 0x0045), + /* 21 */ VX_NODE(OTNT_MANDATORY, 0x0046), + /* 22 */ VX_NODE(OTNT_MANDATORY, 0x0047), + /* 23 */ VX_NODE(OTNT_MANDATORY, 0x0048), + /* 24 */ VX_NODE(OTNT_MANDATORY, 0x0049), + /* 25 */ VX_NODE(OTNT_MANDATORY, 0x004A), + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_NODE(OTNT_MANDATORY, 0x004B), + /* 29 */ VX_NODE(OTNT_MANDATORY, 0x004C), + /* 2A */ VX_NODE(OTNT_MANDATORY, 0x004D), + /* 2B */ VX_NODE(OTNT_MANDATORY, 0x004E), + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_NODE(OTNT_MANDATORY, 0x004F), + /* 31 */ VX_NODE(OTNT_MANDATORY, 0x0050), + /* 32 */ VX_NODE(OTNT_MANDATORY, 0x0051), + /* 33 */ VX_NODE(OTNT_MANDATORY, 0x0052), + /* 34 */ VX_NODE(OTNT_MANDATORY, 0x0053), + /* 35 */ VX_NODE(OTNT_MANDATORY, 0x0054), + /* 36 */ VX_INVALID, + /* 37 */ VX_NODE(OTNT_MANDATORY, 0x0055), + /* 38 */ VX_NODE(OTNT_MANDATORY, 0x0056), + /* 39 */ VX_NODE(OTNT_MANDATORY, 0x0057), + /* 3A */ VX_NODE(OTNT_MANDATORY, 0x0058), + /* 3B */ VX_NODE(OTNT_MANDATORY, 0x0059), + /* 3C */ VX_NODE(OTNT_MANDATORY, 0x005A), + /* 3D */ VX_NODE(OTNT_MANDATORY, 0x005B), + /* 3E */ VX_NODE(OTNT_MANDATORY, 0x005C), + /* 3F */ VX_NODE(OTNT_MANDATORY, 0x005D), + /* 40 */ VX_NODE(OTNT_MANDATORY, 0x005E), + /* 41 */ VX_NODE(OTNT_MANDATORY, 0x005F), + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_NODE(OTNT_MANDATORY, 0x0060), + /* 81 */ VX_NODE(OTNT_MANDATORY, 0x0061), + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_NODE(OTNT_MANDATORY, 0x0062), + /* DC */ VX_NODE(OTNT_MANDATORY, 0x0063), + /* DD */ VX_NODE(OTNT_MANDATORY, 0x0064), + /* DE */ VX_NODE(OTNT_MANDATORY, 0x0065), + /* DF */ VX_NODE(OTNT_MANDATORY, 0x0066), + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_NODE(OTNT_MANDATORY, 0x0067), + /* F1 */ VX_NODE(OTNT_MANDATORY, 0x0068), + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_NODE(OTNT_MANDATORY, 0x0069), + /* 09 */ VX_NODE(OTNT_MANDATORY, 0x006A), + /* 0A */ VX_NODE(OTNT_MANDATORY, 0x006B), + /* 0B */ VX_NODE(OTNT_MANDATORY, 0x006C), + /* 0C */ VX_NODE(OTNT_MANDATORY, 0x006D), + /* 0D */ VX_NODE(OTNT_MANDATORY, 0x006E), + /* 0E */ VX_NODE(OTNT_MANDATORY, 0x006F), + /* 0F */ VX_NODE(OTNT_MANDATORY, 0x0070), + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_NODE(OTNT_MANDATORY, 0x0071), + /* 15 */ VX_NODE(OTNT_MANDATORY, 0x0072), + /* 16 */ VX_NODE(OTNT_MANDATORY, 0x0073), + /* 17 */ VX_NODE(OTNT_MANDATORY, 0x0074), + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_NODE(OTNT_MANDATORY, 0x0075), + /* 21 */ VX_NODE(OTNT_MANDATORY, 0x0076), + /* 22 */ VX_NODE(OTNT_MANDATORY, 0x0077), + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_NODE(OTNT_MANDATORY, 0x0078), + /* 41 */ VX_NODE(OTNT_MANDATORY, 0x0079), + /* 42 */ VX_NODE(OTNT_MANDATORY, 0x007A), + /* 43 */ VX_INVALID, + /* 44 */ VX_NODE(OTNT_MANDATORY, 0x007B), + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ VX_NODE(OTNT_MANDATORY, 0x007C), + /* 61 */ VX_NODE(OTNT_MANDATORY, 0x007D), + /* 62 */ VX_NODE(OTNT_MANDATORY, 0x007E), + /* 63 */ VX_NODE(OTNT_MANDATORY, 0x007F), + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_NODE(OTNT_MANDATORY, 0x0080), + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + /* 10 */ 0x05E6, + /* 11 */ 0x05E5, + /* 12 */ VX_NODE(OTNT_MODRM_MOD, 0x0008), + /* 13 */ 0x05CC, + /* 14 */ 0x0698, + /* 15 */ 0x0696, + /* 16 */ VX_NODE(OTNT_MODRM_MOD, 0x0009), + /* 17 */ 0x05C7, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ 0x05B8, + /* 29 */ 0x05B7, + /* 2A */ VX_INVALID, + /* 2B */ 0x05D2, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ 0x0694, + /* 2F */ 0x0581, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ 0x05CE, + /* 51 */ 0x0689, + /* 52 */ 0x0684, + /* 53 */ 0x067E, + /* 54 */ 0x0575, + /* 55 */ 0x0573, + /* 56 */ 0x05F6, + /* 57 */ 0x069A, + /* 58 */ 0x0567, + /* 59 */ 0x05EF, + /* 5A */ 0x0587, + /* 5B */ 0x0583, + /* 5C */ 0x068E, + /* 5D */ 0x05AF, + /* 5E */ 0x0593, + /* 5F */ 0x05A9, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_NODE(OTNT_VEXL, 0x0000), + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_NODE(OTNT_MODRM_MOD, 0x000A), + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ 0x057D, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ 0x0687, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + /* 10 */ 0x05E4, + /* 11 */ 0x05E3, + /* 12 */ VX_NODE(OTNT_MODRM_MOD, 0x000B), + /* 13 */ 0x05CA, + /* 14 */ 0x0697, + /* 15 */ 0x0695, + /* 16 */ VX_NODE(OTNT_MODRM_MOD, 0x000C), + /* 17 */ 0x05C5, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ 0x05B5, + /* 29 */ 0x05B6, + /* 2A */ VX_INVALID, + /* 2B */ 0x05D1, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ 0x0693, + /* 2F */ 0x0580, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ 0x05CD, + /* 51 */ 0x0688, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ 0x0574, + /* 55 */ 0x0572, + /* 56 */ 0x05F5, + /* 57 */ 0x0699, + /* 58 */ 0x0566, + /* 59 */ 0x05EE, + /* 5A */ 0x0585, + /* 5B */ 0x0586, + /* 5C */ 0x068D, + /* 5D */ 0x05AE, + /* 5E */ 0x0592, + /* 5F */ 0x05A8, + /* 60 */ 0x0679, + /* 61 */ 0x067C, + /* 62 */ 0x067A, + /* 63 */ 0x05FB, + /* 64 */ 0x0614, + /* 65 */ 0x0617, + /* 66 */ 0x0615, + /* 67 */ 0x05FD, + /* 68 */ 0x0675, + /* 69 */ 0x0678, + /* 6A */ 0x0676, + /* 6B */ 0x05FA, + /* 6C */ 0x067B, + /* 6D */ 0x0677, + /* 6E */ VX_NODE(OTNT_OPERAND_SIZE, 0x0014), + /* 6F */ 0x05BF, + /* 70 */ 0x0654, + /* 71 */ VX_NODE(OTNT_MODRM_REG, 0x001B), + /* 72 */ VX_NODE(OTNT_MODRM_REG, 0x001C), + /* 73 */ VX_NODE(OTNT_MODRM_REG, 0x001D), + /* 74 */ 0x060E, + /* 75 */ 0x0611, + /* 76 */ 0x060F, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ 0x059C, + /* 7D */ 0x059E, + /* 7E */ VX_NODE(OTNT_OPERAND_SIZE, 0x0015), + /* 7F */ 0x05C0, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ 0x057C, + /* C3 */ VX_INVALID, + /* C4 */ 0x0630, + /* C5 */ 0x0623, + /* C6 */ 0x0686, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ 0x056A, + /* D1 */ 0x066B, + /* D2 */ 0x0665, + /* D3 */ 0x0669, + /* D4 */ 0x0600, + /* D5 */ 0x0650, + /* D6 */ 0x05D4, + /* D7 */ VX_NODE(OTNT_VEXL, 0x0004), + /* D8 */ 0x0671, + /* D9 */ 0x0672, + /* DA */ 0x063C, + /* DB */ 0x0607, + /* DC */ 0x0603, + /* DD */ 0x0604, + /* DE */ 0x0636, + /* DF */ 0x0608, + /* E0 */ 0x0609, + /* E1 */ 0x0663, + /* E2 */ 0x0662, + /* E3 */ 0x060A, + /* E4 */ 0x064D, + /* E5 */ 0x064E, + /* E6 */ 0x058E, + /* E7 */ 0x05CF, + /* E8 */ 0x066F, + /* E9 */ 0x0670, + /* EA */ 0x063B, + /* EB */ 0x0651, + /* EC */ 0x0601, + /* ED */ 0x0602, + /* EE */ 0x0635, + /* EF */ 0x067D, + /* F0 */ VX_INVALID, + /* F1 */ VX_NODE(OTNT_VEXL, 0x0005), + /* F2 */ VX_NODE(OTNT_VEXL, 0x0006), + /* F3 */ VX_NODE(OTNT_VEXL, 0x0007), + /* F4 */ VX_INVALID, + /* F5 */ 0x0632, + /* F6 */ 0x0652, + /* F7 */ VX_NODE(OTNT_MODRM_MOD, 0x000D), + /* F8 */ 0x066C, + /* F9 */ 0x0673, + /* FA */ 0x066D, + /* FB */ 0x066E, + /* FC */ 0x05FE, + /* FD */ 0x0605, + /* FE */ 0x05FF, + /* FF */ VX_INVALID, + }, + { + /* 00 */ 0x0653, + /* 01 */ 0x0627, + /* 02 */ 0x0625, + /* 03 */ 0x0626, + /* 04 */ 0x0631, + /* 05 */ 0x062B, + /* 06 */ 0x0629, + /* 07 */ 0x062A, + /* 08 */ 0x0657, + /* 09 */ 0x0659, + /* 0A */ 0x0658, + /* 0B */ 0x064C, + /* 0C */ VX_NODE(OTNT_VEXW, 0x0000), + /* 0D */ VX_NODE(OTNT_VEXW, 0x0001), + /* 0E */ VX_NODE(OTNT_VEXW, 0x0002), + /* 0F */ VX_NODE(OTNT_VEXW, 0x0003), + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, + /* 17 */ 0x0674, + /* 18 */ VX_NODE(OTNT_VEXW, 0x0004), + /* 19 */ VX_NODE(OTNT_VEXW, 0x0005), + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ 0x05F7, + /* 1D */ 0x05F9, + /* 1E */ 0x05F8, + /* 1F */ VX_INVALID, + /* 20 */ 0x0642, + /* 21 */ 0x0640, + /* 22 */ 0x0641, + /* 23 */ 0x0643, + /* 24 */ 0x0644, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ 0x064B, + /* 29 */ 0x0610, + /* 2A */ 0x05D0, + /* 2B */ 0x05FC, + /* 2C */ VX_NODE(OTNT_VEXW, 0x0006), + /* 2D */ VX_NODE(OTNT_VEXW, 0x0007), + /* 2E */ VX_NODE(OTNT_VEXW, 0x0008), + /* 2F */ VX_NODE(OTNT_VEXW, 0x0009), + /* 30 */ 0x0647, + /* 31 */ 0x0645, + /* 32 */ 0x0646, + /* 33 */ 0x0649, + /* 34 */ 0x064A, + /* 35 */ 0x0648, + /* 36 */ VX_INVALID, + /* 37 */ 0x0616, + /* 38 */ 0x0639, + /* 39 */ 0x063A, + /* 3A */ 0x063E, + /* 3B */ 0x063D, + /* 3C */ 0x0633, + /* 3D */ 0x0634, + /* 3E */ 0x0638, + /* 3F */ 0x0637, + /* 40 */ 0x064F, + /* 41 */ 0x0628, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ 0x0570, + /* DC */ 0x056E, + /* DD */ 0x056F, + /* DE */ 0x056C, + /* DF */ 0x056D, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_NODE(OTNT_VEXW, 0x000A), + /* 05 */ VX_NODE(OTNT_VEXW, 0x000B), + /* 06 */ VX_NODE(OTNT_VEXW, 0x000C), + /* 07 */ VX_INVALID, + /* 08 */ 0x0681, + /* 09 */ 0x0680, + /* 0A */ 0x0683, + /* 0B */ 0x0682, + /* 0C */ 0x0577, + /* 0D */ 0x0576, + /* 0E */ 0x060C, + /* 0F */ 0x0606, + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_NODE(OTNT_VEXW, 0x000D), + /* 15 */ 0x0624, + /* 16 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0016), + /* 17 */ 0x059B, + /* 18 */ VX_NODE(OTNT_VEXW, 0x0011), + /* 19 */ VX_NODE(OTNT_VEXW, 0x0012), + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_NODE(OTNT_VEXW, 0x0013), + /* 21 */ 0x05A1, + /* 22 */ VX_NODE(OTNT_MODE, 0x0025), + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ 0x0597, + /* 41 */ 0x0596, + /* 42 */ 0x05E7, + /* 43 */ VX_INVALID, + /* 44 */ 0x060D, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_NODE(OTNT_VEXW, 0x0016), + /* 4B */ VX_NODE(OTNT_VEXW, 0x0017), + /* 4C */ VX_NODE(OTNT_VEXW, 0x0018), + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ 0x0613, + /* 61 */ 0x0612, + /* 62 */ 0x0619, + /* 63 */ 0x0618, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ 0x0571, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + /* 10 */ VX_NODE(OTNT_MODRM_MOD, 0x000E), + /* 11 */ VX_NODE(OTNT_MODRM_MOD, 0x000F), + /* 12 */ VX_NODE(OTNT_MODRM_MOD, 0x0010), + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_NODE(OTNT_MODRM_MOD, 0x0011), + /* 17 */ VX_INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ 0x058B, + /* 2B */ VX_INVALID, + /* 2C */ 0x0591, + /* 2D */ 0x058D, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ 0x068B, + /* 52 */ 0x0685, + /* 53 */ 0x067F, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ 0x0569, + /* 59 */ 0x05F1, + /* 5A */ 0x058C, + /* 5B */ 0x058F, + /* 5C */ 0x0690, + /* 5D */ 0x05B1, + /* 5E */ 0x0595, + /* 5F */ 0x05AB, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ 0x05C2, + /* 70 */ 0x0655, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ 0x05D3, + /* 7F */ 0x05C1, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ 0x057F, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ 0x0582, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + /* 10 */ VX_NODE(OTNT_MODRM_MOD, 0x0012), + /* 11 */ VX_NODE(OTNT_MODRM_MOD, 0x0013), + /* 12 */ VX_NODE(OTNT_MODRM_MOD, 0x0014), + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, + /* 17 */ VX_INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ 0x058A, + /* 2B */ VX_INVALID, + /* 2C */ 0x0590, + /* 2D */ 0x0588, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ 0x068A, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ 0x0568, + /* 59 */ 0x05F0, + /* 5A */ 0x0589, + /* 5B */ VX_INVALID, + /* 5C */ 0x068F, + /* 5D */ 0x05B0, + /* 5E */ 0x0594, + /* 5F */ 0x05AA, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ 0x0656, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ 0x059D, + /* 7D */ 0x059F, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ 0x057E, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ 0x056B, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ 0x0584, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ 0x05A2, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, +}; + +const VXOpcodeTreeNode vxOptreeModrmMod[][2] = +{ + { + /* 00 */ VX_NODE(OTNT_MANDATORY, 0x0001), + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x0002), + }, + { + /* 00 */ VX_NODE(OTNT_MANDATORY, 0x000F), + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x0010), + }, + { + /* 00 */ VX_NODE(OTNT_MANDATORY, 0x0014), + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x0015), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x00E5), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x00E6), + }, + { + /* 00 */ VX_NODE(OTNT_MANDATORY, 0x00ED), + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x00EE), + }, + { + /* 00 */ VX_NODE(OTNT_MANDATORY, 0x0106), + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x0107), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_NODE(OTNT_MANDATORY, 0x0137), + }, + { + /* 00 */ 0x05CB, + /* 01 */ 0x05C3, + }, + { + /* 00 */ 0x05C6, + /* 01 */ 0x05C8, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x001A), + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05C9, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05C4, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05A3, + }, + { + /* 00 */ 0x05E2, + /* 01 */ 0x05DF, + }, + { + /* 00 */ 0x05E0, + /* 01 */ 0x05E1, + }, + { + /* 00 */ 0x05DE, + /* 01 */ 0x05DD, + }, + { + /* 00 */ 0x05DB, + /* 01 */ 0x05DC, + }, + { + /* 00 */ 0x05DA, + /* 01 */ 0x05D9, + }, + { + /* 00 */ 0x05D8, + /* 01 */ 0x05D7, + }, + { + /* 00 */ 0x05BE, + /* 01 */ 0x05BD, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0024), + /* 01 */ VX_NODE(OTNT_X87, 0x0000), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0025), + /* 01 */ VX_NODE(OTNT_X87, 0x0001), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0026), + /* 01 */ VX_NODE(OTNT_X87, 0x0002), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0027), + /* 01 */ VX_NODE(OTNT_X87, 0x0003), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0028), + /* 01 */ VX_NODE(OTNT_X87, 0x0004), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0029), + /* 01 */ VX_NODE(OTNT_X87, 0x0005), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x002A), + /* 01 */ VX_NODE(OTNT_X87, 0x0006), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x002B), + /* 01 */ VX_NODE(OTNT_X87, 0x0007), + }, +}; + +const VXOpcodeTreeNode vxOptreeModrmReg[][8] = +{ + { + /* 00 */ 0x0531, + /* 01 */ 0x0541, + /* 02 */ 0x02FC, + /* 03 */ 0x0309, + /* 04 */ 0x0598, + /* 05 */ 0x0599, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x0516, + /* 01 */ 0x052F, + /* 02 */ 0x02F9, + /* 03 */ 0x02FB, + /* 04 */ 0x0533, + /* 05 */ VX_INVALID, + /* 06 */ 0x02FE, + /* 07 */ 0x02C0, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_RM, 0x0000), + /* 01 */ VX_NODE(OTNT_MODRM_RM, 0x0001), + /* 02 */ VX_NODE(OTNT_MODRM_RM, 0x0002), + /* 03 */ VX_NODE(OTNT_MODRM_RM, 0x0003), + /* 04 */ 0x0532, + /* 05 */ VX_INVALID, + /* 06 */ 0x02FD, + /* 07 */ VX_NODE(OTNT_MODRM_RM, 0x0004), + }, + { + /* 00 */ 0x0455, + /* 01 */ 0x0456, + /* 02 */ 0x0457, + /* 03 */ 0x0458, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x0486, + /* 03 */ VX_INVALID, + /* 04 */ 0x0479, + /* 05 */ VX_INVALID, + /* 06 */ 0x0470, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x0485, + /* 03 */ VX_INVALID, + /* 04 */ 0x0478, + /* 05 */ VX_INVALID, + /* 06 */ 0x0473, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x047E, + /* 03 */ VX_INVALID, + /* 04 */ 0x0475, + /* 05 */ VX_INVALID, + /* 06 */ 0x0468, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x047C, + /* 03 */ VX_INVALID, + /* 04 */ 0x0476, + /* 05 */ VX_INVALID, + /* 06 */ 0x046A, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x0482, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ 0x046D, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x0481, + /* 03 */ 0x0480, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ 0x046C, + /* 07 */ 0x046B, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_RM, 0x0005), + /* 01 */ VX_NODE(OTNT_MODRM_RM, 0x0006), + /* 02 */ VX_NODE(OTNT_MODRM_RM, 0x0007), + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_RM, 0x0008), + /* 01 */ VX_NODE(OTNT_MODRM_RM, 0x0009), + /* 02 */ VX_NODE(OTNT_MODRM_RM, 0x000A), + /* 03 */ VX_NODE(OTNT_MODRM_RM, 0x000B), + /* 04 */ VX_NODE(OTNT_MODRM_RM, 0x000C), + /* 05 */ VX_NODE(OTNT_MODRM_RM, 0x000D), + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x0296, + /* 01 */ 0x0295, + /* 02 */ 0x02F2, + /* 03 */ 0x053C, + /* 04 */ 0x06C0, + /* 05 */ 0x06BF, + /* 06 */ VX_INVALID, + /* 07 */ 0x0055, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ 0x02F7, + /* 06 */ 0x0310, + /* 07 */ 0x0515, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ 0x0043, + /* 05 */ 0x0049, + /* 06 */ 0x0047, + /* 07 */ 0x0045, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0006), + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_NODE(OTNT_VENDOR, 0x0015), + /* 07 */ VX_NODE(OTNT_VENDOR, 0x0016), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_NODE(OTNT_VENDOR, 0x0017), + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_NODE(OTNT_VENDOR, 0x0018), + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ 0x04D3, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x000F, + /* 01 */ 0x0392, + /* 02 */ 0x0005, + /* 03 */ 0x04FF, + /* 04 */ 0x0028, + /* 05 */ 0x0544, + /* 06 */ 0x06BC, + /* 07 */ 0x006E, + }, + { + /* 00 */ 0x0013, + /* 01 */ 0x0391, + /* 02 */ 0x0009, + /* 03 */ 0x0500, + /* 04 */ 0x0029, + /* 05 */ 0x0543, + /* 06 */ 0x06B5, + /* 07 */ 0x0072, + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x0015), + /* 01 */ VX_NODE(OTNT_MODE, 0x0016), + /* 02 */ VX_NODE(OTNT_MODE, 0x0017), + /* 03 */ VX_NODE(OTNT_MODE, 0x0018), + /* 04 */ VX_NODE(OTNT_MODE, 0x0019), + /* 05 */ VX_NODE(OTNT_MODE, 0x001A), + /* 06 */ VX_NODE(OTNT_MODE, 0x001B), + /* 07 */ VX_NODE(OTNT_MODE, 0x001C), + }, + { + /* 00 */ 0x0012, + /* 01 */ 0x0397, + /* 02 */ 0x0008, + /* 03 */ 0x04FD, + /* 04 */ 0x002B, + /* 05 */ 0x0545, + /* 06 */ 0x06B4, + /* 07 */ 0x0071, + }, + { + /* 00 */ 0x0440, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x04DE, + /* 01 */ 0x04E6, + /* 02 */ 0x04C6, + /* 03 */ 0x04D0, + /* 04 */ 0x0517, + /* 05 */ 0x0526, + /* 06 */ 0x051D, + /* 07 */ 0x04F3, + }, + { + /* 00 */ 0x04DF, + /* 01 */ 0x04E7, + /* 02 */ 0x04C7, + /* 03 */ 0x04CE, + /* 04 */ 0x051C, + /* 05 */ 0x0528, + /* 06 */ 0x051E, + /* 07 */ 0x04F6, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x068C, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x066A, + /* 03 */ VX_INVALID, + /* 04 */ 0x0664, + /* 05 */ VX_INVALID, + /* 06 */ VX_NODE(OTNT_VEXL, 0x0001), + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x0666, + /* 03 */ VX_INVALID, + /* 04 */ 0x0661, + /* 05 */ VX_INVALID, + /* 06 */ VX_NODE(OTNT_VEXL, 0x0002), + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x0668, + /* 03 */ 0x0667, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_NODE(OTNT_VEXL, 0x0003), + /* 07 */ 0x065C, + }, + { + /* 00 */ 0x0333, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x0332, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x04DD, + /* 01 */ 0x04E5, + /* 02 */ 0x04C8, + /* 03 */ 0x04CD, + /* 04 */ 0x0522, + /* 05 */ 0x0527, + /* 06 */ 0x051F, + /* 07 */ 0x04F1, + }, + { + /* 00 */ 0x04DC, + /* 01 */ 0x04E2, + /* 02 */ 0x04C5, + /* 03 */ 0x04CF, + /* 04 */ 0x0520, + /* 05 */ 0x052A, + /* 06 */ 0x0519, + /* 07 */ 0x04F4, + }, + { + /* 00 */ 0x04E1, + /* 01 */ 0x04E3, + /* 02 */ 0x04C3, + /* 03 */ 0x04CC, + /* 04 */ 0x0521, + /* 05 */ 0x0529, + /* 06 */ 0x051A, + /* 07 */ 0x04F2, + }, + { + /* 00 */ 0x04E0, + /* 01 */ 0x04E4, + /* 02 */ 0x04C4, + /* 03 */ 0x04CB, + /* 04 */ 0x0518, + /* 05 */ 0x0525, + /* 06 */ 0x051B, + /* 07 */ 0x04F5, + }, + { + /* 00 */ 0x00BB, + /* 01 */ 0x01CF, + /* 02 */ 0x0119, + /* 03 */ 0x013D, + /* 04 */ 0x022C, + /* 05 */ 0x0245, + /* 06 */ 0x0166, + /* 07 */ 0x0171, + }, + { + /* 00 */ 0x01BC, + /* 01 */ VX_INVALID, + /* 02 */ 0x01FF, + /* 03 */ 0x020B, + /* 04 */ 0x01C3, + /* 05 */ 0x01C2, + /* 06 */ 0x01EB, + /* 07 */ 0x01EA, + }, + { + /* 00 */ 0x019A, + /* 01 */ 0x01A8, + /* 02 */ 0x019C, + /* 03 */ 0x019F, + /* 04 */ 0x01B3, + /* 05 */ 0x01B5, + /* 06 */ 0x01A1, + /* 07 */ 0x01A3, + }, + { + /* 00 */ 0x01A4, + /* 01 */ 0x01B1, + /* 02 */ 0x01AB, + /* 03 */ 0x01AD, + /* 04 */ VX_INVALID, + /* 05 */ 0x01BA, + /* 06 */ VX_INVALID, + /* 07 */ 0x020A, + }, + { + /* 00 */ 0x00BA, + /* 01 */ 0x01D2, + /* 02 */ 0x0118, + /* 03 */ 0x013E, + /* 04 */ 0x022B, + /* 05 */ 0x0243, + /* 06 */ 0x0158, + /* 07 */ 0x017A, + }, + { + /* 00 */ 0x01BB, + /* 01 */ 0x01AF, + /* 02 */ 0x01FE, + /* 03 */ 0x0209, + /* 04 */ 0x01F3, + /* 05 */ VX_INVALID, + /* 06 */ 0x01E8, + /* 07 */ 0x01ED, + }, + { + /* 00 */ 0x019B, + /* 01 */ 0x01A7, + /* 02 */ 0x019D, + /* 03 */ 0x019E, + /* 04 */ 0x01B2, + /* 05 */ 0x01B4, + /* 06 */ 0x01A0, + /* 07 */ 0x01A2, + }, + { + /* 00 */ 0x01A6, + /* 01 */ 0x01B0, + /* 02 */ 0x01AA, + /* 03 */ 0x01AE, + /* 04 */ 0x00D2, + /* 05 */ 0x01A5, + /* 06 */ 0x00D3, + /* 07 */ 0x01AC, + }, + { + /* 00 */ 0x0557, + /* 01 */ 0x0558, + /* 02 */ 0x038E, + /* 03 */ 0x0385, + /* 04 */ 0x037E, + /* 05 */ 0x02A5, + /* 06 */ 0x00AC, + /* 07 */ 0x02A0, + }, + { + /* 00 */ 0x0559, + /* 01 */ 0x055A, + /* 02 */ 0x038D, + /* 03 */ 0x0384, + /* 04 */ 0x037D, + /* 05 */ 0x02A3, + /* 06 */ 0x00AB, + /* 07 */ 0x02A1, + }, + { + /* 00 */ 0x02AF, + /* 01 */ 0x00A4, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x02B0, + /* 01 */ 0x00A5, + /* 02 */ VX_NODE(OTNT_MODE, 0x002C), + /* 03 */ 0x004C, + /* 04 */ 0x02D9, + /* 05 */ 0x02DA, + /* 06 */ 0x04B8, + /* 07 */ VX_INVALID, + }, +}; + +const VXOpcodeTreeNode vxOptreeModrmRm[][8] = +{ + { + /* 00 */ VX_INVALID, + /* 01 */ VX_NODE(OTNT_VENDOR, 0x0000), + /* 02 */ VX_NODE(OTNT_VENDOR, 0x0001), + /* 03 */ VX_NODE(OTNT_VENDOR, 0x0002), + /* 04 */ VX_NODE(OTNT_VENDOR, 0x0003), + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x0315, + /* 01 */ 0x0383, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06B1, + /* 01 */ 0x06C1, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VENDOR, 0x0004), + /* 01 */ VX_NODE(OTNT_VENDOR, 0x0005), + /* 02 */ VX_NODE(OTNT_VENDOR, 0x0006), + /* 03 */ VX_NODE(OTNT_VENDOR, 0x0007), + /* 04 */ VX_NODE(OTNT_VENDOR, 0x0008), + /* 05 */ VX_NODE(OTNT_VENDOR, 0x0009), + /* 06 */ VX_NODE(OTNT_VENDOR, 0x000A), + /* 07 */ VX_NODE(OTNT_VENDOR, 0x000B), + }, + { + /* 00 */ 0x0550, + /* 01 */ VX_NODE(OTNT_VENDOR, 0x000C), + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x0316, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06C2, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06C3, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06C4, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06AF, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06AC, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06AE, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06AD, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, + { + /* 00 */ 0x06B0, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + }, +}; + +const VXOpcodeTreeNode vxOptreeMandatory[][4] = +{ + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0000), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0001), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0002), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02F0, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0307, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0551, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0058, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0556, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02BD, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x069E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0561, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0454, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0189, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0379, + /* 01 */ 0x0368, + /* 02 */ 0x0371, + /* 03 */ 0x0377, + }, + { + /* 00 */ 0x0378, + /* 01 */ 0x036A, + /* 02 */ 0x0370, + /* 03 */ 0x0376, + }, + { + /* 00 */ 0x0355, + /* 01 */ 0x0345, + /* 02 */ 0x036D, + /* 03 */ 0x0353, + }, + { + /* 00 */ 0x034C, + /* 01 */ 0x0346, + /* 02 */ 0x036E, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0354, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0352, + }, + { + /* 00 */ 0x0565, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0564, + }, + { + /* 00 */ 0x0563, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0562, + }, + { + /* 00 */ 0x0350, + /* 01 */ VX_INVALID, + /* 02 */ 0x036B, + /* 03 */ 0x034E, + }, + { + /* 00 */ 0x0351, + /* 01 */ VX_INVALID, + /* 02 */ 0x036C, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x034F, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x034D, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0003), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x038A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x038B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x038C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0389, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0386, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0387, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0388, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0325, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0328, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0327, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0326, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x033A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0338, + }, + { + /* 00 */ 0x0339, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0337, + }, + { + /* 00 */ 0x008D, + /* 01 */ 0x0093, + /* 02 */ 0x0094, + /* 03 */ 0x008C, + }, + { + /* 00 */ 0x035C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x035B, + }, + { + /* 00 */ 0x009A, + /* 01 */ 0x009B, + /* 02 */ 0x009C, + /* 03 */ 0x0098, + }, + { + /* 00 */ 0x0090, + /* 01 */ 0x0091, + /* 02 */ 0x0096, + /* 03 */ 0x008A, + }, + { + /* 00 */ 0x0560, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x055F, + }, + { + /* 00 */ 0x0082, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0081, + }, + { + /* 00 */ 0x069F, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x04D4, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x04D1, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x04D2, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x0003), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x0004), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x029A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x045B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x045C, + }, + { + /* 00 */ 0x03FD, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03FE, + }, + { + /* 00 */ 0x03FA, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03F9, + }, + { + /* 00 */ 0x03FB, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03FC, + }, + { + /* 00 */ 0x040E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x040F, + }, + { + /* 00 */ 0x0405, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0404, + }, + { + /* 00 */ 0x0400, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0401, + }, + { + /* 00 */ 0x0402, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0403, + }, + { + /* 00 */ 0x0461, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0462, + }, + { + /* 00 */ 0x0466, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0465, + }, + { + /* 00 */ 0x0464, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0463, + }, + { + /* 00 */ 0x0431, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0432, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03CA, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0037, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0036, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x049A, + }, + { + /* 00 */ 0x03A3, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03A2, + }, + { + /* 00 */ 0x03A6, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03A7, + }, + { + /* 00 */ 0x03A4, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03A5, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0426, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0424, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0425, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0428, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0429, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0427, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0430, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03D1, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0359, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03AC, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x042C, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x042A, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x042B, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x042E, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x042F, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x042D, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03DA, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x041A, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x041B, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0421, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0420, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0412, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0413, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0419, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0418, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0438, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03FF, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_MODE, 0x0005), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_MODE, 0x0006), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0023, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0021, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0022, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x001F, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0020, + }, + { + /* 00 */ 0x033B, + /* 01 */ 0x0086, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x033C, + /* 01 */ 0x0085, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04E9, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04E8, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04EB, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04EA, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0035, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0034, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03CB, + }, + { + /* 00 */ 0x03BF, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03C0, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03DF, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03E3, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0000), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x00B5, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0408, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x02B7, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0001), + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x00B2, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x00B1, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x037C, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03CC, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03D5, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03D4, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03DE, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03DD, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0024, + }, + { + /* 00 */ 0x0067, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0064, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x005C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x005B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x005E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0063, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x005D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x005A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0069, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0066, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0068, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0065, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0061, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0060, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0062, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x005F, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0357, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0356, + }, + { + /* 00 */ 0x0535, + /* 01 */ 0x0536, + /* 02 */ 0x0537, + /* 03 */ 0x0534, + }, + { + /* 00 */ 0x04ED, + /* 01 */ VX_INVALID, + /* 02 */ 0x04EE, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x04C9, + /* 01 */ VX_INVALID, + /* 02 */ 0x04CA, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0032, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0031, + }, + { + /* 00 */ 0x0030, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x002F, + }, + { + /* 00 */ 0x039A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0399, + }, + { + /* 00 */ 0x06BE, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x06BD, + }, + { + /* 00 */ 0x001A, + /* 01 */ 0x001B, + /* 02 */ 0x001C, + /* 03 */ 0x0019, + }, + { + /* 00 */ 0x0380, + /* 01 */ 0x0381, + /* 02 */ 0x0382, + /* 03 */ 0x037F, + }, + { + /* 00 */ 0x008F, + /* 01 */ 0x0092, + /* 02 */ 0x0095, + /* 03 */ 0x008B, + }, + { + /* 00 */ 0x0088, + /* 01 */ VX_INVALID, + /* 02 */ 0x0099, + /* 03 */ 0x008E, + }, + { + /* 00 */ 0x054D, + /* 01 */ 0x054E, + /* 02 */ 0x054F, + /* 03 */ 0x054C, + }, + { + /* 00 */ 0x0312, + /* 01 */ 0x0313, + /* 02 */ 0x0314, + /* 03 */ 0x0311, + }, + { + /* 00 */ 0x00AE, + /* 01 */ 0x00AF, + /* 02 */ 0x00B0, + /* 03 */ 0x00AD, + }, + { + /* 00 */ 0x030D, + /* 01 */ 0x030E, + /* 02 */ 0x030F, + /* 03 */ 0x030C, + }, + { + /* 00 */ 0x04A2, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04A3, + }, + { + /* 00 */ 0x04A7, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04A8, + }, + { + /* 00 */ 0x04A5, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04A4, + }, + { + /* 00 */ 0x03AA, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03AB, + }, + { + /* 00 */ 0x03D7, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03D6, + }, + { + /* 00 */ 0x03DC, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03DB, + }, + { + /* 00 */ 0x03D8, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03D9, + }, + { + /* 00 */ 0x03AD, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03AE, + }, + { + /* 00 */ 0x049B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x049C, + }, + { + /* 00 */ 0x04A1, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04A0, + }, + { + /* 00 */ 0x049E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x049D, + }, + { + /* 00 */ 0x03A8, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03A9, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04A6, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x049F, + }, + { + /* 00 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0002), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0003), + }, + { + /* 00 */ 0x0363, + /* 01 */ VX_INVALID, + /* 02 */ 0x034A, + /* 03 */ 0x0348, + }, + { + /* 00 */ 0x0460, + /* 01 */ 0x045F, + /* 02 */ 0x045E, + /* 03 */ 0x045D, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0004), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_MODRM_REG, 0x0005), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0006), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_MODRM_REG, 0x0007), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0008), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_NODE(OTNT_MODRM_REG, 0x0009), + }, + { + /* 00 */ 0x03CD, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03CE, + }, + { + /* 00 */ 0x03D2, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03D3, + }, + { + /* 00 */ 0x03D0, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03CF, + }, + { + /* 00 */ 0x00B3, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VENDOR, 0x0013), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VENDOR, 0x0014), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x029C, + /* 02 */ VX_INVALID, + /* 03 */ 0x029B, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x029F, + /* 02 */ VX_INVALID, + /* 03 */ 0x029E, + }, + { + /* 00 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0004), + /* 01 */ VX_INVALID, + /* 02 */ 0x035F, + /* 03 */ VX_NODE(OTNT_OPERAND_SIZE, 0x0005), + }, + { + /* 00 */ 0x0362, + /* 01 */ VX_INVALID, + /* 02 */ 0x034B, + /* 03 */ 0x0349, + }, + { + /* 00 */ 0x02E9, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02E3, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02C9, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02DF, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02CF, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02E0, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02CC, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02C8, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02EE, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02E7, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02EA, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02E4, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02D6, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02D4, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02D7, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02D2, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0512, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x050F, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0507, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0506, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0509, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x050E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0508, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0505, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0514, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0511, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0513, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0510, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x050C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x050B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x050D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x050A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x04B5, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x044A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0083, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0044, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0524, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0523, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x000A), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x000B), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x04B6, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0444, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x04EC, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x004A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x052C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x052B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x000C), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x000D), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02A2, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x007C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x007D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0308, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0048, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02F8, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x02FA, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x037B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x037A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ 0x044D, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x000E), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0046, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0039, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x003A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0373, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0374, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x06A1, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x06A0, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0075, + /* 01 */ 0x0077, + /* 02 */ 0x007A, + /* 03 */ 0x0074, + }, + { + /* 00 */ 0x035A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x040D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x040C, + }, + { + /* 00 */ 0x03E4, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03E5, + }, + { + /* 00 */ 0x052E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x052D, + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x000F), + /* 01 */ VX_INVALID, + /* 02 */ VX_NODE(OTNT_MODRM_REG, 0x0010), + /* 03 */ VX_NODE(OTNT_MODRM_REG, 0x0011), + }, + { + /* 00 */ VX_NODE(OTNT_MODRM_REG, 0x0012), + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x003F, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x003D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0040, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x003C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x003E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x003B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0042, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0041, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x001E, + /* 02 */ VX_INVALID, + /* 03 */ 0x001D, + }, + { + /* 00 */ 0x0487, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0488, + }, + { + /* 00 */ 0x047D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x047F, + }, + { + /* 00 */ 0x0483, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0484, + }, + { + /* 00 */ 0x03B3, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03B4, + }, + { + /* 00 */ 0x0439, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x043A, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x0347, + /* 02 */ 0x0366, + /* 03 */ 0x0361, + }, + { + /* 00 */ 0x0422, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0423, + }, + { + /* 00 */ 0x0494, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0493, + }, + { + /* 00 */ 0x0496, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0495, + }, + { + /* 00 */ 0x041E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x041F, + }, + { + /* 00 */ 0x03C1, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03C2, + }, + { + /* 00 */ 0x03BA, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03B9, + }, + { + /* 00 */ 0x03BB, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03BC, + }, + { + /* 00 */ 0x0417, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0416, + }, + { + /* 00 */ 0x03C3, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03C4, + }, + { + /* 00 */ 0x03C5, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03C6, + }, + { + /* 00 */ 0x047A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x047B, + }, + { + /* 00 */ 0x0477, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0474, + }, + { + /* 00 */ 0x03C8, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03C9, + }, + { + /* 00 */ 0x0434, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0435, + }, + { + /* 00 */ 0x0436, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0437, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x0089, + /* 02 */ 0x0087, + /* 03 */ 0x0097, + }, + { + /* 00 */ 0x035D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0358, + }, + { + /* 00 */ 0x048F, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0490, + }, + { + /* 00 */ 0x0492, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0491, + }, + { + /* 00 */ 0x041C, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x041D, + }, + { + /* 00 */ 0x0453, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0452, + }, + { + /* 00 */ 0x03B6, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03B5, + }, + { + /* 00 */ 0x03B8, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03B7, + }, + { + /* 00 */ 0x0414, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0415, + }, + { + /* 00 */ 0x04C1, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x04C2, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x02F1, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + }, + { + /* 00 */ 0x0472, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0471, + }, + { + /* 00 */ 0x0469, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0467, + }, + { + /* 00 */ 0x046E, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x046F, + }, + { + /* 00 */ 0x043B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x043C, + }, + { + /* 00 */ 0x0411, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0410, + }, + { + /* 00 */ 0x045A, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0459, + }, + { + /* 00 */ 0x030B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x030A, + }, + { + /* 00 */ 0x0489, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x048A, + }, + { + /* 00 */ 0x0498, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x0497, + }, + { + /* 00 */ 0x048B, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x048C, + }, + { + /* 00 */ 0x048D, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x048E, + }, + { + /* 00 */ 0x03AF, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03B0, + }, + { + /* 00 */ 0x03BE, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03BD, + }, + { + /* 00 */ 0x03B1, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ 0x03B2, + }, +}; + +const VXOpcodeTreeNode vxOptreeX87[][64] = +{ + { + /* 00 */ 0x00BC, + /* 01 */ 0x00BF, + /* 02 */ 0x00C2, + /* 03 */ 0x00C1, + /* 04 */ 0x00C0, + /* 05 */ 0x00C5, + /* 06 */ 0x00C3, + /* 07 */ 0x00C4, + /* 08 */ 0x01CE, + /* 09 */ 0x01CD, + /* 0A */ 0x01D9, + /* 0B */ 0x01DA, + /* 0C */ 0x01DB, + /* 0D */ 0x01D6, + /* 0E */ 0x01D7, + /* 0F */ 0x01D8, + /* 10 */ 0x011A, + /* 11 */ 0x011C, + /* 12 */ 0x011B, + /* 13 */ 0x0117, + /* 14 */ 0x0116, + /* 15 */ 0x011D, + /* 16 */ 0x011F, + /* 17 */ 0x011E, + /* 18 */ 0x013A, + /* 19 */ 0x0141, + /* 1A */ 0x013C, + /* 1B */ 0x0138, + /* 1C */ 0x013B, + /* 1D */ 0x0140, + /* 1E */ 0x013F, + /* 1F */ 0x0139, + /* 20 */ 0x022E, + /* 21 */ 0x0226, + /* 22 */ 0x0229, + /* 23 */ 0x0232, + /* 24 */ 0x0231, + /* 25 */ 0x022D, + /* 26 */ 0x022A, + /* 27 */ 0x0227, + /* 28 */ 0x0246, + /* 29 */ 0x024B, + /* 2A */ 0x024C, + /* 2B */ 0x024A, + /* 2C */ 0x0248, + /* 2D */ 0x0249, + /* 2E */ 0x0250, + /* 2F */ 0x0251, + /* 30 */ 0x0161, + /* 31 */ 0x0162, + /* 32 */ 0x0155, + /* 33 */ 0x015A, + /* 34 */ 0x0159, + /* 35 */ 0x0156, + /* 36 */ 0x0157, + /* 37 */ 0x0163, + /* 38 */ 0x0172, + /* 39 */ 0x016F, + /* 3A */ 0x0170, + /* 3B */ 0x0173, + /* 3C */ 0x0176, + /* 3D */ 0x0177, + /* 3E */ 0x0174, + /* 3F */ 0x0175, + }, + { + /* 00 */ 0x01BD, + /* 01 */ 0x01C0, + /* 02 */ 0x01BF, + /* 03 */ 0x01BE, + /* 04 */ 0x01B7, + /* 05 */ 0x01B6, + /* 06 */ 0x01B9, + /* 07 */ 0x01B8, + /* 08 */ 0x0281, + /* 09 */ 0x0282, + /* 0A */ 0x0283, + /* 0B */ 0x0280, + /* 0C */ 0x027D, + /* 0D */ 0x027E, + /* 0E */ 0x027F, + /* 0F */ 0x0284, + /* 10 */ 0x01E7, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, + /* 17 */ VX_INVALID, + /* 18 */ 0x0213, + /* 19 */ 0x0212, + /* 1A */ 0x0215, + /* 1B */ 0x0214, + /* 1C */ 0x020F, + /* 1D */ 0x020E, + /* 1E */ 0x0211, + /* 1F */ 0x0210, + /* 20 */ 0x00D4, + /* 21 */ 0x00B7, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ 0x025A, + /* 25 */ 0x027C, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ 0x01C1, + /* 29 */ 0x01C5, + /* 2A */ 0x01C4, + /* 2B */ 0x01C8, + /* 2C */ 0x01C6, + /* 2D */ 0x01C7, + /* 2E */ 0x01C9, + /* 2F */ VX_INVALID, + /* 30 */ 0x00B6, + /* 31 */ 0x0298, + /* 32 */ 0x01F1, + /* 33 */ 0x01EE, + /* 34 */ 0x0297, + /* 35 */ 0x01F0, + /* 36 */ 0x0154, + /* 37 */ 0x01A9, + /* 38 */ 0x01EF, + /* 39 */ 0x0299, + /* 3A */ 0x01F8, + /* 3B */ 0x01F7, + /* 3C */ 0x01F2, + /* 3D */ 0x01F5, + /* 3E */ 0x01F6, + /* 3F */ 0x0153, + }, + { + /* 00 */ 0x00D9, + /* 01 */ 0x00DA, + /* 02 */ 0x00DB, + /* 03 */ 0x00D6, + /* 04 */ 0x00D7, + /* 05 */ 0x00D8, + /* 06 */ 0x00DD, + /* 07 */ 0x00DC, + /* 08 */ 0x00E6, + /* 09 */ 0x00E7, + /* 0A */ 0x00E8, + /* 0B */ 0x00EC, + /* 0C */ 0x00ED, + /* 0D */ 0x00EB, + /* 0E */ 0x00E9, + /* 0F */ 0x00EA, + /* 10 */ 0x00E4, + /* 11 */ 0x00E5, + /* 12 */ 0x00E2, + /* 13 */ 0x00E3, + /* 14 */ 0x00DF, + /* 15 */ 0x00DE, + /* 16 */ 0x00E0, + /* 17 */ 0x00E1, + /* 18 */ 0x0113, + /* 19 */ 0x0114, + /* 1A */ 0x0115, + /* 1B */ 0x010F, + /* 1C */ 0x010E, + /* 1D */ 0x0110, + /* 1E */ 0x0111, + /* 1F */ 0x0112, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ 0x027B, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + }, + { + /* 00 */ 0x00F0, + /* 01 */ 0x00F1, + /* 02 */ 0x00EE, + /* 03 */ 0x00EF, + /* 04 */ 0x00F4, + /* 05 */ 0x00F5, + /* 06 */ 0x00F2, + /* 07 */ 0x00F3, + /* 08 */ 0x0103, + /* 09 */ 0x0102, + /* 0A */ 0x0105, + /* 0B */ 0x0104, + /* 0C */ 0x00FF, + /* 0D */ 0x00FE, + /* 0E */ 0x0101, + /* 0F */ 0x0100, + /* 10 */ 0x00F8, + /* 11 */ 0x00F9, + /* 12 */ 0x00F6, + /* 13 */ 0x00F7, + /* 14 */ 0x00FC, + /* 15 */ 0x00FD, + /* 16 */ 0x00FA, + /* 17 */ 0x00FB, + /* 18 */ 0x010B, + /* 19 */ 0x010A, + /* 1A */ 0x010D, + /* 1B */ 0x010C, + /* 1C */ 0x0107, + /* 1D */ 0x0106, + /* 1E */ 0x0109, + /* 1F */ 0x0108, + /* 20 */ 0x01E5, + /* 21 */ 0x01E4, + /* 22 */ 0x00D5, + /* 23 */ 0x01E6, + /* 24 */ 0x01E9, + /* 25 */ 0x01F4, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ 0x0269, + /* 29 */ 0x026A, + /* 2A */ 0x0265, + /* 2B */ 0x0264, + /* 2C */ 0x0263, + /* 2D */ 0x0268, + /* 2E */ 0x0267, + /* 2F */ 0x0266, + /* 30 */ 0x0129, + /* 31 */ 0x0128, + /* 32 */ 0x012B, + /* 33 */ 0x012A, + /* 34 */ 0x012F, + /* 35 */ 0x012E, + /* 36 */ 0x012D, + /* 37 */ 0x012C, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + }, + { + /* 00 */ 0x00B9, + /* 01 */ 0x00B8, + /* 02 */ 0x00C6, + /* 03 */ 0x00C9, + /* 04 */ 0x00C8, + /* 05 */ 0x00C7, + /* 06 */ 0x00BE, + /* 07 */ 0x00BD, + /* 08 */ 0x01D1, + /* 09 */ 0x01D0, + /* 0A */ 0x01D5, + /* 0B */ 0x01D4, + /* 0C */ 0x01D3, + /* 0D */ 0x01CC, + /* 0E */ 0x01CB, + /* 0F */ 0x01CA, + /* 10 */ 0x0125, + /* 11 */ 0x0124, + /* 12 */ 0x0127, + /* 13 */ 0x0126, + /* 14 */ 0x0121, + /* 15 */ 0x0120, + /* 16 */ 0x0123, + /* 17 */ 0x0122, + /* 18 */ 0x0148, + /* 19 */ 0x0142, + /* 1A */ 0x0145, + /* 1B */ 0x0144, + /* 1C */ 0x0143, + /* 1D */ 0x0147, + /* 1E */ 0x0146, + /* 1F */ 0x0149, + /* 20 */ 0x024F, + /* 21 */ 0x0247, + /* 22 */ 0x0241, + /* 23 */ 0x0242, + /* 24 */ 0x0240, + /* 25 */ 0x024E, + /* 26 */ 0x024D, + /* 27 */ 0x0244, + /* 28 */ 0x0228, + /* 29 */ 0x0235, + /* 2A */ 0x0234, + /* 2B */ 0x0237, + /* 2C */ 0x0236, + /* 2D */ 0x0233, + /* 2E */ 0x0230, + /* 2F */ 0x022F, + /* 30 */ 0x017B, + /* 31 */ 0x0178, + /* 32 */ 0x0179, + /* 33 */ 0x017C, + /* 34 */ 0x017F, + /* 35 */ 0x0180, + /* 36 */ 0x017D, + /* 37 */ 0x017E, + /* 38 */ 0x015E, + /* 39 */ 0x015F, + /* 3A */ 0x0160, + /* 3B */ 0x015B, + /* 3C */ 0x015C, + /* 3D */ 0x015D, + /* 3E */ 0x0164, + /* 3F */ 0x0165, + }, + { + /* 00 */ 0x018F, + /* 01 */ 0x018E, + /* 02 */ 0x0191, + /* 03 */ 0x0190, + /* 04 */ 0x018B, + /* 05 */ 0x018A, + /* 06 */ 0x018D, + /* 07 */ 0x018C, + /* 08 */ 0x028A, + /* 09 */ 0x0289, + /* 0A */ 0x028C, + /* 0B */ 0x028B, + /* 0C */ 0x0286, + /* 0D */ 0x0285, + /* 0E */ 0x0288, + /* 0F */ 0x0287, + /* 10 */ 0x0200, + /* 11 */ 0x0202, + /* 12 */ 0x0201, + /* 13 */ 0x01FA, + /* 14 */ 0x01F9, + /* 15 */ 0x01FB, + /* 16 */ 0x01FD, + /* 17 */ 0x01FC, + /* 18 */ 0x020D, + /* 19 */ 0x020C, + /* 1A */ 0x0208, + /* 1B */ 0x0204, + /* 1C */ 0x0203, + /* 1D */ 0x0205, + /* 1E */ 0x0207, + /* 1F */ 0x0206, + /* 20 */ 0x025D, + /* 21 */ 0x025C, + /* 22 */ 0x025B, + /* 23 */ 0x025E, + /* 24 */ 0x0261, + /* 25 */ 0x0262, + /* 26 */ 0x025F, + /* 27 */ 0x0260, + /* 28 */ 0x0278, + /* 29 */ 0x0277, + /* 2A */ 0x027A, + /* 2B */ 0x0279, + /* 2C */ 0x0274, + /* 2D */ 0x0273, + /* 2E */ 0x0276, + /* 2F */ 0x0275, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + }, + { + /* 00 */ 0x00CC, + /* 01 */ 0x00CD, + /* 02 */ 0x00CA, + /* 03 */ 0x00CB, + /* 04 */ 0x00D0, + /* 05 */ 0x00D1, + /* 06 */ 0x00CE, + /* 07 */ 0x00CF, + /* 08 */ 0x01E1, + /* 09 */ 0x01E0, + /* 0A */ 0x01E3, + /* 0B */ 0x01E2, + /* 0C */ 0x01DD, + /* 0D */ 0x01DC, + /* 0E */ 0x01DF, + /* 0F */ 0x01DE, + /* 10 */ 0x014F, + /* 11 */ 0x014E, + /* 12 */ 0x0151, + /* 13 */ 0x0150, + /* 14 */ 0x014B, + /* 15 */ 0x014A, + /* 16 */ 0x014D, + /* 17 */ 0x014C, + /* 18 */ VX_INVALID, + /* 19 */ 0x0152, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ 0x0258, + /* 21 */ 0x0259, + /* 22 */ 0x0256, + /* 23 */ 0x0257, + /* 24 */ 0x0253, + /* 25 */ 0x0252, + /* 26 */ 0x0255, + /* 27 */ 0x0254, + /* 28 */ 0x023B, + /* 29 */ 0x023D, + /* 2A */ 0x023C, + /* 2B */ 0x0239, + /* 2C */ 0x0238, + /* 2D */ 0x023A, + /* 2E */ 0x023E, + /* 2F */ 0x023F, + /* 30 */ 0x0186, + /* 31 */ 0x0185, + /* 32 */ 0x0188, + /* 33 */ 0x0187, + /* 34 */ 0x0182, + /* 35 */ 0x0181, + /* 36 */ 0x0184, + /* 37 */ 0x0183, + /* 38 */ 0x016C, + /* 39 */ 0x016B, + /* 3A */ 0x016E, + /* 3B */ 0x016D, + /* 3C */ 0x0168, + /* 3D */ 0x0167, + /* 3E */ 0x016A, + /* 3F */ 0x0169, + }, + { + /* 00 */ 0x0199, + /* 01 */ 0x0196, + /* 02 */ 0x0197, + /* 03 */ 0x0198, + /* 04 */ 0x0193, + /* 05 */ 0x0192, + /* 06 */ 0x0195, + /* 07 */ 0x0194, + /* 08 */ 0x028F, + /* 09 */ 0x0290, + /* 0A */ 0x028D, + /* 0B */ 0x028E, + /* 0C */ 0x0293, + /* 0D */ 0x0294, + /* 0E */ 0x0291, + /* 0F */ 0x0292, + /* 10 */ 0x021B, + /* 11 */ 0x021A, + /* 12 */ 0x021D, + /* 13 */ 0x021C, + /* 14 */ 0x0217, + /* 15 */ 0x0216, + /* 16 */ 0x0219, + /* 17 */ 0x0218, + /* 18 */ 0x0220, + /* 19 */ 0x0221, + /* 1A */ 0x021E, + /* 1B */ 0x021F, + /* 1C */ 0x0224, + /* 1D */ 0x0225, + /* 1E */ 0x0222, + /* 1F */ 0x0223, + /* 20 */ 0x01EC, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ 0x0271, + /* 29 */ 0x0272, + /* 2A */ 0x026D, + /* 2B */ 0x026C, + /* 2C */ 0x026B, + /* 2D */ 0x0270, + /* 2E */ 0x026F, + /* 2F */ 0x026E, + /* 30 */ 0x0136, + /* 31 */ 0x0137, + /* 32 */ 0x0133, + /* 33 */ 0x0134, + /* 34 */ 0x0135, + /* 35 */ 0x0130, + /* 36 */ 0x0131, + /* 37 */ 0x0132, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + }, +}; + +const VXOpcodeTreeNode vxOptreeAddressSize[][3] = +{ + { + /* 00 */ 0x02CD, + /* 01 */ 0x02D0, + /* 02 */ 0x02EC, + }, +}; + +const VXOpcodeTreeNode vxOptreeOperandSize[][3] = +{ + { + /* 00 */ 0x03E0, + /* 01 */ 0x03E1, + /* 02 */ 0x03E2, + }, + { + /* 00 */ 0x0409, + /* 01 */ 0x040A, + /* 02 */ 0x040B, + }, + { + /* 00 */ 0x033D, + /* 01 */ 0x0343, + /* 02 */ 0x035E, + }, + { + /* 00 */ 0x0341, + /* 01 */ 0x0342, + /* 02 */ 0x0364, + }, + { + /* 00 */ 0x0344, + /* 01 */ 0x033E, + /* 02 */ 0x0365, + }, + { + /* 00 */ 0x0340, + /* 01 */ 0x033F, + /* 02 */ 0x0360, + }, + { + /* 00 */ 0x007F, + /* 01 */ 0x0080, + /* 02 */ 0x007E, + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x000F), + /* 01 */ VX_NODE(OTNT_MODE, 0x0010), + /* 02 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x0011), + /* 01 */ VX_NODE(OTNT_MODE, 0x0012), + /* 02 */ VX_INVALID, + }, + { + /* 00 */ 0x02B8, + /* 01 */ 0x02B6, + /* 02 */ VX_INVALID, + }, + { + /* 00 */ 0x03A1, + /* 01 */ 0x03A0, + /* 02 */ VX_INVALID, + }, + { + /* 00 */ 0x0050, + /* 01 */ 0x009E, + /* 02 */ 0x0052, + }, + { + /* 00 */ 0x009D, + /* 01 */ 0x0051, + /* 02 */ 0x0084, + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x001E), + /* 01 */ VX_NODE(OTNT_MODE, 0x001F), + /* 02 */ VX_NODE(OTNT_MODE, 0x0020), + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x0021), + /* 01 */ VX_NODE(OTNT_MODE, 0x0022), + /* 02 */ VX_NODE(OTNT_MODE, 0x0023), + }, + { + /* 00 */ 0x0372, + /* 01 */ 0x0369, + /* 02 */ 0x036F, + }, + { + /* 00 */ 0x007B, + /* 01 */ 0x0078, + /* 02 */ 0x0079, + }, + { + /* 00 */ 0x0540, + /* 01 */ 0x053E, + /* 02 */ 0x053F, + }, + { + /* 00 */ 0x0303, + /* 01 */ 0x0301, + /* 02 */ 0x0302, + }, + { + /* 00 */ 0x0504, + /* 01 */ 0x0502, + /* 02 */ 0x0503, + }, + { + /* 00 */ 0x05BB, + /* 01 */ 0x05BA, + /* 02 */ 0x05D5, + }, + { + /* 00 */ 0x05B9, + /* 01 */ 0x05BC, + /* 02 */ 0x05D6, + }, + { + /* 00 */ VX_NODE(OTNT_VEXW, 0x000E), + /* 01 */ VX_NODE(OTNT_VEXW, 0x000F), + /* 02 */ VX_NODE(OTNT_VEXW, 0x0010), + }, + { + /* 00 */ 0x02C6, + /* 01 */ 0x02C4, + /* 02 */ 0x02C5, + }, +}; + +const VXOpcodeTreeNode vxOptreeMode[][2] = +{ + { + /* 00 */ 0x04AA, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0445, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04AD, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0553, + /* 01 */ VX_NODE(OTNT_VENDOR, 0x000D), + }, + { + /* 00 */ 0x0555, + /* 01 */ VX_NODE(OTNT_VENDOR, 0x000E), + }, + { + /* 00 */ VX_NODE(OTNT_VENDOR, 0x000F), + /* 01 */ VX_NODE(OTNT_VENDOR, 0x0010), + }, + { + /* 00 */ VX_NODE(OTNT_VENDOR, 0x0011), + /* 01 */ VX_NODE(OTNT_VENDOR, 0x0012), + }, + { + /* 00 */ 0x04AC, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0446, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04A9, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0443, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x009F, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x00A0, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0001, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0004, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04BA, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04BB, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x044B, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x044C, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0038, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0033, + /* 01 */ 0x0375, + }, + { + /* 00 */ 0x0011, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0398, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0007, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04FC, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x002A, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0546, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x06B3, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0073, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x004F, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04C0, + /* 01 */ 0x04BF, + }, + { + /* 00 */ 0x04BC, + /* 01 */ 0x04BE, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x04BD, + }, + { + /* 00 */ 0x0451, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x044E, + /* 01 */ 0x0450, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x044F, + }, + { + /* 00 */ 0x02F6, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VEXW, 0x0014), + /* 01 */ VX_NODE(OTNT_VEXW, 0x0015), + }, + { + /* 00 */ 0x02F3, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x02BC, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0003, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0002, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04F0, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x02DC, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x004D, + /* 01 */ 0x004B, + }, +}; + +const VXOpcodeTreeNode vxOptreeVendor[][2] = +{ + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05AC, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05B2, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05EB, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05F3, + }, + { + /* 00 */ 0x05EC, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05B4, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05B3, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05ED, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x053A, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0056, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0530, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x02C1, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x04D5, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x0552, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x0554, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x02BE, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x02BF, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x02C3, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x02C2, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05EA, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05F2, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05E8, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05E9, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05F4, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05AD, + }, +}; + +const VXOpcodeTreeNode vxOptree3dnow[][256] = +{ + { + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ 0x0407, + /* 0D */ 0x0406, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, + /* 17 */ VX_INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ 0x03E7, + /* 1D */ 0x03E6, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ 0x03F0, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ 0x03F1, + /* 8F */ VX_INVALID, + /* 90 */ 0x03EB, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ 0x03EE, + /* 95 */ VX_INVALID, + /* 96 */ 0x03F2, + /* 97 */ 0x03F6, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ 0x03F7, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ 0x03E9, + /* 9F */ VX_INVALID, + /* A0 */ 0x03EC, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ 0x03ED, + /* A5 */ VX_INVALID, + /* A6 */ 0x03F3, + /* A7 */ 0x03F5, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ 0x03F8, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ 0x03E8, + /* AF */ VX_INVALID, + /* B0 */ 0x03EA, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ 0x03EF, + /* B5 */ VX_INVALID, + /* B6 */ 0x03F4, + /* B7 */ 0x0433, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ 0x0499, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ 0x03C7, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, + }, +}; + +const VXOpcodeTreeNode vxOptreeVex[][16] = +{ + { + /* 00 */ VX_NODE(OTNT_MODE, 0x0024), + /* 01 */ VX_NODE(OTNT_TABLE, 0x0004), + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_NODE(OTNT_TABLE, 0x0005), + /* 06 */ VX_NODE(OTNT_TABLE, 0x0006), + /* 07 */ VX_NODE(OTNT_TABLE, 0x0007), + /* 08 */ VX_INVALID, + /* 09 */ VX_NODE(OTNT_TABLE, 0x0008), + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_NODE(OTNT_TABLE, 0x0009), + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_MODE, 0x0026), + /* 01 */ VX_NODE(OTNT_TABLE, 0x0004), + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_NODE(OTNT_TABLE, 0x0005), + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_NODE(OTNT_TABLE, 0x0008), + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_NODE(OTNT_TABLE, 0x0009), + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + }, +}; + +const VXOpcodeTreeNode vxOptreeVexW[][2] = +{ + { + /* 00 */ 0x061D, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x061C, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0692, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0691, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x057B, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VEXL, 0x0008), + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05A6, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05A5, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05A7, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x05A4, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x061E, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x061B, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VEXL, 0x0009), + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x061F, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0620, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0621, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x0622, + }, + { + /* 00 */ VX_NODE(OTNT_VEXL, 0x000A), + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VEXL, 0x000B), + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VEXL, 0x000C), + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VEXL, 0x000D), + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_NODE(OTNT_VEXL, 0x000E), + /* 01 */ VX_NODE(OTNT_VEXL, 0x000F), + }, + { + /* 00 */ 0x0579, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x0578, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x060B, + /* 01 */ VX_INVALID, + }, +}; + +const VXOpcodeTreeNode vxOptreeVexL[][2] = +{ + { + /* 00 */ 0x069C, + /* 01 */ 0x069B, + }, + { + /* 00 */ 0x0660, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x065A, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x065E, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x063F, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x065F, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x065B, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x065D, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x057A, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x061A, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x05A0, + }, + { + /* 00 */ VX_INVALID, + /* 01 */ 0x059A, + }, + { + /* 00 */ 0x062C, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x062E, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x062D, + /* 01 */ VX_INVALID, + }, + { + /* 00 */ 0x062F, + /* 01 */ VX_INVALID, + }, +}; + +#undef VX_INVALID +#undef VX_NODE + +#define OPI_NONE { DOT_NONE, DOS_NA } +#define OPI_AL { DOT_AL, DOS_B } +#define OPI_AX { DOT_AX, DOS_W } +#define OPI_Av { DOT_A, DOS_V } +#define OPI_C { DOT_C, DOS_NA } +#define OPI_CL { DOT_CL, DOS_B } +#define OPI_CS { DOT_CS, DOS_NA } +#define OPI_CX { DOT_CX, DOS_W } +#define OPI_D { DOT_D, DOS_NA } +#define OPI_DL { DOT_DL, DOS_B } +#define OPI_DS { DOT_DS, DOS_NA } +#define OPI_DX { DOT_DX, DOS_W } +#define OPI_E { DOT_E, DOS_NA } +#define OPI_ES { DOT_ES, DOS_NA } +#define OPI_Eb { DOT_E, DOS_B } +#define OPI_Ed { DOT_E, DOS_D } +#define OPI_Eq { DOT_E, DOS_Q } +#define OPI_Ev { DOT_E, DOS_V } +#define OPI_Ew { DOT_E, DOS_W } +#define OPI_Ey { DOT_E, DOS_Y } +#define OPI_Ez { DOT_E, DOS_Z } +#define OPI_FS { DOT_FS, DOS_NA } +#define OPI_Fv { DOT_F, DOS_V } +#define OPI_G { DOT_G, DOS_NA } +#define OPI_GS { DOT_GS, DOS_NA } +#define OPI_Gb { DOT_G, DOS_B } +#define OPI_Gd { DOT_G, DOS_D } +#define OPI_Gq { DOT_G, DOS_Q } +#define OPI_Gv { DOT_G, DOS_V } +#define OPI_Gw { DOT_G, DOS_W } +#define OPI_Gy { DOT_G, DOS_Y } +#define OPI_Gz { DOT_G, DOS_Z } +#define OPI_H { DOT_H, DOS_X } +#define OPI_Hqq { DOT_H, DOS_QQ } +#define OPI_Hx { DOT_H, DOS_X } +#define OPI_I1 { DOT_I1, DOS_NA } +#define OPI_Ib { DOT_I, DOS_B } +#define OPI_Iv { DOT_I, DOS_V } +#define OPI_Iw { DOT_I, DOS_W } +#define OPI_Iz { DOT_I, DOS_Z } +#define OPI_Jb { DOT_J, DOS_B } +#define OPI_Jv { DOT_J, DOS_V } +#define OPI_Jz { DOT_J, DOS_Z } +#define OPI_L { DOT_L, DOS_O } +#define OPI_Lx { DOT_L, DOS_X } +#define OPI_M { DOT_M, DOS_NA } +#define OPI_Mb { DOT_M, DOS_B } +#define OPI_MbRd { DOT_MR, DOS_BD } +#define OPI_MbRv { DOT_MR, DOS_BV } +#define OPI_Md { DOT_M, DOS_D } +#define OPI_MdRy { DOT_MR, DOS_DY } +#define OPI_MdU { DOT_MU, DOS_DO } +#define OPI_Mdq { DOT_M, DOS_DQ } +#define OPI_Mo { DOT_M, DOS_O } +#define OPI_Mq { DOT_M, DOS_Q } +#define OPI_MqU { DOT_MU, DOS_QO } +#define OPI_Ms { DOT_M, DOS_W } +#define OPI_Mt { DOT_M, DOS_T } +#define OPI_Mv { DOT_M, DOS_V } +#define OPI_Mw { DOT_M, DOS_W } +#define OPI_MwRd { DOT_MR, DOS_WD } +#define OPI_MwRv { DOT_MR, DOS_WV } +#define OPI_MwRy { DOT_MR, DOS_WY } +#define OPI_MwU { DOT_MU, DOS_WO } +#define OPI_N { DOT_N, DOS_Q } +#define OPI_Ob { DOT_O, DOS_B } +#define OPI_Ov { DOT_O, DOS_V } +#define OPI_Ow { DOT_O, DOS_W } +#define OPI_P { DOT_P, DOS_Q } +#define OPI_Q { DOT_Q, DOS_Q } +#define OPI_R { DOT_R, DOS_RDQ } +#define OPI_R0b { DOT_R0, DOS_B } +#define OPI_R0v { DOT_R0, DOS_V } +#define OPI_R0w { DOT_R0, DOS_W } +#define OPI_R0y { DOT_R0, DOS_Y } +#define OPI_R0z { DOT_R0, DOS_Z } +#define OPI_R1b { DOT_R1, DOS_B } +#define OPI_R1v { DOT_R1, DOS_V } +#define OPI_R1w { DOT_R1, DOS_W } +#define OPI_R1y { DOT_R1, DOS_Y } +#define OPI_R1z { DOT_R1, DOS_Z } +#define OPI_R2b { DOT_R2, DOS_B } +#define OPI_R2v { DOT_R2, DOS_V } +#define OPI_R2w { DOT_R2, DOS_W } +#define OPI_R2y { DOT_R2, DOS_Y } +#define OPI_R2z { DOT_R2, DOS_Z } +#define OPI_R3b { DOT_R3, DOS_B } +#define OPI_R3v { DOT_R3, DOS_V } +#define OPI_R3w { DOT_R3, DOS_W } +#define OPI_R3y { DOT_R3, DOS_Y } +#define OPI_R3z { DOT_R3, DOS_Z } +#define OPI_R4b { DOT_R4, DOS_B } +#define OPI_R4v { DOT_R4, DOS_V } +#define OPI_R4w { DOT_R4, DOS_W } +#define OPI_R4y { DOT_R4, DOS_Y } +#define OPI_R4z { DOT_R4, DOS_Z } +#define OPI_R5b { DOT_R5, DOS_B } +#define OPI_R5v { DOT_R5, DOS_V } +#define OPI_R5w { DOT_R5, DOS_W } +#define OPI_R5y { DOT_R5, DOS_Y } +#define OPI_R5z { DOT_R5, DOS_Z } +#define OPI_R6b { DOT_R6, DOS_B } +#define OPI_R6v { DOT_R6, DOS_V } +#define OPI_R6w { DOT_R6, DOS_W } +#define OPI_R6y { DOT_R6, DOS_Y } +#define OPI_R6z { DOT_R6, DOS_Z } +#define OPI_R7b { DOT_R7, DOS_B } +#define OPI_R7v { DOT_R7, DOS_V } +#define OPI_R7w { DOT_R7, DOS_W } +#define OPI_R7y { DOT_R7, DOS_Y } +#define OPI_R7z { DOT_R7, DOS_Z } +#define OPI_S { DOT_S, DOS_W } +#define OPI_SS { DOT_SS, DOS_NA } +#define OPI_ST0 { DOT_ST0, DOS_NA } +#define OPI_ST1 { DOT_ST1, DOS_NA } +#define OPI_ST2 { DOT_ST2, DOS_NA } +#define OPI_ST3 { DOT_ST3, DOS_NA } +#define OPI_ST4 { DOT_ST4, DOS_NA } +#define OPI_ST5 { DOT_ST5, DOS_NA } +#define OPI_ST6 { DOT_ST6, DOS_NA } +#define OPI_ST7 { DOT_ST7, DOS_NA } +#define OPI_U { DOT_U, DOS_O } +#define OPI_Ux { DOT_U, DOS_X } +#define OPI_V { DOT_V, DOS_DQ } +#define OPI_Vdq { DOT_V, DOS_DQ } +#define OPI_Vqq { DOT_V, DOS_QQ } +#define OPI_Vsd { DOT_V, DOS_Q } +#define OPI_Vx { DOT_V, DOS_X } +#define OPI_W { DOT_W, DOS_DQ } +#define OPI_Wdq { DOT_W, DOS_DQ } +#define OPI_Wqq { DOT_W, DOS_QQ } +#define OPI_Wsd { DOT_W, DOS_Q } +#define OPI_Wx { DOT_W, DOS_X } +#define OPI_eAX { DOT_EAX, DOS_Z } +#define OPI_eCX { DOT_ECX, DOS_Z } +#define OPI_eDX { DOT_EDX, DOS_Z } +#define OPI_rAX { DOT_RAX, DOS_V } +#define OPI_rCX { DOT_RCX, DOS_V } +#define OPI_rDX { DOT_RDX, DOS_V } +#define OPI_sIb { DOT_sI, DOS_B } +#define OPI_sIz { DOT_sI, DOS_Z } + +const VXInstructionDefinition vxInstrDefinitions[] = +{ + /* 000 */ { MNEM_INVALID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 001 */ { MNEM_AAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 002 */ { MNEM_AAD, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 003 */ { MNEM_AAM, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 004 */ { MNEM_AAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 005 */ { MNEM_ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 006 */ { MNEM_ADC, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 007 */ { MNEM_ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 008 */ { MNEM_ADC, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 009 */ { MNEM_ADC, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00A */ { MNEM_ADC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00B */ { MNEM_ADC, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00C */ { MNEM_ADC, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00D */ { MNEM_ADC, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 00E */ { MNEM_ADC, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00F */ { MNEM_ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 010 */ { MNEM_ADD, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 011 */ { MNEM_ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 012 */ { MNEM_ADD, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 013 */ { MNEM_ADD, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 014 */ { MNEM_ADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 015 */ { MNEM_ADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 016 */ { MNEM_ADD, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 017 */ { MNEM_ADD, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 018 */ { MNEM_ADD, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 019 */ { MNEM_ADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01A */ { MNEM_ADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01B */ { MNEM_ADDSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01C */ { MNEM_ADDSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01D */ { MNEM_ADDSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01E */ { MNEM_ADDSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01F */ { MNEM_AESDEC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 020 */ { MNEM_AESDECLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 021 */ { MNEM_AESENC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 022 */ { MNEM_AESENCLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 023 */ { MNEM_AESIMC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 024 */ { MNEM_AESKEYGENASSIST, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 025 */ { MNEM_AND, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 026 */ { MNEM_AND, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 027 */ { MNEM_AND, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 028 */ { MNEM_AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 029 */ { MNEM_AND, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 02A */ { MNEM_AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 02B */ { MNEM_AND, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 02C */ { MNEM_AND, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 02D */ { MNEM_AND, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 02E */ { MNEM_AND, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 02F */ { MNEM_ANDNPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 030 */ { MNEM_ANDNPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 031 */ { MNEM_ANDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 032 */ { MNEM_ANDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 033 */ { MNEM_ARPL, { OPI_Ew, OPI_Gw, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 034 */ { MNEM_BLENDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 035 */ { MNEM_BLENDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 036 */ { MNEM_BLENDVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 037 */ { MNEM_BLENDVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 038 */ { MNEM_BOUND, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 039 */ { MNEM_BSF, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 03A */ { MNEM_BSR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 03B */ { MNEM_BSWAP, { OPI_R5y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03C */ { MNEM_BSWAP, { OPI_R3y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03D */ { MNEM_BSWAP, { OPI_R1y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03E */ { MNEM_BSWAP, { OPI_R4y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03F */ { MNEM_BSWAP, { OPI_R0y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 040 */ { MNEM_BSWAP, { OPI_R2y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 041 */ { MNEM_BSWAP, { OPI_R7y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 042 */ { MNEM_BSWAP, { OPI_R6y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 043 */ { MNEM_BT, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 044 */ { MNEM_BT, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 045 */ { MNEM_BTC, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 046 */ { MNEM_BTC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 047 */ { MNEM_BTR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 048 */ { MNEM_BTR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 049 */ { MNEM_BTS, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 04A */ { MNEM_BTS, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 04B */ { MNEM_CALL, { OPI_Eq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 04C */ { MNEM_CALL, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 04D */ { MNEM_CALL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 04E */ { MNEM_CALL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 04F */ { MNEM_CALL, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 050 */ { MNEM_CBW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 051 */ { MNEM_CDQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 052 */ { MNEM_CDQE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 053 */ { MNEM_CLC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 054 */ { MNEM_CLD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 055 */ { MNEM_CLFLUSH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 056 */ { MNEM_CLGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 057 */ { MNEM_CLI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 058 */ { MNEM_CLTS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 059 */ { MNEM_CMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 05A */ { MNEM_CMOVA, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05B */ { MNEM_CMOVAE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05C */ { MNEM_CMOVB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05D */ { MNEM_CMOVBE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05E */ { MNEM_CMOVE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05F */ { MNEM_CMOVG, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 060 */ { MNEM_CMOVGE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 061 */ { MNEM_CMOVL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 062 */ { MNEM_CMOVLE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 063 */ { MNEM_CMOVNE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 064 */ { MNEM_CMOVNO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 065 */ { MNEM_CMOVNP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 066 */ { MNEM_CMOVNS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 067 */ { MNEM_CMOVO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 068 */ { MNEM_CMOVP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 069 */ { MNEM_CMOVS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 06A */ { MNEM_CMP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06B */ { MNEM_CMP, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06C */ { MNEM_CMP, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06D */ { MNEM_CMP, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06E */ { MNEM_CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06F */ { MNEM_CMP, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 070 */ { MNEM_CMP, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 }, + /* 071 */ { MNEM_CMP, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 072 */ { MNEM_CMP, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 073 */ { MNEM_CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 }, + /* 074 */ { MNEM_CMPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 075 */ { MNEM_CMPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 076 */ { MNEM_CMPSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 077 */ { MNEM_CMPSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 078 */ { MNEM_CMPSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 079 */ { MNEM_CMPSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 07A */ { MNEM_CMPSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07B */ { MNEM_CMPSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 07C */ { MNEM_CMPXCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07D */ { MNEM_CMPXCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07E */ { MNEM_CMPXCHG16B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07F */ { MNEM_CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 080 */ { MNEM_CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 081 */ { MNEM_COMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 082 */ { MNEM_COMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 083 */ { MNEM_CPUID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 084 */ { MNEM_CQO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 085 */ { MNEM_CRC32, { OPI_Gy, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 086 */ { MNEM_CRC32, { OPI_Gy, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 087 */ { MNEM_CVTDQ2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 088 */ { MNEM_CVTDQ2PS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 089 */ { MNEM_CVTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08A */ { MNEM_CVTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08B */ { MNEM_CVTPD2PS, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08C */ { MNEM_CVTPI2PD, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08D */ { MNEM_CVTPI2PS, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08E */ { MNEM_CVTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08F */ { MNEM_CVTPS2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 090 */ { MNEM_CVTPS2PI, { OPI_P, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 091 */ { MNEM_CVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 092 */ { MNEM_CVTSD2SS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 093 */ { MNEM_CVTSI2SD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 094 */ { MNEM_CVTSI2SS, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 095 */ { MNEM_CVTSS2SD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 096 */ { MNEM_CVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 097 */ { MNEM_CVTTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 098 */ { MNEM_CVTTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 099 */ { MNEM_CVTTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09A */ { MNEM_CVTTPS2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09B */ { MNEM_CVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09C */ { MNEM_CVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09D */ { MNEM_CWD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 09E */ { MNEM_CWDE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 09F */ { MNEM_DAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 0A0 */ { MNEM_DAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 0A1 */ { MNEM_DEC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A2 */ { MNEM_DEC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A3 */ { MNEM_DEC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A4 */ { MNEM_DEC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0A5 */ { MNEM_DEC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0A6 */ { MNEM_DEC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A7 */ { MNEM_DEC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A8 */ { MNEM_DEC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A9 */ { MNEM_DEC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0AA */ { MNEM_DEC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0AB */ { MNEM_DIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 0AC */ { MNEM_DIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 0AD */ { MNEM_DIVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0AE */ { MNEM_DIVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0AF */ { MNEM_DIVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B0 */ { MNEM_DIVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B1 */ { MNEM_DPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B2 */ { MNEM_DPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B3 */ { MNEM_EMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0B4 */ { MNEM_ENTER, { OPI_Iw, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 }, + /* 0B5 */ { MNEM_EXTRACTPS, { OPI_MdRy, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 0B6 */ { MNEM_F2XM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0B7 */ { MNEM_FABS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0B8 */ { MNEM_FADD, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0B9 */ { MNEM_FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BA */ { MNEM_FADD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0BB */ { MNEM_FADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0BC */ { MNEM_FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BD */ { MNEM_FADD, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BE */ { MNEM_FADD, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BF */ { MNEM_FADD, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0C0 */ { MNEM_FADD, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0C1 */ { MNEM_FADD, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0C2 */ { MNEM_FADD, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0C3 */ { MNEM_FADD, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0C4 */ { MNEM_FADD, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0C5 */ { MNEM_FADD, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0C6 */ { MNEM_FADD, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0C7 */ { MNEM_FADD, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0C8 */ { MNEM_FADD, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0C9 */ { MNEM_FADD, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CA */ { MNEM_FADDP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CB */ { MNEM_FADDP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CC */ { MNEM_FADDP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CD */ { MNEM_FADDP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CE */ { MNEM_FADDP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CF */ { MNEM_FADDP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0D0 */ { MNEM_FADDP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0D1 */ { MNEM_FADDP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0D2 */ { MNEM_FBLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0D3 */ { MNEM_FBSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0D4 */ { MNEM_FCHS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0D5 */ { MNEM_FCLEX, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0D6 */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0D7 */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0D8 */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0D9 */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0DA */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0DB */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0DC */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0DD */ { MNEM_FCMOVB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0DE */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0DF */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0E0 */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0E1 */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0E2 */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0E3 */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0E4 */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0E5 */ { MNEM_FCMOVBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0E6 */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0E7 */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0E8 */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0E9 */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0EA */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0EB */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0EC */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0ED */ { MNEM_FCMOVE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0EE */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0EF */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0F0 */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0F1 */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0F2 */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0F3 */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0F4 */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0F5 */ { MNEM_FCMOVNB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0F6 */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0F7 */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0F8 */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0F9 */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0FA */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0FB */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0FC */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0FD */ { MNEM_FCMOVNBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0FE */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0FF */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 100 */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 101 */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 102 */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 103 */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 104 */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 105 */ { MNEM_FCMOVNE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 106 */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 107 */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 108 */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 109 */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 10A */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 10B */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 10C */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 10D */ { MNEM_FCMOVNU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 10E */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 10F */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 110 */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 111 */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 112 */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 113 */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 114 */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 115 */ { MNEM_FCMOVU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 116 */ { MNEM_FCOM, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 117 */ { MNEM_FCOM, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 118 */ { MNEM_FCOM, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 119 */ { MNEM_FCOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 11A */ { MNEM_FCOM, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 11B */ { MNEM_FCOM, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 11C */ { MNEM_FCOM, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 11D */ { MNEM_FCOM, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 11E */ { MNEM_FCOM, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 11F */ { MNEM_FCOM, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 120 */ { MNEM_FCOM2, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 121 */ { MNEM_FCOM2, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 122 */ { MNEM_FCOM2, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 123 */ { MNEM_FCOM2, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 124 */ { MNEM_FCOM2, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 125 */ { MNEM_FCOM2, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 126 */ { MNEM_FCOM2, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 127 */ { MNEM_FCOM2, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 128 */ { MNEM_FCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 129 */ { MNEM_FCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 12A */ { MNEM_FCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 12B */ { MNEM_FCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 12C */ { MNEM_FCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 12D */ { MNEM_FCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 12E */ { MNEM_FCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 12F */ { MNEM_FCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 130 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 131 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 132 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 133 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 134 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 135 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 136 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 137 */ { MNEM_FCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 138 */ { MNEM_FCOMP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 139 */ { MNEM_FCOMP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 13A */ { MNEM_FCOMP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 13B */ { MNEM_FCOMP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 13C */ { MNEM_FCOMP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 13D */ { MNEM_FCOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 13E */ { MNEM_FCOMP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 13F */ { MNEM_FCOMP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 140 */ { MNEM_FCOMP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 141 */ { MNEM_FCOMP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 142 */ { MNEM_FCOMP3, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 143 */ { MNEM_FCOMP3, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 144 */ { MNEM_FCOMP3, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 145 */ { MNEM_FCOMP3, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 146 */ { MNEM_FCOMP3, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 147 */ { MNEM_FCOMP3, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 148 */ { MNEM_FCOMP3, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 149 */ { MNEM_FCOMP3, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14A */ { MNEM_FCOMP5, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14B */ { MNEM_FCOMP5, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14C */ { MNEM_FCOMP5, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14D */ { MNEM_FCOMP5, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14E */ { MNEM_FCOMP5, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14F */ { MNEM_FCOMP5, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 150 */ { MNEM_FCOMP5, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 151 */ { MNEM_FCOMP5, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 152 */ { MNEM_FCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 153 */ { MNEM_FCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 154 */ { MNEM_FDECSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 155 */ { MNEM_FDIV, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 156 */ { MNEM_FDIV, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 157 */ { MNEM_FDIV, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 158 */ { MNEM_FDIV, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 159 */ { MNEM_FDIV, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 15A */ { MNEM_FDIV, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 15B */ { MNEM_FDIV, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15C */ { MNEM_FDIV, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15D */ { MNEM_FDIV, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15E */ { MNEM_FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15F */ { MNEM_FDIV, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 160 */ { MNEM_FDIV, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 161 */ { MNEM_FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 162 */ { MNEM_FDIV, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 163 */ { MNEM_FDIV, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 164 */ { MNEM_FDIV, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 165 */ { MNEM_FDIV, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 166 */ { MNEM_FDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 167 */ { MNEM_FDIVP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 168 */ { MNEM_FDIVP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 169 */ { MNEM_FDIVP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16A */ { MNEM_FDIVP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16B */ { MNEM_FDIVP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16C */ { MNEM_FDIVP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16D */ { MNEM_FDIVP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16E */ { MNEM_FDIVP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16F */ { MNEM_FDIVR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 170 */ { MNEM_FDIVR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 171 */ { MNEM_FDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 172 */ { MNEM_FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 173 */ { MNEM_FDIVR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 174 */ { MNEM_FDIVR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 175 */ { MNEM_FDIVR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 176 */ { MNEM_FDIVR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 177 */ { MNEM_FDIVR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 178 */ { MNEM_FDIVR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 179 */ { MNEM_FDIVR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17A */ { MNEM_FDIVR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 17B */ { MNEM_FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17C */ { MNEM_FDIVR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17D */ { MNEM_FDIVR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17E */ { MNEM_FDIVR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17F */ { MNEM_FDIVR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 180 */ { MNEM_FDIVR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 181 */ { MNEM_FDIVRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 182 */ { MNEM_FDIVRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 183 */ { MNEM_FDIVRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 184 */ { MNEM_FDIVRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 185 */ { MNEM_FDIVRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 186 */ { MNEM_FDIVRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 187 */ { MNEM_FDIVRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 188 */ { MNEM_FDIVRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 189 */ { MNEM_FEMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18A */ { MNEM_FFREE, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18B */ { MNEM_FFREE, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18C */ { MNEM_FFREE, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18D */ { MNEM_FFREE, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18E */ { MNEM_FFREE, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18F */ { MNEM_FFREE, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 190 */ { MNEM_FFREE, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 191 */ { MNEM_FFREE, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 192 */ { MNEM_FFREEP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 193 */ { MNEM_FFREEP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 194 */ { MNEM_FFREEP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 195 */ { MNEM_FFREEP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 196 */ { MNEM_FFREEP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 197 */ { MNEM_FFREEP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 198 */ { MNEM_FFREEP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 199 */ { MNEM_FFREEP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 19A */ { MNEM_FIADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19B */ { MNEM_FIADD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19C */ { MNEM_FICOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19D */ { MNEM_FICOM, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19E */ { MNEM_FICOMP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19F */ { MNEM_FICOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A0 */ { MNEM_FIDIV, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A1 */ { MNEM_FIDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A2 */ { MNEM_FIDIVR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A3 */ { MNEM_FIDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A4 */ { MNEM_FILD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A5 */ { MNEM_FILD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A6 */ { MNEM_FILD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A7 */ { MNEM_FIMUL, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A8 */ { MNEM_FIMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A9 */ { MNEM_FINCSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1AA */ { MNEM_FIST, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AB */ { MNEM_FIST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AC */ { MNEM_FISTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AD */ { MNEM_FISTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AE */ { MNEM_FISTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AF */ { MNEM_FISTTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B0 */ { MNEM_FISTTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B1 */ { MNEM_FISTTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B2 */ { MNEM_FISUB, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B3 */ { MNEM_FISUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B4 */ { MNEM_FISUBR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B5 */ { MNEM_FISUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B6 */ { MNEM_FLD, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1B7 */ { MNEM_FLD, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1B8 */ { MNEM_FLD, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1B9 */ { MNEM_FLD, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1BA */ { MNEM_FLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1BB */ { MNEM_FLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1BC */ { MNEM_FLD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1BD */ { MNEM_FLD, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1BE */ { MNEM_FLD, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1BF */ { MNEM_FLD, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C0 */ { MNEM_FLD, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C1 */ { MNEM_FLD1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C2 */ { MNEM_FLDCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1C3 */ { MNEM_FLDENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1C4 */ { MNEM_FLDL2E, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C5 */ { MNEM_FLDL2T, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C6 */ { MNEM_FLDLG2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C7 */ { MNEM_FLDLN2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C8 */ { MNEM_FLDPI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C9 */ { MNEM_FLDZ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1CA */ { MNEM_FMUL, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CB */ { MNEM_FMUL, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CC */ { MNEM_FMUL, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CD */ { MNEM_FMUL, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 1CE */ { MNEM_FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CF */ { MNEM_FMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1D0 */ { MNEM_FMUL, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D1 */ { MNEM_FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D2 */ { MNEM_FMUL, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1D3 */ { MNEM_FMUL, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D4 */ { MNEM_FMUL, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D5 */ { MNEM_FMUL, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D6 */ { MNEM_FMUL, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 1D7 */ { MNEM_FMUL, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 1D8 */ { MNEM_FMUL, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 1D9 */ { MNEM_FMUL, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 1DA */ { MNEM_FMUL, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 1DB */ { MNEM_FMUL, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 1DC */ { MNEM_FMULP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1DD */ { MNEM_FMULP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1DE */ { MNEM_FMULP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1DF */ { MNEM_FMULP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E0 */ { MNEM_FMULP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E1 */ { MNEM_FMULP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E2 */ { MNEM_FMULP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E3 */ { MNEM_FMULP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E4 */ { MNEM_FNDISI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E5 */ { MNEM_FNENI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E6 */ { MNEM_FNINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E7 */ { MNEM_FNOP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E8 */ { MNEM_FNSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1E9 */ { MNEM_FNSETPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1EA */ { MNEM_FNSTCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1EB */ { MNEM_FNSTENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1EC */ { MNEM_FNSTSW, { OPI_AX, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1ED */ { MNEM_FNSTSW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1EE */ { MNEM_FPATAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1EF */ { MNEM_FPREM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F0 */ { MNEM_FPREM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F1 */ { MNEM_FPTAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F2 */ { MNEM_FRNDINT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F3 */ { MNEM_FRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1F4 */ { MNEM_FRSTPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F5 */ { MNEM_FSCALE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F6 */ { MNEM_FSIN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F7 */ { MNEM_FSINCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F8 */ { MNEM_FSQRT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F9 */ { MNEM_FST, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FA */ { MNEM_FST, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FB */ { MNEM_FST, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FC */ { MNEM_FST, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FD */ { MNEM_FST, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FE */ { MNEM_FST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1FF */ { MNEM_FST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 200 */ { MNEM_FST, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 201 */ { MNEM_FST, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 202 */ { MNEM_FST, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 203 */ { MNEM_FSTP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 204 */ { MNEM_FSTP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 205 */ { MNEM_FSTP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 206 */ { MNEM_FSTP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 207 */ { MNEM_FSTP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 208 */ { MNEM_FSTP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 209 */ { MNEM_FSTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 20A */ { MNEM_FSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 20B */ { MNEM_FSTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 20C */ { MNEM_FSTP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 20D */ { MNEM_FSTP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 20E */ { MNEM_FSTP1, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 20F */ { MNEM_FSTP1, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 210 */ { MNEM_FSTP1, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 211 */ { MNEM_FSTP1, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 212 */ { MNEM_FSTP1, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 213 */ { MNEM_FSTP1, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 214 */ { MNEM_FSTP1, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 215 */ { MNEM_FSTP1, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 216 */ { MNEM_FSTP8, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 217 */ { MNEM_FSTP8, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 218 */ { MNEM_FSTP8, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 219 */ { MNEM_FSTP8, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21A */ { MNEM_FSTP8, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21B */ { MNEM_FSTP8, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21C */ { MNEM_FSTP8, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21D */ { MNEM_FSTP8, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21E */ { MNEM_FSTP9, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21F */ { MNEM_FSTP9, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 220 */ { MNEM_FSTP9, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 221 */ { MNEM_FSTP9, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 222 */ { MNEM_FSTP9, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 223 */ { MNEM_FSTP9, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 224 */ { MNEM_FSTP9, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 225 */ { MNEM_FSTP9, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 226 */ { MNEM_FSUB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 227 */ { MNEM_FSUB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 228 */ { MNEM_FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 229 */ { MNEM_FSUB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 22A */ { MNEM_FSUB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 22B */ { MNEM_FSUB, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 22C */ { MNEM_FSUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 22D */ { MNEM_FSUB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 22E */ { MNEM_FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 22F */ { MNEM_FSUB, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 230 */ { MNEM_FSUB, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 231 */ { MNEM_FSUB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 232 */ { MNEM_FSUB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 233 */ { MNEM_FSUB, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 234 */ { MNEM_FSUB, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 235 */ { MNEM_FSUB, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 236 */ { MNEM_FSUB, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 237 */ { MNEM_FSUB, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 238 */ { MNEM_FSUBP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 239 */ { MNEM_FSUBP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23A */ { MNEM_FSUBP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23B */ { MNEM_FSUBP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23C */ { MNEM_FSUBP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23D */ { MNEM_FSUBP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23E */ { MNEM_FSUBP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23F */ { MNEM_FSUBP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 240 */ { MNEM_FSUBR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 241 */ { MNEM_FSUBR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 242 */ { MNEM_FSUBR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 243 */ { MNEM_FSUBR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 244 */ { MNEM_FSUBR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 245 */ { MNEM_FSUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 246 */ { MNEM_FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 247 */ { MNEM_FSUBR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 248 */ { MNEM_FSUBR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 249 */ { MNEM_FSUBR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 24A */ { MNEM_FSUBR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 24B */ { MNEM_FSUBR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 24C */ { MNEM_FSUBR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 24D */ { MNEM_FSUBR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 24E */ { MNEM_FSUBR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 24F */ { MNEM_FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 250 */ { MNEM_FSUBR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 251 */ { MNEM_FSUBR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 252 */ { MNEM_FSUBRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 253 */ { MNEM_FSUBRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 254 */ { MNEM_FSUBRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 255 */ { MNEM_FSUBRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 256 */ { MNEM_FSUBRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 257 */ { MNEM_FSUBRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 258 */ { MNEM_FSUBRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 259 */ { MNEM_FSUBRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 25A */ { MNEM_FTST, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25B */ { MNEM_FUCOM, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25C */ { MNEM_FUCOM, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25D */ { MNEM_FUCOM, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25E */ { MNEM_FUCOM, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25F */ { MNEM_FUCOM, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 260 */ { MNEM_FUCOM, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 261 */ { MNEM_FUCOM, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 262 */ { MNEM_FUCOM, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 263 */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 264 */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 265 */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 266 */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 267 */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 268 */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 269 */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 26A */ { MNEM_FUCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 26B */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 26C */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 26D */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 26E */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 26F */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 270 */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 271 */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 272 */ { MNEM_FUCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 273 */ { MNEM_FUCOMP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 274 */ { MNEM_FUCOMP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 275 */ { MNEM_FUCOMP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 276 */ { MNEM_FUCOMP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 277 */ { MNEM_FUCOMP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 278 */ { MNEM_FUCOMP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 279 */ { MNEM_FUCOMP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27A */ { MNEM_FUCOMP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27B */ { MNEM_FUCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27C */ { MNEM_FXAM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27D */ { MNEM_FXCH, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 27E */ { MNEM_FXCH, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 27F */ { MNEM_FXCH, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 280 */ { MNEM_FXCH, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 281 */ { MNEM_FXCH, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 282 */ { MNEM_FXCH, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 283 */ { MNEM_FXCH, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 284 */ { MNEM_FXCH, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 285 */ { MNEM_FXCH4, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 286 */ { MNEM_FXCH4, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 287 */ { MNEM_FXCH4, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 288 */ { MNEM_FXCH4, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 289 */ { MNEM_FXCH4, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28A */ { MNEM_FXCH4, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28B */ { MNEM_FXCH4, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28C */ { MNEM_FXCH4, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28D */ { MNEM_FXCH7, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28E */ { MNEM_FXCH7, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28F */ { MNEM_FXCH7, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 290 */ { MNEM_FXCH7, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 291 */ { MNEM_FXCH7, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 292 */ { MNEM_FXCH7, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 293 */ { MNEM_FXCH7, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 294 */ { MNEM_FXCH7, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 295 */ { MNEM_FXRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 296 */ { MNEM_FXSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 297 */ { MNEM_FXTRACT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 298 */ { MNEM_FYL2X, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 299 */ { MNEM_FYL2XP1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 29A */ { MNEM_GETSEC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 29B */ { MNEM_HADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 29C */ { MNEM_HADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 29D */ { MNEM_HLT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 29E */ { MNEM_HSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 29F */ { MNEM_HSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A0 */ { MNEM_IDIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2A1 */ { MNEM_IDIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2A2 */ { MNEM_IMUL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A3 */ { MNEM_IMUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A4 */ { MNEM_IMUL, { OPI_Gv, OPI_Ev, OPI_Iz, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A5 */ { MNEM_IMUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A6 */ { MNEM_IMUL, { OPI_Gv, OPI_Ev, OPI_sIb, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A7 */ { MNEM_IN, { OPI_AL, OPI_DX, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 2A8 */ { MNEM_IN, { OPI_eAX, OPI_DX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2A9 */ { MNEM_IN, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 2AA */ { MNEM_IN, { OPI_eAX, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2AB */ { MNEM_INC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AC */ { MNEM_INC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AD */ { MNEM_INC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AE */ { MNEM_INC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AF */ { MNEM_INC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2B0 */ { MNEM_INC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2B1 */ { MNEM_INC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B2 */ { MNEM_INC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B3 */ { MNEM_INC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B4 */ { MNEM_INC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B5 */ { MNEM_INSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 2B6 */ { MNEM_INSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 2B7 */ { MNEM_INSERTPS, { OPI_V, OPI_Md, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2B8 */ { MNEM_INSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 2B9 */ { MNEM_INT, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BA */ { MNEM_INT1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BB */ { MNEM_INT3, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BC */ { MNEM_INTO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 2BD */ { MNEM_INVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BE */ { MNEM_INVEPT, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2BF */ { MNEM_INVEPT, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2C0 */ { MNEM_INVLPG, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2C1 */ { MNEM_INVLPGA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2C2 */ { MNEM_INVVPID, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2C3 */ { MNEM_INVVPID, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2C4 */ { MNEM_IRETD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 2C5 */ { MNEM_IRETQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 2C6 */ { MNEM_IRETW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 2C7 */ { MNEM_JA, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2C8 */ { MNEM_JA, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2C9 */ { MNEM_JB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2CA */ { MNEM_JB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2CB */ { MNEM_JBE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2CC */ { MNEM_JBE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2CD */ { MNEM_JCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, + /* 2CE */ { MNEM_JE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2CF */ { MNEM_JE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D0 */ { MNEM_JECXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, + /* 2D1 */ { MNEM_JG, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D2 */ { MNEM_JG, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D3 */ { MNEM_JGE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D4 */ { MNEM_JGE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D5 */ { MNEM_JL, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D6 */ { MNEM_JL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D7 */ { MNEM_JLE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D8 */ { MNEM_JLE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D9 */ { MNEM_JMP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 2DA */ { MNEM_JMP, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2DB */ { MNEM_JMP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 2DC */ { MNEM_JMP, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 2DD */ { MNEM_JMP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 }, + /* 2DE */ { MNEM_JNB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2DF */ { MNEM_JNB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E0 */ { MNEM_JNE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E1 */ { MNEM_JNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E2 */ { MNEM_JNO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E3 */ { MNEM_JNO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E4 */ { MNEM_JNP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E5 */ { MNEM_JNP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E6 */ { MNEM_JNS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E7 */ { MNEM_JNS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E8 */ { MNEM_JO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E9 */ { MNEM_JO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2EA */ { MNEM_JP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2EB */ { MNEM_JP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2EC */ { MNEM_JRCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, + /* 2ED */ { MNEM_JS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2EE */ { MNEM_JS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2EF */ { MNEM_LAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2F0 */ { MNEM_LAR, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F1 */ { MNEM_LDDQU, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F2 */ { MNEM_LDMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2F3 */ { MNEM_LDS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2F4 */ { MNEM_LEA, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F5 */ { MNEM_LEAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2F6 */ { MNEM_LES, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2F7 */ { MNEM_LFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2F8 */ { MNEM_LFS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F9 */ { MNEM_LGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FA */ { MNEM_LGS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2FB */ { MNEM_LIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FC */ { MNEM_LLDT, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FD */ { MNEM_LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FE */ { MNEM_LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FF */ { MNEM_LOCK, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 300 */ { MNEM_LODSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 301 */ { MNEM_LODSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 302 */ { MNEM_LODSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 303 */ { MNEM_LODSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 304 */ { MNEM_LOOP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 305 */ { MNEM_LOOPE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 306 */ { MNEM_LOOPNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 307 */ { MNEM_LSL, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 308 */ { MNEM_LSS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 309 */ { MNEM_LTR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 30A */ { MNEM_MASKMOVDQU, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 30B */ { MNEM_MASKMOVQ, { OPI_P, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 30C */ { MNEM_MAXPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 30D */ { MNEM_MAXPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 30E */ { MNEM_MAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 30F */ { MNEM_MAXSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 310 */ { MNEM_MFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 311 */ { MNEM_MINPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 312 */ { MNEM_MINPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 313 */ { MNEM_MINSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 314 */ { MNEM_MINSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 315 */ { MNEM_MONITOR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 316 */ { MNEM_MONTMUL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 317 */ { MNEM_MOV, { OPI_R0b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 318 */ { MNEM_MOV, { OPI_R2b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 319 */ { MNEM_MOV, { OPI_R3b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31A */ { MNEM_MOV, { OPI_R1b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31B */ { MNEM_MOV, { OPI_AL, OPI_Ob, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 31C */ { MNEM_MOV, { OPI_S, OPI_MwRv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31D */ { MNEM_MOV, { OPI_MwRv, OPI_S, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31E */ { MNEM_MOV, { OPI_Ov, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 31F */ { MNEM_MOV, { OPI_Ob, OPI_AL, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 320 */ { MNEM_MOV, { OPI_rAX, OPI_Ov, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 321 */ { MNEM_MOV, { OPI_R4b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 322 */ { MNEM_MOV, { OPI_R7v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 323 */ { MNEM_MOV, { OPI_R6v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 324 */ { MNEM_MOV, { OPI_R5v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 325 */ { MNEM_MOV, { OPI_R, OPI_C, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 326 */ { MNEM_MOV, { OPI_D, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 327 */ { MNEM_MOV, { OPI_C, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 328 */ { MNEM_MOV, { OPI_R, OPI_D, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 329 */ { MNEM_MOV, { OPI_R4v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32A */ { MNEM_MOV, { OPI_R7b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32B */ { MNEM_MOV, { OPI_R6b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32C */ { MNEM_MOV, { OPI_R5b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32D */ { MNEM_MOV, { OPI_R0v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32E */ { MNEM_MOV, { OPI_R3v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32F */ { MNEM_MOV, { OPI_R2v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 330 */ { MNEM_MOV, { OPI_R1v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 331 */ { MNEM_MOV, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 332 */ { MNEM_MOV, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 333 */ { MNEM_MOV, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 334 */ { MNEM_MOV, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 335 */ { MNEM_MOV, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 336 */ { MNEM_MOV, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 337 */ { MNEM_MOVAPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 338 */ { MNEM_MOVAPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 339 */ { MNEM_MOVAPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33A */ { MNEM_MOVAPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33B */ { MNEM_MOVBE, { OPI_Gv, OPI_Mv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33C */ { MNEM_MOVBE, { OPI_Mv, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33D */ { MNEM_MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33E */ { MNEM_MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33F */ { MNEM_MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 340 */ { MNEM_MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 341 */ { MNEM_MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 342 */ { MNEM_MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 343 */ { MNEM_MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 344 */ { MNEM_MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 345 */ { MNEM_MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 346 */ { MNEM_MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 347 */ { MNEM_MOVDQ2Q, { OPI_P, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 348 */ { MNEM_MOVDQA, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 349 */ { MNEM_MOVDQA, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34A */ { MNEM_MOVDQU, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34B */ { MNEM_MOVDQU, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34C */ { MNEM_MOVHLPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34D */ { MNEM_MOVHPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34E */ { MNEM_MOVHPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34F */ { MNEM_MOVHPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 350 */ { MNEM_MOVHPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 351 */ { MNEM_MOVLHPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 352 */ { MNEM_MOVLPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 353 */ { MNEM_MOVLPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 354 */ { MNEM_MOVLPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 355 */ { MNEM_MOVLPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 356 */ { MNEM_MOVMSKPD, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 357 */ { MNEM_MOVMSKPS, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 358 */ { MNEM_MOVNTDQ, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 359 */ { MNEM_MOVNTDQA, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35A */ { MNEM_MOVNTI, { OPI_M, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35B */ { MNEM_MOVNTPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35C */ { MNEM_MOVNTPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35D */ { MNEM_MOVNTQ, { OPI_M, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35E */ { MNEM_MOVQ, { OPI_P, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35F */ { MNEM_MOVQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 360 */ { MNEM_MOVQ, { OPI_Eq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 361 */ { MNEM_MOVQ, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 362 */ { MNEM_MOVQ, { OPI_Q, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 363 */ { MNEM_MOVQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 364 */ { MNEM_MOVQ, { OPI_V, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 365 */ { MNEM_MOVQ, { OPI_Eq, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 366 */ { MNEM_MOVQ2DQ, { OPI_V, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_OPERAND1_WRITE }, + /* 367 */ { MNEM_MOVSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_OPERAND1_WRITE }, + /* 368 */ { MNEM_MOVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 369 */ { MNEM_MOVSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 36A */ { MNEM_MOVSD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36B */ { MNEM_MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36C */ { MNEM_MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36D */ { MNEM_MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36E */ { MNEM_MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36F */ { MNEM_MOVSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 370 */ { MNEM_MOVSS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 371 */ { MNEM_MOVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 372 */ { MNEM_MOVSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 373 */ { MNEM_MOVSX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 374 */ { MNEM_MOVSX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 375 */ { MNEM_MOVSXD, { OPI_Gq, OPI_Ed, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 376 */ { MNEM_MOVUPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 377 */ { MNEM_MOVUPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 378 */ { MNEM_MOVUPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 379 */ { MNEM_MOVUPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 37A */ { MNEM_MOVZX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 37B */ { MNEM_MOVZX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 37C */ { MNEM_MPSADBW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 37D */ { MNEM_MUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 37E */ { MNEM_MUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 37F */ { MNEM_MULPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 380 */ { MNEM_MULPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 381 */ { MNEM_MULSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 382 */ { MNEM_MULSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 383 */ { MNEM_MWAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 384 */ { MNEM_NEG, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 385 */ { MNEM_NEG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 386 */ { MNEM_NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 387 */ { MNEM_NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 388 */ { MNEM_NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 389 */ { MNEM_NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38A */ { MNEM_NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38B */ { MNEM_NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38C */ { MNEM_NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38D */ { MNEM_NOT, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 38E */ { MNEM_NOT, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 38F */ { MNEM_OR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 390 */ { MNEM_OR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 391 */ { MNEM_OR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 392 */ { MNEM_OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 393 */ { MNEM_OR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 394 */ { MNEM_OR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 395 */ { MNEM_OR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 396 */ { MNEM_OR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 397 */ { MNEM_OR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 398 */ { MNEM_OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 399 */ { MNEM_ORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 39A */ { MNEM_ORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 39B */ { MNEM_OUT, { OPI_DX, OPI_AL, OPI_NONE, OPI_NONE }, 0 }, + /* 39C */ { MNEM_OUT, { OPI_DX, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 39D */ { MNEM_OUT, { OPI_Ib, OPI_AL, OPI_NONE, OPI_NONE }, 0 }, + /* 39E */ { MNEM_OUT, { OPI_Ib, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 39F */ { MNEM_OUTSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 3A0 */ { MNEM_OUTSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 3A1 */ { MNEM_OUTSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 3A2 */ { MNEM_PABSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A3 */ { MNEM_PABSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A4 */ { MNEM_PABSD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A5 */ { MNEM_PABSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A6 */ { MNEM_PABSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A7 */ { MNEM_PABSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A8 */ { MNEM_PACKSSDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3A9 */ { MNEM_PACKSSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AA */ { MNEM_PACKSSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AB */ { MNEM_PACKSSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AC */ { MNEM_PACKUSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AD */ { MNEM_PACKUSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AE */ { MNEM_PACKUSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AF */ { MNEM_PADDB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B0 */ { MNEM_PADDB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B1 */ { MNEM_PADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B2 */ { MNEM_PADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B3 */ { MNEM_PADDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B4 */ { MNEM_PADDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B5 */ { MNEM_PADDSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B6 */ { MNEM_PADDSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B7 */ { MNEM_PADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B8 */ { MNEM_PADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B9 */ { MNEM_PADDUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BA */ { MNEM_PADDUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BB */ { MNEM_PADDUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BC */ { MNEM_PADDUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BD */ { MNEM_PADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BE */ { MNEM_PADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BF */ { MNEM_PALIGNR, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C0 */ { MNEM_PALIGNR, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C1 */ { MNEM_PAND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C2 */ { MNEM_PAND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C3 */ { MNEM_PANDN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C4 */ { MNEM_PANDN, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C5 */ { MNEM_PAVGB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C6 */ { MNEM_PAVGB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C7 */ { MNEM_PAVGUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C8 */ { MNEM_PAVGW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C9 */ { MNEM_PAVGW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CA */ { MNEM_PBLENDVB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CB */ { MNEM_PBLENDW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CC */ { MNEM_PCLMULQDQ, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CD */ { MNEM_PCMPEQB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CE */ { MNEM_PCMPEQB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CF */ { MNEM_PCMPEQD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D0 */ { MNEM_PCMPEQD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D1 */ { MNEM_PCMPEQQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3D2 */ { MNEM_PCMPEQW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D3 */ { MNEM_PCMPEQW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D4 */ { MNEM_PCMPESTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3D5 */ { MNEM_PCMPESTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3D6 */ { MNEM_PCMPGTB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D7 */ { MNEM_PCMPGTB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D8 */ { MNEM_PCMPGTD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D9 */ { MNEM_PCMPGTD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3DA */ { MNEM_PCMPGTQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3DB */ { MNEM_PCMPGTW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3DC */ { MNEM_PCMPGTW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3DD */ { MNEM_PCMPISTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3DE */ { MNEM_PCMPISTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3DF */ { MNEM_PEXTRB, { OPI_MbRv, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 3E0 */ { MNEM_PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E1 */ { MNEM_PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E2 */ { MNEM_PEXTRQ, { OPI_Eq, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 3E3 */ { MNEM_PEXTRW, { OPI_MwRd, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E4 */ { MNEM_PEXTRW, { OPI_Gd, OPI_N, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E5 */ { MNEM_PEXTRW, { OPI_Gd, OPI_U, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E6 */ { MNEM_PF2ID, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E7 */ { MNEM_PF2IW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E8 */ { MNEM_PFACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3E9 */ { MNEM_PFADD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EA */ { MNEM_PFCMPEQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EB */ { MNEM_PFCMPGE, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EC */ { MNEM_PFCMPGT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3ED */ { MNEM_PFMAX, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EE */ { MNEM_PFMIN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EF */ { MNEM_PFMUL, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F0 */ { MNEM_PFNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F1 */ { MNEM_PFPNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F2 */ { MNEM_PFRCP, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F3 */ { MNEM_PFRCPIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F4 */ { MNEM_PFRCPIT2, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F5 */ { MNEM_PFRSQIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F6 */ { MNEM_PFRSQRT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F7 */ { MNEM_PFSUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F8 */ { MNEM_PFSUBR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F9 */ { MNEM_PHADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FA */ { MNEM_PHADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FB */ { MNEM_PHADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FC */ { MNEM_PHADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FD */ { MNEM_PHADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FE */ { MNEM_PHADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FF */ { MNEM_PHMINPOSUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 400 */ { MNEM_PHSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 401 */ { MNEM_PHSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 402 */ { MNEM_PHSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 403 */ { MNEM_PHSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 404 */ { MNEM_PHSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 405 */ { MNEM_PHSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 406 */ { MNEM_PI2FD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 407 */ { MNEM_PI2FW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 408 */ { MNEM_PINSRB, { OPI_V, OPI_MbRd, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 409 */ { MNEM_PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 40A */ { MNEM_PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 40B */ { MNEM_PINSRQ, { OPI_V, OPI_Eq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 40C */ { MNEM_PINSRW, { OPI_V, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 40D */ { MNEM_PINSRW, { OPI_P, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 40E */ { MNEM_PMADDUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 40F */ { MNEM_PMADDUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 410 */ { MNEM_PMADDWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 411 */ { MNEM_PMADDWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 412 */ { MNEM_PMAXSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 413 */ { MNEM_PMAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 414 */ { MNEM_PMAXSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 415 */ { MNEM_PMAXSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 416 */ { MNEM_PMAXUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 417 */ { MNEM_PMAXUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 418 */ { MNEM_PMAXUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 419 */ { MNEM_PMAXUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41A */ { MNEM_PMINSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41B */ { MNEM_PMINSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41C */ { MNEM_PMINSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41D */ { MNEM_PMINSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41E */ { MNEM_PMINUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41F */ { MNEM_PMINUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 420 */ { MNEM_PMINUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 421 */ { MNEM_PMINUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 422 */ { MNEM_PMOVMSKB, { OPI_Gd, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 423 */ { MNEM_PMOVMSKB, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 424 */ { MNEM_PMOVSXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 425 */ { MNEM_PMOVSXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 426 */ { MNEM_PMOVSXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 427 */ { MNEM_PMOVSXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 428 */ { MNEM_PMOVSXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 429 */ { MNEM_PMOVSXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42A */ { MNEM_PMOVZXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42B */ { MNEM_PMOVZXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42C */ { MNEM_PMOVZXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42D */ { MNEM_PMOVZXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42E */ { MNEM_PMOVZXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42F */ { MNEM_PMOVZXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 430 */ { MNEM_PMULDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 431 */ { MNEM_PMULHRSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 432 */ { MNEM_PMULHRSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 433 */ { MNEM_PMULHRW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 434 */ { MNEM_PMULHUW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 435 */ { MNEM_PMULHUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 436 */ { MNEM_PMULHW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 437 */ { MNEM_PMULHW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 438 */ { MNEM_PMULLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 439 */ { MNEM_PMULLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43A */ { MNEM_PMULLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43B */ { MNEM_PMULUDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43C */ { MNEM_PMULUDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43D */ { MNEM_POP, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 43E */ { MNEM_POP, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 43F */ { MNEM_POP, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 440 */ { MNEM_POP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 441 */ { MNEM_POP, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 442 */ { MNEM_POP, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 443 */ { MNEM_POP, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 444 */ { MNEM_POP, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 445 */ { MNEM_POP, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 446 */ { MNEM_POP, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 447 */ { MNEM_POP, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 448 */ { MNEM_POP, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 449 */ { MNEM_POP, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 44A */ { MNEM_POP, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 44B */ { MNEM_POPA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 44C */ { MNEM_POPAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 44D */ { MNEM_POPCNT, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 44E */ { MNEM_POPFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 44F */ { MNEM_POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 450 */ { MNEM_POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 451 */ { MNEM_POPFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 452 */ { MNEM_POR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 453 */ { MNEM_POR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 454 */ { MNEM_PREFETCH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 455 */ { MNEM_PREFETCHNTA, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 456 */ { MNEM_PREFETCHT0, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 457 */ { MNEM_PREFETCHT1, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 458 */ { MNEM_PREFETCHT2, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 459 */ { MNEM_PSADBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45A */ { MNEM_PSADBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45B */ { MNEM_PSHUFB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45C */ { MNEM_PSHUFB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45D */ { MNEM_PSHUFD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 45E */ { MNEM_PSHUFHW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 45F */ { MNEM_PSHUFLW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 460 */ { MNEM_PSHUFW, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 461 */ { MNEM_PSIGNB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 462 */ { MNEM_PSIGNB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 463 */ { MNEM_PSIGND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 464 */ { MNEM_PSIGND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 465 */ { MNEM_PSIGNW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 466 */ { MNEM_PSIGNW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 467 */ { MNEM_PSLLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 468 */ { MNEM_PSLLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 469 */ { MNEM_PSLLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46A */ { MNEM_PSLLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46B */ { MNEM_PSLLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46C */ { MNEM_PSLLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46D */ { MNEM_PSLLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 46E */ { MNEM_PSLLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46F */ { MNEM_PSLLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 470 */ { MNEM_PSLLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 471 */ { MNEM_PSLLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 472 */ { MNEM_PSLLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 473 */ { MNEM_PSLLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 474 */ { MNEM_PSRAD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 475 */ { MNEM_PSRAD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 476 */ { MNEM_PSRAD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 477 */ { MNEM_PSRAD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 478 */ { MNEM_PSRAW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 479 */ { MNEM_PSRAW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 47A */ { MNEM_PSRAW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47B */ { MNEM_PSRAW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47C */ { MNEM_PSRLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47D */ { MNEM_PSRLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47E */ { MNEM_PSRLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 47F */ { MNEM_PSRLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 480 */ { MNEM_PSRLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 481 */ { MNEM_PSRLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 482 */ { MNEM_PSRLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 483 */ { MNEM_PSRLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 484 */ { MNEM_PSRLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 485 */ { MNEM_PSRLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 486 */ { MNEM_PSRLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 487 */ { MNEM_PSRLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 488 */ { MNEM_PSRLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 489 */ { MNEM_PSUBB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48A */ { MNEM_PSUBB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48B */ { MNEM_PSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48C */ { MNEM_PSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48D */ { MNEM_PSUBQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48E */ { MNEM_PSUBQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48F */ { MNEM_PSUBSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 490 */ { MNEM_PSUBSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 491 */ { MNEM_PSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 492 */ { MNEM_PSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 493 */ { MNEM_PSUBUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 494 */ { MNEM_PSUBUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 495 */ { MNEM_PSUBUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 496 */ { MNEM_PSUBUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 497 */ { MNEM_PSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 498 */ { MNEM_PSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 499 */ { MNEM_PSWAPD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 49A */ { MNEM_PTEST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 49B */ { MNEM_PUNPCKHBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49C */ { MNEM_PUNPCKHBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49D */ { MNEM_PUNPCKHDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49E */ { MNEM_PUNPCKHDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49F */ { MNEM_PUNPCKHQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A0 */ { MNEM_PUNPCKHWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A1 */ { MNEM_PUNPCKHWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A2 */ { MNEM_PUNPCKLBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A3 */ { MNEM_PUNPCKLBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A4 */ { MNEM_PUNPCKLDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A5 */ { MNEM_PUNPCKLDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A6 */ { MNEM_PUNPCKLQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A7 */ { MNEM_PUNPCKLWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A8 */ { MNEM_PUNPCKLWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A9 */ { MNEM_PUSH, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AA */ { MNEM_PUSH, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AB */ { MNEM_PUSH, { OPI_sIb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 4AC */ { MNEM_PUSH, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AD */ { MNEM_PUSH, { OPI_CS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AE */ { MNEM_PUSH, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4AF */ { MNEM_PUSH, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B0 */ { MNEM_PUSH, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B1 */ { MNEM_PUSH, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B2 */ { MNEM_PUSH, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B3 */ { MNEM_PUSH, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B4 */ { MNEM_PUSH, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B5 */ { MNEM_PUSH, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4B6 */ { MNEM_PUSH, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4B7 */ { MNEM_PUSH, { OPI_sIz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4B8 */ { MNEM_PUSH, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B9 */ { MNEM_PUSH, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4BA */ { MNEM_PUSHA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 4BB */ { MNEM_PUSHAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 4BC */ { MNEM_PUSHFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 4BD */ { MNEM_PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4BE */ { MNEM_PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4BF */ { MNEM_PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4C0 */ { MNEM_PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 4C1 */ { MNEM_PXOR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C2 */ { MNEM_PXOR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C3 */ { MNEM_RCL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C4 */ { MNEM_RCL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C5 */ { MNEM_RCL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C6 */ { MNEM_RCL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C7 */ { MNEM_RCL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C8 */ { MNEM_RCL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C9 */ { MNEM_RCPPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4CA */ { MNEM_RCPSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4CB */ { MNEM_RCR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CC */ { MNEM_RCR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CD */ { MNEM_RCR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CE */ { MNEM_RCR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CF */ { MNEM_RCR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4D0 */ { MNEM_RCR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4D1 */ { MNEM_RDMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D2 */ { MNEM_RDPMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D3 */ { MNEM_RDRAND, { OPI_R, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4D4 */ { MNEM_RDTSC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D5 */ { MNEM_RDTSCP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D6 */ { MNEM_REP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D7 */ { MNEM_REPNE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D8 */ { MNEM_RET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D9 */ { MNEM_RET, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4DA */ { MNEM_RETF, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4DB */ { MNEM_RETF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4DC */ { MNEM_ROL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4DD */ { MNEM_ROL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4DE */ { MNEM_ROL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4DF */ { MNEM_ROL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E0 */ { MNEM_ROL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E1 */ { MNEM_ROL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E2 */ { MNEM_ROR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E3 */ { MNEM_ROR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E4 */ { MNEM_ROR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E5 */ { MNEM_ROR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E6 */ { MNEM_ROR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E7 */ { MNEM_ROR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E8 */ { MNEM_ROUNDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4E9 */ { MNEM_ROUNDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EA */ { MNEM_ROUNDSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EB */ { MNEM_ROUNDSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EC */ { MNEM_RSM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4ED */ { MNEM_RSQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EE */ { MNEM_RSQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EF */ { MNEM_SAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4F0 */ { MNEM_SALC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 4F1 */ { MNEM_SAR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F2 */ { MNEM_SAR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F3 */ { MNEM_SAR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F4 */ { MNEM_SAR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F5 */ { MNEM_SAR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F6 */ { MNEM_SAR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F7 */ { MNEM_SBB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4F8 */ { MNEM_SBB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4F9 */ { MNEM_SBB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 4FA */ { MNEM_SBB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 4FB */ { MNEM_SBB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4FC */ { MNEM_SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 4FD */ { MNEM_SBB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4FE */ { MNEM_SBB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4FF */ { MNEM_SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 500 */ { MNEM_SBB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 501 */ { MNEM_SCASB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 502 */ { MNEM_SCASD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 503 */ { MNEM_SCASQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 504 */ { MNEM_SCASW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 505 */ { MNEM_SETA, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 506 */ { MNEM_SETAE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 507 */ { MNEM_SETB, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 508 */ { MNEM_SETBE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 509 */ { MNEM_SETE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50A */ { MNEM_SETG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50B */ { MNEM_SETGE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50C */ { MNEM_SETL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50D */ { MNEM_SETLE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50E */ { MNEM_SETNE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50F */ { MNEM_SETNO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 510 */ { MNEM_SETNP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 511 */ { MNEM_SETNS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 512 */ { MNEM_SETO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 513 */ { MNEM_SETP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 514 */ { MNEM_SETS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 515 */ { MNEM_SFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 516 */ { MNEM_SGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 517 */ { MNEM_SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 518 */ { MNEM_SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 519 */ { MNEM_SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51A */ { MNEM_SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51B */ { MNEM_SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51C */ { MNEM_SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51D */ { MNEM_SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51E */ { MNEM_SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51F */ { MNEM_SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 520 */ { MNEM_SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 521 */ { MNEM_SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 522 */ { MNEM_SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 523 */ { MNEM_SHLD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 524 */ { MNEM_SHLD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 525 */ { MNEM_SHR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 526 */ { MNEM_SHR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 527 */ { MNEM_SHR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 528 */ { MNEM_SHR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 529 */ { MNEM_SHR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52A */ { MNEM_SHR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52B */ { MNEM_SHRD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52C */ { MNEM_SHRD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52D */ { MNEM_SHUFPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52E */ { MNEM_SHUFPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52F */ { MNEM_SIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 530 */ { MNEM_SKINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 531 */ { MNEM_SLDT, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 532 */ { MNEM_SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 533 */ { MNEM_SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 534 */ { MNEM_SQRTPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 535 */ { MNEM_SQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 536 */ { MNEM_SQRTSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 537 */ { MNEM_SQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 538 */ { MNEM_STC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 539 */ { MNEM_STD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 53A */ { MNEM_STGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 53B */ { MNEM_STI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 53C */ { MNEM_STMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 53D */ { MNEM_STOSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 53E */ { MNEM_STOSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 53F */ { MNEM_STOSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 540 */ { MNEM_STOSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 541 */ { MNEM_STR, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 542 */ { MNEM_SUB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 543 */ { MNEM_SUB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 544 */ { MNEM_SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 545 */ { MNEM_SUB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 546 */ { MNEM_SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 547 */ { MNEM_SUB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 548 */ { MNEM_SUB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 549 */ { MNEM_SUB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54A */ { MNEM_SUB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 54B */ { MNEM_SUB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54C */ { MNEM_SUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54D */ { MNEM_SUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54E */ { MNEM_SUBSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54F */ { MNEM_SUBSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 550 */ { MNEM_SWAPGS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 551 */ { MNEM_SYSCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 552 */ { MNEM_SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 553 */ { MNEM_SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 554 */ { MNEM_SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 555 */ { MNEM_SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 556 */ { MNEM_SYSRET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 557 */ { MNEM_TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 558 */ { MNEM_TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 559 */ { MNEM_TEST, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55A */ { MNEM_TEST, { OPI_Ev, OPI_Iz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55B */ { MNEM_TEST, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 55C */ { MNEM_TEST, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55D */ { MNEM_TEST, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55E */ { MNEM_TEST, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 }, + /* 55F */ { MNEM_UCOMISD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 560 */ { MNEM_UCOMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 561 */ { MNEM_UD2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 562 */ { MNEM_UNPCKHPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 563 */ { MNEM_UNPCKHPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 564 */ { MNEM_UNPCKLPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 565 */ { MNEM_UNPCKLPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 566 */ { MNEM_VADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 567 */ { MNEM_VADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 568 */ { MNEM_VADDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 569 */ { MNEM_VADDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56A */ { MNEM_VADDSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56B */ { MNEM_VADDSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56C */ { MNEM_VAESDEC, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56D */ { MNEM_VAESDECLAST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56E */ { MNEM_VAESENC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56F */ { MNEM_VAESENCLAST, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 570 */ { MNEM_VAESIMC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 571 */ { MNEM_VAESKEYGENASSIST, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 572 */ { MNEM_VANDNPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 573 */ { MNEM_VANDNPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 574 */ { MNEM_VANDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 575 */ { MNEM_VANDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 576 */ { MNEM_VBLENDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 577 */ { MNEM_VBLENDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 578 */ { MNEM_VBLENDVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 579 */ { MNEM_VBLENDVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 57A */ { MNEM_VBROADCASTSD, { OPI_Vqq, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 57B */ { MNEM_VBROADCASTSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 57C */ { MNEM_VCMPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 57D */ { MNEM_VCMPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 57E */ { MNEM_VCMPSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 57F */ { MNEM_VCMPSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 580 */ { MNEM_VCOMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 581 */ { MNEM_VCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 582 */ { MNEM_VCVTDQ2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 583 */ { MNEM_VCVTDQ2PS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 584 */ { MNEM_VCVTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 585 */ { MNEM_VCVTPD2PS, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 586 */ { MNEM_VCVTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 587 */ { MNEM_VCVTPS2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 588 */ { MNEM_VCVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 589 */ { MNEM_VCVTSD2SS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58A */ { MNEM_VCVTSI2SD, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58B */ { MNEM_VCVTSI2SS, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58C */ { MNEM_VCVTSS2SD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58D */ { MNEM_VCVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58E */ { MNEM_VCVTTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 58F */ { MNEM_VCVTTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 590 */ { MNEM_VCVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 591 */ { MNEM_VCVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 592 */ { MNEM_VDIVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 593 */ { MNEM_VDIVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 594 */ { MNEM_VDIVSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 595 */ { MNEM_VDIVSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 596 */ { MNEM_VDPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 597 */ { MNEM_VDPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 598 */ { MNEM_VERR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 599 */ { MNEM_VERW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 59A */ { MNEM_VEXTRACTF128, { OPI_Wdq, OPI_Vqq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 59B */ { MNEM_VEXTRACTPS, { OPI_MdRy, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 59C */ { MNEM_VHADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 59D */ { MNEM_VHADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 59E */ { MNEM_VHSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 59F */ { MNEM_VHSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5A0 */ { MNEM_VINSERTF128, { OPI_Vqq, OPI_Hqq, OPI_Wdq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A1 */ { MNEM_VINSERTPS, { OPI_Vx, OPI_Hx, OPI_Md, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5A2 */ { MNEM_VLDDQU, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A3 */ { MNEM_VMASKMOVDQU, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5A4 */ { MNEM_VMASKMOVPD, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A5 */ { MNEM_VMASKMOVPD, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A6 */ { MNEM_VMASKMOVPS, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A7 */ { MNEM_VMASKMOVPS, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A8 */ { MNEM_VMAXPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5A9 */ { MNEM_VMAXPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5AA */ { MNEM_VMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5AB */ { MNEM_VMAXSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5AC */ { MNEM_VMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5AD */ { MNEM_VMCLEAR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5AE */ { MNEM_VMINPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5AF */ { MNEM_VMINPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5B0 */ { MNEM_VMINSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5B1 */ { MNEM_VMINSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5B2 */ { MNEM_VMLAUNCH, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5B3 */ { MNEM_VMLOAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5B4 */ { MNEM_VMMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5B5 */ { MNEM_VMOVAPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B6 */ { MNEM_VMOVAPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B7 */ { MNEM_VMOVAPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B8 */ { MNEM_VMOVAPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B9 */ { MNEM_VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BA */ { MNEM_VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BB */ { MNEM_VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BC */ { MNEM_VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BD */ { MNEM_VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BE */ { MNEM_VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BF */ { MNEM_VMOVDQA, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C0 */ { MNEM_VMOVDQA, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C1 */ { MNEM_VMOVDQU, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C2 */ { MNEM_VMOVDQU, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C3 */ { MNEM_VMOVHLPS, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C4 */ { MNEM_VMOVHPD, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C5 */ { MNEM_VMOVHPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C6 */ { MNEM_VMOVHPS, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C7 */ { MNEM_VMOVHPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C8 */ { MNEM_VMOVLHPS, { OPI_Vx, OPI_Hx, OPI_Ux, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C9 */ { MNEM_VMOVLPD, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CA */ { MNEM_VMOVLPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CB */ { MNEM_VMOVLPS, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CC */ { MNEM_VMOVLPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CD */ { MNEM_VMOVMSKPD, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5CE */ { MNEM_VMOVMSKPS, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CF */ { MNEM_VMOVNTDQ, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D0 */ { MNEM_VMOVNTDQA, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D1 */ { MNEM_VMOVNTPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D2 */ { MNEM_VMOVNTPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D3 */ { MNEM_VMOVQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D4 */ { MNEM_VMOVQ, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D5 */ { MNEM_VMOVQ, { OPI_Vx, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D6 */ { MNEM_VMOVQ, { OPI_Eq, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D7 */ { MNEM_VMOVSD, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D8 */ { MNEM_VMOVSD, { OPI_Mq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D9 */ { MNEM_VMOVSD, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5DA */ { MNEM_VMOVSD, { OPI_V, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5DB */ { MNEM_VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DC */ { MNEM_VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DD */ { MNEM_VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DE */ { MNEM_VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DF */ { MNEM_VMOVSS, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E0 */ { MNEM_VMOVSS, { OPI_Md, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E1 */ { MNEM_VMOVSS, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E2 */ { MNEM_VMOVSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E3 */ { MNEM_VMOVUPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E4 */ { MNEM_VMOVUPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E5 */ { MNEM_VMOVUPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E6 */ { MNEM_VMOVUPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E7 */ { MNEM_VMPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5E8 */ { MNEM_VMPTRLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5E9 */ { MNEM_VMPTRST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5EA */ { MNEM_VMREAD, { OPI_Ey, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 5EB */ { MNEM_VMRESUME, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5EC */ { MNEM_VMRUN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5ED */ { MNEM_VMSAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5EE */ { MNEM_VMULPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5EF */ { MNEM_VMULPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5F0 */ { MNEM_VMULSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5F1 */ { MNEM_VMULSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5F2 */ { MNEM_VMWRITE, { OPI_Gy, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 5F3 */ { MNEM_VMXOFF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5F4 */ { MNEM_VMXON, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5F5 */ { MNEM_VORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5F6 */ { MNEM_VORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 5F7 */ { MNEM_VPABSB, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5F8 */ { MNEM_VPABSD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5F9 */ { MNEM_VPABSW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5FA */ { MNEM_VPACKSSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FB */ { MNEM_VPACKSSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FC */ { MNEM_VPACKUSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FD */ { MNEM_VPACKUSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FE */ { MNEM_VPADDB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FF */ { MNEM_VPADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 600 */ { MNEM_VPADDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 601 */ { MNEM_VPADDSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 602 */ { MNEM_VPADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 603 */ { MNEM_VPADDUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 604 */ { MNEM_VPADDUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 605 */ { MNEM_VPADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 606 */ { MNEM_VPALIGNR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 607 */ { MNEM_VPAND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 608 */ { MNEM_VPANDN, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 609 */ { MNEM_VPAVGB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60A */ { MNEM_VPAVGW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60B */ { MNEM_VPBLENDVB, { OPI_V, OPI_H, OPI_W, OPI_L }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 60C */ { MNEM_VPBLENDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60D */ { MNEM_VPCLMULQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60E */ { MNEM_VPCMPEQB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60F */ { MNEM_VPCMPEQD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 610 */ { MNEM_VPCMPEQQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 611 */ { MNEM_VPCMPEQW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 612 */ { MNEM_VPCMPESTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 613 */ { MNEM_VPCMPESTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 614 */ { MNEM_VPCMPGTB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 615 */ { MNEM_VPCMPGTD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 616 */ { MNEM_VPCMPGTQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 617 */ { MNEM_VPCMPGTW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 618 */ { MNEM_VPCMPISTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 619 */ { MNEM_VPCMPISTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 61A */ { MNEM_VPERM2F128, { OPI_Vqq, OPI_Hqq, OPI_Wqq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61B */ { MNEM_VPERMILPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61C */ { MNEM_VPERMILPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61D */ { MNEM_VPERMILPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61E */ { MNEM_VPERMILPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61F */ { MNEM_VPEXTRB, { OPI_MbRv, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 620 */ { MNEM_VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 621 */ { MNEM_VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 622 */ { MNEM_VPEXTRQ, { OPI_Eq, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 623 */ { MNEM_VPEXTRW, { OPI_Gd, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 624 */ { MNEM_VPEXTRW, { OPI_MwRd, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 625 */ { MNEM_VPHADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 626 */ { MNEM_VPHADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 627 */ { MNEM_VPHADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 628 */ { MNEM_VPHMINPOSUW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 629 */ { MNEM_VPHSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 62A */ { MNEM_VPHSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 62B */ { MNEM_VPHSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 62C */ { MNEM_VPINSRB, { OPI_V, OPI_H, OPI_MbRd, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 62D */ { MNEM_VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 62E */ { MNEM_VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 62F */ { MNEM_VPINSRQ, { OPI_V, OPI_H, OPI_Eq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 630 */ { MNEM_VPINSRW, { OPI_Vx, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 631 */ { MNEM_VPMADDUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 632 */ { MNEM_VPMADDWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 633 */ { MNEM_VPMAXSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 634 */ { MNEM_VPMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 635 */ { MNEM_VPMAXSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 636 */ { MNEM_VPMAXUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 637 */ { MNEM_VPMAXUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 638 */ { MNEM_VPMAXUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 639 */ { MNEM_VPMINSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63A */ { MNEM_VPMINSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63B */ { MNEM_VPMINSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63C */ { MNEM_VPMINUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63D */ { MNEM_VPMINUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63E */ { MNEM_VPMINUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63F */ { MNEM_VPMOVMSKB, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 640 */ { MNEM_VPMOVSXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 641 */ { MNEM_VPMOVSXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 642 */ { MNEM_VPMOVSXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 643 */ { MNEM_VPMOVSXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 644 */ { MNEM_VPMOVSXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 645 */ { MNEM_VPMOVZXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 646 */ { MNEM_VPMOVZXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 647 */ { MNEM_VPMOVZXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 648 */ { MNEM_VPMOVZXDQ, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 649 */ { MNEM_VPMOVZXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 64A */ { MNEM_VPMOVZXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 64B */ { MNEM_VPMULDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64C */ { MNEM_VPMULHRSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64D */ { MNEM_VPMULHUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64E */ { MNEM_VPMULHW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64F */ { MNEM_VPMULLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 650 */ { MNEM_VPMULLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 651 */ { MNEM_VPOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 652 */ { MNEM_VPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 653 */ { MNEM_VPSHUFB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 654 */ { MNEM_VPSHUFD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 655 */ { MNEM_VPSHUFHW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 656 */ { MNEM_VPSHUFLW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 657 */ { MNEM_VPSIGNB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 658 */ { MNEM_VPSIGND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 659 */ { MNEM_VPSIGNW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 65A */ { MNEM_VPSLLD, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65B */ { MNEM_VPSLLD, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65C */ { MNEM_VPSLLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 65D */ { MNEM_VPSLLQ, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65E */ { MNEM_VPSLLQ, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65F */ { MNEM_VPSLLW, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 660 */ { MNEM_VPSLLW, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 661 */ { MNEM_VPSRAD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 662 */ { MNEM_VPSRAD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 663 */ { MNEM_VPSRAW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 664 */ { MNEM_VPSRAW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 665 */ { MNEM_VPSRLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 666 */ { MNEM_VPSRLD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 667 */ { MNEM_VPSRLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 668 */ { MNEM_VPSRLQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 669 */ { MNEM_VPSRLQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66A */ { MNEM_VPSRLW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66B */ { MNEM_VPSRLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66C */ { MNEM_VPSUBB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66D */ { MNEM_VPSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66E */ { MNEM_VPSUBQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66F */ { MNEM_VPSUBSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 670 */ { MNEM_VPSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 671 */ { MNEM_VPSUBUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 672 */ { MNEM_VPSUBUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 673 */ { MNEM_VPSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 674 */ { MNEM_VPTEST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 675 */ { MNEM_VPUNPCKHBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 676 */ { MNEM_VPUNPCKHDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 677 */ { MNEM_VPUNPCKHQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 678 */ { MNEM_VPUNPCKHWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 679 */ { MNEM_VPUNPCKLBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67A */ { MNEM_VPUNPCKLDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67B */ { MNEM_VPUNPCKLQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67C */ { MNEM_VPUNPCKLWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67D */ { MNEM_VPXOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67E */ { MNEM_VRCPPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 67F */ { MNEM_VRCPSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 680 */ { MNEM_VROUNDPD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 681 */ { MNEM_VROUNDPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 682 */ { MNEM_VROUNDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 683 */ { MNEM_VROUNDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 684 */ { MNEM_VRSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 685 */ { MNEM_VRSQRTSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 686 */ { MNEM_VSHUFPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 687 */ { MNEM_VSHUFPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 688 */ { MNEM_VSQRTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 689 */ { MNEM_VSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 68A */ { MNEM_VSQRTSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 68B */ { MNEM_VSQRTSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 68C */ { MNEM_VSTMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 68D */ { MNEM_VSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 68E */ { MNEM_VSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 68F */ { MNEM_VSUBSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 690 */ { MNEM_VSUBSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 691 */ { MNEM_VTESTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 692 */ { MNEM_VTESTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 693 */ { MNEM_VUCOMISD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 694 */ { MNEM_VUCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 695 */ { MNEM_VUNPCKHPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 696 */ { MNEM_VUNPCKHPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 697 */ { MNEM_VUNPCKLPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 698 */ { MNEM_VUNPCKLPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 699 */ { MNEM_VXORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 69A */ { MNEM_VXORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 69B */ { MNEM_VZEROALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69C */ { MNEM_VZEROUPPER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69D */ { MNEM_WAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69E */ { MNEM_WBINVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69F */ { MNEM_WRMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6A0 */ { MNEM_XADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE }, + /* 6A1 */ { MNEM_XADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE }, + /* 6A2 */ { MNEM_XCHG, { OPI_R4v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A3 */ { MNEM_XCHG, { OPI_R3v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A4 */ { MNEM_XCHG, { OPI_R5v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A5 */ { MNEM_XCHG, { OPI_R7v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A6 */ { MNEM_XCHG, { OPI_R6v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A7 */ { MNEM_XCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A8 */ { MNEM_XCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A9 */ { MNEM_XCHG, { OPI_R0v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6AA */ { MNEM_XCHG, { OPI_R2v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6AB */ { MNEM_XCHG, { OPI_R1v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6AC */ { MNEM_XCRYPTCBC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6AD */ { MNEM_XCRYPTCFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6AE */ { MNEM_XCRYPTCTR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6AF */ { MNEM_XCRYPTECB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6B0 */ { MNEM_XCRYPTOFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6B1 */ { MNEM_XGETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6B2 */ { MNEM_XLATB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 6B3 */ { MNEM_XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 6B4 */ { MNEM_XOR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B5 */ { MNEM_XOR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B6 */ { MNEM_XOR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B7 */ { MNEM_XOR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B8 */ { MNEM_XOR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B9 */ { MNEM_XOR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BA */ { MNEM_XOR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 6BB */ { MNEM_XOR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 6BC */ { MNEM_XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BD */ { MNEM_XORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BE */ { MNEM_XORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BF */ { MNEM_XRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 6C0 */ { MNEM_XSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 6C1 */ { MNEM_XSETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6C2 */ { MNEM_XSHA1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6C3 */ { MNEM_XSHA256, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6C4 */ { MNEM_XSTORE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, +}; + +#undef OPI_NONE +#undef OPI_AL +#undef OPI_AX +#undef OPI_Av +#undef OPI_C +#undef OPI_CL +#undef OPI_CS +#undef OPI_CX +#undef OPI_D +#undef OPI_DL +#undef OPI_DS +#undef OPI_DX +#undef OPI_E +#undef OPI_ES +#undef OPI_Eb +#undef OPI_Ed +#undef OPI_Eq +#undef OPI_Ev +#undef OPI_Ew +#undef OPI_Ey +#undef OPI_Ez +#undef OPI_FS +#undef OPI_Fv +#undef OPI_G +#undef OPI_GS +#undef OPI_Gb +#undef OPI_Gd +#undef OPI_Gq +#undef OPI_Gv +#undef OPI_Gw +#undef OPI_Gy +#undef OPI_Gz +#undef OPI_H +#undef OPI_Hqq +#undef OPI_Hx +#undef OPI_I1 +#undef OPI_Ib +#undef OPI_Iv +#undef OPI_Iw +#undef OPI_Iz +#undef OPI_Jb +#undef OPI_Jv +#undef OPI_Jz +#undef OPI_L +#undef OPI_Lx +#undef OPI_M +#undef OPI_Mb +#undef OPI_MbRd +#undef OPI_MbRv +#undef OPI_Md +#undef OPI_MdRy +#undef OPI_MdU +#undef OPI_Mdq +#undef OPI_Mo +#undef OPI_Mq +#undef OPI_MqU +#undef OPI_Ms +#undef OPI_Mt +#undef OPI_Mv +#undef OPI_Mw +#undef OPI_MwRd +#undef OPI_MwRv +#undef OPI_MwRy +#undef OPI_MwU +#undef OPI_N +#undef OPI_Ob +#undef OPI_Ov +#undef OPI_Ow +#undef OPI_P +#undef OPI_Q +#undef OPI_R +#undef OPI_R0b +#undef OPI_R0v +#undef OPI_R0w +#undef OPI_R0y +#undef OPI_R0z +#undef OPI_R1b +#undef OPI_R1v +#undef OPI_R1w +#undef OPI_R1y +#undef OPI_R1z +#undef OPI_R2b +#undef OPI_R2v +#undef OPI_R2w +#undef OPI_R2y +#undef OPI_R2z +#undef OPI_R3b +#undef OPI_R3v +#undef OPI_R3w +#undef OPI_R3y +#undef OPI_R3z +#undef OPI_R4b +#undef OPI_R4v +#undef OPI_R4w +#undef OPI_R4y +#undef OPI_R4z +#undef OPI_R5b +#undef OPI_R5v +#undef OPI_R5w +#undef OPI_R5y +#undef OPI_R5z +#undef OPI_R6b +#undef OPI_R6v +#undef OPI_R6w +#undef OPI_R6y +#undef OPI_R6z +#undef OPI_R7b +#undef OPI_R7v +#undef OPI_R7w +#undef OPI_R7y +#undef OPI_R7z +#undef OPI_S +#undef OPI_SS +#undef OPI_ST0 +#undef OPI_ST1 +#undef OPI_ST2 +#undef OPI_ST3 +#undef OPI_ST4 +#undef OPI_ST5 +#undef OPI_ST6 +#undef OPI_ST7 +#undef OPI_U +#undef OPI_Ux +#undef OPI_V +#undef OPI_Vdq +#undef OPI_Vqq +#undef OPI_Vsd +#undef OPI_Vx +#undef OPI_W +#undef OPI_Wdq +#undef OPI_Wqq +#undef OPI_Wsd +#undef OPI_Wx +#undef OPI_eAX +#undef OPI_eCX +#undef OPI_eDX +#undef OPI_rAX +#undef OPI_rCX +#undef OPI_rDX +#undef OPI_sIb +#undef OPI_sIz + +const char* vxInstrMnemonicStrings[] = +{ + /* 000 */ "invalid", + /* 001 */ "aaa", + /* 002 */ "aad", + /* 003 */ "aam", + /* 004 */ "aas", + /* 005 */ "adc", + /* 006 */ "add", + /* 007 */ "addpd", + /* 008 */ "addps", + /* 009 */ "addsd", + /* 00A */ "addss", + /* 00B */ "addsubpd", + /* 00C */ "addsubps", + /* 00D */ "aesdec", + /* 00E */ "aesdeclast", + /* 00F */ "aesenc", + /* 010 */ "aesenclast", + /* 011 */ "aesimc", + /* 012 */ "aeskeygenassist", + /* 013 */ "and", + /* 014 */ "andnpd", + /* 015 */ "andnps", + /* 016 */ "andpd", + /* 017 */ "andps", + /* 018 */ "arpl", + /* 019 */ "blendpd", + /* 01A */ "blendps", + /* 01B */ "blendvpd", + /* 01C */ "blendvps", + /* 01D */ "bound", + /* 01E */ "bsf", + /* 01F */ "bsr", + /* 020 */ "bswap", + /* 021 */ "bt", + /* 022 */ "btc", + /* 023 */ "btr", + /* 024 */ "bts", + /* 025 */ "call", + /* 026 */ "cbw", + /* 027 */ "cdq", + /* 028 */ "cdqe", + /* 029 */ "clc", + /* 02A */ "cld", + /* 02B */ "clflush", + /* 02C */ "clgi", + /* 02D */ "cli", + /* 02E */ "clts", + /* 02F */ "cmc", + /* 030 */ "cmova", + /* 031 */ "cmovae", + /* 032 */ "cmovb", + /* 033 */ "cmovbe", + /* 034 */ "cmove", + /* 035 */ "cmovg", + /* 036 */ "cmovge", + /* 037 */ "cmovl", + /* 038 */ "cmovle", + /* 039 */ "cmovne", + /* 03A */ "cmovno", + /* 03B */ "cmovnp", + /* 03C */ "cmovns", + /* 03D */ "cmovo", + /* 03E */ "cmovp", + /* 03F */ "cmovs", + /* 040 */ "cmp", + /* 041 */ "cmppd", + /* 042 */ "cmpps", + /* 043 */ "cmpsb", + /* 044 */ "cmpsd", + /* 045 */ "cmpsq", + /* 046 */ "cmpss", + /* 047 */ "cmpsw", + /* 048 */ "cmpxchg", + /* 049 */ "cmpxchg16b", + /* 04A */ "cmpxchg8b", + /* 04B */ "comisd", + /* 04C */ "comiss", + /* 04D */ "cpuid", + /* 04E */ "cqo", + /* 04F */ "crc32", + /* 050 */ "cvtdq2pd", + /* 051 */ "cvtdq2ps", + /* 052 */ "cvtpd2dq", + /* 053 */ "cvtpd2pi", + /* 054 */ "cvtpd2ps", + /* 055 */ "cvtpi2pd", + /* 056 */ "cvtpi2ps", + /* 057 */ "cvtps2dq", + /* 058 */ "cvtps2pd", + /* 059 */ "cvtps2pi", + /* 05A */ "cvtsd2si", + /* 05B */ "cvtsd2ss", + /* 05C */ "cvtsi2sd", + /* 05D */ "cvtsi2ss", + /* 05E */ "cvtss2sd", + /* 05F */ "cvtss2si", + /* 060 */ "cvttpd2dq", + /* 061 */ "cvttpd2pi", + /* 062 */ "cvttps2dq", + /* 063 */ "cvttps2pi", + /* 064 */ "cvttsd2si", + /* 065 */ "cvttss2si", + /* 066 */ "cwd", + /* 067 */ "cwde", + /* 068 */ "daa", + /* 069 */ "das", + /* 06A */ "dec", + /* 06B */ "div", + /* 06C */ "divpd", + /* 06D */ "divps", + /* 06E */ "divsd", + /* 06F */ "divss", + /* 070 */ "dppd", + /* 071 */ "dpps", + /* 072 */ "emms", + /* 073 */ "enter", + /* 074 */ "extractps", + /* 075 */ "f2xm1", + /* 076 */ "fabs", + /* 077 */ "fadd", + /* 078 */ "faddp", + /* 079 */ "fbld", + /* 07A */ "fbstp", + /* 07B */ "fchs", + /* 07C */ "fclex", + /* 07D */ "fcmovb", + /* 07E */ "fcmovbe", + /* 07F */ "fcmove", + /* 080 */ "fcmovnb", + /* 081 */ "fcmovnbe", + /* 082 */ "fcmovne", + /* 083 */ "fcmovnu", + /* 084 */ "fcmovu", + /* 085 */ "fcom", + /* 086 */ "fcom2", + /* 087 */ "fcomi", + /* 088 */ "fcomip", + /* 089 */ "fcomp", + /* 08A */ "fcomp3", + /* 08B */ "fcomp5", + /* 08C */ "fcompp", + /* 08D */ "fcos", + /* 08E */ "fdecstp", + /* 08F */ "fdiv", + /* 090 */ "fdivp", + /* 091 */ "fdivr", + /* 092 */ "fdivrp", + /* 093 */ "femms", + /* 094 */ "ffree", + /* 095 */ "ffreep", + /* 096 */ "fiadd", + /* 097 */ "ficom", + /* 098 */ "ficomp", + /* 099 */ "fidiv", + /* 09A */ "fidivr", + /* 09B */ "fild", + /* 09C */ "fimul", + /* 09D */ "fincstp", + /* 09E */ "fist", + /* 09F */ "fistp", + /* 0A0 */ "fisttp", + /* 0A1 */ "fisub", + /* 0A2 */ "fisubr", + /* 0A3 */ "fld", + /* 0A4 */ "fld1", + /* 0A5 */ "fldcw", + /* 0A6 */ "fldenv", + /* 0A7 */ "fldl2e", + /* 0A8 */ "fldl2t", + /* 0A9 */ "fldlg2", + /* 0AA */ "fldln2", + /* 0AB */ "fldpi", + /* 0AC */ "fldz", + /* 0AD */ "fmul", + /* 0AE */ "fmulp", + /* 0AF */ "fndisi", + /* 0B0 */ "fneni", + /* 0B1 */ "fninit", + /* 0B2 */ "fnop", + /* 0B3 */ "fnsave", + /* 0B4 */ "fnsetpm", + /* 0B5 */ "fnstcw", + /* 0B6 */ "fnstenv", + /* 0B7 */ "fnstsw", + /* 0B8 */ "fpatan", + /* 0B9 */ "fprem", + /* 0BA */ "fprem1", + /* 0BB */ "fptan", + /* 0BC */ "frndint", + /* 0BD */ "frstor", + /* 0BE */ "frstpm", + /* 0BF */ "fscale", + /* 0C0 */ "fsin", + /* 0C1 */ "fsincos", + /* 0C2 */ "fsqrt", + /* 0C3 */ "fst", + /* 0C4 */ "fstp", + /* 0C5 */ "fstp1", + /* 0C6 */ "fstp8", + /* 0C7 */ "fstp9", + /* 0C8 */ "fsub", + /* 0C9 */ "fsubp", + /* 0CA */ "fsubr", + /* 0CB */ "fsubrp", + /* 0CC */ "ftst", + /* 0CD */ "fucom", + /* 0CE */ "fucomi", + /* 0CF */ "fucomip", + /* 0D0 */ "fucomp", + /* 0D1 */ "fucompp", + /* 0D2 */ "fxam", + /* 0D3 */ "fxch", + /* 0D4 */ "fxch4", + /* 0D5 */ "fxch7", + /* 0D6 */ "fxrstor", + /* 0D7 */ "fxsave", + /* 0D8 */ "fxtract", + /* 0D9 */ "fyl2x", + /* 0DA */ "fyl2xp1", + /* 0DB */ "getsec", + /* 0DC */ "haddpd", + /* 0DD */ "haddps", + /* 0DE */ "hlt", + /* 0DF */ "hsubpd", + /* 0E0 */ "hsubps", + /* 0E1 */ "idiv", + /* 0E2 */ "imul", + /* 0E3 */ "in", + /* 0E4 */ "inc", + /* 0E5 */ "insb", + /* 0E6 */ "insd", + /* 0E7 */ "insertps", + /* 0E8 */ "insw", + /* 0E9 */ "int", + /* 0EA */ "int1", + /* 0EB */ "int3", + /* 0EC */ "into", + /* 0ED */ "invd", + /* 0EE */ "invept", + /* 0EF */ "invlpg", + /* 0F0 */ "invlpga", + /* 0F1 */ "invvpid", + /* 0F2 */ "iretd", + /* 0F3 */ "iretq", + /* 0F4 */ "iretw", + /* 0F5 */ "ja", + /* 0F6 */ "jb", + /* 0F7 */ "jbe", + /* 0F8 */ "jcxz", + /* 0F9 */ "je", + /* 0FA */ "jecxz", + /* 0FB */ "jg", + /* 0FC */ "jge", + /* 0FD */ "jl", + /* 0FE */ "jle", + /* 0FF */ "jmp", + /* 100 */ "jnb", + /* 101 */ "jne", + /* 102 */ "jno", + /* 103 */ "jnp", + /* 104 */ "jns", + /* 105 */ "jo", + /* 106 */ "jp", + /* 107 */ "jrcxz", + /* 108 */ "js", + /* 109 */ "lahf", + /* 10A */ "lar", + /* 10B */ "lddqu", + /* 10C */ "ldmxcsr", + /* 10D */ "lds", + /* 10E */ "lea", + /* 10F */ "leave", + /* 110 */ "les", + /* 111 */ "lfence", + /* 112 */ "lfs", + /* 113 */ "lgdt", + /* 114 */ "lgs", + /* 115 */ "lidt", + /* 116 */ "lldt", + /* 117 */ "lmsw", + /* 118 */ "lock", + /* 119 */ "lodsb", + /* 11A */ "lodsd", + /* 11B */ "lodsq", + /* 11C */ "lodsw", + /* 11D */ "loop", + /* 11E */ "loope", + /* 11F */ "loopne", + /* 120 */ "lsl", + /* 121 */ "lss", + /* 122 */ "ltr", + /* 123 */ "maskmovdqu", + /* 124 */ "maskmovq", + /* 125 */ "maxpd", + /* 126 */ "maxps", + /* 127 */ "maxsd", + /* 128 */ "maxss", + /* 129 */ "mfence", + /* 12A */ "minpd", + /* 12B */ "minps", + /* 12C */ "minsd", + /* 12D */ "minss", + /* 12E */ "monitor", + /* 12F */ "montmul", + /* 130 */ "mov", + /* 131 */ "movapd", + /* 132 */ "movaps", + /* 133 */ "movbe", + /* 134 */ "movd", + /* 135 */ "movddup", + /* 136 */ "movdq2q", + /* 137 */ "movdqa", + /* 138 */ "movdqu", + /* 139 */ "movhlps", + /* 13A */ "movhpd", + /* 13B */ "movhps", + /* 13C */ "movlhps", + /* 13D */ "movlpd", + /* 13E */ "movlps", + /* 13F */ "movmskpd", + /* 140 */ "movmskps", + /* 141 */ "movntdq", + /* 142 */ "movntdqa", + /* 143 */ "movnti", + /* 144 */ "movntpd", + /* 145 */ "movntps", + /* 146 */ "movntq", + /* 147 */ "movq", + /* 148 */ "movq2dq", + /* 149 */ "movsb", + /* 14A */ "movsd", + /* 14B */ "movshdup", + /* 14C */ "movsldup", + /* 14D */ "movsq", + /* 14E */ "movss", + /* 14F */ "movsw", + /* 150 */ "movsx", + /* 151 */ "movsxd", + /* 152 */ "movupd", + /* 153 */ "movups", + /* 154 */ "movzx", + /* 155 */ "mpsadbw", + /* 156 */ "mul", + /* 157 */ "mulpd", + /* 158 */ "mulps", + /* 159 */ "mulsd", + /* 15A */ "mulss", + /* 15B */ "mwait", + /* 15C */ "neg", + /* 15D */ "nop", + /* 15E */ "not", + /* 15F */ "or", + /* 160 */ "orpd", + /* 161 */ "orps", + /* 162 */ "out", + /* 163 */ "outsb", + /* 164 */ "outsd", + /* 165 */ "outsw", + /* 166 */ "pabsb", + /* 167 */ "pabsd", + /* 168 */ "pabsw", + /* 169 */ "packssdw", + /* 16A */ "packsswb", + /* 16B */ "packusdw", + /* 16C */ "packuswb", + /* 16D */ "paddb", + /* 16E */ "paddd", + /* 16F */ "paddq", + /* 170 */ "paddsb", + /* 171 */ "paddsw", + /* 172 */ "paddusb", + /* 173 */ "paddusw", + /* 174 */ "paddw", + /* 175 */ "palignr", + /* 176 */ "pand", + /* 177 */ "pandn", + /* 178 */ "pause", + /* 179 */ "pavgb", + /* 17A */ "pavgusb", + /* 17B */ "pavgw", + /* 17C */ "pblendvb", + /* 17D */ "pblendw", + /* 17E */ "pclmulqdq", + /* 17F */ "pcmpeqb", + /* 180 */ "pcmpeqd", + /* 181 */ "pcmpeqq", + /* 182 */ "pcmpeqw", + /* 183 */ "pcmpestri", + /* 184 */ "pcmpestrm", + /* 185 */ "pcmpgtb", + /* 186 */ "pcmpgtd", + /* 187 */ "pcmpgtq", + /* 188 */ "pcmpgtw", + /* 189 */ "pcmpistri", + /* 18A */ "pcmpistrm", + /* 18B */ "pextrb", + /* 18C */ "pextrd", + /* 18D */ "pextrq", + /* 18E */ "pextrw", + /* 18F */ "pf2id", + /* 190 */ "pf2iw", + /* 191 */ "pfacc", + /* 192 */ "pfadd", + /* 193 */ "pfcmpeq", + /* 194 */ "pfcmpge", + /* 195 */ "pfcmpgt", + /* 196 */ "pfmax", + /* 197 */ "pfmin", + /* 198 */ "pfmul", + /* 199 */ "pfnacc", + /* 19A */ "pfpnacc", + /* 19B */ "pfrcp", + /* 19C */ "pfrcpit1", + /* 19D */ "pfrcpit2", + /* 19E */ "pfrsqit1", + /* 19F */ "pfrsqrt", + /* 1A0 */ "pfsub", + /* 1A1 */ "pfsubr", + /* 1A2 */ "phaddd", + /* 1A3 */ "phaddsw", + /* 1A4 */ "phaddw", + /* 1A5 */ "phminposuw", + /* 1A6 */ "phsubd", + /* 1A7 */ "phsubsw", + /* 1A8 */ "phsubw", + /* 1A9 */ "pi2fd", + /* 1AA */ "pi2fw", + /* 1AB */ "pinsrb", + /* 1AC */ "pinsrd", + /* 1AD */ "pinsrq", + /* 1AE */ "pinsrw", + /* 1AF */ "pmaddubsw", + /* 1B0 */ "pmaddwd", + /* 1B1 */ "pmaxsb", + /* 1B2 */ "pmaxsd", + /* 1B3 */ "pmaxsw", + /* 1B4 */ "pmaxub", + /* 1B5 */ "pmaxud", + /* 1B6 */ "pmaxuw", + /* 1B7 */ "pminsb", + /* 1B8 */ "pminsd", + /* 1B9 */ "pminsw", + /* 1BA */ "pminub", + /* 1BB */ "pminud", + /* 1BC */ "pminuw", + /* 1BD */ "pmovmskb", + /* 1BE */ "pmovsxbd", + /* 1BF */ "pmovsxbq", + /* 1C0 */ "pmovsxbw", + /* 1C1 */ "pmovsxdq", + /* 1C2 */ "pmovsxwd", + /* 1C3 */ "pmovsxwq", + /* 1C4 */ "pmovzxbd", + /* 1C5 */ "pmovzxbq", + /* 1C6 */ "pmovzxbw", + /* 1C7 */ "pmovzxdq", + /* 1C8 */ "pmovzxwd", + /* 1C9 */ "pmovzxwq", + /* 1CA */ "pmuldq", + /* 1CB */ "pmulhrsw", + /* 1CC */ "pmulhrw", + /* 1CD */ "pmulhuw", + /* 1CE */ "pmulhw", + /* 1CF */ "pmulld", + /* 1D0 */ "pmullw", + /* 1D1 */ "pmuludq", + /* 1D2 */ "pop", + /* 1D3 */ "popa", + /* 1D4 */ "popad", + /* 1D5 */ "popcnt", + /* 1D6 */ "popfd", + /* 1D7 */ "popfq", + /* 1D8 */ "popfw", + /* 1D9 */ "por", + /* 1DA */ "prefetch", + /* 1DB */ "prefetchnta", + /* 1DC */ "prefetcht0", + /* 1DD */ "prefetcht1", + /* 1DE */ "prefetcht2", + /* 1DF */ "psadbw", + /* 1E0 */ "pshufb", + /* 1E1 */ "pshufd", + /* 1E2 */ "pshufhw", + /* 1E3 */ "pshuflw", + /* 1E4 */ "pshufw", + /* 1E5 */ "psignb", + /* 1E6 */ "psignd", + /* 1E7 */ "psignw", + /* 1E8 */ "pslld", + /* 1E9 */ "pslldq", + /* 1EA */ "psllq", + /* 1EB */ "psllw", + /* 1EC */ "psrad", + /* 1ED */ "psraw", + /* 1EE */ "psrld", + /* 1EF */ "psrldq", + /* 1F0 */ "psrlq", + /* 1F1 */ "psrlw", + /* 1F2 */ "psubb", + /* 1F3 */ "psubd", + /* 1F4 */ "psubq", + /* 1F5 */ "psubsb", + /* 1F6 */ "psubsw", + /* 1F7 */ "psubusb", + /* 1F8 */ "psubusw", + /* 1F9 */ "psubw", + /* 1FA */ "pswapd", + /* 1FB */ "ptest", + /* 1FC */ "punpckhbw", + /* 1FD */ "punpckhdq", + /* 1FE */ "punpckhqdq", + /* 1FF */ "punpckhwd", + /* 200 */ "punpcklbw", + /* 201 */ "punpckldq", + /* 202 */ "punpcklqdq", + /* 203 */ "punpcklwd", + /* 204 */ "push", + /* 205 */ "pusha", + /* 206 */ "pushad", + /* 207 */ "pushfd", + /* 208 */ "pushfq", + /* 209 */ "pushfw", + /* 20A */ "pxor", + /* 20B */ "rcl", + /* 20C */ "rcpps", + /* 20D */ "rcpss", + /* 20E */ "rcr", + /* 20F */ "rdmsr", + /* 210 */ "rdpmc", + /* 211 */ "rdrand", + /* 212 */ "rdtsc", + /* 213 */ "rdtscp", + /* 214 */ "rep", + /* 215 */ "repne", + /* 216 */ "ret", + /* 217 */ "retf", + /* 218 */ "rol", + /* 219 */ "ror", + /* 21A */ "roundpd", + /* 21B */ "roundps", + /* 21C */ "roundsd", + /* 21D */ "roundss", + /* 21E */ "rsm", + /* 21F */ "rsqrtps", + /* 220 */ "rsqrtss", + /* 221 */ "sahf", + /* 222 */ "salc", + /* 223 */ "sar", + /* 224 */ "sbb", + /* 225 */ "scasb", + /* 226 */ "scasd", + /* 227 */ "scasq", + /* 228 */ "scasw", + /* 229 */ "seta", + /* 22A */ "setae", + /* 22B */ "setb", + /* 22C */ "setbe", + /* 22D */ "sete", + /* 22E */ "setg", + /* 22F */ "setge", + /* 230 */ "setl", + /* 231 */ "setle", + /* 232 */ "setne", + /* 233 */ "setno", + /* 234 */ "setnp", + /* 235 */ "setns", + /* 236 */ "seto", + /* 237 */ "setp", + /* 238 */ "sets", + /* 239 */ "sfence", + /* 23A */ "sgdt", + /* 23B */ "shl", + /* 23C */ "shld", + /* 23D */ "shr", + /* 23E */ "shrd", + /* 23F */ "shufpd", + /* 240 */ "shufps", + /* 241 */ "sidt", + /* 242 */ "skinit", + /* 243 */ "sldt", + /* 244 */ "smsw", + /* 245 */ "sqrtpd", + /* 246 */ "sqrtps", + /* 247 */ "sqrtsd", + /* 248 */ "sqrtss", + /* 249 */ "stc", + /* 24A */ "std", + /* 24B */ "stgi", + /* 24C */ "sti", + /* 24D */ "stmxcsr", + /* 24E */ "stosb", + /* 24F */ "stosd", + /* 250 */ "stosq", + /* 251 */ "stosw", + /* 252 */ "str", + /* 253 */ "sub", + /* 254 */ "subpd", + /* 255 */ "subps", + /* 256 */ "subsd", + /* 257 */ "subss", + /* 258 */ "swapgs", + /* 259 */ "syscall", + /* 25A */ "sysenter", + /* 25B */ "sysexit", + /* 25C */ "sysret", + /* 25D */ "test", + /* 25E */ "ucomisd", + /* 25F */ "ucomiss", + /* 260 */ "ud2", + /* 261 */ "unpckhpd", + /* 262 */ "unpckhps", + /* 263 */ "unpcklpd", + /* 264 */ "unpcklps", + /* 265 */ "vaddpd", + /* 266 */ "vaddps", + /* 267 */ "vaddsd", + /* 268 */ "vaddss", + /* 269 */ "vaddsubpd", + /* 26A */ "vaddsubps", + /* 26B */ "vaesdec", + /* 26C */ "vaesdeclast", + /* 26D */ "vaesenc", + /* 26E */ "vaesenclast", + /* 26F */ "vaesimc", + /* 270 */ "vaeskeygenassist", + /* 271 */ "vandnpd", + /* 272 */ "vandnps", + /* 273 */ "vandpd", + /* 274 */ "vandps", + /* 275 */ "vblendpd", + /* 276 */ "vblendps", + /* 277 */ "vblendvpd", + /* 278 */ "vblendvps", + /* 279 */ "vbroadcastsd", + /* 27A */ "vbroadcastss", + /* 27B */ "vcmppd", + /* 27C */ "vcmpps", + /* 27D */ "vcmpsd", + /* 27E */ "vcmpss", + /* 27F */ "vcomisd", + /* 280 */ "vcomiss", + /* 281 */ "vcvtdq2pd", + /* 282 */ "vcvtdq2ps", + /* 283 */ "vcvtpd2dq", + /* 284 */ "vcvtpd2ps", + /* 285 */ "vcvtps2dq", + /* 286 */ "vcvtps2pd", + /* 287 */ "vcvtsd2si", + /* 288 */ "vcvtsd2ss", + /* 289 */ "vcvtsi2sd", + /* 28A */ "vcvtsi2ss", + /* 28B */ "vcvtss2sd", + /* 28C */ "vcvtss2si", + /* 28D */ "vcvttpd2dq", + /* 28E */ "vcvttps2dq", + /* 28F */ "vcvttsd2si", + /* 290 */ "vcvttss2si", + /* 291 */ "vdivpd", + /* 292 */ "vdivps", + /* 293 */ "vdivsd", + /* 294 */ "vdivss", + /* 295 */ "vdppd", + /* 296 */ "vdpps", + /* 297 */ "verr", + /* 298 */ "verw", + /* 299 */ "vextractf128", + /* 29A */ "vextractps", + /* 29B */ "vhaddpd", + /* 29C */ "vhaddps", + /* 29D */ "vhsubpd", + /* 29E */ "vhsubps", + /* 29F */ "vinsertf128", + /* 2A0 */ "vinsertps", + /* 2A1 */ "vlddqu", + /* 2A2 */ "vmaskmovdqu", + /* 2A3 */ "vmaskmovpd", + /* 2A4 */ "vmaskmovps", + /* 2A5 */ "vmaxpd", + /* 2A6 */ "vmaxps", + /* 2A7 */ "vmaxsd", + /* 2A8 */ "vmaxss", + /* 2A9 */ "vmcall", + /* 2AA */ "vmclear", + /* 2AB */ "vminpd", + /* 2AC */ "vminps", + /* 2AD */ "vminsd", + /* 2AE */ "vminss", + /* 2AF */ "vmlaunch", + /* 2B0 */ "vmload", + /* 2B1 */ "vmmcall", + /* 2B2 */ "vmovapd", + /* 2B3 */ "vmovaps", + /* 2B4 */ "vmovd", + /* 2B5 */ "vmovddup", + /* 2B6 */ "vmovdqa", + /* 2B7 */ "vmovdqu", + /* 2B8 */ "vmovhlps", + /* 2B9 */ "vmovhpd", + /* 2BA */ "vmovhps", + /* 2BB */ "vmovlhps", + /* 2BC */ "vmovlpd", + /* 2BD */ "vmovlps", + /* 2BE */ "vmovmskpd", + /* 2BF */ "vmovmskps", + /* 2C0 */ "vmovntdq", + /* 2C1 */ "vmovntdqa", + /* 2C2 */ "vmovntpd", + /* 2C3 */ "vmovntps", + /* 2C4 */ "vmovq", + /* 2C5 */ "vmovsd", + /* 2C6 */ "vmovshdup", + /* 2C7 */ "vmovsldup", + /* 2C8 */ "vmovss", + /* 2C9 */ "vmovupd", + /* 2CA */ "vmovups", + /* 2CB */ "vmpsadbw", + /* 2CC */ "vmptrld", + /* 2CD */ "vmptrst", + /* 2CE */ "vmread", + /* 2CF */ "vmresume", + /* 2D0 */ "vmrun", + /* 2D1 */ "vmsave", + /* 2D2 */ "vmulpd", + /* 2D3 */ "vmulps", + /* 2D4 */ "vmulsd", + /* 2D5 */ "vmulss", + /* 2D6 */ "vmwrite", + /* 2D7 */ "vmxoff", + /* 2D8 */ "vmxon", + /* 2D9 */ "vorpd", + /* 2DA */ "vorps", + /* 2DB */ "vpabsb", + /* 2DC */ "vpabsd", + /* 2DD */ "vpabsw", + /* 2DE */ "vpackssdw", + /* 2DF */ "vpacksswb", + /* 2E0 */ "vpackusdw", + /* 2E1 */ "vpackuswb", + /* 2E2 */ "vpaddb", + /* 2E3 */ "vpaddd", + /* 2E4 */ "vpaddq", + /* 2E5 */ "vpaddsb", + /* 2E6 */ "vpaddsw", + /* 2E7 */ "vpaddusb", + /* 2E8 */ "vpaddusw", + /* 2E9 */ "vpaddw", + /* 2EA */ "vpalignr", + /* 2EB */ "vpand", + /* 2EC */ "vpandn", + /* 2ED */ "vpavgb", + /* 2EE */ "vpavgw", + /* 2EF */ "vpblendvb", + /* 2F0 */ "vpblendw", + /* 2F1 */ "vpclmulqdq", + /* 2F2 */ "vpcmpeqb", + /* 2F3 */ "vpcmpeqd", + /* 2F4 */ "vpcmpeqq", + /* 2F5 */ "vpcmpeqw", + /* 2F6 */ "vpcmpestri", + /* 2F7 */ "vpcmpestrm", + /* 2F8 */ "vpcmpgtb", + /* 2F9 */ "vpcmpgtd", + /* 2FA */ "vpcmpgtq", + /* 2FB */ "vpcmpgtw", + /* 2FC */ "vpcmpistri", + /* 2FD */ "vpcmpistrm", + /* 2FE */ "vperm2f128", + /* 2FF */ "vpermilpd", + /* 300 */ "vpermilps", + /* 301 */ "vpextrb", + /* 302 */ "vpextrd", + /* 303 */ "vpextrq", + /* 304 */ "vpextrw", + /* 305 */ "vphaddd", + /* 306 */ "vphaddsw", + /* 307 */ "vphaddw", + /* 308 */ "vphminposuw", + /* 309 */ "vphsubd", + /* 30A */ "vphsubsw", + /* 30B */ "vphsubw", + /* 30C */ "vpinsrb", + /* 30D */ "vpinsrd", + /* 30E */ "vpinsrq", + /* 30F */ "vpinsrw", + /* 310 */ "vpmaddubsw", + /* 311 */ "vpmaddwd", + /* 312 */ "vpmaxsb", + /* 313 */ "vpmaxsd", + /* 314 */ "vpmaxsw", + /* 315 */ "vpmaxub", + /* 316 */ "vpmaxud", + /* 317 */ "vpmaxuw", + /* 318 */ "vpminsb", + /* 319 */ "vpminsd", + /* 31A */ "vpminsw", + /* 31B */ "vpminub", + /* 31C */ "vpminud", + /* 31D */ "vpminuw", + /* 31E */ "vpmovmskb", + /* 31F */ "vpmovsxbd", + /* 320 */ "vpmovsxbq", + /* 321 */ "vpmovsxbw", + /* 322 */ "vpmovsxwd", + /* 323 */ "vpmovsxwq", + /* 324 */ "vpmovzxbd", + /* 325 */ "vpmovzxbq", + /* 326 */ "vpmovzxbw", + /* 327 */ "vpmovzxdq", + /* 328 */ "vpmovzxwd", + /* 329 */ "vpmovzxwq", + /* 32A */ "vpmuldq", + /* 32B */ "vpmulhrsw", + /* 32C */ "vpmulhuw", + /* 32D */ "vpmulhw", + /* 32E */ "vpmulld", + /* 32F */ "vpmullw", + /* 330 */ "vpor", + /* 331 */ "vpsadbw", + /* 332 */ "vpshufb", + /* 333 */ "vpshufd", + /* 334 */ "vpshufhw", + /* 335 */ "vpshuflw", + /* 336 */ "vpsignb", + /* 337 */ "vpsignd", + /* 338 */ "vpsignw", + /* 339 */ "vpslld", + /* 33A */ "vpslldq", + /* 33B */ "vpsllq", + /* 33C */ "vpsllw", + /* 33D */ "vpsrad", + /* 33E */ "vpsraw", + /* 33F */ "vpsrld", + /* 340 */ "vpsrldq", + /* 341 */ "vpsrlq", + /* 342 */ "vpsrlw", + /* 343 */ "vpsubb", + /* 344 */ "vpsubd", + /* 345 */ "vpsubq", + /* 346 */ "vpsubsb", + /* 347 */ "vpsubsw", + /* 348 */ "vpsubusb", + /* 349 */ "vpsubusw", + /* 34A */ "vpsubw", + /* 34B */ "vptest", + /* 34C */ "vpunpckhbw", + /* 34D */ "vpunpckhdq", + /* 34E */ "vpunpckhqdq", + /* 34F */ "vpunpckhwd", + /* 350 */ "vpunpcklbw", + /* 351 */ "vpunpckldq", + /* 352 */ "vpunpcklqdq", + /* 353 */ "vpunpcklwd", + /* 354 */ "vpxor", + /* 355 */ "vrcpps", + /* 356 */ "vrcpss", + /* 357 */ "vroundpd", + /* 358 */ "vroundps", + /* 359 */ "vroundsd", + /* 35A */ "vroundss", + /* 35B */ "vrsqrtps", + /* 35C */ "vrsqrtss", + /* 35D */ "vshufpd", + /* 35E */ "vshufps", + /* 35F */ "vsqrtpd", + /* 360 */ "vsqrtps", + /* 361 */ "vsqrtsd", + /* 362 */ "vsqrtss", + /* 363 */ "vstmxcsr", + /* 364 */ "vsubpd", + /* 365 */ "vsubps", + /* 366 */ "vsubsd", + /* 367 */ "vsubss", + /* 368 */ "vtestpd", + /* 369 */ "vtestps", + /* 36A */ "vucomisd", + /* 36B */ "vucomiss", + /* 36C */ "vunpckhpd", + /* 36D */ "vunpckhps", + /* 36E */ "vunpcklpd", + /* 36F */ "vunpcklps", + /* 370 */ "vxorpd", + /* 371 */ "vxorps", + /* 372 */ "vzeroall", + /* 373 */ "vzeroupper", + /* 374 */ "wait", + /* 375 */ "wbinvd", + /* 376 */ "wrmsr", + /* 377 */ "xadd", + /* 378 */ "xchg", + /* 379 */ "xcryptcbc", + /* 37A */ "xcryptcfb", + /* 37B */ "xcryptctr", + /* 37C */ "xcryptecb", + /* 37D */ "xcryptofb", + /* 37E */ "xgetbv", + /* 37F */ "xlatb", + /* 380 */ "xor", + /* 381 */ "xorpd", + /* 382 */ "xorps", + /* 383 */ "xrstor", + /* 384 */ "xsave", + /* 385 */ "xsetbv", + /* 386 */ "xsha1", + /* 387 */ "xsha256", + /* 388 */ "xstore", +}; + +#undef VX_NODE +#undef VX_INVALID \ No newline at end of file diff --git a/Bindings/C/VXOpcodeTableC.cpp b/Bindings/C/VXOpcodeTableC.cpp deleted file mode 100644 index 80d3626..0000000 --- a/Bindings/C/VXOpcodeTableC.cpp +++ /dev/null @@ -1,35 +0,0 @@ -/************************************************************************************************** - - Verteron Disassembler Engine - Version 1.0 - - Remarks : Freeware, Copyright must be included - - Original Author : athre0z - Modifications : - - Last change : 04. February 2015 - - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - -**************************************************************************************************/ - -#include "VXOpcodeTableC.h" -#include "VXOpcodeTable.h" - diff --git a/Bindings/C/VXOpcodeTableC.h b/Bindings/C/VXOpcodeTableC.h index f65b862..f36cc41 100644 --- a/Bindings/C/VXOpcodeTableC.h +++ b/Bindings/C/VXOpcodeTableC.h @@ -34,6 +34,7 @@ #define _VDE_VXOPCODETABLEC_H_ #include +#include #ifdef __cplusplus extern "C" diff --git a/Bindings/C/VXOpcodeTableInternalC.h b/Bindings/C/VXOpcodeTableInternalC.h new file mode 100644 index 0000000..83e293b --- /dev/null +++ b/Bindings/C/VXOpcodeTableInternalC.h @@ -0,0 +1,313 @@ +/************************************************************************************************** + + Verteron Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : athre0z + Modifications : + + Last change : 14. March 2015 + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +**************************************************************************************************/ + +#ifndef _VDE_VXOPCODETABLEINTERNAL_H_ +#define _VDE_VXOPCODETABLEINTERNAL_H_ + +#include +#include "VXOpcodeTableC.h" + +/** + * @brief Contains all opcode tables. + * Indexed by the numeric value of the opcode. + */ +extern const VXOpcodeTreeNode vxOptreeTable[][256]; + +/** + * @brief Contains all modrm_mod switch tables. + * Index values: + * 0 = [modrm_mod == !11] + * 1 = [modrm_mod == 11] + */ +extern const VXOpcodeTreeNode vxOptreeModrmMod[][2]; + +/** + * @brief Contains all modrm_reg switch tables. + * Indexed by the numeric value of the modrm_reg field. + */ +extern const VXOpcodeTreeNode vxOptreeModrmReg[][8]; + +/** + * @brief Contains all modrm_rm switch tables. + * Indexed by the numeric value of the modrm_rm field. + */ +extern const VXOpcodeTreeNode vxOptreeModrmRm[][8]; + +/** + * @brief Contains all mandatory-prefix switch tables. + * Index values: + * 0 = none + * 1 = F2 + * 2 = F3 + * 3 = 66 + */ +extern const VXOpcodeTreeNode vxOptreeMandatory[][4]; + +/** + * @brief Contains all x87 opcode tables. + * Indexed by the numeric value of the 6 lowest bits of the modrm byte (modrm_mod should + * always be 11). + */ +extern const VXOpcodeTreeNode vxOptreeX87[][64]; + +/** + * @brief Contains all address-size switch tables. + * Index values: + * 0 = 16 + * 1 = 32 + * 2 = 64 + */ +extern const VXOpcodeTreeNode vxOptreeAddressSize[][3]; + +/** + * @brief Contains all operand-size switch tables. + * Index values: + * 0 = 16 + * 1 = 32 + * 2 = 64 + */ +extern const VXOpcodeTreeNode vxOptreeOperandSize[][3]; + +/** + * @brief Contains all cpu-mode switch tables. + * Index values: + * 0 = [!= 64] + * 1 = 64 + */ +extern const VXOpcodeTreeNode vxOptreeMode[][2]; + +/** + * @brief Contains all vendor switch tables. + * Index values: + * 0 = AMD + * 1 = Intel + */ +extern const VXOpcodeTreeNode vxOptreeVendor[][2]; + +/** + * @brief Contains all 3DNow! switch tables. + * Indexed by the numeric value of the 3DNow! opcode. + */ +extern const VXOpcodeTreeNode vxOptree3dnow[][256]; + +/** + * @brief Contains all vex switch tables. + * Index values: + * 0 = none + * 1 = 0F + * 2 = 0F38 + * 3 = 0F3A + * 4 = 66 + * 5 = 66_0F + * 6 = 66_0F38 + * 7 = 66_0F3A + * 8 = F3 + * 9 = F3_0F + * A = F3_0F38 + * B = F3_0F3A + * C = F2 + * D = F2_0F + * E = F2_0F38 + * F = F2_0F3A + */ +extern const VXOpcodeTreeNode vxOptreeVex[][16]; + +/** + * @brief Contains all vex_w switch tables. + * Indexed by the numeric value of the vex_w field. + */ +extern const VXOpcodeTreeNode vxOptreeVexW[][2]; + +/** + * @brief Contains all vex_l switch tables. + * Indexed by the numeric value of the vex_l field. + */ +extern const VXOpcodeTreeNode vxOptreeVexL[][2]; + +/** + * @brief Contains all instruction definitions. + */ +extern const VXInstructionDefinition vxInstrDefinitions[]; + +/** + * @brief Contains all instruction mnemonic strings. + */ +extern const char* vxInstrMnemonicStrings[]; + +/** + * @brief Returns the type of the specified opcode tree node. + * @param node The node. + * @return The type of the specified opcode tree node. + */ +__inline VXOpcodeTreeNodeType VXGetOpcodeNodeType(VXOpcodeTreeNode node) +{ + return (VXOpcodeTreeNodeType)((node >> 12) & 0x0F); +} + +/** + * @brief Returns the value of the specified opcode tree node. + * @param node The node. + * @return The value of the specified opcode tree node. + */ +__inline uint16_t VXGetOpcodeNodeValue(VXOpcodeTreeNode node) +{ + return (node & 0x0FFF); +} + +/** + * @brief Returns the root node of the opcode tree. + * @return The root node of the opcode tree. + */ +__inline VXOpcodeTreeNode VXGetOpcodeTreeRoot() +{ + return 0x1000; +} + +/** + * @brief Returns a child node of @c parent specified by @c index. + * @param parent The parent node. + * @param index The index of the child node to retrieve. + * @return The specified child node. + */ +__inline VXOpcodeTreeNode VXGetOpcodeTreeChild(VXOpcodeTreeNode parent, uint16_t index) +{ + VXOpcodeTreeNodeType nodeType = VXGetOpcodeNodeType(parent); + uint16_t tableIndex = VXGetOpcodeNodeValue(parent); + switch (nodeType) + { + case OTNT_TABLE: + assert(index < 256); + return vxOptreeTable[tableIndex][index]; + case OTNT_MODRM_MOD: + assert(index < 2); + return vxOptreeModrmMod[tableIndex][index]; + case OTNT_MODRM_REG: + assert(index < 8); + return vxOptreeModrmReg[tableIndex][index]; + case OTNT_MODRM_RM: + assert(index < 8); + return vxOptreeModrmRm[tableIndex][index]; + case OTNT_MANDATORY: + assert(index < 4); + return vxOptreeMandatory[tableIndex][index]; + case OTNT_X87: + assert(index < 64); + return vxOptreeX87[tableIndex][index]; + case OTNT_ADDRESS_SIZE: + assert(index < 3); + return vxOptreeAddressSize[tableIndex][index]; + case OTNT_OPERAND_SIZE: + assert(index < 3); + return vxOptreeOperandSize[tableIndex][index]; + case OTNT_MODE: + assert(index < 2); + return vxOptreeMode[tableIndex][index]; + case OTNT_VENDOR: + assert(index < 3); + return vxOptreeVendor[tableIndex][index]; + case OTNT_AMD3DNOW: + assert(index < 256); + return vxOptree3dnow[tableIndex][index]; + case OTNT_VEX: + assert(index < 16); + return vxOptreeVex[tableIndex][index]; + case OTNT_VEXW: + assert(index < 2); + return vxOptreeVexW[tableIndex][index]; + case OTNT_VEXL: + assert(index < 2); + return vxOptreeVexL[tableIndex][index]; + default: + assert(0); + } + return 0xFFFF; +} + +/** + * @brief Returns the instruction definition that is linked to the given @c node. + * @param node The instruction definition node. + * @return Pointer to the instruction definition. + */ +__inline const VXInstructionDefinition* VXGetInstructionDefinition(VXOpcodeTreeNode node) +{ + assert(VXGetOpcodeNodeType(node) == OTNT_INSTRUCTION_DEFINITION); + return &vxInstrDefinitions[node & 0x0FFF]; +} + +/** + * @brief Returns the specified instruction mnemonic string. + * @param mnemonic The mnemonic. + * @return The instruction mnemonic string. + */ +__inline const char* VXGetInstructionMnemonicString(VXInstructionMnemonic mnemonic) +{ + return vxInstrMnemonicStrings[(uint16_t)mnemonic]; +} + +/** + * @brief Returns the numeric value for a simple operand size definition. + * @param operandSize The defined operand size. + * @return The the numeric value for the simple operand size definition. + */ +__inline uint16_t VXGetSimpleOperandSize(VXDefinedOperandSize operandSize) +{ + static const uint16_t operandSizes[8] = + { + 8, 16, 32, 64, 80, 12, 128, 256 + }; + + uint16_t index = operandSize - DOS_B; + assert(index < 8); + return operandSizes[index]; +} + +/** + * @brief Returns the memory-size part of a complex operand size definition. + * @param operandSize The defined operand size. + * @return The memory-size part of the operand size definition. + */ +__inline VXDefinedOperandSize VXGetComplexOperandMemSize(VXDefinedOperandSize operandSize) +{ + return (VXDefinedOperandSize)(operandSize & 0x0F); +} + +/** + * @brief Returns the register-size part of a complex operand size definition. + * @param operandSize The defined operand size. + * @return The register-size part of the operand size definition. + */ +__inline VXDefinedOperandSize VXGetComplexOperandRegSize(VXDefinedOperandSize operandSize) +{ + return (VXDefinedOperandSize)((operandSize >> 4) & 0x0F); +} + +#endif // _VDE_VXOPCODETABLEINTERNAL_H_ \ No newline at end of file diff --git a/CMakeLists.txt b/CMakeLists.txt index 099d968..9a9c0ae 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -44,12 +44,14 @@ if (BUILD_C_BINDINGS) "Bindings/C/VXDisassemblerUtilsC.h" "Bindings/C/VXInstructionDecoderC.h" "Bindings/C/VXInstructionFormatterC.h" - "Bindings/C/VXOpcodeTableC.h") + "Bindings/C/VXOpcodeTableC.h" + "Bindings/C/VXOpcodeTableInternalC.h" + "Bindings/C/VXInternalHelpersC.h") set(vdec_sources - "Bindings/C/VXDisassemblerUtilsC.cpp" - "Bindings/C/VXInstructionFormatterC.cpp" - "Bindings/C/VXOpcodeTableC.cpp" - "Bindings/C/VXInstructionDecoderC.cpp") + "Bindings/C/VXDisassemblerUtilsC.c" + "Bindings/C/VXInstructionFormatterC.c" + "Bindings/C/VXOpcodeTableC.c" + "Bindings/C/VXInstructionDecoderC.c") add_library("VerteronDisassemblerEngineC" ${vdec_headers} ${vdec_sources}) target_link_libraries("VerteronDisassemblerEngineC" "VerteronDisassemblerEngine") endif () diff --git a/VerteronDisassemblerEngine/VXOpcodeTable.cpp b/VerteronDisassemblerEngine/VXOpcodeTable.cpp index c6d5778..72438f2 100644 --- a/VerteronDisassemblerEngine/VXOpcodeTable.cpp +++ b/VerteronDisassemblerEngine/VXOpcodeTable.cpp @@ -37,7 +37,7 @@ namespace Verteron namespace Internal { -#define INVALID 0 +#define VX_INVALID 0 #define NODE(type, n) (static_cast(type) << 12 | (n)) const VXOpcodeTreeNode optreeTable[][256] = @@ -81,7 +81,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 23 */ 0x002C, /* 24 */ 0x002D, /* 25 */ 0x002E, - /* 26 */ INVALID, + /* 26 */ VX_INVALID, /* 27 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000B), /* 28 */ 0x0542, /* 29 */ 0x0549, @@ -89,7 +89,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 2B */ 0x054B, /* 2C */ 0x054A, /* 2D */ 0x0547, - /* 2E */ INVALID, + /* 2E */ VX_INVALID, /* 2F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000C), /* 30 */ 0x06B8, /* 31 */ 0x06B9, @@ -97,7 +97,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 33 */ 0x06B7, /* 34 */ 0x06BA, /* 35 */ 0x06BB, - /* 36 */ INVALID, + /* 36 */ VX_INVALID, /* 37 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000D), /* 38 */ 0x006C, /* 39 */ 0x006D, @@ -105,7 +105,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 3B */ 0x006A, /* 3C */ 0x0070, /* 3D */ 0x006F, - /* 3E */ INVALID, + /* 3E */ VX_INVALID, /* 3F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000E), /* 40 */ 0x02AB, /* 41 */ 0x02AC, @@ -143,10 +143,10 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 61 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0008), /* 62 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0013), /* 63 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0014), - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, /* 68 */ 0x04B7, /* 69 */ 0x02A4, /* 6A */ 0x04AB, @@ -305,15 +305,15 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0000), /* 02 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0003), /* 03 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0004), - /* 04 */ INVALID, + /* 04 */ VX_INVALID, /* 05 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0005), /* 06 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0006), /* 07 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0007), /* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0008), /* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0009), - /* 0A */ INVALID, + /* 0A */ VX_INVALID, /* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000A), - /* 0C */ INVALID, + /* 0C */ VX_INVALID, /* 0D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000B), /* 0E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000C), /* 0F */ NODE(VXOpcodeTreeNodeType::AMD3DNOW, 0x0000), @@ -337,10 +337,10 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0020), /* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0021), /* 23 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0022), - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0023), /* 29 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0024), /* 2A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0025), @@ -355,16 +355,16 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 33 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002E), /* 34 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002F), /* 35 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0030), - /* 36 */ INVALID, + /* 36 */ VX_INVALID, /* 37 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0031), /* 38 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0002), - /* 39 */ INVALID, + /* 39 */ VX_INVALID, /* 3A */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0003), - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, /* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0081), /* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0082), /* 42 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0083), @@ -423,8 +423,8 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 77 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B8), /* 78 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B9), /* 79 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BA), - /* 7A */ INVALID, - /* 7B */ INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, /* 7C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BB), /* 7D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BC), /* 7E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BD), @@ -486,7 +486,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* B6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F6), /* B7 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F7), /* B8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F8), - /* B9 */ INVALID, + /* B9 */ VX_INVALID, /* BA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F9), /* BB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FA), /* BC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FB), @@ -556,7 +556,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* FC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013C), /* FD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013D), /* FE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013E), - /* FF */ INVALID, + /* FF */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0032), @@ -571,49 +571,49 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003B), /* 0A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003C), /* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003D), - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, /* 10 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003E), - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, /* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003F), /* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0040), - /* 16 */ INVALID, + /* 16 */ VX_INVALID, /* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0041), - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, /* 1C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0042), /* 1D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0043), /* 1E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0044), - /* 1F */ INVALID, + /* 1F */ VX_INVALID, /* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0045), /* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0046), /* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0047), /* 23 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0048), /* 24 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0049), /* 25 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004A), - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004B), /* 29 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004C), /* 2A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004D), /* 2B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004E), - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, /* 30 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004F), /* 31 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0050), /* 32 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0051), /* 33 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0052), /* 34 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0053), /* 35 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0054), - /* 36 */ INVALID, + /* 36 */ VX_INVALID, /* 37 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0055), /* 38 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0056), /* 39 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0057), @@ -625,206 +625,206 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 3F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005D), /* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005E), /* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005F), - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, /* 80 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0060), /* 81 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0061), - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, /* DB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0062), /* DC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0063), /* DD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0064), /* DE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0065), /* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0066), - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, /* F0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0067), /* F1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0068), - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, /* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0069), /* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006A), /* 0A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006B), @@ -833,264 +833,264 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 0D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006E), /* 0E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006F), /* 0F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0070), - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, /* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0071), /* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0072), /* 16 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0073), /* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0074), - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, /* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0075), /* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0076), /* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0077), - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, /* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0078), /* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0079), /* 42 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007A), - /* 43 */ INVALID, + /* 43 */ VX_INVALID, /* 44 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007B), - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, /* 60 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007C), /* 61 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007D), /* 62 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007E), /* 63 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007F), - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, /* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0080), - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, /* 10 */ 0x05E6, /* 11 */ 0x05E5, /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0008), @@ -1099,62 +1099,62 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 15 */ 0x0696, /* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0009), /* 17 */ 0x05C7, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ 0x05B8, /* 29 */ 0x05B7, - /* 2A */ INVALID, + /* 2A */ VX_INVALID, /* 2B */ 0x05D2, - /* 2C */ INVALID, - /* 2D */ INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, /* 2E */ 0x0694, /* 2F */ 0x0581, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, /* 50 */ 0x05CE, /* 51 */ 0x0689, /* 52 */ 0x0684, @@ -1171,184 +1171,184 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 5D */ 0x05AF, /* 5E */ 0x0593, /* 5F */ 0x05A9, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, /* 77 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0000), - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, /* AE */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000A), - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, /* C2 */ 0x057D, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, /* C6 */ 0x0687, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, /* 10 */ 0x05E4, /* 11 */ 0x05E3, /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000B), @@ -1357,66 +1357,66 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 15 */ 0x0695, /* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000C), /* 17 */ 0x05C5, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ 0x05B5, /* 29 */ 0x05B6, - /* 2A */ INVALID, + /* 2A */ VX_INVALID, /* 2B */ 0x05D1, - /* 2C */ INVALID, - /* 2D */ INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, /* 2E */ 0x0693, /* 2F */ 0x0580, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, /* 50 */ 0x05CD, /* 51 */ 0x0688, - /* 52 */ INVALID, - /* 53 */ INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, /* 54 */ 0x0574, /* 55 */ 0x0572, /* 56 */ 0x05F5, @@ -1452,95 +1452,95 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 74 */ 0x060E, /* 75 */ 0x0611, /* 76 */ 0x060F, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, /* 7C */ 0x059C, /* 7D */ 0x059E, /* 7E */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0015), /* 7F */ 0x05C0, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, /* C2 */ 0x057C, - /* C3 */ INVALID, + /* C3 */ VX_INVALID, /* C4 */ 0x0630, /* C5 */ 0x0623, /* C6 */ 0x0686, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, /* D0 */ 0x056A, /* D1 */ 0x066B, /* D2 */ 0x0665, @@ -1573,11 +1573,11 @@ const VXOpcodeTreeNode optreeTable[][256] = /* ED */ 0x0602, /* EE */ 0x0635, /* EF */ 0x067D, - /* F0 */ INVALID, + /* F0 */ VX_INVALID, /* F1 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0005), /* F2 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0006), /* F3 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0007), - /* F4 */ INVALID, + /* F4 */ VX_INVALID, /* F5 */ 0x0632, /* F6 */ 0x0652, /* F7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000D), @@ -1588,7 +1588,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* FC */ 0x05FE, /* FD */ 0x0605, /* FE */ 0x05FF, - /* FF */ INVALID, + /* FF */ VX_INVALID, }, { /* 00 */ 0x0653, @@ -1607,30 +1607,30 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 0D */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0001), /* 0E */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0002), /* 0F */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0003), - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, /* 17 */ 0x0674, /* 18 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0004), /* 19 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0005), - /* 1A */ INVALID, - /* 1B */ INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, /* 1C */ 0x05F7, /* 1D */ 0x05F9, /* 1E */ 0x05F8, - /* 1F */ INVALID, + /* 1F */ VX_INVALID, /* 20 */ 0x0642, /* 21 */ 0x0640, /* 22 */ 0x0641, /* 23 */ 0x0643, /* 24 */ 0x0644, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ 0x064B, /* 29 */ 0x0610, /* 2A */ 0x05D0, @@ -1645,7 +1645,7 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 33 */ 0x0649, /* 34 */ 0x064A, /* 35 */ 0x0648, - /* 36 */ INVALID, + /* 36 */ VX_INVALID, /* 37 */ 0x0616, /* 38 */ 0x0639, /* 39 */ 0x063A, @@ -1657,206 +1657,206 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 3F */ 0x0637, /* 40 */ 0x064F, /* 41 */ 0x0628, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, /* DB */ 0x0570, /* DC */ 0x056E, /* DD */ 0x056F, /* DE */ 0x056C, /* DF */ 0x056D, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, /* 04 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000A), /* 05 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000B), /* 06 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000C), - /* 07 */ INVALID, + /* 07 */ VX_INVALID, /* 08 */ 0x0681, /* 09 */ 0x0680, /* 0A */ 0x0683, @@ -1865,336 +1865,336 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 0D */ 0x0576, /* 0E */ 0x060C, /* 0F */ 0x0606, - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, /* 14 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000D), /* 15 */ 0x0624, /* 16 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0016), /* 17 */ 0x059B, /* 18 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0011), /* 19 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0012), - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, /* 20 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0013), /* 21 */ 0x05A1, /* 22 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0025), - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, /* 40 */ 0x0597, /* 41 */ 0x0596, /* 42 */ 0x05E7, - /* 43 */ INVALID, + /* 43 */ VX_INVALID, /* 44 */ 0x060D, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, /* 4A */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0016), /* 4B */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0017), /* 4C */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0018), - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, /* 60 */ 0x0613, /* 61 */ 0x0612, /* 62 */ 0x0619, /* 63 */ 0x0618, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, /* DF */ 0x0571, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, /* 10 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000E), /* 11 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000F), /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0010), - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, /* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0011), - /* 17 */ INVALID, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, + /* 17 */ VX_INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, /* 2A */ 0x058B, - /* 2B */ INVALID, + /* 2B */ VX_INVALID, /* 2C */ 0x0591, /* 2D */ 0x058D, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, /* 51 */ 0x068B, /* 52 */ 0x0685, /* 53 */ 0x067F, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, /* 58 */ 0x0569, /* 59 */ 0x05F1, /* 5A */ 0x058C, @@ -2203,424 +2203,424 @@ const VXOpcodeTreeNode optreeTable[][256] = /* 5D */ 0x05B1, /* 5E */ 0x0595, /* 5F */ 0x05AB, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, /* 6F */ 0x05C2, /* 70 */ 0x0655, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, /* 7E */ 0x05D3, /* 7F */ 0x05C1, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, /* C2 */ 0x057F, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, /* E6 */ 0x0582, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, + /* 0D */ VX_INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, /* 10 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0012), /* 11 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0013), /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0014), - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, - /* 17 */ INVALID, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, + /* 17 */ VX_INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, /* 2A */ 0x058A, - /* 2B */ INVALID, + /* 2B */ VX_INVALID, /* 2C */ 0x0590, /* 2D */ 0x0588, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, /* 51 */ 0x068A, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, /* 58 */ 0x0568, /* 59 */ 0x05F0, /* 5A */ 0x0589, - /* 5B */ INVALID, + /* 5B */ VX_INVALID, /* 5C */ 0x068F, /* 5D */ 0x05B0, /* 5E */ 0x0594, /* 5F */ 0x05AA, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, /* 70 */ 0x0656, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, /* 7C */ 0x059D, /* 7D */ 0x059F, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, + /* 8A */ VX_INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, + /* 8E */ VX_INVALID, + /* 8F */ VX_INVALID, + /* 90 */ VX_INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, + /* 94 */ VX_INVALID, + /* 95 */ VX_INVALID, + /* 96 */ VX_INVALID, + /* 97 */ VX_INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, + /* 9A */ VX_INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, + /* 9E */ VX_INVALID, + /* 9F */ VX_INVALID, + /* A0 */ VX_INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, + /* A4 */ VX_INVALID, + /* A5 */ VX_INVALID, + /* A6 */ VX_INVALID, + /* A7 */ VX_INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, + /* AA */ VX_INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, + /* AE */ VX_INVALID, + /* AF */ VX_INVALID, + /* B0 */ VX_INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, + /* B4 */ VX_INVALID, + /* B5 */ VX_INVALID, + /* B6 */ VX_INVALID, + /* B7 */ VX_INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, + /* BB */ VX_INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, + /* BF */ VX_INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, /* C2 */ 0x057E, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, /* D0 */ 0x056B, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, /* E6 */ 0x0584, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, /* F0 */ 0x05A2, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, }; @@ -2639,11 +2639,11 @@ const VXOpcodeTreeNode optreeModrmMod[][2] = /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0015), }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E5), }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E6), }, { @@ -2655,7 +2655,7 @@ const VXOpcodeTreeNode optreeModrmMod[][2] = /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0107), }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0137), }, { @@ -2668,18 +2668,18 @@ const VXOpcodeTreeNode optreeModrmMod[][2] = }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001A), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05C9, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05C4, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05A3, }, { @@ -2753,8 +2753,8 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 03 */ 0x0309, /* 04 */ 0x0598, /* 05 */ 0x0599, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x0516, @@ -2762,7 +2762,7 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 02 */ 0x02F9, /* 03 */ 0x02FB, /* 04 */ 0x0533, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x02FE, /* 07 */ 0x02C0, }, @@ -2772,7 +2772,7 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0002), /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0003), /* 04 */ 0x0532, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x02FD, /* 07 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0004), }, @@ -2781,68 +2781,68 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 01 */ 0x0456, /* 02 */ 0x0457, /* 03 */ 0x0458, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x0486, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, /* 04 */ 0x0479, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x0470, - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x0485, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, /* 04 */ 0x0478, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x0473, - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x047E, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, /* 04 */ 0x0475, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x0468, - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x047C, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, /* 04 */ 0x0476, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x046A, - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x0482, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x046D, - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x0481, /* 03 */ 0x0480, - /* 04 */ INVALID, - /* 05 */ INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x046C, /* 07 */ 0x046B, }, @@ -2850,11 +2850,11 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0005), /* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0006), /* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0007), - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0008), @@ -2863,8 +2863,8 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000B), /* 04 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000C), /* 05 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000D), - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x0296, @@ -2873,68 +2873,68 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 03 */ 0x053C, /* 04 */ 0x06C0, /* 05 */ 0x06BF, - /* 06 */ INVALID, + /* 06 */ VX_INVALID, /* 07 */ 0x0055, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, /* 05 */ 0x02F7, /* 06 */ 0x0310, /* 07 */ 0x0515, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, /* 04 */ 0x0043, /* 05 */ 0x0049, /* 06 */ 0x0047, /* 07 */ 0x0045, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0006), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, /* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0015), /* 07 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0016), }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, /* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0017), - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, /* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0018), - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x04D3, - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x000F, @@ -2978,13 +2978,13 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = }, { /* 00 */ 0x0440, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x04DE, @@ -3007,64 +3007,64 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 07 */ 0x04F6, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x068C, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x066A, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, /* 04 */ 0x0664, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0001), - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x0666, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, /* 04 */ 0x0661, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0002), - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x0668, /* 03 */ 0x0667, - /* 04 */ INVALID, - /* 05 */ INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, /* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0003), /* 07 */ 0x065C, }, { /* 00 */ 0x0333, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x0332, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x04DD, @@ -3118,7 +3118,7 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = }, { /* 00 */ 0x01BC, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x01FF, /* 03 */ 0x020B, /* 04 */ 0x01C3, @@ -3141,9 +3141,9 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 01 */ 0x01B1, /* 02 */ 0x01AB, /* 03 */ 0x01AD, - /* 04 */ INVALID, + /* 04 */ VX_INVALID, /* 05 */ 0x01BA, - /* 06 */ INVALID, + /* 06 */ VX_INVALID, /* 07 */ 0x020A, }, { @@ -3162,7 +3162,7 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 02 */ 0x01FE, /* 03 */ 0x0209, /* 04 */ 0x01F3, - /* 05 */ INVALID, + /* 05 */ VX_INVALID, /* 06 */ 0x01E8, /* 07 */ 0x01ED, }, @@ -3209,12 +3209,12 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = { /* 00 */ 0x02AF, /* 01 */ 0x00A4, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x02B0, @@ -3224,41 +3224,41 @@ const VXOpcodeTreeNode optreeModrmReg[][8] = /* 04 */ 0x02D9, /* 05 */ 0x02DA, /* 06 */ 0x04B8, - /* 07 */ INVALID, + /* 07 */ VX_INVALID, }, }; const VXOpcodeTreeNode optreeModrmRm[][8] = { { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0000), /* 02 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0001), /* 03 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0002), /* 04 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0003), - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x0315, /* 01 */ 0x0383, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06B1, /* 01 */ 0x06C1, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0004), @@ -3273,102 +3273,102 @@ const VXOpcodeTreeNode optreeModrmRm[][8] = { /* 00 */ 0x0550, /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000C), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x0316, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06C2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06C3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06C4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06AF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06AC, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06AE, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06AD, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, { /* 00 */ 0x06B0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, }, }; @@ -3376,81 +3376,81 @@ const VXOpcodeTreeNode optreeMandatory[][4] = { { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0000), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0001), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0002), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02F0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0307, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0551, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0058, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0556, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02BD, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x069E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0561, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0454, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0189, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0379, @@ -3474,126 +3474,126 @@ const VXOpcodeTreeNode optreeMandatory[][4] = /* 00 */ 0x034C, /* 01 */ 0x0346, /* 02 */ 0x036E, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0354, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0352, }, { /* 00 */ 0x0565, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0564, }, { /* 00 */ 0x0563, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0562, }, { /* 00 */ 0x0350, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x036B, /* 03 */ 0x034E, }, { /* 00 */ 0x0351, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x036C, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x034F, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x034D, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0003), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x038A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x038B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x038C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0389, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0386, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0387, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0388, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0325, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0328, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0327, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0326, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x033A, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0338, }, { /* 00 */ 0x0339, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0337, }, { @@ -3604,8 +3604,8 @@ const VXOpcodeTreeNode optreeMandatory[][4] = }, { /* 00 */ 0x035C, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x035B, }, { @@ -3622,632 +3622,632 @@ const VXOpcodeTreeNode optreeMandatory[][4] = }, { /* 00 */ 0x0560, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x055F, }, { /* 00 */ 0x0082, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0081, }, { /* 00 */ 0x069F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x04D4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x04D1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x04D2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0003), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0004), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x029A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x045B, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x045C, }, { /* 00 */ 0x03FD, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03FE, }, { /* 00 */ 0x03FA, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03F9, }, { /* 00 */ 0x03FB, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03FC, }, { /* 00 */ 0x040E, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x040F, }, { /* 00 */ 0x0405, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0404, }, { /* 00 */ 0x0400, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0401, }, { /* 00 */ 0x0402, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0403, }, { /* 00 */ 0x0461, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0462, }, { /* 00 */ 0x0466, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0465, }, { /* 00 */ 0x0464, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0463, }, { /* 00 */ 0x0431, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0432, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03CA, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0037, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0036, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x049A, }, { /* 00 */ 0x03A3, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03A2, }, { /* 00 */ 0x03A6, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03A7, }, { /* 00 */ 0x03A4, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03A5, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0426, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0424, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0425, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0428, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0429, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0427, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0430, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03D1, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0359, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03AC, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x042C, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x042A, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x042B, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x042E, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x042F, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x042D, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03DA, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x041A, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x041B, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0421, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0420, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0412, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0413, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0419, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0418, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0438, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03FF, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0005), }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0006), }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0023, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0021, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0022, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x001F, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0020, }, { /* 00 */ 0x033B, /* 01 */ 0x0086, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x033C, /* 01 */ 0x0085, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04E9, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04E8, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04EB, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04EA, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0035, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0034, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03CB, }, { /* 00 */ 0x03BF, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03C0, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03DF, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03E3, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0000), }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x00B5, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0408, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x02B7, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0001), }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x00B2, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x00B1, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x037C, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03CC, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03D5, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03D4, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03DE, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03DD, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0024, }, { /* 00 */ 0x0067, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0064, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x005C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x005B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x005E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0063, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x005D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x005A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0069, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0066, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0068, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0065, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0061, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0060, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0062, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x005F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0357, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0356, }, { @@ -4258,38 +4258,38 @@ const VXOpcodeTreeNode optreeMandatory[][4] = }, { /* 00 */ 0x04ED, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x04EE, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x04C9, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x04CA, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0032, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0031, }, { /* 00 */ 0x0030, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x002F, }, { /* 00 */ 0x039A, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0399, }, { /* 00 */ 0x06BE, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x06BD, }, { @@ -4312,7 +4312,7 @@ const VXOpcodeTreeNode optreeMandatory[][4] = }, { /* 00 */ 0x0088, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x0099, /* 03 */ 0x008E, }, @@ -4342,97 +4342,97 @@ const VXOpcodeTreeNode optreeMandatory[][4] = }, { /* 00 */ 0x04A2, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04A3, }, { /* 00 */ 0x04A7, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04A8, }, { /* 00 */ 0x04A5, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04A4, }, { /* 00 */ 0x03AA, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03AB, }, { /* 00 */ 0x03D7, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03D6, }, { /* 00 */ 0x03DC, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03DB, }, { /* 00 */ 0x03D8, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03D9, }, { /* 00 */ 0x03AD, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03AE, }, { /* 00 */ 0x049B, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x049C, }, { /* 00 */ 0x04A1, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04A0, }, { /* 00 */ 0x049E, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x049D, }, { /* 00 */ 0x03A8, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03A9, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04A6, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x049F, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0002), - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0003), }, { /* 00 */ 0x0363, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x034A, /* 03 */ 0x0348, }, @@ -4444,477 +4444,477 @@ const VXOpcodeTreeNode optreeMandatory[][4] = }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0004), - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0005), }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0006), - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0007), }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0008), - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0009), }, { /* 00 */ 0x03CD, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03CE, }, { /* 00 */ 0x03D2, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03D3, }, { /* 00 */ 0x03D0, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03CF, }, { /* 00 */ 0x00B3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0013), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0014), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x029C, - /* 02 */ INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x029B, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x029F, - /* 02 */ INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x029E, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0004), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x035F, /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0005), }, { /* 00 */ 0x0362, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x034B, /* 03 */ 0x0349, }, { /* 00 */ 0x02E9, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02E3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02C9, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02DF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02CF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02E0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02CC, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02C8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02EE, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02E7, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02EA, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02E4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02D6, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02D4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02D7, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02D2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0512, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x050F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0507, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0506, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0509, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x050E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0508, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0505, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0514, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0511, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0513, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0510, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x050C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x050B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x050D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x050A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x04B5, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x044A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0083, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0044, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0524, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0523, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000A), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000B), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x04B6, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0444, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x04EC, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x004A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x052C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x052B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000C), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000D), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02A2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x007C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x007D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0308, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0048, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02F8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x02FA, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x037B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x037A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { - /* 00 */ INVALID, - /* 01 */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, /* 02 */ 0x044D, - /* 03 */ INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000E), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0046, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0039, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x003A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0373, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0374, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x06A1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x06A0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0075, @@ -4924,368 +4924,368 @@ const VXOpcodeTreeNode optreeMandatory[][4] = }, { /* 00 */ 0x035A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x040D, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x040C, }, { /* 00 */ 0x03E4, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03E5, }, { /* 00 */ 0x052E, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x052D, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000F), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, /* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0010), /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0011), }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0012), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x003F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x003D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0040, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x003C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x003E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x003B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0042, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0041, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x001E, - /* 02 */ INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x001D, }, { /* 00 */ 0x0487, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0488, }, { /* 00 */ 0x047D, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x047F, }, { /* 00 */ 0x0483, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0484, }, { /* 00 */ 0x03B3, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03B4, }, { /* 00 */ 0x0439, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x043A, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x0347, /* 02 */ 0x0366, /* 03 */ 0x0361, }, { /* 00 */ 0x0422, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0423, }, { /* 00 */ 0x0494, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0493, }, { /* 00 */ 0x0496, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0495, }, { /* 00 */ 0x041E, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x041F, }, { /* 00 */ 0x03C1, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03C2, }, { /* 00 */ 0x03BA, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03B9, }, { /* 00 */ 0x03BB, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03BC, }, { /* 00 */ 0x0417, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0416, }, { /* 00 */ 0x03C3, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03C4, }, { /* 00 */ 0x03C5, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03C6, }, { /* 00 */ 0x047A, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x047B, }, { /* 00 */ 0x0477, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0474, }, { /* 00 */ 0x03C8, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03C9, }, { /* 00 */ 0x0434, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0435, }, { /* 00 */ 0x0436, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0437, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x0089, /* 02 */ 0x0087, /* 03 */ 0x0097, }, { /* 00 */ 0x035D, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0358, }, { /* 00 */ 0x048F, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0490, }, { /* 00 */ 0x0492, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0491, }, { /* 00 */ 0x041C, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x041D, }, { /* 00 */ 0x0453, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0452, }, { /* 00 */ 0x03B6, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03B5, }, { /* 00 */ 0x03B8, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03B7, }, { /* 00 */ 0x0414, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0415, }, { /* 00 */ 0x04C1, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x04C2, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x02F1, - /* 02 */ INVALID, - /* 03 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, }, { /* 00 */ 0x0472, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0471, }, { /* 00 */ 0x0469, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0467, }, { /* 00 */ 0x046E, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x046F, }, { /* 00 */ 0x043B, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x043C, }, { /* 00 */ 0x0411, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0410, }, { /* 00 */ 0x045A, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0459, }, { /* 00 */ 0x030B, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x030A, }, { /* 00 */ 0x0489, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x048A, }, { /* 00 */ 0x0498, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x0497, }, { /* 00 */ 0x048B, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x048C, }, { /* 00 */ 0x048D, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x048E, }, { /* 00 */ 0x03AF, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03B0, }, { /* 00 */ 0x03BE, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03BD, }, { /* 00 */ 0x03B1, - /* 01 */ INVALID, - /* 02 */ INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, /* 03 */ 0x03B2, }, }; @@ -5376,13 +5376,13 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 0E */ 0x027F, /* 0F */ 0x0284, /* 10 */ 0x01E7, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, - /* 17 */ INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, + /* 17 */ VX_INVALID, /* 18 */ 0x0213, /* 19 */ 0x0212, /* 1A */ 0x0215, @@ -5393,12 +5393,12 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 1F */ 0x0210, /* 20 */ 0x00D4, /* 21 */ 0x00B7, - /* 22 */ INVALID, - /* 23 */ INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, /* 24 */ 0x025A, /* 25 */ 0x027C, - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ 0x01C1, /* 29 */ 0x01C5, /* 2A */ 0x01C4, @@ -5406,7 +5406,7 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 2C */ 0x01C6, /* 2D */ 0x01C7, /* 2E */ 0x01C9, - /* 2F */ INVALID, + /* 2F */ VX_INVALID, /* 30 */ 0x00B6, /* 31 */ 0x0298, /* 32 */ 0x01F1, @@ -5457,38 +5457,38 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 1D */ 0x0110, /* 1E */ 0x0111, /* 1F */ 0x0112, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, /* 29 */ 0x027B, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, }, { /* 00 */ 0x00F0, @@ -5529,8 +5529,8 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 23 */ 0x01E6, /* 24 */ 0x01E9, /* 25 */ 0x01F4, - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ 0x0269, /* 29 */ 0x026A, /* 2A */ 0x0265, @@ -5547,14 +5547,14 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 35 */ 0x012E, /* 36 */ 0x012D, /* 37 */ 0x012C, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, }, { /* 00 */ 0x00B9, @@ -5671,22 +5671,22 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 2D */ 0x0273, /* 2E */ 0x0276, /* 2F */ 0x0275, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, }, { /* 00 */ 0x00CC, @@ -5713,14 +5713,14 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 15 */ 0x014A, /* 16 */ 0x014D, /* 17 */ 0x014C, - /* 18 */ INVALID, + /* 18 */ VX_INVALID, /* 19 */ 0x0152, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, + /* 1C */ VX_INVALID, + /* 1D */ VX_INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, /* 20 */ 0x0258, /* 21 */ 0x0259, /* 22 */ 0x0256, @@ -5788,13 +5788,13 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 1E */ 0x0222, /* 1F */ 0x0223, /* 20 */ 0x01EC, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, /* 28 */ 0x0271, /* 29 */ 0x0272, /* 2A */ 0x026D, @@ -5811,14 +5811,14 @@ const VXOpcodeTreeNode optreeX87[][64] = /* 35 */ 0x0130, /* 36 */ 0x0131, /* 37 */ 0x0132, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, }, }; @@ -5871,22 +5871,22 @@ const VXOpcodeTreeNode optreeOperandSize[][3] = { /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000F), /* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0010), - /* 02 */ INVALID, + /* 02 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0011), /* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0012), - /* 02 */ INVALID, + /* 02 */ VX_INVALID, }, { /* 00 */ 0x02B8, /* 01 */ 0x02B6, - /* 02 */ INVALID, + /* 02 */ VX_INVALID, }, { /* 00 */ 0x03A1, /* 01 */ 0x03A0, - /* 02 */ INVALID, + /* 02 */ VX_INVALID, }, { /* 00 */ 0x0050, @@ -5959,15 +5959,15 @@ const VXOpcodeTreeNode optreeMode[][2] = { { /* 00 */ 0x04AA, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0445, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04AD, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0553, @@ -5987,55 +5987,55 @@ const VXOpcodeTreeNode optreeMode[][2] = }, { /* 00 */ 0x04AC, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0446, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04A9, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0443, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x009F, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x00A0, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0001, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0004, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04BA, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04BB, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x044B, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x044C, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0038, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0033, @@ -6043,39 +6043,39 @@ const VXOpcodeTreeNode optreeMode[][2] = }, { /* 00 */ 0x0011, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0398, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0007, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04FC, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x002A, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0546, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x06B3, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0073, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x004F, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04C0, @@ -6086,24 +6086,24 @@ const VXOpcodeTreeNode optreeMode[][2] = /* 01 */ 0x04BE, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x04BD, }, { /* 00 */ 0x0451, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x044E, /* 01 */ 0x0450, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x044F, }, { /* 00 */ 0x02F6, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0014), @@ -6111,27 +6111,27 @@ const VXOpcodeTreeNode optreeMode[][2] = }, { /* 00 */ 0x02F3, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x02BC, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0003, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0002, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04F0, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x02DC, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x004D, @@ -6142,103 +6142,103 @@ const VXOpcodeTreeNode optreeMode[][2] = const VXOpcodeTreeNode optreeVendor[][2] = { { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05AC, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05B2, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05EB, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05F3, }, { /* 00 */ 0x05EC, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05B4, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05B3, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05ED, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x053A, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0056, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0530, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x02C1, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x04D5, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x0552, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x0554, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x02BE, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x02BF, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x02C3, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x02C2, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05EA, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05F2, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05E8, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05E9, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05F4, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05AD, }, }; @@ -6246,262 +6246,262 @@ const VXOpcodeTreeNode optreeVendor[][2] = const VXOpcodeTreeNode optree3dnow[][256] = { { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, + /* 00 */ VX_INVALID, + /* 01 */ VX_INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, + /* 05 */ VX_INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, + /* 09 */ VX_INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, /* 0C */ 0x0407, /* 0D */ 0x0406, - /* 0E */ INVALID, - /* 0F */ INVALID, - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, - /* 17 */ INVALID, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, + /* 10 */ VX_INVALID, + /* 11 */ VX_INVALID, + /* 12 */ VX_INVALID, + /* 13 */ VX_INVALID, + /* 14 */ VX_INVALID, + /* 15 */ VX_INVALID, + /* 16 */ VX_INVALID, + /* 17 */ VX_INVALID, + /* 18 */ VX_INVALID, + /* 19 */ VX_INVALID, + /* 1A */ VX_INVALID, + /* 1B */ VX_INVALID, /* 1C */ 0x03E7, /* 1D */ 0x03E6, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, + /* 1E */ VX_INVALID, + /* 1F */ VX_INVALID, + /* 20 */ VX_INVALID, + /* 21 */ VX_INVALID, + /* 22 */ VX_INVALID, + /* 23 */ VX_INVALID, + /* 24 */ VX_INVALID, + /* 25 */ VX_INVALID, + /* 26 */ VX_INVALID, + /* 27 */ VX_INVALID, + /* 28 */ VX_INVALID, + /* 29 */ VX_INVALID, + /* 2A */ VX_INVALID, + /* 2B */ VX_INVALID, + /* 2C */ VX_INVALID, + /* 2D */ VX_INVALID, + /* 2E */ VX_INVALID, + /* 2F */ VX_INVALID, + /* 30 */ VX_INVALID, + /* 31 */ VX_INVALID, + /* 32 */ VX_INVALID, + /* 33 */ VX_INVALID, + /* 34 */ VX_INVALID, + /* 35 */ VX_INVALID, + /* 36 */ VX_INVALID, + /* 37 */ VX_INVALID, + /* 38 */ VX_INVALID, + /* 39 */ VX_INVALID, + /* 3A */ VX_INVALID, + /* 3B */ VX_INVALID, + /* 3C */ VX_INVALID, + /* 3D */ VX_INVALID, + /* 3E */ VX_INVALID, + /* 3F */ VX_INVALID, + /* 40 */ VX_INVALID, + /* 41 */ VX_INVALID, + /* 42 */ VX_INVALID, + /* 43 */ VX_INVALID, + /* 44 */ VX_INVALID, + /* 45 */ VX_INVALID, + /* 46 */ VX_INVALID, + /* 47 */ VX_INVALID, + /* 48 */ VX_INVALID, + /* 49 */ VX_INVALID, + /* 4A */ VX_INVALID, + /* 4B */ VX_INVALID, + /* 4C */ VX_INVALID, + /* 4D */ VX_INVALID, + /* 4E */ VX_INVALID, + /* 4F */ VX_INVALID, + /* 50 */ VX_INVALID, + /* 51 */ VX_INVALID, + /* 52 */ VX_INVALID, + /* 53 */ VX_INVALID, + /* 54 */ VX_INVALID, + /* 55 */ VX_INVALID, + /* 56 */ VX_INVALID, + /* 57 */ VX_INVALID, + /* 58 */ VX_INVALID, + /* 59 */ VX_INVALID, + /* 5A */ VX_INVALID, + /* 5B */ VX_INVALID, + /* 5C */ VX_INVALID, + /* 5D */ VX_INVALID, + /* 5E */ VX_INVALID, + /* 5F */ VX_INVALID, + /* 60 */ VX_INVALID, + /* 61 */ VX_INVALID, + /* 62 */ VX_INVALID, + /* 63 */ VX_INVALID, + /* 64 */ VX_INVALID, + /* 65 */ VX_INVALID, + /* 66 */ VX_INVALID, + /* 67 */ VX_INVALID, + /* 68 */ VX_INVALID, + /* 69 */ VX_INVALID, + /* 6A */ VX_INVALID, + /* 6B */ VX_INVALID, + /* 6C */ VX_INVALID, + /* 6D */ VX_INVALID, + /* 6E */ VX_INVALID, + /* 6F */ VX_INVALID, + /* 70 */ VX_INVALID, + /* 71 */ VX_INVALID, + /* 72 */ VX_INVALID, + /* 73 */ VX_INVALID, + /* 74 */ VX_INVALID, + /* 75 */ VX_INVALID, + /* 76 */ VX_INVALID, + /* 77 */ VX_INVALID, + /* 78 */ VX_INVALID, + /* 79 */ VX_INVALID, + /* 7A */ VX_INVALID, + /* 7B */ VX_INVALID, + /* 7C */ VX_INVALID, + /* 7D */ VX_INVALID, + /* 7E */ VX_INVALID, + /* 7F */ VX_INVALID, + /* 80 */ VX_INVALID, + /* 81 */ VX_INVALID, + /* 82 */ VX_INVALID, + /* 83 */ VX_INVALID, + /* 84 */ VX_INVALID, + /* 85 */ VX_INVALID, + /* 86 */ VX_INVALID, + /* 87 */ VX_INVALID, + /* 88 */ VX_INVALID, + /* 89 */ VX_INVALID, /* 8A */ 0x03F0, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, + /* 8B */ VX_INVALID, + /* 8C */ VX_INVALID, + /* 8D */ VX_INVALID, /* 8E */ 0x03F1, - /* 8F */ INVALID, + /* 8F */ VX_INVALID, /* 90 */ 0x03EB, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, + /* 91 */ VX_INVALID, + /* 92 */ VX_INVALID, + /* 93 */ VX_INVALID, /* 94 */ 0x03EE, - /* 95 */ INVALID, + /* 95 */ VX_INVALID, /* 96 */ 0x03F2, /* 97 */ 0x03F6, - /* 98 */ INVALID, - /* 99 */ INVALID, + /* 98 */ VX_INVALID, + /* 99 */ VX_INVALID, /* 9A */ 0x03F7, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, + /* 9B */ VX_INVALID, + /* 9C */ VX_INVALID, + /* 9D */ VX_INVALID, /* 9E */ 0x03E9, - /* 9F */ INVALID, + /* 9F */ VX_INVALID, /* A0 */ 0x03EC, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, + /* A1 */ VX_INVALID, + /* A2 */ VX_INVALID, + /* A3 */ VX_INVALID, /* A4 */ 0x03ED, - /* A5 */ INVALID, + /* A5 */ VX_INVALID, /* A6 */ 0x03F3, /* A7 */ 0x03F5, - /* A8 */ INVALID, - /* A9 */ INVALID, + /* A8 */ VX_INVALID, + /* A9 */ VX_INVALID, /* AA */ 0x03F8, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, + /* AB */ VX_INVALID, + /* AC */ VX_INVALID, + /* AD */ VX_INVALID, /* AE */ 0x03E8, - /* AF */ INVALID, + /* AF */ VX_INVALID, /* B0 */ 0x03EA, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, + /* B1 */ VX_INVALID, + /* B2 */ VX_INVALID, + /* B3 */ VX_INVALID, /* B4 */ 0x03EF, - /* B5 */ INVALID, + /* B5 */ VX_INVALID, /* B6 */ 0x03F4, /* B7 */ 0x0433, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, + /* B8 */ VX_INVALID, + /* B9 */ VX_INVALID, + /* BA */ VX_INVALID, /* BB */ 0x0499, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, + /* BC */ VX_INVALID, + /* BD */ VX_INVALID, + /* BE */ VX_INVALID, /* BF */ 0x03C7, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, + /* C0 */ VX_INVALID, + /* C1 */ VX_INVALID, + /* C2 */ VX_INVALID, + /* C3 */ VX_INVALID, + /* C4 */ VX_INVALID, + /* C5 */ VX_INVALID, + /* C6 */ VX_INVALID, + /* C7 */ VX_INVALID, + /* C8 */ VX_INVALID, + /* C9 */ VX_INVALID, + /* CA */ VX_INVALID, + /* CB */ VX_INVALID, + /* CC */ VX_INVALID, + /* CD */ VX_INVALID, + /* CE */ VX_INVALID, + /* CF */ VX_INVALID, + /* D0 */ VX_INVALID, + /* D1 */ VX_INVALID, + /* D2 */ VX_INVALID, + /* D3 */ VX_INVALID, + /* D4 */ VX_INVALID, + /* D5 */ VX_INVALID, + /* D6 */ VX_INVALID, + /* D7 */ VX_INVALID, + /* D8 */ VX_INVALID, + /* D9 */ VX_INVALID, + /* DA */ VX_INVALID, + /* DB */ VX_INVALID, + /* DC */ VX_INVALID, + /* DD */ VX_INVALID, + /* DE */ VX_INVALID, + /* DF */ VX_INVALID, + /* E0 */ VX_INVALID, + /* E1 */ VX_INVALID, + /* E2 */ VX_INVALID, + /* E3 */ VX_INVALID, + /* E4 */ VX_INVALID, + /* E5 */ VX_INVALID, + /* E6 */ VX_INVALID, + /* E7 */ VX_INVALID, + /* E8 */ VX_INVALID, + /* E9 */ VX_INVALID, + /* EA */ VX_INVALID, + /* EB */ VX_INVALID, + /* EC */ VX_INVALID, + /* ED */ VX_INVALID, + /* EE */ VX_INVALID, + /* EF */ VX_INVALID, + /* F0 */ VX_INVALID, + /* F1 */ VX_INVALID, + /* F2 */ VX_INVALID, + /* F3 */ VX_INVALID, + /* F4 */ VX_INVALID, + /* F5 */ VX_INVALID, + /* F6 */ VX_INVALID, + /* F7 */ VX_INVALID, + /* F8 */ VX_INVALID, + /* F9 */ VX_INVALID, + /* FA */ VX_INVALID, + /* FB */ VX_INVALID, + /* FC */ VX_INVALID, + /* FD */ VX_INVALID, + /* FE */ VX_INVALID, + /* FF */ VX_INVALID, }, }; @@ -6510,38 +6510,38 @@ const VXOpcodeTreeNode optreeVex[][16] = { /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0024), /* 01 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0004), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, /* 05 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0005), /* 06 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0006), /* 07 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0007), - /* 08 */ INVALID, + /* 08 */ VX_INVALID, /* 09 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0008), - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, /* 0D */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0009), - /* 0E */ INVALID, - /* 0F */ INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0026), /* 01 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0004), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, + /* 02 */ VX_INVALID, + /* 03 */ VX_INVALID, + /* 04 */ VX_INVALID, /* 05 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0005), - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, + /* 06 */ VX_INVALID, + /* 07 */ VX_INVALID, + /* 08 */ VX_INVALID, /* 09 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0008), - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, + /* 0A */ VX_INVALID, + /* 0B */ VX_INVALID, + /* 0C */ VX_INVALID, /* 0D */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0009), - /* 0E */ INVALID, - /* 0F */ INVALID, + /* 0E */ VX_INVALID, + /* 0F */ VX_INVALID, }, }; @@ -6549,87 +6549,87 @@ const VXOpcodeTreeNode optreeVexW[][2] = { { /* 00 */ 0x061D, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x061C, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0692, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0691, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x057B, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0008), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05A6, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05A5, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05A7, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x05A4, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x061E, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x061B, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0009), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x061F, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0620, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0621, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x0622, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000A), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000B), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000C), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000D), - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000E), @@ -6637,15 +6637,15 @@ const VXOpcodeTreeNode optreeVexW[][2] = }, { /* 00 */ 0x0579, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x0578, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x060B, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, }; @@ -6657,67 +6657,67 @@ const VXOpcodeTreeNode optreeVexL[][2] = }, { /* 00 */ 0x0660, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x065A, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x065E, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x063F, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x065F, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x065B, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x065D, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x057A, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x061A, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x05A0, }, { - /* 00 */ INVALID, + /* 00 */ VX_INVALID, /* 01 */ 0x059A, }, { /* 00 */ 0x062C, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x062E, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x062D, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, { /* 00 */ 0x062F, - /* 01 */ INVALID, + /* 01 */ VX_INVALID, }, }; -#undef INVALID +#undef VX_INVALID #undef NODE #define OPI_NONE { VXDefinedOperandType::NONE, VXDefinedOperandSize::NA }