diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..934e304 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,88 @@ +cmake_minimum_required(VERSION 2.8.12) +include(GenerateExportHeader) + +project(Zydis) + +option(BUILD_SHARED_LIBS "Build shared libraries rather than static ones" FALSE) +option(FORCE_SHARED_CRT + "Forces shared linkage against the CRT even when building a static library" + FALSE) +option(BUILD_EXAMPLES "Build examples" TRUE) +option(BUILD_C_BINDINGS "Build C bindings" TRUE) + +if (NOT CONFIGURED_ONCE) + if ("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU" OR + "${CMAKE_CXX_COMPILER_ID}" STREQUAL "Clang") + set(compiler_specific "-Werror") + set(compiler_specific_cxx "-std=c++0x") + elseif (MSVC) + set(compiler_specific "/WX /W4 /D_CRT_SECURE_NO_WARNINGS") + endif () + + set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${compiler_specific} ${compiler_specific_cxx}" + CACHE STRING "Flags used by the compiler during all build types." FORCE) + set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${compiler_specific}" + CACHE STRING "Flags used by the compiler during all build types." FORCE) +endif () + +# CMake always orders MSVC to build with a shared CRT. Hack CMake variables in order +# to generate with a statically linked CRT when we build as a static library. +if (MSVC AND NOT BUILD_SHARED_LIBS AND NOT FORCE_SHARED_CRT) + set(manipulated_vars + CMAKE_CXX_FLAGS_DEBUG + CMAKE_CXX_FLAGS_MINSIZEREL + CMAKE_CXX_FLAGS_RELEASE + CMAKE_CXX_FLAGS_RELWITHDEBINFO + CMAKE_C_FLAGS_DEBUG + CMAKE_C_FLAGS_MINSIZEREL + CMAKE_C_FLAGS_RELEASE + CMAKE_C_FLAGS_RELWITHDEBINFO) + foreach (cur_var ${manipulated_vars}) + string(REPLACE "/MD" "/MT" ${cur_var} "${${cur_var}}") + endforeach () +endif () + +# Library +set(headers + "Zydis/Zydis.hpp" + "Zydis/ZydisInstructionDecoder.hpp" + "Zydis/ZydisInstructionFormatter.hpp" + "Zydis/ZydisOpcodeTable.hpp" + "Zydis/ZydisSymbolResolver.hpp" + "Zydis/ZydisTypes.hpp" + "Zydis/ZydisUtils.hpp") +set(sources + "Zydis/ZydisInstructionDecoder.cpp" + "Zydis/ZydisInstructionFormatter.cpp" + "Zydis/ZydisOpcodeTable.cpp" + "Zydis/ZydisSymbolResolver.cpp" + "Zydis/ZydisUtils.cpp") + +if (BUILD_C_BINDINGS) + set(headers ${headers} + "Zydis/ZydisAPI.h") + set(sources ${sources} + "Zydis/ZydisAPI.cpp") +endif () + +add_library("Zydis" ${headers} ${sources}) +generate_export_header( + "Zydis" + BASE_NAME "ZYDIS" + EXPORT_FILE_NAME "ZydisExportConfig.h") +include_directories(${PROJECT_BINARY_DIR}) + +# Examples +if (BUILD_EXAMPLES) + include_directories("Zydis") + + add_executable("SimpleDemo_CPP" "Examples/CPP/SimpleDemo/SimpleDemo.cpp") + target_link_libraries("SimpleDemo_CPP" "Zydis") + + if (BUILD_C_BINDINGS) + add_executable("SimpleDemo_C" "Examples/C/SimpleDemo/SimpleDemo.c") + target_link_libraries("SimpleDemo_C" "Zydis") + endif () +endif () + +set(CONFIGURED_ONCE TRUE CACHE INTERNAL "CMake has configured at least once.") diff --git a/Examples/C/SimpleDemo/SimpleDemo.c b/Examples/C/SimpleDemo/SimpleDemo.c new file mode 100644 index 0000000..1484985 --- /dev/null +++ b/Examples/C/SimpleDemo/SimpleDemo.c @@ -0,0 +1,198 @@ +/*************************************************************************************************** + + Zyan Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : Joel Höner + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +***************************************************************************************************/ + +#include + +#include +#include + +void PrintZydisError() +{ + puts("Zydis error: "); + switch (ZydisGetLastError()) + { + case ZYDIS_ERROR_SUCCESS: + puts("success"); + break; + case ZYDIS_ERROR_UNKNOWN: + puts("unknown error"); + break; + case ZYDIS_ERROR_NOT_ENOUGH_MEMORY: + puts("not enough memory"); + break; + case ZYDIS_ERROR_INVALID_PARAMETER: + puts("invalid parameter"); + break; + } +} + +int main() +{ + uint8_t data32[] = + { + 0x8B, 0xFF, 0x55, 0x8B, 0xEC, 0x6A, 0xFE, 0x68, 0xD8, 0x18, 0x09, 0x77, 0x68, 0x85, 0xD2, + 0x09, 0x77, 0x64, 0xA1, 0x00, 0x00, 0x00, 0x00, 0x50, 0x83, 0xEC, 0x14, 0x53, 0x56, 0x57, + 0xA1, 0x68, 0xEE, 0x13, 0x77, 0x31, 0x45, 0xF8, 0x33, 0xC5, 0x50, 0x8D, 0x45, 0xF0, 0x64, + 0xA3, 0x00, 0x00, 0x00, 0x00, 0x89, 0x65, 0xE8, 0xC7, 0x45, 0xFC, 0x00, 0x00, 0x00, 0x00, + 0x8B, 0x5D, 0x08, 0xF6, 0xC3, 0x04, 0x0F, 0x85, 0x57, 0x74, 0x00, 0x00, 0x53, 0x6A, 0x00, + 0xFF, 0x35, 0xA0, 0xE3, 0x13, 0x77, 0xFF, 0x15, 0x00, 0x10, 0x14, 0x77, 0x85, 0xC0, 0x0F, + 0x84, 0xC6, 0x48, 0x04, 0x00, 0xC7, 0x45, 0x08, 0x00, 0x00, 0x00, 0x00, 0xC7, 0x45, 0xFC, + 0xFE, 0xFF, 0xFF, 0xFF, 0x33, 0xC0, 0x8B, 0x4D, 0xF0, 0x64, 0x89, 0x0D, 0x00, 0x00, 0x00, + 0x00, 0x59, 0x5F, 0x5E, 0x5B, 0x8B, 0xE5, 0x5D, 0xC2, 0x04, 0x00 + }; + uint8_t data64[] = + { + 0x48, 0x89, 0x5C, 0x24, 0x10, 0x48, 0x89, 0x74, 0x24, 0x18, 0x89, 0x4C, 0x24, 0x08, 0x57, + 0x41, 0x54, 0x41, 0x55, 0x41, 0x56, 0x41, 0x57, 0x48, 0x83, 0xEC, 0x40, 0x4C, 0x8B, 0xF2, + 0x8B, 0xD9, 0x48, 0xC7, 0x44, 0x24, 0x20, 0x00, 0x00, 0x00, 0x00, 0x33, 0xF6, 0x48, 0x89, + 0x74, 0x24, 0x30, 0x45, 0x33, 0xFF, 0xF7, 0xC1, 0x8D, 0xF0, 0xFF, 0xFF, 0x0F, 0x85, 0xAA, + 0x53, 0x08, 0x00, 0xF6, 0xC1, 0x40, 0x8B, 0xFE, 0x41, 0xBD, 0x08, 0x00, 0x00, 0x00, 0x41, + 0x0F, 0x45, 0xFD, 0xF6, 0xC1, 0x02, 0x48, 0x8B, 0x0D, 0x10, 0xD4, 0x0E, 0x00, 0x0F, 0x85, + 0x40, 0xE1, 0x01, 0x00, 0x8B, 0x15, 0x4C, 0xD5, 0x0E, 0x00, 0x81, 0xC2, 0x00, 0x00, 0x14, + 0x00, 0x0B, 0xD7, 0x4D, 0x8B, 0xC6, 0xFF, 0x15, 0x3B, 0x2F, 0x10, 0x00, 0x48, 0x8B, 0xD8, + 0x48, 0x85, 0xC0, 0x0F, 0x84, 0x93, 0x78, 0x0A, 0x00, 0x48, 0x8B, 0xC3, 0x48, 0x8B, 0x5C, + 0x24, 0x78, 0x48, 0x8B, 0xB4, 0x24, 0x80, 0x00, 0x00, 0x00, 0x48, 0x83, 0xC4, 0x40, 0x41, + 0x5F, 0x41, 0x5E, 0x41, 0x5D, 0x41, 0x5C, 0x5F, 0xC3 + }; + + ZydisInstructionInfo info; + ZydisInstructionDecoderContext* decoder = NULL; + ZydisInstructionFormatterContext* formatter = NULL; + ZydisInputContext* input32 = NULL; + ZydisInputContext* input64 = NULL; + + // Create decoder and formatter instances + decoder = ZydisCreateInstructionDecoder(); + if (!decoder) + { + goto ZydisError; + } + formatter = ZydisCreateIntelInstructionFormatter(); + if (!formatter) + { + goto FreeZydisDecoder; + } + + // Create memory data sources + input32 = ZydisCreateMemoryInput(&data32[0], sizeof(data32)); + if (!input32) + { + goto FreeZydisFormatter; + } + input64 = ZydisCreateMemoryInput(&data64[0], sizeof(data64)); + if (!input64) + { + goto FreeZydisInput32; + } + + // Set decoder properties + ZydisSetDisassemblerMode(decoder, ZYDIS_DM_M32BIT); + ZydisSetDataSource(decoder, input32); + ZydisSetInstructionPointer(decoder, 0x77091852); + + // Decode and format all instructions + puts("32 bit test ...\n\n"); + while (ZydisDecodeInstruction(decoder, &info)) + { + printf("%08X ", (uint32_t)(info.instrAddress & 0xFFFFFFFF)); + if (info.flags & ZYDIS_IF_ERROR_MASK) + { + printf("db %02X\n", info.data[0]); + } + else + { + const char* instructionText; + if (!ZydisFormatInstruction(formatter, &info, &instructionText)) + { + goto FreeZydisInput64; + } + printf("%s\n", instructionText); + } + } + // Check if an error occured in ZydisDecodeInstruction or the end of the input was reached. + if (ZydisGetLastError() != ZYDIS_ERROR_SUCCESS) + { + goto FreeZydisInput64; + } + + puts("\n"); + + // Set decoder properties + ZydisSetDisassemblerMode(decoder, ZYDIS_DM_M64BIT); + ZydisSetDataSource(decoder, input64); + ZydisSetInstructionPointer(decoder, 0x00007FFA39A81930ull); + + // Decode and format all instructions + puts("64 bit test ...\n\n"); + while (ZydisDecodeInstruction(decoder, &info)) + { + printf("%016llX ", info.instrAddress); + if (info.flags & ZYDIS_IF_ERROR_MASK) + { + printf("db %02X", info.data[0]); + } + else + { + const char* instructionText; + if (!ZydisFormatInstruction(formatter, &info, &instructionText)) + { + goto FreeZydisInput64; + } + printf("%s\n", instructionText); + } + } + // Check if an error occured in ZydisDecodeInstruction or the end of the input was reached. + if (ZydisGetLastError() != ZYDIS_ERROR_SUCCESS) + { + goto FreeZydisInput64; + } + + // Cleanup code +FreeZydisInput64: + ZydisFreeInput(input64); +FreeZydisInput32: + ZydisFreeInput(input32); +FreeZydisFormatter: + ZydisFreeInstructionFormatter(formatter); +FreeZydisDecoder: + ZydisFreeInstructionDecoder(decoder); +ZydisError: + + if (ZydisGetLastError() != ZYDIS_ERROR_SUCCESS) + { + PrintZydisError(); + getchar(); + return 1; + } + + getchar(); + + return 0; +} \ No newline at end of file diff --git a/Examples/SimpleDemo/Main.cpp b/Examples/CPP/SimpleDemo/SimpleDemo.cpp similarity index 86% rename from Examples/SimpleDemo/Main.cpp rename to Examples/CPP/SimpleDemo/SimpleDemo.cpp index 3a60d40..2bf03fb 100644 --- a/Examples/SimpleDemo/Main.cpp +++ b/Examples/CPP/SimpleDemo/SimpleDemo.cpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,16 +26,14 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#include +***************************************************************************************************/ + #include #include #include -#include "VXDisassembler.h" +#include -using namespace Verteron; - -int _tmain(int argc, _TCHAR* argv[]) +int main() { uint8_t data32[] = { @@ -66,13 +62,13 @@ int _tmain(int argc, _TCHAR* argv[]) 0x5F, 0x41, 0x5E, 0x41, 0x5D, 0x41, 0x5C, 0x5F, 0xC3 }; - VXInstructionInfo info; - VXInstructionDecoder decoder; - VXIntelInstructionFormatter formatter; - VXMemoryDataSource input32(&data32[0], sizeof(data32)); - VXMemoryDataSource input64(&data64[0], sizeof(data64)); + Zydis::InstructionInfo info; + Zydis::InstructionDecoder decoder; + Zydis::IntelInstructionFormatter formatter; + Zydis::MemoryInput input32(&data32[0], sizeof(data32)); + Zydis::MemoryInput input64(&data64[0], sizeof(data64)); - decoder.setDisassemblerMode(VXDisassemblerMode::M32BIT); + decoder.setDisassemblerMode(Zydis::DisassemblerMode::M32BIT); decoder.setDataSource(&input32); decoder.setInstructionPointer(0x77091852); std::cout << "32 bit test ..." << std::endl << std::endl; @@ -80,7 +76,7 @@ int _tmain(int argc, _TCHAR* argv[]) { std::cout << std::hex << std::setw(8) << std::setfill('0') << std::uppercase << info.instrAddress << " "; - if (info.flags & IF_ERROR_MASK) + if (info.flags & Zydis::IF_ERROR_MASK) { std::cout << "db " << std::setw(2) << info.data[0]; } else @@ -91,7 +87,7 @@ int _tmain(int argc, _TCHAR* argv[]) std::cout << std::endl; - decoder.setDisassemblerMode(VXDisassemblerMode::M64BIT); + decoder.setDisassemblerMode(Zydis::DisassemblerMode::M64BIT); decoder.setDataSource(&input64); decoder.setInstructionPointer(0x00007FFA39A81930ull); std::cout << "64 bit test ..." << std::endl << std::endl; @@ -99,7 +95,7 @@ int _tmain(int argc, _TCHAR* argv[]) { std::cout << std::hex << std::setw(16) << std::setfill('0') << std::uppercase << info.instrAddress << " "; - if (info.flags & IF_ERROR_MASK) + if (info.flags & Zydis::IF_ERROR_MASK) { std::cout << "db " << std::setw(2) << info.data[0]; } else @@ -110,4 +106,4 @@ int _tmain(int argc, _TCHAR* argv[]) std::cin.get(); return 0; -} +} \ No newline at end of file diff --git a/Examples/CustomDataSource/CustomDataSource.vcxproj b/Examples/CustomDataSource/CustomDataSource.vcxproj deleted file mode 100644 index 6e9f686..0000000 --- a/Examples/CustomDataSource/CustomDataSource.vcxproj +++ /dev/null @@ -1,157 +0,0 @@ - - - - - Debug - Win32 - - - Debug - x64 - - - Release - Win32 - - - Release - x64 - - - - {EB0F5A04-EE14-4779-9B29-322876CD45C8} - Win32Proj - CustomDataSource - 2 - Custom DataSource - - - - Application - true - v120 - Unicode - - - Application - true - v120 - Unicode - - - Application - false - v120 - true - Unicode - - - Application - false - v120 - true - Unicode - - - - - - - - - - - - - - - - - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - - - - {f5c6f0a7-f75d-42bd-a8ab-a2d1d5f67099} - - - - - - \ No newline at end of file diff --git a/Examples/CustomDataSource/CustomDataSource.vcxproj.filters b/Examples/CustomDataSource/CustomDataSource.vcxproj.filters deleted file mode 100644 index d3e9077..0000000 --- a/Examples/CustomDataSource/CustomDataSource.vcxproj.filters +++ /dev/null @@ -1,6 +0,0 @@ - - - - - - \ No newline at end of file diff --git a/Examples/CustomDataSource/Main.cpp b/Examples/CustomDataSource/Main.cpp deleted file mode 100644 index afe5a5f..0000000 --- a/Examples/CustomDataSource/Main.cpp +++ /dev/null @@ -1,38 +0,0 @@ -/************************************************************************************************** - - Verteron Disassembler Engine - Version 1.0 - - Remarks : Freeware, Copyright must be included - - Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 - - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - -**************************************************************************************************/ -#include - -int _tmain(int argc, _TCHAR* argv[]) -{ - // TODO: - return 0; -} diff --git a/Examples/Examples.sln b/Examples/Examples.sln deleted file mode 100644 index a700b31..0000000 --- a/Examples/Examples.sln +++ /dev/null @@ -1,90 +0,0 @@ - -Microsoft Visual Studio Solution File, Format Version 12.00 -# Visual Studio 2013 -VisualStudioVersion = 12.0.30723.0 -MinimumVisualStudioVersion = 10.0.40219.1 -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "1 - Simple Demo", "SimpleDemo\SimpleDemo.vcxproj", "{BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}" -EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "2 - Custom DataSource", "CustomDataSource\CustomDataSource.vcxproj", "{EB0F5A04-EE14-4779-9B29-322876CD45C8}" -EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "3 - Symbol Resolver", "SymbolResolver\SymbolResolver.vcxproj", "{B6CA4362-2714-451C-8063-12195ABD7CD7}" -EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VerteronDisassemblerEngine", "..\VerteronDisassemblerEngine\VerteronDisassemblerEngine.vcxproj", "{F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}" -EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "4 - Performance Test", "PerformanceTest\PerformanceTest.vcxproj", "{4A0B7BE7-72C9-4A95-90CA-D56C50F10401}" -EndProject -Global - GlobalSection(SolutionConfigurationPlatforms) = preSolution - Debug|Mixed Platforms = Debug|Mixed Platforms - Debug|Win32 = Debug|Win32 - Debug|x64 = Debug|x64 - Release|Mixed Platforms = Release|Mixed Platforms - Release|Win32 = Release|Win32 - Release|x64 = Release|x64 - EndGlobalSection - GlobalSection(ProjectConfigurationPlatforms) = postSolution - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Debug|Mixed Platforms.ActiveCfg = Debug|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Debug|Mixed Platforms.Build.0 = Debug|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Debug|Win32.ActiveCfg = Debug|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Debug|Win32.Build.0 = Debug|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Debug|x64.ActiveCfg = Debug|x64 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Debug|x64.Build.0 = Debug|x64 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Release|Mixed Platforms.ActiveCfg = Release|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Release|Mixed Platforms.Build.0 = Release|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Release|Win32.ActiveCfg = Release|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Release|Win32.Build.0 = Release|Win32 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Release|x64.ActiveCfg = Release|x64 - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D}.Release|x64.Build.0 = Release|x64 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Debug|Mixed Platforms.ActiveCfg = Debug|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Debug|Mixed Platforms.Build.0 = Debug|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Debug|Win32.ActiveCfg = Debug|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Debug|Win32.Build.0 = Debug|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Debug|x64.ActiveCfg = Debug|x64 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Debug|x64.Build.0 = Debug|x64 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Release|Mixed Platforms.ActiveCfg = Release|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Release|Mixed Platforms.Build.0 = Release|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Release|Win32.ActiveCfg = Release|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Release|Win32.Build.0 = Release|Win32 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Release|x64.ActiveCfg = Release|x64 - {EB0F5A04-EE14-4779-9B29-322876CD45C8}.Release|x64.Build.0 = Release|x64 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Debug|Mixed Platforms.ActiveCfg = Debug|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Debug|Mixed Platforms.Build.0 = Debug|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Debug|Win32.ActiveCfg = Debug|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Debug|Win32.Build.0 = Debug|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Debug|x64.ActiveCfg = Debug|x64 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Debug|x64.Build.0 = Debug|x64 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Release|Mixed Platforms.ActiveCfg = Release|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Release|Mixed Platforms.Build.0 = Release|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Release|Win32.ActiveCfg = Release|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Release|Win32.Build.0 = Release|Win32 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Release|x64.ActiveCfg = Release|x64 - {B6CA4362-2714-451C-8063-12195ABD7CD7}.Release|x64.Build.0 = Release|x64 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|Mixed Platforms.ActiveCfg = Debug|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|Mixed Platforms.Build.0 = Debug|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|Win32.ActiveCfg = Debug|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|Win32.Build.0 = Debug|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|x64.ActiveCfg = Debug|x64 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|x64.Build.0 = Debug|x64 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|Mixed Platforms.ActiveCfg = Release|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|Mixed Platforms.Build.0 = Release|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|Win32.ActiveCfg = Release|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|Win32.Build.0 = Release|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|x64.ActiveCfg = Release|x64 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|x64.Build.0 = Release|x64 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Debug|Mixed Platforms.ActiveCfg = Debug|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Debug|Mixed Platforms.Build.0 = Debug|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Debug|Win32.ActiveCfg = Debug|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Debug|Win32.Build.0 = Debug|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Debug|x64.ActiveCfg = Debug|x64 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Debug|x64.Build.0 = Debug|x64 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Release|Mixed Platforms.ActiveCfg = Release|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Release|Mixed Platforms.Build.0 = Release|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Release|Win32.ActiveCfg = Release|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Release|Win32.Build.0 = Release|Win32 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Release|x64.ActiveCfg = Release|x64 - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401}.Release|x64.Build.0 = Release|x64 - EndGlobalSection - GlobalSection(SolutionProperties) = preSolution - HideSolutionNode = FALSE - EndGlobalSection -EndGlobal diff --git a/Examples/PerformanceTest/PerformanceTest.vcxproj b/Examples/PerformanceTest/PerformanceTest.vcxproj deleted file mode 100644 index 87e34c4..0000000 --- a/Examples/PerformanceTest/PerformanceTest.vcxproj +++ /dev/null @@ -1,157 +0,0 @@ - - - - - Debug - Win32 - - - Debug - x64 - - - Release - Win32 - - - Release - x64 - - - - {4A0B7BE7-72C9-4A95-90CA-D56C50F10401} - Win32Proj - PerformanceTest - 4 - Performance Test - - - - Application - true - v120 - Unicode - - - Application - true - v120 - Unicode - - - Application - false - v120 - true - Unicode - - - Application - false - v120 - true - Unicode - - - - - - - - - - - - - - - - - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - - - - {f5c6f0a7-f75d-42bd-a8ab-a2d1d5f67099} - - - - - - \ No newline at end of file diff --git a/Examples/PerformanceTest/PerformanceTest.vcxproj.filters b/Examples/PerformanceTest/PerformanceTest.vcxproj.filters deleted file mode 100644 index d3e9077..0000000 --- a/Examples/PerformanceTest/PerformanceTest.vcxproj.filters +++ /dev/null @@ -1,6 +0,0 @@ - - - - - - \ No newline at end of file diff --git a/Examples/SimpleDemo/SimpleDemo.vcxproj b/Examples/SimpleDemo/SimpleDemo.vcxproj deleted file mode 100644 index 15332e3..0000000 --- a/Examples/SimpleDemo/SimpleDemo.vcxproj +++ /dev/null @@ -1,157 +0,0 @@ - - - - - Debug - Win32 - - - Debug - x64 - - - Release - Win32 - - - Release - x64 - - - - {BC5CDE9B-9F84-453E-8131-B56F67FD0E4D} - Win32Proj - SimpleDemo - 1 - Simple Demo - - - - Application - true - v120 - Unicode - - - Application - true - v120 - Unicode - - - Application - false - v120 - true - Unicode - - - Application - false - v120 - true - Unicode - - - - - - - - - - - - - - - - - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - - - - {f5c6f0a7-f75d-42bd-a8ab-a2d1d5f67099} - - - - - - \ No newline at end of file diff --git a/Examples/SimpleDemo/SimpleDemo.vcxproj.filters b/Examples/SimpleDemo/SimpleDemo.vcxproj.filters deleted file mode 100644 index d3e9077..0000000 --- a/Examples/SimpleDemo/SimpleDemo.vcxproj.filters +++ /dev/null @@ -1,6 +0,0 @@ - - - - - - \ No newline at end of file diff --git a/Examples/SymbolResolver/Main.cpp b/Examples/SymbolResolver/Main.cpp deleted file mode 100644 index ee8e299..0000000 --- a/Examples/SymbolResolver/Main.cpp +++ /dev/null @@ -1,192 +0,0 @@ -/************************************************************************************************** - - Verteron Disassembler Engine - Version 1.0 - - Remarks : Freeware, Copyright must be included - - Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 - - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - -**************************************************************************************************/ -#include -#include -#include -#include -#include "VXDisassembler.h" -#include - -using namespace Verteron; - -int _tmain(int argc, _TCHAR* argv[]) -{ - // Find module base in memory - void *moduleBase = GetModuleHandle(L"kernel32.dll"); - uintptr_t baseAddress = reinterpret_cast(moduleBase); - // Parse PE headers - PIMAGE_DOS_HEADER dosHeader = static_cast(moduleBase); - if (dosHeader->e_magic != IMAGE_DOS_SIGNATURE) - { - return 1; - } - PIMAGE_NT_HEADERS ntHeaders = - reinterpret_cast(baseAddress + dosHeader->e_lfanew); - if (ntHeaders->Signature != IMAGE_NT_SIGNATURE) - { - return 1; - } - // Initialize disassembler - VXInstructionInfo info; - VXInstructionDecoder decoder; - VXExactSymbolResolver resolver; - VXIntelInstructionFormatter formatter; -#ifdef _M_X64 - decoder.setDisassemblerMode(VXDisassemblerMode::M64BIT); -#else - decoder.setDisassemblerMode(VXDisassemblerMode::M32BIT); -#endif - formatter.setSymbolResolver(&resolver); - // Initialize output stream - std::ofstream out; - out.open(".\\output.txt"); - // Find all call and jump targets - uint64_t subCount = 0; - uint64_t locCount = 0; - PIMAGE_SECTION_HEADER sectionHeader = - reinterpret_cast( - reinterpret_cast(ntHeaders) + sizeof(IMAGE_NT_HEADERS) - + ntHeaders->FileHeader.SizeOfOptionalHeader - sizeof(IMAGE_OPTIONAL_HEADER)); - for (unsigned int i = 0; i < ntHeaders->FileHeader.NumberOfSections; ++i) - { - if (sectionHeader->Characteristics & IMAGE_SCN_CNT_CODE) - { - VXMemoryDataSource input(reinterpret_cast( - baseAddress + sectionHeader->VirtualAddress), sectionHeader->SizeOfRawData); - decoder.setDataSource(&input); - decoder.setInstructionPointer(baseAddress + sectionHeader->VirtualAddress); - while (decoder.decodeInstruction(info)) - { - // Skip invalid and non-relative instructions - if ((info.flags & IF_ERROR_MASK) || !(info.flags & IF_RELATIVE)) - { - continue; - } - switch (info.mnemonic) - { - case VXInstructionMnemonic::CALL: - resolver.setSymbol(VDECalcAbsoluteTarget(info, info.operand[0]), - std::string("sub_" + std::to_string(subCount)).c_str()); - subCount++; - break; - case VXInstructionMnemonic::JMP: - case VXInstructionMnemonic::JO: - case VXInstructionMnemonic::JNO: - case VXInstructionMnemonic::JB: - case VXInstructionMnemonic::JNB: - case VXInstructionMnemonic::JE: - case VXInstructionMnemonic::JNE: - case VXInstructionMnemonic::JBE: - case VXInstructionMnemonic::JA: - case VXInstructionMnemonic::JS: - case VXInstructionMnemonic::JNS: - case VXInstructionMnemonic::JP: - case VXInstructionMnemonic::JNP: - case VXInstructionMnemonic::JL: - case VXInstructionMnemonic::JGE: - case VXInstructionMnemonic::JLE: - case VXInstructionMnemonic::JG: - case VXInstructionMnemonic::JCXZ: - case VXInstructionMnemonic::JECXZ: - case VXInstructionMnemonic::JRCXZ: - resolver.setSymbol(VDECalcAbsoluteTarget(info, info.operand[0]), - std::string("loc_" + std::to_string(locCount)).c_str()); - locCount++; - break; - default: - break; - } - } - } - sectionHeader++; - } - // Add entry point symbol - resolver.setSymbol(baseAddress + ntHeaders->OptionalHeader.AddressOfEntryPoint, "EntryPoint"); - // Add exported symbols - if (ntHeaders->OptionalHeader.DataDirectory[IMAGE_DIRECTORY_ENTRY_EXPORT].VirtualAddress > 0) - { - PIMAGE_EXPORT_DIRECTORY exports = - reinterpret_cast(reinterpret_cast(baseAddress) + - ntHeaders->OptionalHeader.DataDirectory[IMAGE_DIRECTORY_ENTRY_EXPORT].VirtualAddress); - PDWORD address = - reinterpret_cast(reinterpret_cast(baseAddress) + - exports->AddressOfFunctions); - PDWORD name = - reinterpret_cast(reinterpret_cast(baseAddress) + - exports->AddressOfNames); - PWORD ordinal = - reinterpret_cast(reinterpret_cast(baseAddress) + - exports->AddressOfNameOrdinals); - for(unsigned int i = 0; i < exports->NumberOfNames; ++i) - { - resolver.setSymbol(baseAddress + address[ordinal[i]], - reinterpret_cast(baseAddress) + name[i]); - } - } - // Disassemble - sectionHeader = - reinterpret_cast( - reinterpret_cast(ntHeaders) + sizeof(IMAGE_NT_HEADERS) - + ntHeaders->FileHeader.SizeOfOptionalHeader - sizeof(IMAGE_OPTIONAL_HEADER)); - for (unsigned int i = 0; i < ntHeaders->FileHeader.NumberOfSections; ++i) - { - if (sectionHeader->Characteristics & IMAGE_SCN_CNT_CODE) - { - VXMemoryDataSource input(reinterpret_cast( - baseAddress + sectionHeader->VirtualAddress), sectionHeader->SizeOfRawData); - decoder.setDataSource(&input); - decoder.setInstructionPointer(baseAddress + sectionHeader->VirtualAddress); - while (decoder.decodeInstruction(info)) - { - uint64_t offset; - const char *symbol = resolver.resolveSymbol(info, info.instrAddress, offset); - if (symbol) - { - out << symbol << ": " << std::endl; - } - out << " " << std::hex << std::setw(16) << std::setfill('0') - << info.instrAddress << " "; - if (info.flags & IF_ERROR_MASK) - { - out << "db " << std::hex << std::setw(2) << std::setfill('0') - << static_cast(info.data[0]) << std::endl; - } else - { - out << formatter.formatInstruction(info) << std::endl; - } - } - } - sectionHeader++; - } - out.close(); - return 0; -} diff --git a/Examples/SymbolResolver/SymbolResolver.vcxproj b/Examples/SymbolResolver/SymbolResolver.vcxproj deleted file mode 100644 index adcc661..0000000 --- a/Examples/SymbolResolver/SymbolResolver.vcxproj +++ /dev/null @@ -1,157 +0,0 @@ - - - - - Debug - Win32 - - - Debug - x64 - - - Release - Win32 - - - Release - x64 - - - - {B6CA4362-2714-451C-8063-12195ABD7CD7} - Win32Proj - SymbolResolver - 3 - Symbol Resolver - - - - Application - true - v120 - Unicode - - - Application - true - v120 - Unicode - - - Application - false - v120 - true - Unicode - - - Application - false - v120 - true - Unicode - - - - - - - - - - - - - - - - - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - true - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - false - ..\..\VerteronDisassemblerEngine\;$(IncludePath) - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - - - Level3 - Disabled - WIN32;_DEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_CONSOLE;_LIB;%(PreprocessorDefinitions) - - - Console - true - true - true - - - - - - - - {f5c6f0a7-f75d-42bd-a8ab-a2d1d5f67099} - - - - - - \ No newline at end of file diff --git a/Examples/SymbolResolver/SymbolResolver.vcxproj.filters b/Examples/SymbolResolver/SymbolResolver.vcxproj.filters deleted file mode 100644 index d3e9077..0000000 --- a/Examples/SymbolResolver/SymbolResolver.vcxproj.filters +++ /dev/null @@ -1,6 +0,0 @@ - - - - - - \ No newline at end of file diff --git a/README.md b/README.md index 1d0c629..d6bf326 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,4 @@ -Verteron Disassembler Engine (VDE) +Zyan Disassembler Engine (Zydis) ================================== Fast and lightweight x86/x86-64 disassembler library. @@ -18,15 +18,13 @@ Fast and lightweight x86/x86-64 disassembler library. ## Quick Example ## -The following example program uses VDE to disassemble a given memory buffer and prints the output to the console. +The following example program uses Zydis to disassemble a given memory buffer and prints the output to the console. ```C++ #include #include #include -#include "VXDisassembler.h" - -using namespace Verteron; +#include "Zydis.hpp" int _tmain(int argc, _TCHAR* argv[]) { @@ -34,13 +32,13 @@ int _tmain(int argc, _TCHAR* argv[]) { 0x90, 0xE9, 0x00, 0x00, 0x00, 0x00, 0xC3 }; - VXMemoryDataSource input(&data[0], sizeof(data)); - VXInstructionInfo info; - VXInstructionDecoder decoder; - decoder.setDisassemblerMode(VXDisassemblerMode::M32BIT); + Zydis::MemoryInput input(&data[0], sizeof(data)); + Zydis::InstructionInfo info; + Zydis::InstructionDecoder decoder; + decoder.setDisassemblerMode(Zydis::ZydisMode::M32BIT); decoder.setDataSource(&input); decoder.setInstructionPointer(0); - VXIntelInstructionFormatter formatter; + Zydis::IntelInstructionFormatter formatter; while (decoder.decodeInstruction(info)) { std::cout << formatter.formatInstruction(info) << std::endl; @@ -50,8 +48,7 @@ int _tmain(int argc, _TCHAR* argv[]) ## Compilation ## -- While VDE supports other compilers in theory, compilation has not been tested with any compiler other than MSVC12 (Visual Studio 2013) -- Multi-compiler support might be added in the future +Zydis builds cleanly on most platforms without any external dependencies. You can use CMake to generate project files for your favorite C++14 compiler. ## License ## -Verteron Disassembler Engine is licensed under the MIT License. Dependencies are under their respective licenses. +Zyan Disassembler Engine is licensed under the MIT License. Dependencies are under their respective licenses. diff --git a/VerteronDisassemblerEngine.sln b/VerteronDisassemblerEngine.sln deleted file mode 100644 index c5db4b1..0000000 --- a/VerteronDisassemblerEngine.sln +++ /dev/null @@ -1,38 +0,0 @@ - -Microsoft Visual Studio Solution File, Format Version 12.00 -# Visual Studio 2013 -VisualStudioVersion = 12.0.30723.0 -MinimumVisualStudioVersion = 10.0.40219.1 -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "VerteronDisassemblerEngine", "VerteronDisassemblerEngine\VerteronDisassemblerEngine.vcxproj", "{F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}" -EndProject -Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "OptableGenerator", "OptableGenerator\OptableGenerator.vcxproj", "{EFA075B8-AFB9-4E06-99AD-BD58F50A9500}" -EndProject -Global - GlobalSection(SolutionConfigurationPlatforms) = preSolution - Debug|Win32 = Debug|Win32 - Debug|x64 = Debug|x64 - Release|Win32 = Release|Win32 - Release|x64 = Release|x64 - EndGlobalSection - GlobalSection(ProjectConfigurationPlatforms) = postSolution - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|Win32.ActiveCfg = Debug|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|Win32.Build.0 = Debug|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|x64.ActiveCfg = Debug|x64 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Debug|x64.Build.0 = Debug|x64 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|Win32.ActiveCfg = Release|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|Win32.Build.0 = Release|Win32 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|x64.ActiveCfg = Release|x64 - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099}.Release|x64.Build.0 = Release|x64 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Debug|Win32.ActiveCfg = Debug|Win32 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Debug|Win32.Build.0 = Debug|Win32 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Debug|x64.ActiveCfg = Debug|x64 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Debug|x64.Build.0 = Debug|x64 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Release|Win32.ActiveCfg = Release|Win32 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Release|Win32.Build.0 = Release|Win32 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Release|x64.ActiveCfg = Release|x64 - {EFA075B8-AFB9-4E06-99AD-BD58F50A9500}.Release|x64.Build.0 = Release|x64 - EndGlobalSection - GlobalSection(SolutionProperties) = preSolution - HideSolutionNode = FALSE - EndGlobalSection -EndGlobal diff --git a/VerteronDisassemblerEngine/VXDisassembler.h b/VerteronDisassemblerEngine/VXDisassembler.h deleted file mode 100644 index 271d8d9..0000000 --- a/VerteronDisassemblerEngine/VXDisassembler.h +++ /dev/null @@ -1,37 +0,0 @@ -/************************************************************************************************** - - Verteron Disassembler Engine - Version 1.0 - - Remarks : Freeware, Copyright must be included - - Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 - - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - -**************************************************************************************************/ -#pragma once - -#include "VXDisassemblerTypes.h" -#include "VXInstructionDecoder.h" -#include "VXInstructionFormatter.h" -#include "VXDisassemblerUtils.h" diff --git a/VerteronDisassemblerEngine/VXOpcodeTable.cpp b/VerteronDisassemblerEngine/VXOpcodeTable.cpp deleted file mode 100644 index c6d5778..0000000 --- a/VerteronDisassemblerEngine/VXOpcodeTable.cpp +++ /dev/null @@ -1,9655 +0,0 @@ -/************************************************************************************************** - - Verteron Disassembler Engine - Version 1.0 - - Remarks : Freeware, Copyright must be included - - Original Author : Florian Bernd - Modifications : - - Last change : 14. October 2014 - - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - -**************************************************************************************************/ -#include "VXOpcodeTable.h" - -namespace Verteron -{ - -namespace Internal -{ - -#define INVALID 0 -#define NODE(type, n) (static_cast(type) << 12 | (n)) - -const VXOpcodeTreeNode optreeTable[][256] = -{ - { - /* 00 */ 0x0015, - /* 01 */ 0x0014, - /* 02 */ 0x0016, - /* 03 */ 0x0018, - /* 04 */ 0x0017, - /* 05 */ 0x0010, - /* 06 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0000), - /* 07 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0001), - /* 08 */ 0x0394, - /* 09 */ 0x0393, - /* 0A */ 0x0396, - /* 0B */ 0x0395, - /* 0C */ 0x0390, - /* 0D */ 0x038F, - /* 0E */ NODE(VXOpcodeTreeNodeType::MODE, 0x0002), - /* 0F */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0001), - /* 10 */ 0x000B, - /* 11 */ 0x000A, - /* 12 */ 0x000C, - /* 13 */ 0x000E, - /* 14 */ 0x000D, - /* 15 */ 0x0006, - /* 16 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0007), - /* 17 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0008), - /* 18 */ 0x04FE, - /* 19 */ 0x04F7, - /* 1A */ 0x04F8, - /* 1B */ 0x04FB, - /* 1C */ 0x04FA, - /* 1D */ 0x04F9, - /* 1E */ NODE(VXOpcodeTreeNodeType::MODE, 0x0009), - /* 1F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000A), - /* 20 */ 0x0026, - /* 21 */ 0x0027, - /* 22 */ 0x0025, - /* 23 */ 0x002C, - /* 24 */ 0x002D, - /* 25 */ 0x002E, - /* 26 */ INVALID, - /* 27 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000B), - /* 28 */ 0x0542, - /* 29 */ 0x0549, - /* 2A */ 0x0548, - /* 2B */ 0x054B, - /* 2C */ 0x054A, - /* 2D */ 0x0547, - /* 2E */ INVALID, - /* 2F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000C), - /* 30 */ 0x06B8, - /* 31 */ 0x06B9, - /* 32 */ 0x06B6, - /* 33 */ 0x06B7, - /* 34 */ 0x06BA, - /* 35 */ 0x06BB, - /* 36 */ INVALID, - /* 37 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000D), - /* 38 */ 0x006C, - /* 39 */ 0x006D, - /* 3A */ 0x006B, - /* 3B */ 0x006A, - /* 3C */ 0x0070, - /* 3D */ 0x006F, - /* 3E */ INVALID, - /* 3F */ NODE(VXOpcodeTreeNodeType::MODE, 0x000E), - /* 40 */ 0x02AB, - /* 41 */ 0x02AC, - /* 42 */ 0x02B2, - /* 43 */ 0x02B1, - /* 44 */ 0x02B3, - /* 45 */ 0x02B4, - /* 46 */ 0x02AE, - /* 47 */ 0x02AD, - /* 48 */ 0x00A7, - /* 49 */ 0x00A6, - /* 4A */ 0x00A8, - /* 4B */ 0x00AA, - /* 4C */ 0x00A9, - /* 4D */ 0x00A2, - /* 4E */ 0x00A1, - /* 4F */ 0x00A3, - /* 50 */ 0x04B4, - /* 51 */ 0x04B9, - /* 52 */ 0x04B3, - /* 53 */ 0x04AE, - /* 54 */ 0x04AF, - /* 55 */ 0x04B0, - /* 56 */ 0x04B1, - /* 57 */ 0x04B2, - /* 58 */ 0x0449, - /* 59 */ 0x0447, - /* 5A */ 0x0448, - /* 5B */ 0x0442, - /* 5C */ 0x043E, - /* 5D */ 0x043D, - /* 5E */ 0x043F, - /* 5F */ 0x0441, - /* 60 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0007), - /* 61 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0008), - /* 62 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0013), - /* 63 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0014), - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ 0x04B7, - /* 69 */ 0x02A4, - /* 6A */ 0x04AB, - /* 6B */ 0x02A6, - /* 6C */ 0x02B5, - /* 6D */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0009), - /* 6E */ 0x039F, - /* 6F */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000A), - /* 70 */ 0x02E8, - /* 71 */ 0x02E2, - /* 72 */ 0x02CA, - /* 73 */ 0x02DE, - /* 74 */ 0x02CE, - /* 75 */ 0x02E1, - /* 76 */ 0x02CB, - /* 77 */ 0x02C7, - /* 78 */ 0x02ED, - /* 79 */ 0x02E6, - /* 7A */ 0x02EB, - /* 7B */ 0x02E5, - /* 7C */ 0x02D5, - /* 7D */ 0x02D3, - /* 7E */ 0x02D8, - /* 7F */ 0x02D1, - /* 80 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0013), - /* 81 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0014), - /* 82 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0015), - /* 83 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0016), - /* 84 */ 0x055C, - /* 85 */ 0x055D, - /* 86 */ 0x06A8, - /* 87 */ 0x06A7, - /* 88 */ 0x0334, - /* 89 */ 0x0336, - /* 8A */ 0x0335, - /* 8B */ 0x0331, - /* 8C */ 0x031D, - /* 8D */ 0x02F4, - /* 8E */ 0x031C, - /* 8F */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0017), - /* 90 */ 0x06A9, - /* 91 */ 0x06AB, - /* 92 */ 0x06AA, - /* 93 */ 0x06A3, - /* 94 */ 0x06A2, - /* 95 */ 0x06A4, - /* 96 */ 0x06A6, - /* 97 */ 0x06A5, - /* 98 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000B), - /* 99 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000C), - /* 9A */ NODE(VXOpcodeTreeNodeType::MODE, 0x001D), - /* 9B */ 0x069D, - /* 9C */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000D), - /* 9D */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000E), - /* 9E */ 0x04EF, - /* 9F */ 0x02EF, - /* A0 */ 0x031B, - /* A1 */ 0x0320, - /* A2 */ 0x031F, - /* A3 */ 0x031E, - /* A4 */ 0x0367, - /* A5 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x000F), - /* A6 */ 0x0076, - /* A7 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0010), - /* A8 */ 0x055E, - /* A9 */ 0x055B, - /* AA */ 0x053D, - /* AB */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0011), - /* AC */ 0x0300, - /* AD */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0012), - /* AE */ 0x0501, - /* AF */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0013), - /* B0 */ 0x0317, - /* B1 */ 0x031A, - /* B2 */ 0x0318, - /* B3 */ 0x0319, - /* B4 */ 0x0321, - /* B5 */ 0x032C, - /* B6 */ 0x032B, - /* B7 */ 0x032A, - /* B8 */ 0x032D, - /* B9 */ 0x0330, - /* BA */ 0x032F, - /* BB */ 0x032E, - /* BC */ 0x0329, - /* BD */ 0x0324, - /* BE */ 0x0323, - /* BF */ 0x0322, - /* C0 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0018), - /* C1 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0019), - /* C2 */ 0x04D9, - /* C3 */ 0x04D8, - /* C4 */ NODE(VXOpcodeTreeNodeType::VEX, 0x0000), - /* C5 */ NODE(VXOpcodeTreeNodeType::VEX, 0x0001), - /* C6 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001E), - /* C7 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001F), - /* C8 */ 0x00B4, - /* C9 */ 0x02F5, - /* CA */ 0x04DA, - /* CB */ 0x04DB, - /* CC */ 0x02BB, - /* CD */ 0x02B9, - /* CE */ NODE(VXOpcodeTreeNodeType::MODE, 0x0027), - /* CF */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0017), - /* D0 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0020), - /* D1 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0021), - /* D2 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0022), - /* D3 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0023), - /* D4 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0028), - /* D5 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0029), - /* D6 */ NODE(VXOpcodeTreeNodeType::MODE, 0x002A), - /* D7 */ 0x06B2, - /* D8 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0015), - /* D9 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0016), - /* DA */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0017), - /* DB */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0018), - /* DC */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0019), - /* DD */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x001A), - /* DE */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x001B), - /* DF */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x001C), - /* E0 */ 0x0306, - /* E1 */ 0x0305, - /* E2 */ 0x0304, - /* E3 */ NODE(VXOpcodeTreeNodeType::ADDRESS_SIZE, 0x0000), - /* E4 */ 0x02A9, - /* E5 */ 0x02AA, - /* E6 */ 0x039D, - /* E7 */ 0x039E, - /* E8 */ 0x004E, - /* E9 */ 0x02DB, - /* EA */ NODE(VXOpcodeTreeNodeType::MODE, 0x002B), - /* EB */ 0x02DD, - /* EC */ 0x02A7, - /* ED */ 0x02A8, - /* EE */ 0x039B, - /* EF */ 0x039C, - /* F0 */ 0x02FF, - /* F1 */ 0x02BA, - /* F2 */ 0x04D7, - /* F3 */ 0x04D6, - /* F4 */ 0x029D, - /* F5 */ 0x0059, - /* F6 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002C), - /* F7 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002D), - /* F8 */ 0x0053, - /* F9 */ 0x0538, - /* FA */ 0x0057, - /* FB */ 0x053B, - /* FC */ 0x0054, - /* FD */ 0x0539, - /* FE */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002E), - /* FF */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002F), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0000), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0000), - /* 02 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0003), - /* 03 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0004), - /* 04 */ INVALID, - /* 05 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0005), - /* 06 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0006), - /* 07 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0007), - /* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0008), - /* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0009), - /* 0A */ INVALID, - /* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000A), - /* 0C */ INVALID, - /* 0D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000B), - /* 0E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000C), - /* 0F */ NODE(VXOpcodeTreeNodeType::AMD3DNOW, 0x0000), - /* 10 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000D), - /* 11 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000E), - /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0001), - /* 13 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0011), - /* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0012), - /* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0013), - /* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0002), - /* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0016), - /* 18 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0017), - /* 19 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0018), - /* 1A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0019), - /* 1B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001A), - /* 1C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001B), - /* 1D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001C), - /* 1E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001D), - /* 1F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001E), - /* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x001F), - /* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0020), - /* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0021), - /* 23 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0022), - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0023), - /* 29 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0024), - /* 2A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0025), - /* 2B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0026), - /* 2C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0027), - /* 2D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0028), - /* 2E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0029), - /* 2F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002A), - /* 30 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002B), - /* 31 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002C), - /* 32 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002D), - /* 33 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002E), - /* 34 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x002F), - /* 35 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0030), - /* 36 */ INVALID, - /* 37 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0031), - /* 38 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0002), - /* 39 */ INVALID, - /* 3A */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0003), - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0081), - /* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0082), - /* 42 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0083), - /* 43 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0084), - /* 44 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0085), - /* 45 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0086), - /* 46 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0087), - /* 47 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0088), - /* 48 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0089), - /* 49 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008A), - /* 4A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008B), - /* 4B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008C), - /* 4C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008D), - /* 4D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008E), - /* 4E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x008F), - /* 4F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0090), - /* 50 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0091), - /* 51 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0092), - /* 52 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0093), - /* 53 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0094), - /* 54 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0095), - /* 55 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0096), - /* 56 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0097), - /* 57 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0098), - /* 58 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0099), - /* 59 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009A), - /* 5A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009B), - /* 5B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009C), - /* 5C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009D), - /* 5D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009E), - /* 5E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x009F), - /* 5F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A0), - /* 60 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A1), - /* 61 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A2), - /* 62 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A3), - /* 63 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A4), - /* 64 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A5), - /* 65 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A6), - /* 66 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A7), - /* 67 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A8), - /* 68 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00A9), - /* 69 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AA), - /* 6A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AB), - /* 6B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AC), - /* 6C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AD), - /* 6D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AE), - /* 6E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00AF), - /* 6F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B0), - /* 70 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B1), - /* 71 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B2), - /* 72 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B3), - /* 73 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B4), - /* 74 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B5), - /* 75 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B6), - /* 76 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B7), - /* 77 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B8), - /* 78 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00B9), - /* 79 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BA), - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BB), - /* 7D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BC), - /* 7E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BD), - /* 7F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BE), - /* 80 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00BF), - /* 81 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C0), - /* 82 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C1), - /* 83 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C2), - /* 84 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C3), - /* 85 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C4), - /* 86 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C5), - /* 87 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C6), - /* 88 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C7), - /* 89 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C8), - /* 8A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00C9), - /* 8B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CA), - /* 8C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CB), - /* 8D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CC), - /* 8E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CD), - /* 8F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CE), - /* 90 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00CF), - /* 91 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D0), - /* 92 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D1), - /* 93 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D2), - /* 94 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D3), - /* 95 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D4), - /* 96 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D5), - /* 97 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D6), - /* 98 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D7), - /* 99 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D8), - /* 9A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00D9), - /* 9B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DA), - /* 9C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DB), - /* 9D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DC), - /* 9E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DD), - /* 9F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DE), - /* A0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00DF), - /* A1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E0), - /* A2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E1), - /* A3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E2), - /* A4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E3), - /* A5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E4), - /* A6 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0003), - /* A7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0004), - /* A8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E7), - /* A9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E8), - /* AA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E9), - /* AB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EA), - /* AC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EB), - /* AD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EC), - /* AE */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0005), - /* AF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EF), - /* B0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F0), - /* B1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F1), - /* B2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F2), - /* B3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F3), - /* B4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F4), - /* B5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F5), - /* B6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F6), - /* B7 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F7), - /* B8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F8), - /* B9 */ INVALID, - /* BA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00F9), - /* BB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FA), - /* BC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FB), - /* BD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FC), - /* BE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FD), - /* BF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FE), - /* C0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00FF), - /* C1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0100), - /* C2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0101), - /* C3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0102), - /* C4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0103), - /* C5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0104), - /* C6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0105), - /* C7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0006), - /* C8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0108), - /* C9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0109), - /* CA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010A), - /* CB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010B), - /* CC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010C), - /* CD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010D), - /* CE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010E), - /* CF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x010F), - /* D0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0110), - /* D1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0111), - /* D2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0112), - /* D3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0113), - /* D4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0114), - /* D5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0115), - /* D6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0116), - /* D7 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0117), - /* D8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0118), - /* D9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0119), - /* DA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011A), - /* DB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011B), - /* DC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011C), - /* DD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011D), - /* DE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011E), - /* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x011F), - /* E0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0120), - /* E1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0121), - /* E2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0122), - /* E3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0123), - /* E4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0124), - /* E5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0125), - /* E6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0126), - /* E7 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0127), - /* E8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0128), - /* E9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0129), - /* EA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012A), - /* EB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012B), - /* EC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012C), - /* ED */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012D), - /* EE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012E), - /* EF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x012F), - /* F0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0130), - /* F1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0131), - /* F2 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0132), - /* F3 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0133), - /* F4 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0134), - /* F5 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0135), - /* F6 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0136), - /* F7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0007), - /* F8 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0138), - /* F9 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0139), - /* FA */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013A), - /* FB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013B), - /* FC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013C), - /* FD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013D), - /* FE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x013E), - /* FF */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0032), - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0033), - /* 02 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0034), - /* 03 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0035), - /* 04 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0036), - /* 05 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0037), - /* 06 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0038), - /* 07 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0039), - /* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003A), - /* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003B), - /* 0A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003C), - /* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003D), - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, - /* 10 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003E), - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x003F), - /* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0040), - /* 16 */ INVALID, - /* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0041), - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0042), - /* 1D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0043), - /* 1E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0044), - /* 1F */ INVALID, - /* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0045), - /* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0046), - /* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0047), - /* 23 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0048), - /* 24 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0049), - /* 25 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004A), - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004B), - /* 29 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004C), - /* 2A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004D), - /* 2B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004E), - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x004F), - /* 31 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0050), - /* 32 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0051), - /* 33 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0052), - /* 34 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0053), - /* 35 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0054), - /* 36 */ INVALID, - /* 37 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0055), - /* 38 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0056), - /* 39 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0057), - /* 3A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0058), - /* 3B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0059), - /* 3C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005A), - /* 3D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005B), - /* 3E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005C), - /* 3F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005D), - /* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005E), - /* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x005F), - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0060), - /* 81 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0061), - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0062), - /* DC */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0063), - /* DD */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0064), - /* DE */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0065), - /* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0066), - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0067), - /* F1 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0068), - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0069), - /* 09 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006A), - /* 0A */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006B), - /* 0B */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006C), - /* 0C */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006D), - /* 0D */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006E), - /* 0E */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x006F), - /* 0F */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0070), - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0071), - /* 15 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0072), - /* 16 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0073), - /* 17 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0074), - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0075), - /* 21 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0076), - /* 22 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0077), - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0078), - /* 41 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0079), - /* 42 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007A), - /* 43 */ INVALID, - /* 44 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007B), - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007C), - /* 61 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007D), - /* 62 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007E), - /* 63 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x007F), - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0080), - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, - /* 10 */ 0x05E6, - /* 11 */ 0x05E5, - /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0008), - /* 13 */ 0x05CC, - /* 14 */ 0x0698, - /* 15 */ 0x0696, - /* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0009), - /* 17 */ 0x05C7, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ 0x05B8, - /* 29 */ 0x05B7, - /* 2A */ INVALID, - /* 2B */ 0x05D2, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ 0x0694, - /* 2F */ 0x0581, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ 0x05CE, - /* 51 */ 0x0689, - /* 52 */ 0x0684, - /* 53 */ 0x067E, - /* 54 */ 0x0575, - /* 55 */ 0x0573, - /* 56 */ 0x05F6, - /* 57 */ 0x069A, - /* 58 */ 0x0567, - /* 59 */ 0x05EF, - /* 5A */ 0x0587, - /* 5B */ 0x0583, - /* 5C */ 0x068E, - /* 5D */ 0x05AF, - /* 5E */ 0x0593, - /* 5F */ 0x05A9, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0000), - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000A), - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ 0x057D, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ 0x0687, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, - /* 10 */ 0x05E4, - /* 11 */ 0x05E3, - /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000B), - /* 13 */ 0x05CA, - /* 14 */ 0x0697, - /* 15 */ 0x0695, - /* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000C), - /* 17 */ 0x05C5, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ 0x05B5, - /* 29 */ 0x05B6, - /* 2A */ INVALID, - /* 2B */ 0x05D1, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ 0x0693, - /* 2F */ 0x0580, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ 0x05CD, - /* 51 */ 0x0688, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ 0x0574, - /* 55 */ 0x0572, - /* 56 */ 0x05F5, - /* 57 */ 0x0699, - /* 58 */ 0x0566, - /* 59 */ 0x05EE, - /* 5A */ 0x0585, - /* 5B */ 0x0586, - /* 5C */ 0x068D, - /* 5D */ 0x05AE, - /* 5E */ 0x0592, - /* 5F */ 0x05A8, - /* 60 */ 0x0679, - /* 61 */ 0x067C, - /* 62 */ 0x067A, - /* 63 */ 0x05FB, - /* 64 */ 0x0614, - /* 65 */ 0x0617, - /* 66 */ 0x0615, - /* 67 */ 0x05FD, - /* 68 */ 0x0675, - /* 69 */ 0x0678, - /* 6A */ 0x0676, - /* 6B */ 0x05FA, - /* 6C */ 0x067B, - /* 6D */ 0x0677, - /* 6E */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0014), - /* 6F */ 0x05BF, - /* 70 */ 0x0654, - /* 71 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001B), - /* 72 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001C), - /* 73 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001D), - /* 74 */ 0x060E, - /* 75 */ 0x0611, - /* 76 */ 0x060F, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ 0x059C, - /* 7D */ 0x059E, - /* 7E */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0015), - /* 7F */ 0x05C0, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ 0x057C, - /* C3 */ INVALID, - /* C4 */ 0x0630, - /* C5 */ 0x0623, - /* C6 */ 0x0686, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ 0x056A, - /* D1 */ 0x066B, - /* D2 */ 0x0665, - /* D3 */ 0x0669, - /* D4 */ 0x0600, - /* D5 */ 0x0650, - /* D6 */ 0x05D4, - /* D7 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0004), - /* D8 */ 0x0671, - /* D9 */ 0x0672, - /* DA */ 0x063C, - /* DB */ 0x0607, - /* DC */ 0x0603, - /* DD */ 0x0604, - /* DE */ 0x0636, - /* DF */ 0x0608, - /* E0 */ 0x0609, - /* E1 */ 0x0663, - /* E2 */ 0x0662, - /* E3 */ 0x060A, - /* E4 */ 0x064D, - /* E5 */ 0x064E, - /* E6 */ 0x058E, - /* E7 */ 0x05CF, - /* E8 */ 0x066F, - /* E9 */ 0x0670, - /* EA */ 0x063B, - /* EB */ 0x0651, - /* EC */ 0x0601, - /* ED */ 0x0602, - /* EE */ 0x0635, - /* EF */ 0x067D, - /* F0 */ INVALID, - /* F1 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0005), - /* F2 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0006), - /* F3 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0007), - /* F4 */ INVALID, - /* F5 */ 0x0632, - /* F6 */ 0x0652, - /* F7 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000D), - /* F8 */ 0x066C, - /* F9 */ 0x0673, - /* FA */ 0x066D, - /* FB */ 0x066E, - /* FC */ 0x05FE, - /* FD */ 0x0605, - /* FE */ 0x05FF, - /* FF */ INVALID, - }, - { - /* 00 */ 0x0653, - /* 01 */ 0x0627, - /* 02 */ 0x0625, - /* 03 */ 0x0626, - /* 04 */ 0x0631, - /* 05 */ 0x062B, - /* 06 */ 0x0629, - /* 07 */ 0x062A, - /* 08 */ 0x0657, - /* 09 */ 0x0659, - /* 0A */ 0x0658, - /* 0B */ 0x064C, - /* 0C */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0000), - /* 0D */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0001), - /* 0E */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0002), - /* 0F */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0003), - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, - /* 17 */ 0x0674, - /* 18 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0004), - /* 19 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0005), - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ 0x05F7, - /* 1D */ 0x05F9, - /* 1E */ 0x05F8, - /* 1F */ INVALID, - /* 20 */ 0x0642, - /* 21 */ 0x0640, - /* 22 */ 0x0641, - /* 23 */ 0x0643, - /* 24 */ 0x0644, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ 0x064B, - /* 29 */ 0x0610, - /* 2A */ 0x05D0, - /* 2B */ 0x05FC, - /* 2C */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0006), - /* 2D */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0007), - /* 2E */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0008), - /* 2F */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0009), - /* 30 */ 0x0647, - /* 31 */ 0x0645, - /* 32 */ 0x0646, - /* 33 */ 0x0649, - /* 34 */ 0x064A, - /* 35 */ 0x0648, - /* 36 */ INVALID, - /* 37 */ 0x0616, - /* 38 */ 0x0639, - /* 39 */ 0x063A, - /* 3A */ 0x063E, - /* 3B */ 0x063D, - /* 3C */ 0x0633, - /* 3D */ 0x0634, - /* 3E */ 0x0638, - /* 3F */ 0x0637, - /* 40 */ 0x064F, - /* 41 */ 0x0628, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ 0x0570, - /* DC */ 0x056E, - /* DD */ 0x056F, - /* DE */ 0x056C, - /* DF */ 0x056D, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000A), - /* 05 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000B), - /* 06 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000C), - /* 07 */ INVALID, - /* 08 */ 0x0681, - /* 09 */ 0x0680, - /* 0A */ 0x0683, - /* 0B */ 0x0682, - /* 0C */ 0x0577, - /* 0D */ 0x0576, - /* 0E */ 0x060C, - /* 0F */ 0x0606, - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000D), - /* 15 */ 0x0624, - /* 16 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0016), - /* 17 */ 0x059B, - /* 18 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0011), - /* 19 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0012), - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0013), - /* 21 */ 0x05A1, - /* 22 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0025), - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ 0x0597, - /* 41 */ 0x0596, - /* 42 */ 0x05E7, - /* 43 */ INVALID, - /* 44 */ 0x060D, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0016), - /* 4B */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0017), - /* 4C */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0018), - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ 0x0613, - /* 61 */ 0x0612, - /* 62 */ 0x0619, - /* 63 */ 0x0618, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ 0x0571, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, - /* 10 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000E), - /* 11 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x000F), - /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0010), - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0011), - /* 17 */ INVALID, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ 0x058B, - /* 2B */ INVALID, - /* 2C */ 0x0591, - /* 2D */ 0x058D, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ 0x068B, - /* 52 */ 0x0685, - /* 53 */ 0x067F, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ 0x0569, - /* 59 */ 0x05F1, - /* 5A */ 0x058C, - /* 5B */ 0x058F, - /* 5C */ 0x0690, - /* 5D */ 0x05B1, - /* 5E */ 0x0595, - /* 5F */ 0x05AB, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ 0x05C2, - /* 70 */ 0x0655, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ 0x05D3, - /* 7F */ 0x05C1, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ 0x057F, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ 0x0582, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ INVALID, - /* 0E */ INVALID, - /* 0F */ INVALID, - /* 10 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0012), - /* 11 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0013), - /* 12 */ NODE(VXOpcodeTreeNodeType::MODRM_MOD, 0x0014), - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, - /* 17 */ INVALID, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ 0x058A, - /* 2B */ INVALID, - /* 2C */ 0x0590, - /* 2D */ 0x0588, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ 0x068A, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ 0x0568, - /* 59 */ 0x05F0, - /* 5A */ 0x0589, - /* 5B */ INVALID, - /* 5C */ 0x068F, - /* 5D */ 0x05B0, - /* 5E */ 0x0594, - /* 5F */ 0x05AA, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ 0x0656, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ 0x059D, - /* 7D */ 0x059F, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ INVALID, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ INVALID, - /* 8F */ INVALID, - /* 90 */ INVALID, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ INVALID, - /* 95 */ INVALID, - /* 96 */ INVALID, - /* 97 */ INVALID, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ INVALID, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ INVALID, - /* 9F */ INVALID, - /* A0 */ INVALID, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ INVALID, - /* A5 */ INVALID, - /* A6 */ INVALID, - /* A7 */ INVALID, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ INVALID, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ INVALID, - /* AF */ INVALID, - /* B0 */ INVALID, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ INVALID, - /* B5 */ INVALID, - /* B6 */ INVALID, - /* B7 */ INVALID, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ INVALID, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ INVALID, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ 0x057E, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ 0x056B, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ 0x0584, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ 0x05A2, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, -}; - -const VXOpcodeTreeNode optreeModrmMod[][2] = -{ - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0001), - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0002), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x000F), - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0010), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0014), - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0015), - }, - { - /* 00 */ INVALID, - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E5), - }, - { - /* 00 */ INVALID, - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00E6), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00ED), - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x00EE), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0106), - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0107), - }, - { - /* 00 */ INVALID, - /* 01 */ NODE(VXOpcodeTreeNodeType::MANDATORY, 0x0137), - }, - { - /* 00 */ 0x05CB, - /* 01 */ 0x05C3, - }, - { - /* 00 */ 0x05C6, - /* 01 */ 0x05C8, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x001A), - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05C9, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05C4, - /* 01 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05A3, - }, - { - /* 00 */ 0x05E2, - /* 01 */ 0x05DF, - }, - { - /* 00 */ 0x05E0, - /* 01 */ 0x05E1, - }, - { - /* 00 */ 0x05DE, - /* 01 */ 0x05DD, - }, - { - /* 00 */ 0x05DB, - /* 01 */ 0x05DC, - }, - { - /* 00 */ 0x05DA, - /* 01 */ 0x05D9, - }, - { - /* 00 */ 0x05D8, - /* 01 */ 0x05D7, - }, - { - /* 00 */ 0x05BE, - /* 01 */ 0x05BD, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0024), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0000), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0025), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0001), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0026), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0002), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0027), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0003), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0028), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0004), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0029), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0005), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002A), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0006), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x002B), - /* 01 */ NODE(VXOpcodeTreeNodeType::X87, 0x0007), - }, -}; - -const VXOpcodeTreeNode optreeModrmReg[][8] = -{ - { - /* 00 */ 0x0531, - /* 01 */ 0x0541, - /* 02 */ 0x02FC, - /* 03 */ 0x0309, - /* 04 */ 0x0598, - /* 05 */ 0x0599, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x0516, - /* 01 */ 0x052F, - /* 02 */ 0x02F9, - /* 03 */ 0x02FB, - /* 04 */ 0x0533, - /* 05 */ INVALID, - /* 06 */ 0x02FE, - /* 07 */ 0x02C0, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0000), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0001), - /* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0002), - /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0003), - /* 04 */ 0x0532, - /* 05 */ INVALID, - /* 06 */ 0x02FD, - /* 07 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0004), - }, - { - /* 00 */ 0x0455, - /* 01 */ 0x0456, - /* 02 */ 0x0457, - /* 03 */ 0x0458, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x0486, - /* 03 */ INVALID, - /* 04 */ 0x0479, - /* 05 */ INVALID, - /* 06 */ 0x0470, - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x0485, - /* 03 */ INVALID, - /* 04 */ 0x0478, - /* 05 */ INVALID, - /* 06 */ 0x0473, - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x047E, - /* 03 */ INVALID, - /* 04 */ 0x0475, - /* 05 */ INVALID, - /* 06 */ 0x0468, - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x047C, - /* 03 */ INVALID, - /* 04 */ 0x0476, - /* 05 */ INVALID, - /* 06 */ 0x046A, - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x0482, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ 0x046D, - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x0481, - /* 03 */ 0x0480, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ 0x046C, - /* 07 */ 0x046B, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0005), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0006), - /* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0007), - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0008), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x0009), - /* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000A), - /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000B), - /* 04 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000C), - /* 05 */ NODE(VXOpcodeTreeNodeType::MODRM_RM, 0x000D), - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x0296, - /* 01 */ 0x0295, - /* 02 */ 0x02F2, - /* 03 */ 0x053C, - /* 04 */ 0x06C0, - /* 05 */ 0x06BF, - /* 06 */ INVALID, - /* 07 */ 0x0055, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ 0x02F7, - /* 06 */ 0x0310, - /* 07 */ 0x0515, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ 0x0043, - /* 05 */ 0x0049, - /* 06 */ 0x0047, - /* 07 */ 0x0045, - }, - { - /* 00 */ INVALID, - /* 01 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0006), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0015), - /* 07 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0016), - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0017), - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0018), - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ 0x04D3, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x000F, - /* 01 */ 0x0392, - /* 02 */ 0x0005, - /* 03 */ 0x04FF, - /* 04 */ 0x0028, - /* 05 */ 0x0544, - /* 06 */ 0x06BC, - /* 07 */ 0x006E, - }, - { - /* 00 */ 0x0013, - /* 01 */ 0x0391, - /* 02 */ 0x0009, - /* 03 */ 0x0500, - /* 04 */ 0x0029, - /* 05 */ 0x0543, - /* 06 */ 0x06B5, - /* 07 */ 0x0072, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0015), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0016), - /* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0017), - /* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0018), - /* 04 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0019), - /* 05 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001A), - /* 06 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001B), - /* 07 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001C), - }, - { - /* 00 */ 0x0012, - /* 01 */ 0x0397, - /* 02 */ 0x0008, - /* 03 */ 0x04FD, - /* 04 */ 0x002B, - /* 05 */ 0x0545, - /* 06 */ 0x06B4, - /* 07 */ 0x0071, - }, - { - /* 00 */ 0x0440, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x04DE, - /* 01 */ 0x04E6, - /* 02 */ 0x04C6, - /* 03 */ 0x04D0, - /* 04 */ 0x0517, - /* 05 */ 0x0526, - /* 06 */ 0x051D, - /* 07 */ 0x04F3, - }, - { - /* 00 */ 0x04DF, - /* 01 */ 0x04E7, - /* 02 */ 0x04C7, - /* 03 */ 0x04CE, - /* 04 */ 0x051C, - /* 05 */ 0x0528, - /* 06 */ 0x051E, - /* 07 */ 0x04F6, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x068C, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x066A, - /* 03 */ INVALID, - /* 04 */ 0x0664, - /* 05 */ INVALID, - /* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0001), - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x0666, - /* 03 */ INVALID, - /* 04 */ 0x0661, - /* 05 */ INVALID, - /* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0002), - /* 07 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x0668, - /* 03 */ 0x0667, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0003), - /* 07 */ 0x065C, - }, - { - /* 00 */ 0x0333, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x0332, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x04DD, - /* 01 */ 0x04E5, - /* 02 */ 0x04C8, - /* 03 */ 0x04CD, - /* 04 */ 0x0522, - /* 05 */ 0x0527, - /* 06 */ 0x051F, - /* 07 */ 0x04F1, - }, - { - /* 00 */ 0x04DC, - /* 01 */ 0x04E2, - /* 02 */ 0x04C5, - /* 03 */ 0x04CF, - /* 04 */ 0x0520, - /* 05 */ 0x052A, - /* 06 */ 0x0519, - /* 07 */ 0x04F4, - }, - { - /* 00 */ 0x04E1, - /* 01 */ 0x04E3, - /* 02 */ 0x04C3, - /* 03 */ 0x04CC, - /* 04 */ 0x0521, - /* 05 */ 0x0529, - /* 06 */ 0x051A, - /* 07 */ 0x04F2, - }, - { - /* 00 */ 0x04E0, - /* 01 */ 0x04E4, - /* 02 */ 0x04C4, - /* 03 */ 0x04CB, - /* 04 */ 0x0518, - /* 05 */ 0x0525, - /* 06 */ 0x051B, - /* 07 */ 0x04F5, - }, - { - /* 00 */ 0x00BB, - /* 01 */ 0x01CF, - /* 02 */ 0x0119, - /* 03 */ 0x013D, - /* 04 */ 0x022C, - /* 05 */ 0x0245, - /* 06 */ 0x0166, - /* 07 */ 0x0171, - }, - { - /* 00 */ 0x01BC, - /* 01 */ INVALID, - /* 02 */ 0x01FF, - /* 03 */ 0x020B, - /* 04 */ 0x01C3, - /* 05 */ 0x01C2, - /* 06 */ 0x01EB, - /* 07 */ 0x01EA, - }, - { - /* 00 */ 0x019A, - /* 01 */ 0x01A8, - /* 02 */ 0x019C, - /* 03 */ 0x019F, - /* 04 */ 0x01B3, - /* 05 */ 0x01B5, - /* 06 */ 0x01A1, - /* 07 */ 0x01A3, - }, - { - /* 00 */ 0x01A4, - /* 01 */ 0x01B1, - /* 02 */ 0x01AB, - /* 03 */ 0x01AD, - /* 04 */ INVALID, - /* 05 */ 0x01BA, - /* 06 */ INVALID, - /* 07 */ 0x020A, - }, - { - /* 00 */ 0x00BA, - /* 01 */ 0x01D2, - /* 02 */ 0x0118, - /* 03 */ 0x013E, - /* 04 */ 0x022B, - /* 05 */ 0x0243, - /* 06 */ 0x0158, - /* 07 */ 0x017A, - }, - { - /* 00 */ 0x01BB, - /* 01 */ 0x01AF, - /* 02 */ 0x01FE, - /* 03 */ 0x0209, - /* 04 */ 0x01F3, - /* 05 */ INVALID, - /* 06 */ 0x01E8, - /* 07 */ 0x01ED, - }, - { - /* 00 */ 0x019B, - /* 01 */ 0x01A7, - /* 02 */ 0x019D, - /* 03 */ 0x019E, - /* 04 */ 0x01B2, - /* 05 */ 0x01B4, - /* 06 */ 0x01A0, - /* 07 */ 0x01A2, - }, - { - /* 00 */ 0x01A6, - /* 01 */ 0x01B0, - /* 02 */ 0x01AA, - /* 03 */ 0x01AE, - /* 04 */ 0x00D2, - /* 05 */ 0x01A5, - /* 06 */ 0x00D3, - /* 07 */ 0x01AC, - }, - { - /* 00 */ 0x0557, - /* 01 */ 0x0558, - /* 02 */ 0x038E, - /* 03 */ 0x0385, - /* 04 */ 0x037E, - /* 05 */ 0x02A5, - /* 06 */ 0x00AC, - /* 07 */ 0x02A0, - }, - { - /* 00 */ 0x0559, - /* 01 */ 0x055A, - /* 02 */ 0x038D, - /* 03 */ 0x0384, - /* 04 */ 0x037D, - /* 05 */ 0x02A3, - /* 06 */ 0x00AB, - /* 07 */ 0x02A1, - }, - { - /* 00 */ 0x02AF, - /* 01 */ 0x00A4, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x02B0, - /* 01 */ 0x00A5, - /* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x002C), - /* 03 */ 0x004C, - /* 04 */ 0x02D9, - /* 05 */ 0x02DA, - /* 06 */ 0x04B8, - /* 07 */ INVALID, - }, -}; - -const VXOpcodeTreeNode optreeModrmRm[][8] = -{ - { - /* 00 */ INVALID, - /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0000), - /* 02 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0001), - /* 03 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0002), - /* 04 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0003), - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x0315, - /* 01 */ 0x0383, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06B1, - /* 01 */ 0x06C1, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0004), - /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0005), - /* 02 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0006), - /* 03 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0007), - /* 04 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0008), - /* 05 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0009), - /* 06 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000A), - /* 07 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000B), - }, - { - /* 00 */ 0x0550, - /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000C), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x0316, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06C2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06C3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06C4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06AF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06AC, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06AE, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06AD, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, - { - /* 00 */ 0x06B0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - }, -}; - -const VXOpcodeTreeNode optreeMandatory[][4] = -{ - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0000), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0001), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0002), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02F0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0307, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0551, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0058, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0556, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02BD, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x069E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0561, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0454, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0189, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0379, - /* 01 */ 0x0368, - /* 02 */ 0x0371, - /* 03 */ 0x0377, - }, - { - /* 00 */ 0x0378, - /* 01 */ 0x036A, - /* 02 */ 0x0370, - /* 03 */ 0x0376, - }, - { - /* 00 */ 0x0355, - /* 01 */ 0x0345, - /* 02 */ 0x036D, - /* 03 */ 0x0353, - }, - { - /* 00 */ 0x034C, - /* 01 */ 0x0346, - /* 02 */ 0x036E, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0354, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0352, - }, - { - /* 00 */ 0x0565, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0564, - }, - { - /* 00 */ 0x0563, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0562, - }, - { - /* 00 */ 0x0350, - /* 01 */ INVALID, - /* 02 */ 0x036B, - /* 03 */ 0x034E, - }, - { - /* 00 */ 0x0351, - /* 01 */ INVALID, - /* 02 */ 0x036C, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x034F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x034D, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0003), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x038A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x038B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x038C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0389, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0386, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0387, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0388, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0325, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0328, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0327, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0326, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x033A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0338, - }, - { - /* 00 */ 0x0339, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0337, - }, - { - /* 00 */ 0x008D, - /* 01 */ 0x0093, - /* 02 */ 0x0094, - /* 03 */ 0x008C, - }, - { - /* 00 */ 0x035C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x035B, - }, - { - /* 00 */ 0x009A, - /* 01 */ 0x009B, - /* 02 */ 0x009C, - /* 03 */ 0x0098, - }, - { - /* 00 */ 0x0090, - /* 01 */ 0x0091, - /* 02 */ 0x0096, - /* 03 */ 0x008A, - }, - { - /* 00 */ 0x0560, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x055F, - }, - { - /* 00 */ 0x0082, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0081, - }, - { - /* 00 */ 0x069F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x04D4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x04D1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x04D2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0003), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0004), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x029A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x045B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x045C, - }, - { - /* 00 */ 0x03FD, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03FE, - }, - { - /* 00 */ 0x03FA, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03F9, - }, - { - /* 00 */ 0x03FB, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03FC, - }, - { - /* 00 */ 0x040E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x040F, - }, - { - /* 00 */ 0x0405, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0404, - }, - { - /* 00 */ 0x0400, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0401, - }, - { - /* 00 */ 0x0402, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0403, - }, - { - /* 00 */ 0x0461, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0462, - }, - { - /* 00 */ 0x0466, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0465, - }, - { - /* 00 */ 0x0464, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0463, - }, - { - /* 00 */ 0x0431, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0432, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03CA, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0037, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0036, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x049A, - }, - { - /* 00 */ 0x03A3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03A2, - }, - { - /* 00 */ 0x03A6, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03A7, - }, - { - /* 00 */ 0x03A4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03A5, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0426, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0424, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0425, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0428, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0429, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0427, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0430, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03D1, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0359, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03AC, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x042C, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x042A, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x042B, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x042E, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x042F, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x042D, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03DA, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x041A, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x041B, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0421, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0420, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0412, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0413, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0419, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0418, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0438, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03FF, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0005), - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0006), - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0023, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0021, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0022, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x001F, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0020, - }, - { - /* 00 */ 0x033B, - /* 01 */ 0x0086, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x033C, - /* 01 */ 0x0085, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04E9, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04E8, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04EB, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04EA, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0035, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0034, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03CB, - }, - { - /* 00 */ 0x03BF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03C0, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03DF, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03E3, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0000), - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x00B5, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0408, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x02B7, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0001), - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x00B2, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x00B1, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x037C, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03CC, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03D5, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03D4, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03DE, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03DD, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0024, - }, - { - /* 00 */ 0x0067, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0064, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x005C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x005B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x005E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0063, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x005D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x005A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0069, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0066, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0068, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0065, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0061, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0060, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0062, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x005F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0357, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0356, - }, - { - /* 00 */ 0x0535, - /* 01 */ 0x0536, - /* 02 */ 0x0537, - /* 03 */ 0x0534, - }, - { - /* 00 */ 0x04ED, - /* 01 */ INVALID, - /* 02 */ 0x04EE, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x04C9, - /* 01 */ INVALID, - /* 02 */ 0x04CA, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0032, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0031, - }, - { - /* 00 */ 0x0030, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x002F, - }, - { - /* 00 */ 0x039A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0399, - }, - { - /* 00 */ 0x06BE, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x06BD, - }, - { - /* 00 */ 0x001A, - /* 01 */ 0x001B, - /* 02 */ 0x001C, - /* 03 */ 0x0019, - }, - { - /* 00 */ 0x0380, - /* 01 */ 0x0381, - /* 02 */ 0x0382, - /* 03 */ 0x037F, - }, - { - /* 00 */ 0x008F, - /* 01 */ 0x0092, - /* 02 */ 0x0095, - /* 03 */ 0x008B, - }, - { - /* 00 */ 0x0088, - /* 01 */ INVALID, - /* 02 */ 0x0099, - /* 03 */ 0x008E, - }, - { - /* 00 */ 0x054D, - /* 01 */ 0x054E, - /* 02 */ 0x054F, - /* 03 */ 0x054C, - }, - { - /* 00 */ 0x0312, - /* 01 */ 0x0313, - /* 02 */ 0x0314, - /* 03 */ 0x0311, - }, - { - /* 00 */ 0x00AE, - /* 01 */ 0x00AF, - /* 02 */ 0x00B0, - /* 03 */ 0x00AD, - }, - { - /* 00 */ 0x030D, - /* 01 */ 0x030E, - /* 02 */ 0x030F, - /* 03 */ 0x030C, - }, - { - /* 00 */ 0x04A2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04A3, - }, - { - /* 00 */ 0x04A7, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04A8, - }, - { - /* 00 */ 0x04A5, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04A4, - }, - { - /* 00 */ 0x03AA, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03AB, - }, - { - /* 00 */ 0x03D7, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03D6, - }, - { - /* 00 */ 0x03DC, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03DB, - }, - { - /* 00 */ 0x03D8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03D9, - }, - { - /* 00 */ 0x03AD, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03AE, - }, - { - /* 00 */ 0x049B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x049C, - }, - { - /* 00 */ 0x04A1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04A0, - }, - { - /* 00 */ 0x049E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x049D, - }, - { - /* 00 */ 0x03A8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03A9, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04A6, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x049F, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0002), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0003), - }, - { - /* 00 */ 0x0363, - /* 01 */ INVALID, - /* 02 */ 0x034A, - /* 03 */ 0x0348, - }, - { - /* 00 */ 0x0460, - /* 01 */ 0x045F, - /* 02 */ 0x045E, - /* 03 */ 0x045D, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0004), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0005), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0006), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0007), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0008), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0009), - }, - { - /* 00 */ 0x03CD, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03CE, - }, - { - /* 00 */ 0x03D2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03D3, - }, - { - /* 00 */ 0x03D0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03CF, - }, - { - /* 00 */ 0x00B3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0013), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0014), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x029C, - /* 02 */ INVALID, - /* 03 */ 0x029B, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x029F, - /* 02 */ INVALID, - /* 03 */ 0x029E, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0004), - /* 01 */ INVALID, - /* 02 */ 0x035F, - /* 03 */ NODE(VXOpcodeTreeNodeType::OPERAND_SIZE, 0x0005), - }, - { - /* 00 */ 0x0362, - /* 01 */ INVALID, - /* 02 */ 0x034B, - /* 03 */ 0x0349, - }, - { - /* 00 */ 0x02E9, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02E3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02C9, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02DF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02CF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02E0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02CC, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02C8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02EE, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02E7, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02EA, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02E4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02D6, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02D4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02D7, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02D2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0512, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x050F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0507, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0506, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0509, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x050E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0508, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0505, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0514, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0511, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0513, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0510, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x050C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x050B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x050D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x050A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x04B5, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x044A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0083, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0044, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0524, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0523, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000A), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000B), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x04B6, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0444, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x04EC, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x004A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x052C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x052B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000C), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000D), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02A2, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x007C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x007D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0308, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0048, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02F8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x02FA, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x037B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x037A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ 0x044D, - /* 03 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000E), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0046, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0039, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x003A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0373, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0374, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x06A1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x06A0, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0075, - /* 01 */ 0x0077, - /* 02 */ 0x007A, - /* 03 */ 0x0074, - }, - { - /* 00 */ 0x035A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x040D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x040C, - }, - { - /* 00 */ 0x03E4, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03E5, - }, - { - /* 00 */ 0x052E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x052D, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x000F), - /* 01 */ INVALID, - /* 02 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0010), - /* 03 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0011), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODRM_REG, 0x0012), - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x003F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x003D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0040, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x003C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x003E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x003B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0042, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0041, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x001E, - /* 02 */ INVALID, - /* 03 */ 0x001D, - }, - { - /* 00 */ 0x0487, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0488, - }, - { - /* 00 */ 0x047D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x047F, - }, - { - /* 00 */ 0x0483, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0484, - }, - { - /* 00 */ 0x03B3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03B4, - }, - { - /* 00 */ 0x0439, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x043A, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x0347, - /* 02 */ 0x0366, - /* 03 */ 0x0361, - }, - { - /* 00 */ 0x0422, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0423, - }, - { - /* 00 */ 0x0494, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0493, - }, - { - /* 00 */ 0x0496, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0495, - }, - { - /* 00 */ 0x041E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x041F, - }, - { - /* 00 */ 0x03C1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03C2, - }, - { - /* 00 */ 0x03BA, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03B9, - }, - { - /* 00 */ 0x03BB, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03BC, - }, - { - /* 00 */ 0x0417, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0416, - }, - { - /* 00 */ 0x03C3, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03C4, - }, - { - /* 00 */ 0x03C5, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03C6, - }, - { - /* 00 */ 0x047A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x047B, - }, - { - /* 00 */ 0x0477, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0474, - }, - { - /* 00 */ 0x03C8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03C9, - }, - { - /* 00 */ 0x0434, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0435, - }, - { - /* 00 */ 0x0436, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0437, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x0089, - /* 02 */ 0x0087, - /* 03 */ 0x0097, - }, - { - /* 00 */ 0x035D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0358, - }, - { - /* 00 */ 0x048F, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0490, - }, - { - /* 00 */ 0x0492, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0491, - }, - { - /* 00 */ 0x041C, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x041D, - }, - { - /* 00 */ 0x0453, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0452, - }, - { - /* 00 */ 0x03B6, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03B5, - }, - { - /* 00 */ 0x03B8, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03B7, - }, - { - /* 00 */ 0x0414, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0415, - }, - { - /* 00 */ 0x04C1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x04C2, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x02F1, - /* 02 */ INVALID, - /* 03 */ INVALID, - }, - { - /* 00 */ 0x0472, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0471, - }, - { - /* 00 */ 0x0469, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0467, - }, - { - /* 00 */ 0x046E, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x046F, - }, - { - /* 00 */ 0x043B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x043C, - }, - { - /* 00 */ 0x0411, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0410, - }, - { - /* 00 */ 0x045A, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0459, - }, - { - /* 00 */ 0x030B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x030A, - }, - { - /* 00 */ 0x0489, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x048A, - }, - { - /* 00 */ 0x0498, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x0497, - }, - { - /* 00 */ 0x048B, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x048C, - }, - { - /* 00 */ 0x048D, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x048E, - }, - { - /* 00 */ 0x03AF, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03B0, - }, - { - /* 00 */ 0x03BE, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03BD, - }, - { - /* 00 */ 0x03B1, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ 0x03B2, - }, -}; - -const VXOpcodeTreeNode optreeX87[][64] = -{ - { - /* 00 */ 0x00BC, - /* 01 */ 0x00BF, - /* 02 */ 0x00C2, - /* 03 */ 0x00C1, - /* 04 */ 0x00C0, - /* 05 */ 0x00C5, - /* 06 */ 0x00C3, - /* 07 */ 0x00C4, - /* 08 */ 0x01CE, - /* 09 */ 0x01CD, - /* 0A */ 0x01D9, - /* 0B */ 0x01DA, - /* 0C */ 0x01DB, - /* 0D */ 0x01D6, - /* 0E */ 0x01D7, - /* 0F */ 0x01D8, - /* 10 */ 0x011A, - /* 11 */ 0x011C, - /* 12 */ 0x011B, - /* 13 */ 0x0117, - /* 14 */ 0x0116, - /* 15 */ 0x011D, - /* 16 */ 0x011F, - /* 17 */ 0x011E, - /* 18 */ 0x013A, - /* 19 */ 0x0141, - /* 1A */ 0x013C, - /* 1B */ 0x0138, - /* 1C */ 0x013B, - /* 1D */ 0x0140, - /* 1E */ 0x013F, - /* 1F */ 0x0139, - /* 20 */ 0x022E, - /* 21 */ 0x0226, - /* 22 */ 0x0229, - /* 23 */ 0x0232, - /* 24 */ 0x0231, - /* 25 */ 0x022D, - /* 26 */ 0x022A, - /* 27 */ 0x0227, - /* 28 */ 0x0246, - /* 29 */ 0x024B, - /* 2A */ 0x024C, - /* 2B */ 0x024A, - /* 2C */ 0x0248, - /* 2D */ 0x0249, - /* 2E */ 0x0250, - /* 2F */ 0x0251, - /* 30 */ 0x0161, - /* 31 */ 0x0162, - /* 32 */ 0x0155, - /* 33 */ 0x015A, - /* 34 */ 0x0159, - /* 35 */ 0x0156, - /* 36 */ 0x0157, - /* 37 */ 0x0163, - /* 38 */ 0x0172, - /* 39 */ 0x016F, - /* 3A */ 0x0170, - /* 3B */ 0x0173, - /* 3C */ 0x0176, - /* 3D */ 0x0177, - /* 3E */ 0x0174, - /* 3F */ 0x0175, - }, - { - /* 00 */ 0x01BD, - /* 01 */ 0x01C0, - /* 02 */ 0x01BF, - /* 03 */ 0x01BE, - /* 04 */ 0x01B7, - /* 05 */ 0x01B6, - /* 06 */ 0x01B9, - /* 07 */ 0x01B8, - /* 08 */ 0x0281, - /* 09 */ 0x0282, - /* 0A */ 0x0283, - /* 0B */ 0x0280, - /* 0C */ 0x027D, - /* 0D */ 0x027E, - /* 0E */ 0x027F, - /* 0F */ 0x0284, - /* 10 */ 0x01E7, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, - /* 17 */ INVALID, - /* 18 */ 0x0213, - /* 19 */ 0x0212, - /* 1A */ 0x0215, - /* 1B */ 0x0214, - /* 1C */ 0x020F, - /* 1D */ 0x020E, - /* 1E */ 0x0211, - /* 1F */ 0x0210, - /* 20 */ 0x00D4, - /* 21 */ 0x00B7, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ 0x025A, - /* 25 */ 0x027C, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ 0x01C1, - /* 29 */ 0x01C5, - /* 2A */ 0x01C4, - /* 2B */ 0x01C8, - /* 2C */ 0x01C6, - /* 2D */ 0x01C7, - /* 2E */ 0x01C9, - /* 2F */ INVALID, - /* 30 */ 0x00B6, - /* 31 */ 0x0298, - /* 32 */ 0x01F1, - /* 33 */ 0x01EE, - /* 34 */ 0x0297, - /* 35 */ 0x01F0, - /* 36 */ 0x0154, - /* 37 */ 0x01A9, - /* 38 */ 0x01EF, - /* 39 */ 0x0299, - /* 3A */ 0x01F8, - /* 3B */ 0x01F7, - /* 3C */ 0x01F2, - /* 3D */ 0x01F5, - /* 3E */ 0x01F6, - /* 3F */ 0x0153, - }, - { - /* 00 */ 0x00D9, - /* 01 */ 0x00DA, - /* 02 */ 0x00DB, - /* 03 */ 0x00D6, - /* 04 */ 0x00D7, - /* 05 */ 0x00D8, - /* 06 */ 0x00DD, - /* 07 */ 0x00DC, - /* 08 */ 0x00E6, - /* 09 */ 0x00E7, - /* 0A */ 0x00E8, - /* 0B */ 0x00EC, - /* 0C */ 0x00ED, - /* 0D */ 0x00EB, - /* 0E */ 0x00E9, - /* 0F */ 0x00EA, - /* 10 */ 0x00E4, - /* 11 */ 0x00E5, - /* 12 */ 0x00E2, - /* 13 */ 0x00E3, - /* 14 */ 0x00DF, - /* 15 */ 0x00DE, - /* 16 */ 0x00E0, - /* 17 */ 0x00E1, - /* 18 */ 0x0113, - /* 19 */ 0x0114, - /* 1A */ 0x0115, - /* 1B */ 0x010F, - /* 1C */ 0x010E, - /* 1D */ 0x0110, - /* 1E */ 0x0111, - /* 1F */ 0x0112, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ 0x027B, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - }, - { - /* 00 */ 0x00F0, - /* 01 */ 0x00F1, - /* 02 */ 0x00EE, - /* 03 */ 0x00EF, - /* 04 */ 0x00F4, - /* 05 */ 0x00F5, - /* 06 */ 0x00F2, - /* 07 */ 0x00F3, - /* 08 */ 0x0103, - /* 09 */ 0x0102, - /* 0A */ 0x0105, - /* 0B */ 0x0104, - /* 0C */ 0x00FF, - /* 0D */ 0x00FE, - /* 0E */ 0x0101, - /* 0F */ 0x0100, - /* 10 */ 0x00F8, - /* 11 */ 0x00F9, - /* 12 */ 0x00F6, - /* 13 */ 0x00F7, - /* 14 */ 0x00FC, - /* 15 */ 0x00FD, - /* 16 */ 0x00FA, - /* 17 */ 0x00FB, - /* 18 */ 0x010B, - /* 19 */ 0x010A, - /* 1A */ 0x010D, - /* 1B */ 0x010C, - /* 1C */ 0x0107, - /* 1D */ 0x0106, - /* 1E */ 0x0109, - /* 1F */ 0x0108, - /* 20 */ 0x01E5, - /* 21 */ 0x01E4, - /* 22 */ 0x00D5, - /* 23 */ 0x01E6, - /* 24 */ 0x01E9, - /* 25 */ 0x01F4, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ 0x0269, - /* 29 */ 0x026A, - /* 2A */ 0x0265, - /* 2B */ 0x0264, - /* 2C */ 0x0263, - /* 2D */ 0x0268, - /* 2E */ 0x0267, - /* 2F */ 0x0266, - /* 30 */ 0x0129, - /* 31 */ 0x0128, - /* 32 */ 0x012B, - /* 33 */ 0x012A, - /* 34 */ 0x012F, - /* 35 */ 0x012E, - /* 36 */ 0x012D, - /* 37 */ 0x012C, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - }, - { - /* 00 */ 0x00B9, - /* 01 */ 0x00B8, - /* 02 */ 0x00C6, - /* 03 */ 0x00C9, - /* 04 */ 0x00C8, - /* 05 */ 0x00C7, - /* 06 */ 0x00BE, - /* 07 */ 0x00BD, - /* 08 */ 0x01D1, - /* 09 */ 0x01D0, - /* 0A */ 0x01D5, - /* 0B */ 0x01D4, - /* 0C */ 0x01D3, - /* 0D */ 0x01CC, - /* 0E */ 0x01CB, - /* 0F */ 0x01CA, - /* 10 */ 0x0125, - /* 11 */ 0x0124, - /* 12 */ 0x0127, - /* 13 */ 0x0126, - /* 14 */ 0x0121, - /* 15 */ 0x0120, - /* 16 */ 0x0123, - /* 17 */ 0x0122, - /* 18 */ 0x0148, - /* 19 */ 0x0142, - /* 1A */ 0x0145, - /* 1B */ 0x0144, - /* 1C */ 0x0143, - /* 1D */ 0x0147, - /* 1E */ 0x0146, - /* 1F */ 0x0149, - /* 20 */ 0x024F, - /* 21 */ 0x0247, - /* 22 */ 0x0241, - /* 23 */ 0x0242, - /* 24 */ 0x0240, - /* 25 */ 0x024E, - /* 26 */ 0x024D, - /* 27 */ 0x0244, - /* 28 */ 0x0228, - /* 29 */ 0x0235, - /* 2A */ 0x0234, - /* 2B */ 0x0237, - /* 2C */ 0x0236, - /* 2D */ 0x0233, - /* 2E */ 0x0230, - /* 2F */ 0x022F, - /* 30 */ 0x017B, - /* 31 */ 0x0178, - /* 32 */ 0x0179, - /* 33 */ 0x017C, - /* 34 */ 0x017F, - /* 35 */ 0x0180, - /* 36 */ 0x017D, - /* 37 */ 0x017E, - /* 38 */ 0x015E, - /* 39 */ 0x015F, - /* 3A */ 0x0160, - /* 3B */ 0x015B, - /* 3C */ 0x015C, - /* 3D */ 0x015D, - /* 3E */ 0x0164, - /* 3F */ 0x0165, - }, - { - /* 00 */ 0x018F, - /* 01 */ 0x018E, - /* 02 */ 0x0191, - /* 03 */ 0x0190, - /* 04 */ 0x018B, - /* 05 */ 0x018A, - /* 06 */ 0x018D, - /* 07 */ 0x018C, - /* 08 */ 0x028A, - /* 09 */ 0x0289, - /* 0A */ 0x028C, - /* 0B */ 0x028B, - /* 0C */ 0x0286, - /* 0D */ 0x0285, - /* 0E */ 0x0288, - /* 0F */ 0x0287, - /* 10 */ 0x0200, - /* 11 */ 0x0202, - /* 12 */ 0x0201, - /* 13 */ 0x01FA, - /* 14 */ 0x01F9, - /* 15 */ 0x01FB, - /* 16 */ 0x01FD, - /* 17 */ 0x01FC, - /* 18 */ 0x020D, - /* 19 */ 0x020C, - /* 1A */ 0x0208, - /* 1B */ 0x0204, - /* 1C */ 0x0203, - /* 1D */ 0x0205, - /* 1E */ 0x0207, - /* 1F */ 0x0206, - /* 20 */ 0x025D, - /* 21 */ 0x025C, - /* 22 */ 0x025B, - /* 23 */ 0x025E, - /* 24 */ 0x0261, - /* 25 */ 0x0262, - /* 26 */ 0x025F, - /* 27 */ 0x0260, - /* 28 */ 0x0278, - /* 29 */ 0x0277, - /* 2A */ 0x027A, - /* 2B */ 0x0279, - /* 2C */ 0x0274, - /* 2D */ 0x0273, - /* 2E */ 0x0276, - /* 2F */ 0x0275, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - }, - { - /* 00 */ 0x00CC, - /* 01 */ 0x00CD, - /* 02 */ 0x00CA, - /* 03 */ 0x00CB, - /* 04 */ 0x00D0, - /* 05 */ 0x00D1, - /* 06 */ 0x00CE, - /* 07 */ 0x00CF, - /* 08 */ 0x01E1, - /* 09 */ 0x01E0, - /* 0A */ 0x01E3, - /* 0B */ 0x01E2, - /* 0C */ 0x01DD, - /* 0D */ 0x01DC, - /* 0E */ 0x01DF, - /* 0F */ 0x01DE, - /* 10 */ 0x014F, - /* 11 */ 0x014E, - /* 12 */ 0x0151, - /* 13 */ 0x0150, - /* 14 */ 0x014B, - /* 15 */ 0x014A, - /* 16 */ 0x014D, - /* 17 */ 0x014C, - /* 18 */ INVALID, - /* 19 */ 0x0152, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ INVALID, - /* 1D */ INVALID, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ 0x0258, - /* 21 */ 0x0259, - /* 22 */ 0x0256, - /* 23 */ 0x0257, - /* 24 */ 0x0253, - /* 25 */ 0x0252, - /* 26 */ 0x0255, - /* 27 */ 0x0254, - /* 28 */ 0x023B, - /* 29 */ 0x023D, - /* 2A */ 0x023C, - /* 2B */ 0x0239, - /* 2C */ 0x0238, - /* 2D */ 0x023A, - /* 2E */ 0x023E, - /* 2F */ 0x023F, - /* 30 */ 0x0186, - /* 31 */ 0x0185, - /* 32 */ 0x0188, - /* 33 */ 0x0187, - /* 34 */ 0x0182, - /* 35 */ 0x0181, - /* 36 */ 0x0184, - /* 37 */ 0x0183, - /* 38 */ 0x016C, - /* 39 */ 0x016B, - /* 3A */ 0x016E, - /* 3B */ 0x016D, - /* 3C */ 0x0168, - /* 3D */ 0x0167, - /* 3E */ 0x016A, - /* 3F */ 0x0169, - }, - { - /* 00 */ 0x0199, - /* 01 */ 0x0196, - /* 02 */ 0x0197, - /* 03 */ 0x0198, - /* 04 */ 0x0193, - /* 05 */ 0x0192, - /* 06 */ 0x0195, - /* 07 */ 0x0194, - /* 08 */ 0x028F, - /* 09 */ 0x0290, - /* 0A */ 0x028D, - /* 0B */ 0x028E, - /* 0C */ 0x0293, - /* 0D */ 0x0294, - /* 0E */ 0x0291, - /* 0F */ 0x0292, - /* 10 */ 0x021B, - /* 11 */ 0x021A, - /* 12 */ 0x021D, - /* 13 */ 0x021C, - /* 14 */ 0x0217, - /* 15 */ 0x0216, - /* 16 */ 0x0219, - /* 17 */ 0x0218, - /* 18 */ 0x0220, - /* 19 */ 0x0221, - /* 1A */ 0x021E, - /* 1B */ 0x021F, - /* 1C */ 0x0224, - /* 1D */ 0x0225, - /* 1E */ 0x0222, - /* 1F */ 0x0223, - /* 20 */ 0x01EC, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ 0x0271, - /* 29 */ 0x0272, - /* 2A */ 0x026D, - /* 2B */ 0x026C, - /* 2C */ 0x026B, - /* 2D */ 0x0270, - /* 2E */ 0x026F, - /* 2F */ 0x026E, - /* 30 */ 0x0136, - /* 31 */ 0x0137, - /* 32 */ 0x0133, - /* 33 */ 0x0134, - /* 34 */ 0x0135, - /* 35 */ 0x0130, - /* 36 */ 0x0131, - /* 37 */ 0x0132, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - }, -}; - -const VXOpcodeTreeNode optreeAddressSize[][3] = -{ - { - /* 00 */ 0x02CD, - /* 01 */ 0x02D0, - /* 02 */ 0x02EC, - }, -}; - -const VXOpcodeTreeNode optreeOperandSize[][3] = -{ - { - /* 00 */ 0x03E0, - /* 01 */ 0x03E1, - /* 02 */ 0x03E2, - }, - { - /* 00 */ 0x0409, - /* 01 */ 0x040A, - /* 02 */ 0x040B, - }, - { - /* 00 */ 0x033D, - /* 01 */ 0x0343, - /* 02 */ 0x035E, - }, - { - /* 00 */ 0x0341, - /* 01 */ 0x0342, - /* 02 */ 0x0364, - }, - { - /* 00 */ 0x0344, - /* 01 */ 0x033E, - /* 02 */ 0x0365, - }, - { - /* 00 */ 0x0340, - /* 01 */ 0x033F, - /* 02 */ 0x0360, - }, - { - /* 00 */ 0x007F, - /* 01 */ 0x0080, - /* 02 */ 0x007E, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x000F), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0010), - /* 02 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0011), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0012), - /* 02 */ INVALID, - }, - { - /* 00 */ 0x02B8, - /* 01 */ 0x02B6, - /* 02 */ INVALID, - }, - { - /* 00 */ 0x03A1, - /* 01 */ 0x03A0, - /* 02 */ INVALID, - }, - { - /* 00 */ 0x0050, - /* 01 */ 0x009E, - /* 02 */ 0x0052, - }, - { - /* 00 */ 0x009D, - /* 01 */ 0x0051, - /* 02 */ 0x0084, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001E), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x001F), - /* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0020), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0021), - /* 01 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0022), - /* 02 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0023), - }, - { - /* 00 */ 0x0372, - /* 01 */ 0x0369, - /* 02 */ 0x036F, - }, - { - /* 00 */ 0x007B, - /* 01 */ 0x0078, - /* 02 */ 0x0079, - }, - { - /* 00 */ 0x0540, - /* 01 */ 0x053E, - /* 02 */ 0x053F, - }, - { - /* 00 */ 0x0303, - /* 01 */ 0x0301, - /* 02 */ 0x0302, - }, - { - /* 00 */ 0x0504, - /* 01 */ 0x0502, - /* 02 */ 0x0503, - }, - { - /* 00 */ 0x05BB, - /* 01 */ 0x05BA, - /* 02 */ 0x05D5, - }, - { - /* 00 */ 0x05B9, - /* 01 */ 0x05BC, - /* 02 */ 0x05D6, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000E), - /* 01 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x000F), - /* 02 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0010), - }, - { - /* 00 */ 0x02C6, - /* 01 */ 0x02C4, - /* 02 */ 0x02C5, - }, -}; - -const VXOpcodeTreeNode optreeMode[][2] = -{ - { - /* 00 */ 0x04AA, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0445, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04AD, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0553, - /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000D), - }, - { - /* 00 */ 0x0555, - /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000E), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x000F), - /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0010), - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0011), - /* 01 */ NODE(VXOpcodeTreeNodeType::VENDOR, 0x0012), - }, - { - /* 00 */ 0x04AC, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0446, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04A9, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0443, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x009F, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x00A0, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0001, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0004, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04BA, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04BB, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x044B, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x044C, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0038, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0033, - /* 01 */ 0x0375, - }, - { - /* 00 */ 0x0011, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0398, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0007, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04FC, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x002A, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0546, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x06B3, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0073, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x004F, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04C0, - /* 01 */ 0x04BF, - }, - { - /* 00 */ 0x04BC, - /* 01 */ 0x04BE, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x04BD, - }, - { - /* 00 */ 0x0451, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x044E, - /* 01 */ 0x0450, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x044F, - }, - { - /* 00 */ 0x02F6, - /* 01 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0014), - /* 01 */ NODE(VXOpcodeTreeNodeType::VEXW, 0x0015), - }, - { - /* 00 */ 0x02F3, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x02BC, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0003, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0002, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04F0, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x02DC, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x004D, - /* 01 */ 0x004B, - }, -}; - -const VXOpcodeTreeNode optreeVendor[][2] = -{ - { - /* 00 */ INVALID, - /* 01 */ 0x05AC, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05B2, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05EB, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05F3, - }, - { - /* 00 */ 0x05EC, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05B4, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05B3, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05ED, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x053A, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0056, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0530, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x02C1, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x04D5, - /* 01 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x0552, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x0554, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x02BE, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x02BF, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x02C3, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x02C2, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05EA, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05F2, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05E8, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05E9, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05F4, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05AD, - }, -}; - -const VXOpcodeTreeNode optree3dnow[][256] = -{ - { - /* 00 */ INVALID, - /* 01 */ INVALID, - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ INVALID, - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ INVALID, - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ 0x0407, - /* 0D */ 0x0406, - /* 0E */ INVALID, - /* 0F */ INVALID, - /* 10 */ INVALID, - /* 11 */ INVALID, - /* 12 */ INVALID, - /* 13 */ INVALID, - /* 14 */ INVALID, - /* 15 */ INVALID, - /* 16 */ INVALID, - /* 17 */ INVALID, - /* 18 */ INVALID, - /* 19 */ INVALID, - /* 1A */ INVALID, - /* 1B */ INVALID, - /* 1C */ 0x03E7, - /* 1D */ 0x03E6, - /* 1E */ INVALID, - /* 1F */ INVALID, - /* 20 */ INVALID, - /* 21 */ INVALID, - /* 22 */ INVALID, - /* 23 */ INVALID, - /* 24 */ INVALID, - /* 25 */ INVALID, - /* 26 */ INVALID, - /* 27 */ INVALID, - /* 28 */ INVALID, - /* 29 */ INVALID, - /* 2A */ INVALID, - /* 2B */ INVALID, - /* 2C */ INVALID, - /* 2D */ INVALID, - /* 2E */ INVALID, - /* 2F */ INVALID, - /* 30 */ INVALID, - /* 31 */ INVALID, - /* 32 */ INVALID, - /* 33 */ INVALID, - /* 34 */ INVALID, - /* 35 */ INVALID, - /* 36 */ INVALID, - /* 37 */ INVALID, - /* 38 */ INVALID, - /* 39 */ INVALID, - /* 3A */ INVALID, - /* 3B */ INVALID, - /* 3C */ INVALID, - /* 3D */ INVALID, - /* 3E */ INVALID, - /* 3F */ INVALID, - /* 40 */ INVALID, - /* 41 */ INVALID, - /* 42 */ INVALID, - /* 43 */ INVALID, - /* 44 */ INVALID, - /* 45 */ INVALID, - /* 46 */ INVALID, - /* 47 */ INVALID, - /* 48 */ INVALID, - /* 49 */ INVALID, - /* 4A */ INVALID, - /* 4B */ INVALID, - /* 4C */ INVALID, - /* 4D */ INVALID, - /* 4E */ INVALID, - /* 4F */ INVALID, - /* 50 */ INVALID, - /* 51 */ INVALID, - /* 52 */ INVALID, - /* 53 */ INVALID, - /* 54 */ INVALID, - /* 55 */ INVALID, - /* 56 */ INVALID, - /* 57 */ INVALID, - /* 58 */ INVALID, - /* 59 */ INVALID, - /* 5A */ INVALID, - /* 5B */ INVALID, - /* 5C */ INVALID, - /* 5D */ INVALID, - /* 5E */ INVALID, - /* 5F */ INVALID, - /* 60 */ INVALID, - /* 61 */ INVALID, - /* 62 */ INVALID, - /* 63 */ INVALID, - /* 64 */ INVALID, - /* 65 */ INVALID, - /* 66 */ INVALID, - /* 67 */ INVALID, - /* 68 */ INVALID, - /* 69 */ INVALID, - /* 6A */ INVALID, - /* 6B */ INVALID, - /* 6C */ INVALID, - /* 6D */ INVALID, - /* 6E */ INVALID, - /* 6F */ INVALID, - /* 70 */ INVALID, - /* 71 */ INVALID, - /* 72 */ INVALID, - /* 73 */ INVALID, - /* 74 */ INVALID, - /* 75 */ INVALID, - /* 76 */ INVALID, - /* 77 */ INVALID, - /* 78 */ INVALID, - /* 79 */ INVALID, - /* 7A */ INVALID, - /* 7B */ INVALID, - /* 7C */ INVALID, - /* 7D */ INVALID, - /* 7E */ INVALID, - /* 7F */ INVALID, - /* 80 */ INVALID, - /* 81 */ INVALID, - /* 82 */ INVALID, - /* 83 */ INVALID, - /* 84 */ INVALID, - /* 85 */ INVALID, - /* 86 */ INVALID, - /* 87 */ INVALID, - /* 88 */ INVALID, - /* 89 */ INVALID, - /* 8A */ 0x03F0, - /* 8B */ INVALID, - /* 8C */ INVALID, - /* 8D */ INVALID, - /* 8E */ 0x03F1, - /* 8F */ INVALID, - /* 90 */ 0x03EB, - /* 91 */ INVALID, - /* 92 */ INVALID, - /* 93 */ INVALID, - /* 94 */ 0x03EE, - /* 95 */ INVALID, - /* 96 */ 0x03F2, - /* 97 */ 0x03F6, - /* 98 */ INVALID, - /* 99 */ INVALID, - /* 9A */ 0x03F7, - /* 9B */ INVALID, - /* 9C */ INVALID, - /* 9D */ INVALID, - /* 9E */ 0x03E9, - /* 9F */ INVALID, - /* A0 */ 0x03EC, - /* A1 */ INVALID, - /* A2 */ INVALID, - /* A3 */ INVALID, - /* A4 */ 0x03ED, - /* A5 */ INVALID, - /* A6 */ 0x03F3, - /* A7 */ 0x03F5, - /* A8 */ INVALID, - /* A9 */ INVALID, - /* AA */ 0x03F8, - /* AB */ INVALID, - /* AC */ INVALID, - /* AD */ INVALID, - /* AE */ 0x03E8, - /* AF */ INVALID, - /* B0 */ 0x03EA, - /* B1 */ INVALID, - /* B2 */ INVALID, - /* B3 */ INVALID, - /* B4 */ 0x03EF, - /* B5 */ INVALID, - /* B6 */ 0x03F4, - /* B7 */ 0x0433, - /* B8 */ INVALID, - /* B9 */ INVALID, - /* BA */ INVALID, - /* BB */ 0x0499, - /* BC */ INVALID, - /* BD */ INVALID, - /* BE */ INVALID, - /* BF */ 0x03C7, - /* C0 */ INVALID, - /* C1 */ INVALID, - /* C2 */ INVALID, - /* C3 */ INVALID, - /* C4 */ INVALID, - /* C5 */ INVALID, - /* C6 */ INVALID, - /* C7 */ INVALID, - /* C8 */ INVALID, - /* C9 */ INVALID, - /* CA */ INVALID, - /* CB */ INVALID, - /* CC */ INVALID, - /* CD */ INVALID, - /* CE */ INVALID, - /* CF */ INVALID, - /* D0 */ INVALID, - /* D1 */ INVALID, - /* D2 */ INVALID, - /* D3 */ INVALID, - /* D4 */ INVALID, - /* D5 */ INVALID, - /* D6 */ INVALID, - /* D7 */ INVALID, - /* D8 */ INVALID, - /* D9 */ INVALID, - /* DA */ INVALID, - /* DB */ INVALID, - /* DC */ INVALID, - /* DD */ INVALID, - /* DE */ INVALID, - /* DF */ INVALID, - /* E0 */ INVALID, - /* E1 */ INVALID, - /* E2 */ INVALID, - /* E3 */ INVALID, - /* E4 */ INVALID, - /* E5 */ INVALID, - /* E6 */ INVALID, - /* E7 */ INVALID, - /* E8 */ INVALID, - /* E9 */ INVALID, - /* EA */ INVALID, - /* EB */ INVALID, - /* EC */ INVALID, - /* ED */ INVALID, - /* EE */ INVALID, - /* EF */ INVALID, - /* F0 */ INVALID, - /* F1 */ INVALID, - /* F2 */ INVALID, - /* F3 */ INVALID, - /* F4 */ INVALID, - /* F5 */ INVALID, - /* F6 */ INVALID, - /* F7 */ INVALID, - /* F8 */ INVALID, - /* F9 */ INVALID, - /* FA */ INVALID, - /* FB */ INVALID, - /* FC */ INVALID, - /* FD */ INVALID, - /* FE */ INVALID, - /* FF */ INVALID, - }, -}; - -const VXOpcodeTreeNode optreeVex[][16] = -{ - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0024), - /* 01 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0004), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0005), - /* 06 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0006), - /* 07 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0007), - /* 08 */ INVALID, - /* 09 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0008), - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0009), - /* 0E */ INVALID, - /* 0F */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::MODE, 0x0026), - /* 01 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0004), - /* 02 */ INVALID, - /* 03 */ INVALID, - /* 04 */ INVALID, - /* 05 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0005), - /* 06 */ INVALID, - /* 07 */ INVALID, - /* 08 */ INVALID, - /* 09 */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0008), - /* 0A */ INVALID, - /* 0B */ INVALID, - /* 0C */ INVALID, - /* 0D */ NODE(VXOpcodeTreeNodeType::TABLE, 0x0009), - /* 0E */ INVALID, - /* 0F */ INVALID, - }, -}; - -const VXOpcodeTreeNode optreeVexW[][2] = -{ - { - /* 00 */ 0x061D, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x061C, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0692, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0691, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x057B, - /* 01 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0008), - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05A6, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05A5, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05A7, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x05A4, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x061E, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x061B, - /* 01 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x0009), - /* 01 */ INVALID, - }, - { - /* 00 */ 0x061F, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0620, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0621, - /* 01 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x0622, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000A), - /* 01 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000B), - /* 01 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000C), - /* 01 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000D), - /* 01 */ INVALID, - }, - { - /* 00 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000E), - /* 01 */ NODE(VXOpcodeTreeNodeType::VEXL, 0x000F), - }, - { - /* 00 */ 0x0579, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x0578, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x060B, - /* 01 */ INVALID, - }, -}; - -const VXOpcodeTreeNode optreeVexL[][2] = -{ - { - /* 00 */ 0x069C, - /* 01 */ 0x069B, - }, - { - /* 00 */ 0x0660, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x065A, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x065E, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x063F, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x065F, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x065B, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x065D, - /* 01 */ INVALID, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x057A, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x061A, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x05A0, - }, - { - /* 00 */ INVALID, - /* 01 */ 0x059A, - }, - { - /* 00 */ 0x062C, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x062E, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x062D, - /* 01 */ INVALID, - }, - { - /* 00 */ 0x062F, - /* 01 */ INVALID, - }, -}; - -#undef INVALID -#undef NODE - -#define OPI_NONE { VXDefinedOperandType::NONE, VXDefinedOperandSize::NA } -#define OPI_AL { VXDefinedOperandType::AL, VXDefinedOperandSize::B } -#define OPI_AX { VXDefinedOperandType::AX, VXDefinedOperandSize::W } -#define OPI_Av { VXDefinedOperandType::A, VXDefinedOperandSize::V } -#define OPI_C { VXDefinedOperandType::C, VXDefinedOperandSize::NA } -#define OPI_CL { VXDefinedOperandType::CL, VXDefinedOperandSize::B } -#define OPI_CS { VXDefinedOperandType::CS, VXDefinedOperandSize::NA } -#define OPI_CX { VXDefinedOperandType::CX, VXDefinedOperandSize::W } -#define OPI_D { VXDefinedOperandType::D, VXDefinedOperandSize::NA } -#define OPI_DL { VXDefinedOperandType::DL, VXDefinedOperandSize::B } -#define OPI_DS { VXDefinedOperandType::DS, VXDefinedOperandSize::NA } -#define OPI_DX { VXDefinedOperandType::DX, VXDefinedOperandSize::W } -#define OPI_E { VXDefinedOperandType::E, VXDefinedOperandSize::NA } -#define OPI_ES { VXDefinedOperandType::ES, VXDefinedOperandSize::NA } -#define OPI_Eb { VXDefinedOperandType::E, VXDefinedOperandSize::B } -#define OPI_Ed { VXDefinedOperandType::E, VXDefinedOperandSize::D } -#define OPI_Eq { VXDefinedOperandType::E, VXDefinedOperandSize::Q } -#define OPI_Ev { VXDefinedOperandType::E, VXDefinedOperandSize::V } -#define OPI_Ew { VXDefinedOperandType::E, VXDefinedOperandSize::W } -#define OPI_Ey { VXDefinedOperandType::E, VXDefinedOperandSize::Y } -#define OPI_Ez { VXDefinedOperandType::E, VXDefinedOperandSize::Z } -#define OPI_FS { VXDefinedOperandType::FS, VXDefinedOperandSize::NA } -#define OPI_Fv { VXDefinedOperandType::F, VXDefinedOperandSize::V } -#define OPI_G { VXDefinedOperandType::G, VXDefinedOperandSize::NA } -#define OPI_GS { VXDefinedOperandType::GS, VXDefinedOperandSize::NA } -#define OPI_Gb { VXDefinedOperandType::G, VXDefinedOperandSize::B } -#define OPI_Gd { VXDefinedOperandType::G, VXDefinedOperandSize::D } -#define OPI_Gq { VXDefinedOperandType::G, VXDefinedOperandSize::Q } -#define OPI_Gv { VXDefinedOperandType::G, VXDefinedOperandSize::V } -#define OPI_Gw { VXDefinedOperandType::G, VXDefinedOperandSize::W } -#define OPI_Gy { VXDefinedOperandType::G, VXDefinedOperandSize::Y } -#define OPI_Gz { VXDefinedOperandType::G, VXDefinedOperandSize::Z } -#define OPI_H { VXDefinedOperandType::H, VXDefinedOperandSize::X } -#define OPI_Hqq { VXDefinedOperandType::H, VXDefinedOperandSize::QQ } -#define OPI_Hx { VXDefinedOperandType::H, VXDefinedOperandSize::X } -#define OPI_I1 { VXDefinedOperandType::I1, VXDefinedOperandSize::NA } -#define OPI_Ib { VXDefinedOperandType::I, VXDefinedOperandSize::B } -#define OPI_Iv { VXDefinedOperandType::I, VXDefinedOperandSize::V } -#define OPI_Iw { VXDefinedOperandType::I, VXDefinedOperandSize::W } -#define OPI_Iz { VXDefinedOperandType::I, VXDefinedOperandSize::Z } -#define OPI_Jb { VXDefinedOperandType::J, VXDefinedOperandSize::B } -#define OPI_Jv { VXDefinedOperandType::J, VXDefinedOperandSize::V } -#define OPI_Jz { VXDefinedOperandType::J, VXDefinedOperandSize::Z } -#define OPI_L { VXDefinedOperandType::L, VXDefinedOperandSize::O } -#define OPI_Lx { VXDefinedOperandType::L, VXDefinedOperandSize::X } -#define OPI_M { VXDefinedOperandType::M, VXDefinedOperandSize::NA } -#define OPI_Mb { VXDefinedOperandType::M, VXDefinedOperandSize::B } -#define OPI_MbRd { VXDefinedOperandType::MR, VXDefinedOperandSize::BD } -#define OPI_MbRv { VXDefinedOperandType::MR, VXDefinedOperandSize::BV } -#define OPI_Md { VXDefinedOperandType::M, VXDefinedOperandSize::D } -#define OPI_MdRy { VXDefinedOperandType::MR, VXDefinedOperandSize::DY } -#define OPI_MdU { VXDefinedOperandType::MU, VXDefinedOperandSize::DO } -#define OPI_Mdq { VXDefinedOperandType::M, VXDefinedOperandSize::DQ } -#define OPI_Mo { VXDefinedOperandType::M, VXDefinedOperandSize::O } -#define OPI_Mq { VXDefinedOperandType::M, VXDefinedOperandSize::Q } -#define OPI_MqU { VXDefinedOperandType::MU, VXDefinedOperandSize::QO } -#define OPI_Ms { VXDefinedOperandType::M, VXDefinedOperandSize::W } -#define OPI_Mt { VXDefinedOperandType::M, VXDefinedOperandSize::T } -#define OPI_Mv { VXDefinedOperandType::M, VXDefinedOperandSize::V } -#define OPI_Mw { VXDefinedOperandType::M, VXDefinedOperandSize::W } -#define OPI_MwRd { VXDefinedOperandType::MR, VXDefinedOperandSize::WD } -#define OPI_MwRv { VXDefinedOperandType::MR, VXDefinedOperandSize::WV } -#define OPI_MwRy { VXDefinedOperandType::MR, VXDefinedOperandSize::WY } -#define OPI_MwU { VXDefinedOperandType::MU, VXDefinedOperandSize::WO } -#define OPI_N { VXDefinedOperandType::N, VXDefinedOperandSize::Q } -#define OPI_Ob { VXDefinedOperandType::O, VXDefinedOperandSize::B } -#define OPI_Ov { VXDefinedOperandType::O, VXDefinedOperandSize::V } -#define OPI_Ow { VXDefinedOperandType::O, VXDefinedOperandSize::W } -#define OPI_P { VXDefinedOperandType::P, VXDefinedOperandSize::Q } -#define OPI_Q { VXDefinedOperandType::Q, VXDefinedOperandSize::Q } -#define OPI_R { VXDefinedOperandType::R, VXDefinedOperandSize::RDQ } -#define OPI_R0b { VXDefinedOperandType::R0, VXDefinedOperandSize::B } -#define OPI_R0v { VXDefinedOperandType::R0, VXDefinedOperandSize::V } -#define OPI_R0w { VXDefinedOperandType::R0, VXDefinedOperandSize::W } -#define OPI_R0y { VXDefinedOperandType::R0, VXDefinedOperandSize::Y } -#define OPI_R0z { VXDefinedOperandType::R0, VXDefinedOperandSize::Z } -#define OPI_R1b { VXDefinedOperandType::R1, VXDefinedOperandSize::B } -#define OPI_R1v { VXDefinedOperandType::R1, VXDefinedOperandSize::V } -#define OPI_R1w { VXDefinedOperandType::R1, VXDefinedOperandSize::W } -#define OPI_R1y { VXDefinedOperandType::R1, VXDefinedOperandSize::Y } -#define OPI_R1z { VXDefinedOperandType::R1, VXDefinedOperandSize::Z } -#define OPI_R2b { VXDefinedOperandType::R2, VXDefinedOperandSize::B } -#define OPI_R2v { VXDefinedOperandType::R2, VXDefinedOperandSize::V } -#define OPI_R2w { VXDefinedOperandType::R2, VXDefinedOperandSize::W } -#define OPI_R2y { VXDefinedOperandType::R2, VXDefinedOperandSize::Y } -#define OPI_R2z { VXDefinedOperandType::R2, VXDefinedOperandSize::Z } -#define OPI_R3b { VXDefinedOperandType::R3, VXDefinedOperandSize::B } -#define OPI_R3v { VXDefinedOperandType::R3, VXDefinedOperandSize::V } -#define OPI_R3w { VXDefinedOperandType::R3, VXDefinedOperandSize::W } -#define OPI_R3y { VXDefinedOperandType::R3, VXDefinedOperandSize::Y } -#define OPI_R3z { VXDefinedOperandType::R3, VXDefinedOperandSize::Z } -#define OPI_R4b { VXDefinedOperandType::R4, VXDefinedOperandSize::B } -#define OPI_R4v { VXDefinedOperandType::R4, VXDefinedOperandSize::V } -#define OPI_R4w { VXDefinedOperandType::R4, VXDefinedOperandSize::W } -#define OPI_R4y { VXDefinedOperandType::R4, VXDefinedOperandSize::Y } -#define OPI_R4z { VXDefinedOperandType::R4, VXDefinedOperandSize::Z } -#define OPI_R5b { VXDefinedOperandType::R5, VXDefinedOperandSize::B } -#define OPI_R5v { VXDefinedOperandType::R5, VXDefinedOperandSize::V } -#define OPI_R5w { VXDefinedOperandType::R5, VXDefinedOperandSize::W } -#define OPI_R5y { VXDefinedOperandType::R5, VXDefinedOperandSize::Y } -#define OPI_R5z { VXDefinedOperandType::R5, VXDefinedOperandSize::Z } -#define OPI_R6b { VXDefinedOperandType::R6, VXDefinedOperandSize::B } -#define OPI_R6v { VXDefinedOperandType::R6, VXDefinedOperandSize::V } -#define OPI_R6w { VXDefinedOperandType::R6, VXDefinedOperandSize::W } -#define OPI_R6y { VXDefinedOperandType::R6, VXDefinedOperandSize::Y } -#define OPI_R6z { VXDefinedOperandType::R6, VXDefinedOperandSize::Z } -#define OPI_R7b { VXDefinedOperandType::R7, VXDefinedOperandSize::B } -#define OPI_R7v { VXDefinedOperandType::R7, VXDefinedOperandSize::V } -#define OPI_R7w { VXDefinedOperandType::R7, VXDefinedOperandSize::W } -#define OPI_R7y { VXDefinedOperandType::R7, VXDefinedOperandSize::Y } -#define OPI_R7z { VXDefinedOperandType::R7, VXDefinedOperandSize::Z } -#define OPI_S { VXDefinedOperandType::S, VXDefinedOperandSize::W } -#define OPI_SS { VXDefinedOperandType::SS, VXDefinedOperandSize::NA } -#define OPI_ST0 { VXDefinedOperandType::ST0, VXDefinedOperandSize::NA } -#define OPI_ST1 { VXDefinedOperandType::ST1, VXDefinedOperandSize::NA } -#define OPI_ST2 { VXDefinedOperandType::ST2, VXDefinedOperandSize::NA } -#define OPI_ST3 { VXDefinedOperandType::ST3, VXDefinedOperandSize::NA } -#define OPI_ST4 { VXDefinedOperandType::ST4, VXDefinedOperandSize::NA } -#define OPI_ST5 { VXDefinedOperandType::ST5, VXDefinedOperandSize::NA } -#define OPI_ST6 { VXDefinedOperandType::ST6, VXDefinedOperandSize::NA } -#define OPI_ST7 { VXDefinedOperandType::ST7, VXDefinedOperandSize::NA } -#define OPI_U { VXDefinedOperandType::U, VXDefinedOperandSize::O } -#define OPI_Ux { VXDefinedOperandType::U, VXDefinedOperandSize::X } -#define OPI_V { VXDefinedOperandType::V, VXDefinedOperandSize::DQ } -#define OPI_Vdq { VXDefinedOperandType::V, VXDefinedOperandSize::DQ } -#define OPI_Vqq { VXDefinedOperandType::V, VXDefinedOperandSize::QQ } -#define OPI_Vsd { VXDefinedOperandType::V, VXDefinedOperandSize::Q } -#define OPI_Vx { VXDefinedOperandType::V, VXDefinedOperandSize::X } -#define OPI_W { VXDefinedOperandType::W, VXDefinedOperandSize::DQ } -#define OPI_Wdq { VXDefinedOperandType::W, VXDefinedOperandSize::DQ } -#define OPI_Wqq { VXDefinedOperandType::W, VXDefinedOperandSize::QQ } -#define OPI_Wsd { VXDefinedOperandType::W, VXDefinedOperandSize::Q } -#define OPI_Wx { VXDefinedOperandType::W, VXDefinedOperandSize::X } -#define OPI_eAX { VXDefinedOperandType::EAX, VXDefinedOperandSize::Z } -#define OPI_eCX { VXDefinedOperandType::ECX, VXDefinedOperandSize::Z } -#define OPI_eDX { VXDefinedOperandType::EDX, VXDefinedOperandSize::Z } -#define OPI_rAX { VXDefinedOperandType::RAX, VXDefinedOperandSize::V } -#define OPI_rCX { VXDefinedOperandType::RCX, VXDefinedOperandSize::V } -#define OPI_rDX { VXDefinedOperandType::RDX, VXDefinedOperandSize::V } -#define OPI_sIb { VXDefinedOperandType::sI, VXDefinedOperandSize::B } -#define OPI_sIz { VXDefinedOperandType::sI, VXDefinedOperandSize::Z } - -const VXInstructionDefinition instrDefinitions[] = -{ - /* 000 */ { VXInstructionMnemonic::INVALID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 001 */ { VXInstructionMnemonic::AAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 002 */ { VXInstructionMnemonic::AAD, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 003 */ { VXInstructionMnemonic::AAM, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 004 */ { VXInstructionMnemonic::AAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 005 */ { VXInstructionMnemonic::ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 006 */ { VXInstructionMnemonic::ADC, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, - /* 007 */ { VXInstructionMnemonic::ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, - /* 008 */ { VXInstructionMnemonic::ADC, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 009 */ { VXInstructionMnemonic::ADC, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 00A */ { VXInstructionMnemonic::ADC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 00B */ { VXInstructionMnemonic::ADC, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 00C */ { VXInstructionMnemonic::ADC, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 00D */ { VXInstructionMnemonic::ADC, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 00E */ { VXInstructionMnemonic::ADC, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 00F */ { VXInstructionMnemonic::ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 010 */ { VXInstructionMnemonic::ADD, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, - /* 011 */ { VXInstructionMnemonic::ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, - /* 012 */ { VXInstructionMnemonic::ADD, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 013 */ { VXInstructionMnemonic::ADD, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 014 */ { VXInstructionMnemonic::ADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 015 */ { VXInstructionMnemonic::ADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 016 */ { VXInstructionMnemonic::ADD, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 017 */ { VXInstructionMnemonic::ADD, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 018 */ { VXInstructionMnemonic::ADD, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 019 */ { VXInstructionMnemonic::ADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 01A */ { VXInstructionMnemonic::ADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 01B */ { VXInstructionMnemonic::ADDSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 01C */ { VXInstructionMnemonic::ADDSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 01D */ { VXInstructionMnemonic::ADDSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 01E */ { VXInstructionMnemonic::ADDSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 01F */ { VXInstructionMnemonic::AESDEC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 020 */ { VXInstructionMnemonic::AESDECLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 021 */ { VXInstructionMnemonic::AESENC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 022 */ { VXInstructionMnemonic::AESENCLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 023 */ { VXInstructionMnemonic::AESIMC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 024 */ { VXInstructionMnemonic::AESKEYGENASSIST, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 025 */ { VXInstructionMnemonic::AND, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 026 */ { VXInstructionMnemonic::AND, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 027 */ { VXInstructionMnemonic::AND, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 028 */ { VXInstructionMnemonic::AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 029 */ { VXInstructionMnemonic::AND, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 02A */ { VXInstructionMnemonic::AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, - /* 02B */ { VXInstructionMnemonic::AND, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 02C */ { VXInstructionMnemonic::AND, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 02D */ { VXInstructionMnemonic::AND, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 02E */ { VXInstructionMnemonic::AND, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, - /* 02F */ { VXInstructionMnemonic::ANDNPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 030 */ { VXInstructionMnemonic::ANDNPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 031 */ { VXInstructionMnemonic::ANDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 032 */ { VXInstructionMnemonic::ANDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 033 */ { VXInstructionMnemonic::ARPL, { OPI_Ew, OPI_Gw, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_OPERAND1_WRITE }, - /* 034 */ { VXInstructionMnemonic::BLENDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 035 */ { VXInstructionMnemonic::BLENDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 036 */ { VXInstructionMnemonic::BLENDVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 037 */ { VXInstructionMnemonic::BLENDVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 038 */ { VXInstructionMnemonic::BOUND, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 039 */ { VXInstructionMnemonic::BSF, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 03A */ { VXInstructionMnemonic::BSR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 03B */ { VXInstructionMnemonic::BSWAP, { OPI_R5y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 03C */ { VXInstructionMnemonic::BSWAP, { OPI_R3y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 03D */ { VXInstructionMnemonic::BSWAP, { OPI_R1y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 03E */ { VXInstructionMnemonic::BSWAP, { OPI_R4y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 03F */ { VXInstructionMnemonic::BSWAP, { OPI_R0y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 040 */ { VXInstructionMnemonic::BSWAP, { OPI_R2y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 041 */ { VXInstructionMnemonic::BSWAP, { OPI_R7y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 042 */ { VXInstructionMnemonic::BSWAP, { OPI_R6y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 043 */ { VXInstructionMnemonic::BT, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 044 */ { VXInstructionMnemonic::BT, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 045 */ { VXInstructionMnemonic::BTC, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 046 */ { VXInstructionMnemonic::BTC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 047 */ { VXInstructionMnemonic::BTR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 048 */ { VXInstructionMnemonic::BTR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 049 */ { VXInstructionMnemonic::BTS, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 04A */ { VXInstructionMnemonic::BTS, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 04B */ { VXInstructionMnemonic::CALL, { OPI_Eq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 04C */ { VXInstructionMnemonic::CALL, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 04D */ { VXInstructionMnemonic::CALL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 04E */ { VXInstructionMnemonic::CALL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, - /* 04F */ { VXInstructionMnemonic::CALL, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 050 */ { VXInstructionMnemonic::CBW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 051 */ { VXInstructionMnemonic::CDQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 052 */ { VXInstructionMnemonic::CDQE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 053 */ { VXInstructionMnemonic::CLC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 054 */ { VXInstructionMnemonic::CLD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 055 */ { VXInstructionMnemonic::CLFLUSH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 056 */ { VXInstructionMnemonic::CLGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 057 */ { VXInstructionMnemonic::CLI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 058 */ { VXInstructionMnemonic::CLTS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 059 */ { VXInstructionMnemonic::CMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 05A */ { VXInstructionMnemonic::CMOVA, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 05B */ { VXInstructionMnemonic::CMOVAE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 05C */ { VXInstructionMnemonic::CMOVB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 05D */ { VXInstructionMnemonic::CMOVBE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 05E */ { VXInstructionMnemonic::CMOVE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 05F */ { VXInstructionMnemonic::CMOVG, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 060 */ { VXInstructionMnemonic::CMOVGE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 061 */ { VXInstructionMnemonic::CMOVL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 062 */ { VXInstructionMnemonic::CMOVLE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 063 */ { VXInstructionMnemonic::CMOVNE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 064 */ { VXInstructionMnemonic::CMOVNO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 065 */ { VXInstructionMnemonic::CMOVNP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 066 */ { VXInstructionMnemonic::CMOVNS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 067 */ { VXInstructionMnemonic::CMOVO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 068 */ { VXInstructionMnemonic::CMOVP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 069 */ { VXInstructionMnemonic::CMOVS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 06A */ { VXInstructionMnemonic::CMP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 06B */ { VXInstructionMnemonic::CMP, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 06C */ { VXInstructionMnemonic::CMP, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 06D */ { VXInstructionMnemonic::CMP, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 06E */ { VXInstructionMnemonic::CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 06F */ { VXInstructionMnemonic::CMP, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 070 */ { VXInstructionMnemonic::CMP, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 }, - /* 071 */ { VXInstructionMnemonic::CMP, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 072 */ { VXInstructionMnemonic::CMP, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 073 */ { VXInstructionMnemonic::CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 }, - /* 074 */ { VXInstructionMnemonic::CMPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 075 */ { VXInstructionMnemonic::CMPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 076 */ { VXInstructionMnemonic::CMPSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 077 */ { VXInstructionMnemonic::CMPSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 078 */ { VXInstructionMnemonic::CMPSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 079 */ { VXInstructionMnemonic::CMPSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 07A */ { VXInstructionMnemonic::CMPSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 07B */ { VXInstructionMnemonic::CMPSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 07C */ { VXInstructionMnemonic::CMPXCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 07D */ { VXInstructionMnemonic::CMPXCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 07E */ { VXInstructionMnemonic::CMPXCHG16B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 07F */ { VXInstructionMnemonic::CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 080 */ { VXInstructionMnemonic::CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 081 */ { VXInstructionMnemonic::COMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 082 */ { VXInstructionMnemonic::COMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 083 */ { VXInstructionMnemonic::CPUID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 084 */ { VXInstructionMnemonic::CQO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 085 */ { VXInstructionMnemonic::CRC32, { OPI_Gy, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 086 */ { VXInstructionMnemonic::CRC32, { OPI_Gy, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 087 */ { VXInstructionMnemonic::CVTDQ2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 088 */ { VXInstructionMnemonic::CVTDQ2PS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 089 */ { VXInstructionMnemonic::CVTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 08A */ { VXInstructionMnemonic::CVTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 08B */ { VXInstructionMnemonic::CVTPD2PS, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 08C */ { VXInstructionMnemonic::CVTPI2PD, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 08D */ { VXInstructionMnemonic::CVTPI2PS, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 08E */ { VXInstructionMnemonic::CVTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 08F */ { VXInstructionMnemonic::CVTPS2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 090 */ { VXInstructionMnemonic::CVTPS2PI, { OPI_P, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 091 */ { VXInstructionMnemonic::CVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 092 */ { VXInstructionMnemonic::CVTSD2SS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 093 */ { VXInstructionMnemonic::CVTSI2SD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 094 */ { VXInstructionMnemonic::CVTSI2SS, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 095 */ { VXInstructionMnemonic::CVTSS2SD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 096 */ { VXInstructionMnemonic::CVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 097 */ { VXInstructionMnemonic::CVTTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 098 */ { VXInstructionMnemonic::CVTTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 099 */ { VXInstructionMnemonic::CVTTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 09A */ { VXInstructionMnemonic::CVTTPS2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 09B */ { VXInstructionMnemonic::CVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 09C */ { VXInstructionMnemonic::CVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 09D */ { VXInstructionMnemonic::CWD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 09E */ { VXInstructionMnemonic::CWDE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 09F */ { VXInstructionMnemonic::DAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, - /* 0A0 */ { VXInstructionMnemonic::DAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, - /* 0A1 */ { VXInstructionMnemonic::DEC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0A2 */ { VXInstructionMnemonic::DEC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0A3 */ { VXInstructionMnemonic::DEC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0A4 */ { VXInstructionMnemonic::DEC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0A5 */ { VXInstructionMnemonic::DEC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0A6 */ { VXInstructionMnemonic::DEC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0A7 */ { VXInstructionMnemonic::DEC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0A8 */ { VXInstructionMnemonic::DEC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0A9 */ { VXInstructionMnemonic::DEC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0AA */ { VXInstructionMnemonic::DEC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 0AB */ { VXInstructionMnemonic::DIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 0AC */ { VXInstructionMnemonic::DIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 0AD */ { VXInstructionMnemonic::DIVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0AE */ { VXInstructionMnemonic::DIVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0AF */ { VXInstructionMnemonic::DIVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0B0 */ { VXInstructionMnemonic::DIVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0B1 */ { VXInstructionMnemonic::DPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0B2 */ { VXInstructionMnemonic::DPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 0B3 */ { VXInstructionMnemonic::EMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 0B4 */ { VXInstructionMnemonic::ENTER, { OPI_Iw, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 }, - /* 0B5 */ { VXInstructionMnemonic::EXTRACTPS, { OPI_MdRy, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 0B6 */ { VXInstructionMnemonic::F2XM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 0B7 */ { VXInstructionMnemonic::FABS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 0B8 */ { VXInstructionMnemonic::FADD, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0B9 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0BA */ { VXInstructionMnemonic::FADD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 0BB */ { VXInstructionMnemonic::FADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 0BC */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0BD */ { VXInstructionMnemonic::FADD, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0BE */ { VXInstructionMnemonic::FADD, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0BF */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 0C0 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 0C1 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 0C2 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 0C3 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 0C4 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 0C5 */ { VXInstructionMnemonic::FADD, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 0C6 */ { VXInstructionMnemonic::FADD, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0C7 */ { VXInstructionMnemonic::FADD, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0C8 */ { VXInstructionMnemonic::FADD, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0C9 */ { VXInstructionMnemonic::FADD, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0CA */ { VXInstructionMnemonic::FADDP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0CB */ { VXInstructionMnemonic::FADDP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0CC */ { VXInstructionMnemonic::FADDP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0CD */ { VXInstructionMnemonic::FADDP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0CE */ { VXInstructionMnemonic::FADDP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0CF */ { VXInstructionMnemonic::FADDP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0D0 */ { VXInstructionMnemonic::FADDP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0D1 */ { VXInstructionMnemonic::FADDP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0D2 */ { VXInstructionMnemonic::FBLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 0D3 */ { VXInstructionMnemonic::FBSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 0D4 */ { VXInstructionMnemonic::FCHS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 0D5 */ { VXInstructionMnemonic::FCLEX, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 0D6 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 0D7 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 0D8 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 0D9 */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0DA */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 0DB */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 0DC */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 0DD */ { VXInstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 0DE */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 0DF */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 0E0 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 0E1 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 0E2 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 0E3 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 0E4 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0E5 */ { VXInstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 0E6 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0E7 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 0E8 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 0E9 */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 0EA */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 0EB */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 0EC */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 0ED */ { VXInstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 0EE */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 0EF */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 0F0 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0F1 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 0F2 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 0F3 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 0F4 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 0F5 */ { VXInstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 0F6 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 0F7 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 0F8 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 0F9 */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 0FA */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 0FB */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 0FC */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 0FD */ { VXInstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 0FE */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 0FF */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 100 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 101 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 102 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 103 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 104 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 105 */ { VXInstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 106 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 107 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 108 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 109 */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 10A */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 10B */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 10C */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 10D */ { VXInstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 10E */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 10F */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 110 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 111 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 112 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 113 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 114 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 115 */ { VXInstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 116 */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 117 */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 118 */ { VXInstructionMnemonic::FCOM, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 119 */ { VXInstructionMnemonic::FCOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 11A */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 11B */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 11C */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 11D */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 11E */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 11F */ { VXInstructionMnemonic::FCOM, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 120 */ { VXInstructionMnemonic::FCOM2, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 121 */ { VXInstructionMnemonic::FCOM2, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 122 */ { VXInstructionMnemonic::FCOM2, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 123 */ { VXInstructionMnemonic::FCOM2, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 124 */ { VXInstructionMnemonic::FCOM2, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 125 */ { VXInstructionMnemonic::FCOM2, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 126 */ { VXInstructionMnemonic::FCOM2, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 127 */ { VXInstructionMnemonic::FCOM2, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 128 */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 129 */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 12A */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 12B */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 12C */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 12D */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 12E */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 12F */ { VXInstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 130 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 131 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 132 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 133 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 134 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 135 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 136 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 137 */ { VXInstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 138 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 139 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 13A */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 13B */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 13C */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 13D */ { VXInstructionMnemonic::FCOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 13E */ { VXInstructionMnemonic::FCOMP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 13F */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 140 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 141 */ { VXInstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 142 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 143 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 144 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 145 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 146 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 147 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 148 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 149 */ { VXInstructionMnemonic::FCOMP3, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 14A */ { VXInstructionMnemonic::FCOMP5, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 14B */ { VXInstructionMnemonic::FCOMP5, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 14C */ { VXInstructionMnemonic::FCOMP5, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 14D */ { VXInstructionMnemonic::FCOMP5, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 14E */ { VXInstructionMnemonic::FCOMP5, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 14F */ { VXInstructionMnemonic::FCOMP5, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 150 */ { VXInstructionMnemonic::FCOMP5, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 151 */ { VXInstructionMnemonic::FCOMP5, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 152 */ { VXInstructionMnemonic::FCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 153 */ { VXInstructionMnemonic::FCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 154 */ { VXInstructionMnemonic::FDECSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 155 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 156 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 157 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 158 */ { VXInstructionMnemonic::FDIV, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 159 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 15A */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 15B */ { VXInstructionMnemonic::FDIV, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 15C */ { VXInstructionMnemonic::FDIV, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 15D */ { VXInstructionMnemonic::FDIV, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 15E */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 15F */ { VXInstructionMnemonic::FDIV, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 160 */ { VXInstructionMnemonic::FDIV, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 161 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 162 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 163 */ { VXInstructionMnemonic::FDIV, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 164 */ { VXInstructionMnemonic::FDIV, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 165 */ { VXInstructionMnemonic::FDIV, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 166 */ { VXInstructionMnemonic::FDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 167 */ { VXInstructionMnemonic::FDIVP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 168 */ { VXInstructionMnemonic::FDIVP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 169 */ { VXInstructionMnemonic::FDIVP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 16A */ { VXInstructionMnemonic::FDIVP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 16B */ { VXInstructionMnemonic::FDIVP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 16C */ { VXInstructionMnemonic::FDIVP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 16D */ { VXInstructionMnemonic::FDIVP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 16E */ { VXInstructionMnemonic::FDIVP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 16F */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 170 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 171 */ { VXInstructionMnemonic::FDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 172 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 173 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 174 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 175 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 176 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 177 */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 178 */ { VXInstructionMnemonic::FDIVR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 179 */ { VXInstructionMnemonic::FDIVR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 17A */ { VXInstructionMnemonic::FDIVR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 17B */ { VXInstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 17C */ { VXInstructionMnemonic::FDIVR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 17D */ { VXInstructionMnemonic::FDIVR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 17E */ { VXInstructionMnemonic::FDIVR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 17F */ { VXInstructionMnemonic::FDIVR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 180 */ { VXInstructionMnemonic::FDIVR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 181 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 182 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 183 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 184 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 185 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 186 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 187 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 188 */ { VXInstructionMnemonic::FDIVRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 189 */ { VXInstructionMnemonic::FEMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 18A */ { VXInstructionMnemonic::FFREE, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 18B */ { VXInstructionMnemonic::FFREE, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 18C */ { VXInstructionMnemonic::FFREE, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 18D */ { VXInstructionMnemonic::FFREE, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 18E */ { VXInstructionMnemonic::FFREE, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 18F */ { VXInstructionMnemonic::FFREE, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 190 */ { VXInstructionMnemonic::FFREE, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 191 */ { VXInstructionMnemonic::FFREE, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 192 */ { VXInstructionMnemonic::FFREEP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 193 */ { VXInstructionMnemonic::FFREEP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 194 */ { VXInstructionMnemonic::FFREEP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 195 */ { VXInstructionMnemonic::FFREEP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 196 */ { VXInstructionMnemonic::FFREEP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 197 */ { VXInstructionMnemonic::FFREEP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 198 */ { VXInstructionMnemonic::FFREEP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 199 */ { VXInstructionMnemonic::FFREEP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 19A */ { VXInstructionMnemonic::FIADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 19B */ { VXInstructionMnemonic::FIADD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 19C */ { VXInstructionMnemonic::FICOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 19D */ { VXInstructionMnemonic::FICOM, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 19E */ { VXInstructionMnemonic::FICOMP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 19F */ { VXInstructionMnemonic::FICOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A0 */ { VXInstructionMnemonic::FIDIV, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A1 */ { VXInstructionMnemonic::FIDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A2 */ { VXInstructionMnemonic::FIDIVR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A3 */ { VXInstructionMnemonic::FIDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A4 */ { VXInstructionMnemonic::FILD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A5 */ { VXInstructionMnemonic::FILD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A6 */ { VXInstructionMnemonic::FILD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A7 */ { VXInstructionMnemonic::FIMUL, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A8 */ { VXInstructionMnemonic::FIMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1A9 */ { VXInstructionMnemonic::FINCSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1AA */ { VXInstructionMnemonic::FIST, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1AB */ { VXInstructionMnemonic::FIST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1AC */ { VXInstructionMnemonic::FISTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1AD */ { VXInstructionMnemonic::FISTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1AE */ { VXInstructionMnemonic::FISTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1AF */ { VXInstructionMnemonic::FISTTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1B0 */ { VXInstructionMnemonic::FISTTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1B1 */ { VXInstructionMnemonic::FISTTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1B2 */ { VXInstructionMnemonic::FISUB, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1B3 */ { VXInstructionMnemonic::FISUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1B4 */ { VXInstructionMnemonic::FISUBR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1B5 */ { VXInstructionMnemonic::FISUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1B6 */ { VXInstructionMnemonic::FLD, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1B7 */ { VXInstructionMnemonic::FLD, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1B8 */ { VXInstructionMnemonic::FLD, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1B9 */ { VXInstructionMnemonic::FLD, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1BA */ { VXInstructionMnemonic::FLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1BB */ { VXInstructionMnemonic::FLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1BC */ { VXInstructionMnemonic::FLD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1BD */ { VXInstructionMnemonic::FLD, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1BE */ { VXInstructionMnemonic::FLD, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1BF */ { VXInstructionMnemonic::FLD, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C0 */ { VXInstructionMnemonic::FLD, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C1 */ { VXInstructionMnemonic::FLD1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C2 */ { VXInstructionMnemonic::FLDCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1C3 */ { VXInstructionMnemonic::FLDENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1C4 */ { VXInstructionMnemonic::FLDL2E, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C5 */ { VXInstructionMnemonic::FLDL2T, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C6 */ { VXInstructionMnemonic::FLDLG2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C7 */ { VXInstructionMnemonic::FLDLN2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C8 */ { VXInstructionMnemonic::FLDPI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1C9 */ { VXInstructionMnemonic::FLDZ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1CA */ { VXInstructionMnemonic::FMUL, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1CB */ { VXInstructionMnemonic::FMUL, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1CC */ { VXInstructionMnemonic::FMUL, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1CD */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 1CE */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1CF */ { VXInstructionMnemonic::FMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1D0 */ { VXInstructionMnemonic::FMUL, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1D1 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1D2 */ { VXInstructionMnemonic::FMUL, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1D3 */ { VXInstructionMnemonic::FMUL, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1D4 */ { VXInstructionMnemonic::FMUL, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1D5 */ { VXInstructionMnemonic::FMUL, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1D6 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 1D7 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 1D8 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 1D9 */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 1DA */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 1DB */ { VXInstructionMnemonic::FMUL, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 1DC */ { VXInstructionMnemonic::FMULP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1DD */ { VXInstructionMnemonic::FMULP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1DE */ { VXInstructionMnemonic::FMULP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1DF */ { VXInstructionMnemonic::FMULP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1E0 */ { VXInstructionMnemonic::FMULP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1E1 */ { VXInstructionMnemonic::FMULP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1E2 */ { VXInstructionMnemonic::FMULP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1E3 */ { VXInstructionMnemonic::FMULP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 1E4 */ { VXInstructionMnemonic::FNDISI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1E5 */ { VXInstructionMnemonic::FNENI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1E6 */ { VXInstructionMnemonic::FNINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1E7 */ { VXInstructionMnemonic::FNOP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1E8 */ { VXInstructionMnemonic::FNSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1E9 */ { VXInstructionMnemonic::FNSETPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1EA */ { VXInstructionMnemonic::FNSTCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1EB */ { VXInstructionMnemonic::FNSTENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1EC */ { VXInstructionMnemonic::FNSTSW, { OPI_AX, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1ED */ { VXInstructionMnemonic::FNSTSW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1EE */ { VXInstructionMnemonic::FPATAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1EF */ { VXInstructionMnemonic::FPREM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F0 */ { VXInstructionMnemonic::FPREM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F1 */ { VXInstructionMnemonic::FPTAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F2 */ { VXInstructionMnemonic::FRNDINT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F3 */ { VXInstructionMnemonic::FRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1F4 */ { VXInstructionMnemonic::FRSTPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F5 */ { VXInstructionMnemonic::FSCALE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F6 */ { VXInstructionMnemonic::FSIN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F7 */ { VXInstructionMnemonic::FSINCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F8 */ { VXInstructionMnemonic::FSQRT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1F9 */ { VXInstructionMnemonic::FST, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1FA */ { VXInstructionMnemonic::FST, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1FB */ { VXInstructionMnemonic::FST, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1FC */ { VXInstructionMnemonic::FST, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1FD */ { VXInstructionMnemonic::FST, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 1FE */ { VXInstructionMnemonic::FST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 1FF */ { VXInstructionMnemonic::FST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 200 */ { VXInstructionMnemonic::FST, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 201 */ { VXInstructionMnemonic::FST, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 202 */ { VXInstructionMnemonic::FST, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 203 */ { VXInstructionMnemonic::FSTP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 204 */ { VXInstructionMnemonic::FSTP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 205 */ { VXInstructionMnemonic::FSTP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 206 */ { VXInstructionMnemonic::FSTP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 207 */ { VXInstructionMnemonic::FSTP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 208 */ { VXInstructionMnemonic::FSTP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 209 */ { VXInstructionMnemonic::FSTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 20A */ { VXInstructionMnemonic::FSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 20B */ { VXInstructionMnemonic::FSTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 20C */ { VXInstructionMnemonic::FSTP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 20D */ { VXInstructionMnemonic::FSTP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 20E */ { VXInstructionMnemonic::FSTP1, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 20F */ { VXInstructionMnemonic::FSTP1, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 210 */ { VXInstructionMnemonic::FSTP1, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 211 */ { VXInstructionMnemonic::FSTP1, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 212 */ { VXInstructionMnemonic::FSTP1, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 213 */ { VXInstructionMnemonic::FSTP1, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 214 */ { VXInstructionMnemonic::FSTP1, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 215 */ { VXInstructionMnemonic::FSTP1, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 216 */ { VXInstructionMnemonic::FSTP8, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 217 */ { VXInstructionMnemonic::FSTP8, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 218 */ { VXInstructionMnemonic::FSTP8, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 219 */ { VXInstructionMnemonic::FSTP8, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 21A */ { VXInstructionMnemonic::FSTP8, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 21B */ { VXInstructionMnemonic::FSTP8, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 21C */ { VXInstructionMnemonic::FSTP8, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 21D */ { VXInstructionMnemonic::FSTP8, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 21E */ { VXInstructionMnemonic::FSTP9, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 21F */ { VXInstructionMnemonic::FSTP9, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 220 */ { VXInstructionMnemonic::FSTP9, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 221 */ { VXInstructionMnemonic::FSTP9, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 222 */ { VXInstructionMnemonic::FSTP9, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 223 */ { VXInstructionMnemonic::FSTP9, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 224 */ { VXInstructionMnemonic::FSTP9, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 225 */ { VXInstructionMnemonic::FSTP9, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 226 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 227 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 228 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 229 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 22A */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 22B */ { VXInstructionMnemonic::FSUB, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 22C */ { VXInstructionMnemonic::FSUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 22D */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 22E */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 22F */ { VXInstructionMnemonic::FSUB, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 230 */ { VXInstructionMnemonic::FSUB, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 231 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 232 */ { VXInstructionMnemonic::FSUB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 233 */ { VXInstructionMnemonic::FSUB, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 234 */ { VXInstructionMnemonic::FSUB, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 235 */ { VXInstructionMnemonic::FSUB, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 236 */ { VXInstructionMnemonic::FSUB, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 237 */ { VXInstructionMnemonic::FSUB, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 238 */ { VXInstructionMnemonic::FSUBP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 239 */ { VXInstructionMnemonic::FSUBP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 23A */ { VXInstructionMnemonic::FSUBP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 23B */ { VXInstructionMnemonic::FSUBP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 23C */ { VXInstructionMnemonic::FSUBP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 23D */ { VXInstructionMnemonic::FSUBP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 23E */ { VXInstructionMnemonic::FSUBP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 23F */ { VXInstructionMnemonic::FSUBP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 240 */ { VXInstructionMnemonic::FSUBR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 241 */ { VXInstructionMnemonic::FSUBR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 242 */ { VXInstructionMnemonic::FSUBR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 243 */ { VXInstructionMnemonic::FSUBR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 244 */ { VXInstructionMnemonic::FSUBR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 245 */ { VXInstructionMnemonic::FSUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 246 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 247 */ { VXInstructionMnemonic::FSUBR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 248 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 249 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 24A */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 24B */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 24C */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 24D */ { VXInstructionMnemonic::FSUBR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 24E */ { VXInstructionMnemonic::FSUBR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 24F */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 250 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 251 */ { VXInstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 252 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 253 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 254 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 255 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 256 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 257 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 258 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 259 */ { VXInstructionMnemonic::FSUBRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 25A */ { VXInstructionMnemonic::FTST, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 25B */ { VXInstructionMnemonic::FUCOM, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 25C */ { VXInstructionMnemonic::FUCOM, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 25D */ { VXInstructionMnemonic::FUCOM, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 25E */ { VXInstructionMnemonic::FUCOM, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 25F */ { VXInstructionMnemonic::FUCOM, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 260 */ { VXInstructionMnemonic::FUCOM, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 261 */ { VXInstructionMnemonic::FUCOM, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 262 */ { VXInstructionMnemonic::FUCOM, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 263 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 264 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 265 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 266 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 267 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 268 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 269 */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 26A */ { VXInstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 26B */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 26C */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 26D */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 26E */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 26F */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 270 */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 271 */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 272 */ { VXInstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 273 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 274 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 275 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 276 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 277 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 278 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 279 */ { VXInstructionMnemonic::FUCOMP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 27A */ { VXInstructionMnemonic::FUCOMP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 27B */ { VXInstructionMnemonic::FUCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 27C */ { VXInstructionMnemonic::FXAM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 27D */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, - /* 27E */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, - /* 27F */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, - /* 280 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, - /* 281 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, - /* 282 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, - /* 283 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, - /* 284 */ { VXInstructionMnemonic::FXCH, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, - /* 285 */ { VXInstructionMnemonic::FXCH4, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 286 */ { VXInstructionMnemonic::FXCH4, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 287 */ { VXInstructionMnemonic::FXCH4, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 288 */ { VXInstructionMnemonic::FXCH4, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 289 */ { VXInstructionMnemonic::FXCH4, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 28A */ { VXInstructionMnemonic::FXCH4, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 28B */ { VXInstructionMnemonic::FXCH4, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 28C */ { VXInstructionMnemonic::FXCH4, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 28D */ { VXInstructionMnemonic::FXCH7, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 28E */ { VXInstructionMnemonic::FXCH7, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 28F */ { VXInstructionMnemonic::FXCH7, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 290 */ { VXInstructionMnemonic::FXCH7, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 291 */ { VXInstructionMnemonic::FXCH7, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 292 */ { VXInstructionMnemonic::FXCH7, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 293 */ { VXInstructionMnemonic::FXCH7, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 294 */ { VXInstructionMnemonic::FXCH7, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 295 */ { VXInstructionMnemonic::FXRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 296 */ { VXInstructionMnemonic::FXSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 297 */ { VXInstructionMnemonic::FXTRACT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 298 */ { VXInstructionMnemonic::FYL2X, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 299 */ { VXInstructionMnemonic::FYL2XP1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 29A */ { VXInstructionMnemonic::GETSEC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 29B */ { VXInstructionMnemonic::HADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 29C */ { VXInstructionMnemonic::HADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 29D */ { VXInstructionMnemonic::HLT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 29E */ { VXInstructionMnemonic::HSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 29F */ { VXInstructionMnemonic::HSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2A0 */ { VXInstructionMnemonic::IDIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2A1 */ { VXInstructionMnemonic::IDIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2A2 */ { VXInstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2A3 */ { VXInstructionMnemonic::IMUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2A4 */ { VXInstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_Iz, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2A5 */ { VXInstructionMnemonic::IMUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2A6 */ { VXInstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_sIb, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2A7 */ { VXInstructionMnemonic::IN, { OPI_AL, OPI_DX, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, - /* 2A8 */ { VXInstructionMnemonic::IN, { OPI_eAX, OPI_DX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, - /* 2A9 */ { VXInstructionMnemonic::IN, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, - /* 2AA */ { VXInstructionMnemonic::IN, { OPI_eAX, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, - /* 2AB */ { VXInstructionMnemonic::INC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2AC */ { VXInstructionMnemonic::INC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2AD */ { VXInstructionMnemonic::INC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2AE */ { VXInstructionMnemonic::INC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2AF */ { VXInstructionMnemonic::INC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2B0 */ { VXInstructionMnemonic::INC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 2B1 */ { VXInstructionMnemonic::INC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2B2 */ { VXInstructionMnemonic::INC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2B3 */ { VXInstructionMnemonic::INC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2B4 */ { VXInstructionMnemonic::INC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, - /* 2B5 */ { VXInstructionMnemonic::INSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 2B6 */ { VXInstructionMnemonic::INSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 2B7 */ { VXInstructionMnemonic::INSERTPS, { OPI_V, OPI_Md, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 2B8 */ { VXInstructionMnemonic::INSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 2B9 */ { VXInstructionMnemonic::INT, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2BA */ { VXInstructionMnemonic::INT1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2BB */ { VXInstructionMnemonic::INT3, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2BC */ { VXInstructionMnemonic::INTO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, - /* 2BD */ { VXInstructionMnemonic::INVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2BE */ { VXInstructionMnemonic::INVEPT, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, - /* 2BF */ { VXInstructionMnemonic::INVEPT, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, - /* 2C0 */ { VXInstructionMnemonic::INVLPG, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2C1 */ { VXInstructionMnemonic::INVLPGA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2C2 */ { VXInstructionMnemonic::INVVPID, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, - /* 2C3 */ { VXInstructionMnemonic::INVVPID, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, - /* 2C4 */ { VXInstructionMnemonic::IRETD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 2C5 */ { VXInstructionMnemonic::IRETQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 2C6 */ { VXInstructionMnemonic::IRETW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 2C7 */ { VXInstructionMnemonic::JA, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2C8 */ { VXInstructionMnemonic::JA, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2C9 */ { VXInstructionMnemonic::JB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2CA */ { VXInstructionMnemonic::JB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2CB */ { VXInstructionMnemonic::JBE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2CC */ { VXInstructionMnemonic::JBE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2CD */ { VXInstructionMnemonic::JCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, - /* 2CE */ { VXInstructionMnemonic::JE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2CF */ { VXInstructionMnemonic::JE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2D0 */ { VXInstructionMnemonic::JECXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, - /* 2D1 */ { VXInstructionMnemonic::JG, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2D2 */ { VXInstructionMnemonic::JG, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2D3 */ { VXInstructionMnemonic::JGE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2D4 */ { VXInstructionMnemonic::JGE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2D5 */ { VXInstructionMnemonic::JL, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2D6 */ { VXInstructionMnemonic::JL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2D7 */ { VXInstructionMnemonic::JLE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2D8 */ { VXInstructionMnemonic::JLE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2D9 */ { VXInstructionMnemonic::JMP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 2DA */ { VXInstructionMnemonic::JMP, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2DB */ { VXInstructionMnemonic::JMP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, - /* 2DC */ { VXInstructionMnemonic::JMP, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 2DD */ { VXInstructionMnemonic::JMP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 }, - /* 2DE */ { VXInstructionMnemonic::JNB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2DF */ { VXInstructionMnemonic::JNB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2E0 */ { VXInstructionMnemonic::JNE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2E1 */ { VXInstructionMnemonic::JNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2E2 */ { VXInstructionMnemonic::JNO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2E3 */ { VXInstructionMnemonic::JNO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2E4 */ { VXInstructionMnemonic::JNP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2E5 */ { VXInstructionMnemonic::JNP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2E6 */ { VXInstructionMnemonic::JNS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2E7 */ { VXInstructionMnemonic::JNS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2E8 */ { VXInstructionMnemonic::JO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2E9 */ { VXInstructionMnemonic::JO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2EA */ { VXInstructionMnemonic::JP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2EB */ { VXInstructionMnemonic::JP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2EC */ { VXInstructionMnemonic::JRCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, - /* 2ED */ { VXInstructionMnemonic::JS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2EE */ { VXInstructionMnemonic::JS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 2EF */ { VXInstructionMnemonic::LAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2F0 */ { VXInstructionMnemonic::LAR, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 2F1 */ { VXInstructionMnemonic::LDDQU, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 2F2 */ { VXInstructionMnemonic::LDMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2F3 */ { VXInstructionMnemonic::LDS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, - /* 2F4 */ { VXInstructionMnemonic::LEA, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 2F5 */ { VXInstructionMnemonic::LEAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2F6 */ { VXInstructionMnemonic::LES, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, - /* 2F7 */ { VXInstructionMnemonic::LFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 2F8 */ { VXInstructionMnemonic::LFS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 2F9 */ { VXInstructionMnemonic::LGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2FA */ { VXInstructionMnemonic::LGS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 2FB */ { VXInstructionMnemonic::LIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2FC */ { VXInstructionMnemonic::LLDT, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2FD */ { VXInstructionMnemonic::LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2FE */ { VXInstructionMnemonic::LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 2FF */ { VXInstructionMnemonic::LOCK, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 300 */ { VXInstructionMnemonic::LODSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 301 */ { VXInstructionMnemonic::LODSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 302 */ { VXInstructionMnemonic::LODSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 303 */ { VXInstructionMnemonic::LODSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 304 */ { VXInstructionMnemonic::LOOP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 305 */ { VXInstructionMnemonic::LOOPE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 306 */ { VXInstructionMnemonic::LOOPNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 307 */ { VXInstructionMnemonic::LSL, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 308 */ { VXInstructionMnemonic::LSS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 309 */ { VXInstructionMnemonic::LTR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 30A */ { VXInstructionMnemonic::MASKMOVDQU, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 30B */ { VXInstructionMnemonic::MASKMOVQ, { OPI_P, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 30C */ { VXInstructionMnemonic::MAXPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 30D */ { VXInstructionMnemonic::MAXPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 30E */ { VXInstructionMnemonic::MAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 30F */ { VXInstructionMnemonic::MAXSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 310 */ { VXInstructionMnemonic::MFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 311 */ { VXInstructionMnemonic::MINPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 312 */ { VXInstructionMnemonic::MINPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 313 */ { VXInstructionMnemonic::MINSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 314 */ { VXInstructionMnemonic::MINSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 315 */ { VXInstructionMnemonic::MONITOR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 316 */ { VXInstructionMnemonic::MONTMUL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 317 */ { VXInstructionMnemonic::MOV, { OPI_R0b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 318 */ { VXInstructionMnemonic::MOV, { OPI_R2b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 319 */ { VXInstructionMnemonic::MOV, { OPI_R3b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 31A */ { VXInstructionMnemonic::MOV, { OPI_R1b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 31B */ { VXInstructionMnemonic::MOV, { OPI_AL, OPI_Ob, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, - /* 31C */ { VXInstructionMnemonic::MOV, { OPI_S, OPI_MwRv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 31D */ { VXInstructionMnemonic::MOV, { OPI_MwRv, OPI_S, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 31E */ { VXInstructionMnemonic::MOV, { OPI_Ov, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, - /* 31F */ { VXInstructionMnemonic::MOV, { OPI_Ob, OPI_AL, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, - /* 320 */ { VXInstructionMnemonic::MOV, { OPI_rAX, OPI_Ov, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, - /* 321 */ { VXInstructionMnemonic::MOV, { OPI_R4b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 322 */ { VXInstructionMnemonic::MOV, { OPI_R7v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 323 */ { VXInstructionMnemonic::MOV, { OPI_R6v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 324 */ { VXInstructionMnemonic::MOV, { OPI_R5v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 325 */ { VXInstructionMnemonic::MOV, { OPI_R, OPI_C, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 326 */ { VXInstructionMnemonic::MOV, { OPI_D, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 327 */ { VXInstructionMnemonic::MOV, { OPI_C, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 328 */ { VXInstructionMnemonic::MOV, { OPI_R, OPI_D, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 329 */ { VXInstructionMnemonic::MOV, { OPI_R4v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 32A */ { VXInstructionMnemonic::MOV, { OPI_R7b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 32B */ { VXInstructionMnemonic::MOV, { OPI_R6b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 32C */ { VXInstructionMnemonic::MOV, { OPI_R5b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 32D */ { VXInstructionMnemonic::MOV, { OPI_R0v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 32E */ { VXInstructionMnemonic::MOV, { OPI_R3v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 32F */ { VXInstructionMnemonic::MOV, { OPI_R2v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 330 */ { VXInstructionMnemonic::MOV, { OPI_R1v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 331 */ { VXInstructionMnemonic::MOV, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 332 */ { VXInstructionMnemonic::MOV, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 333 */ { VXInstructionMnemonic::MOV, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 334 */ { VXInstructionMnemonic::MOV, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 335 */ { VXInstructionMnemonic::MOV, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 336 */ { VXInstructionMnemonic::MOV, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 337 */ { VXInstructionMnemonic::MOVAPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 338 */ { VXInstructionMnemonic::MOVAPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 339 */ { VXInstructionMnemonic::MOVAPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 33A */ { VXInstructionMnemonic::MOVAPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 33B */ { VXInstructionMnemonic::MOVBE, { OPI_Gv, OPI_Mv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 33C */ { VXInstructionMnemonic::MOVBE, { OPI_Mv, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 33D */ { VXInstructionMnemonic::MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 33E */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 33F */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 340 */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 341 */ { VXInstructionMnemonic::MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 342 */ { VXInstructionMnemonic::MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 343 */ { VXInstructionMnemonic::MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 344 */ { VXInstructionMnemonic::MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 345 */ { VXInstructionMnemonic::MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 346 */ { VXInstructionMnemonic::MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 347 */ { VXInstructionMnemonic::MOVDQ2Q, { OPI_P, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 348 */ { VXInstructionMnemonic::MOVDQA, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 349 */ { VXInstructionMnemonic::MOVDQA, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 34A */ { VXInstructionMnemonic::MOVDQU, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 34B */ { VXInstructionMnemonic::MOVDQU, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 34C */ { VXInstructionMnemonic::MOVHLPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 34D */ { VXInstructionMnemonic::MOVHPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 34E */ { VXInstructionMnemonic::MOVHPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 34F */ { VXInstructionMnemonic::MOVHPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 350 */ { VXInstructionMnemonic::MOVHPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 351 */ { VXInstructionMnemonic::MOVLHPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 352 */ { VXInstructionMnemonic::MOVLPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 353 */ { VXInstructionMnemonic::MOVLPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 354 */ { VXInstructionMnemonic::MOVLPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 355 */ { VXInstructionMnemonic::MOVLPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 356 */ { VXInstructionMnemonic::MOVMSKPD, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 357 */ { VXInstructionMnemonic::MOVMSKPS, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 358 */ { VXInstructionMnemonic::MOVNTDQ, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 359 */ { VXInstructionMnemonic::MOVNTDQA, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 35A */ { VXInstructionMnemonic::MOVNTI, { OPI_M, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 35B */ { VXInstructionMnemonic::MOVNTPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 35C */ { VXInstructionMnemonic::MOVNTPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 35D */ { VXInstructionMnemonic::MOVNTQ, { OPI_M, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 35E */ { VXInstructionMnemonic::MOVQ, { OPI_P, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 35F */ { VXInstructionMnemonic::MOVQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 360 */ { VXInstructionMnemonic::MOVQ, { OPI_Eq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 361 */ { VXInstructionMnemonic::MOVQ, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 362 */ { VXInstructionMnemonic::MOVQ, { OPI_Q, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 363 */ { VXInstructionMnemonic::MOVQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 364 */ { VXInstructionMnemonic::MOVQ, { OPI_V, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 365 */ { VXInstructionMnemonic::MOVQ, { OPI_Eq, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 366 */ { VXInstructionMnemonic::MOVQ2DQ, { OPI_V, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_OPERAND1_WRITE }, - /* 367 */ { VXInstructionMnemonic::MOVSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_OPERAND1_WRITE }, - /* 368 */ { VXInstructionMnemonic::MOVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 369 */ { VXInstructionMnemonic::MOVSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, - /* 36A */ { VXInstructionMnemonic::MOVSD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 36B */ { VXInstructionMnemonic::MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 36C */ { VXInstructionMnemonic::MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 36D */ { VXInstructionMnemonic::MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 36E */ { VXInstructionMnemonic::MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 36F */ { VXInstructionMnemonic::MOVSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, - /* 370 */ { VXInstructionMnemonic::MOVSS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 371 */ { VXInstructionMnemonic::MOVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 372 */ { VXInstructionMnemonic::MOVSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, - /* 373 */ { VXInstructionMnemonic::MOVSX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 374 */ { VXInstructionMnemonic::MOVSX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 375 */ { VXInstructionMnemonic::MOVSXD, { OPI_Gq, OPI_Ed, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 376 */ { VXInstructionMnemonic::MOVUPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 377 */ { VXInstructionMnemonic::MOVUPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 378 */ { VXInstructionMnemonic::MOVUPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 379 */ { VXInstructionMnemonic::MOVUPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 37A */ { VXInstructionMnemonic::MOVZX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 37B */ { VXInstructionMnemonic::MOVZX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 37C */ { VXInstructionMnemonic::MPSADBW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 37D */ { VXInstructionMnemonic::MUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 37E */ { VXInstructionMnemonic::MUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 37F */ { VXInstructionMnemonic::MULPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 380 */ { VXInstructionMnemonic::MULPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 381 */ { VXInstructionMnemonic::MULSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 382 */ { VXInstructionMnemonic::MULSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 383 */ { VXInstructionMnemonic::MWAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 384 */ { VXInstructionMnemonic::NEG, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 385 */ { VXInstructionMnemonic::NEG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 386 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 387 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 388 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 389 */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 38A */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 38B */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 38C */ { VXInstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 38D */ { VXInstructionMnemonic::NOT, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 38E */ { VXInstructionMnemonic::NOT, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 38F */ { VXInstructionMnemonic::OR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, - /* 390 */ { VXInstructionMnemonic::OR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 391 */ { VXInstructionMnemonic::OR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 392 */ { VXInstructionMnemonic::OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 393 */ { VXInstructionMnemonic::OR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 394 */ { VXInstructionMnemonic::OR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 395 */ { VXInstructionMnemonic::OR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 396 */ { VXInstructionMnemonic::OR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 397 */ { VXInstructionMnemonic::OR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 398 */ { VXInstructionMnemonic::OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 399 */ { VXInstructionMnemonic::ORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 39A */ { VXInstructionMnemonic::ORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 39B */ { VXInstructionMnemonic::OUT, { OPI_DX, OPI_AL, OPI_NONE, OPI_NONE }, 0 }, - /* 39C */ { VXInstructionMnemonic::OUT, { OPI_DX, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 39D */ { VXInstructionMnemonic::OUT, { OPI_Ib, OPI_AL, OPI_NONE, OPI_NONE }, 0 }, - /* 39E */ { VXInstructionMnemonic::OUT, { OPI_Ib, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 39F */ { VXInstructionMnemonic::OUTSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 3A0 */ { VXInstructionMnemonic::OUTSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 3A1 */ { VXInstructionMnemonic::OUTSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 3A2 */ { VXInstructionMnemonic::PABSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3A3 */ { VXInstructionMnemonic::PABSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3A4 */ { VXInstructionMnemonic::PABSD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3A5 */ { VXInstructionMnemonic::PABSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3A6 */ { VXInstructionMnemonic::PABSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3A7 */ { VXInstructionMnemonic::PABSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3A8 */ { VXInstructionMnemonic::PACKSSDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3A9 */ { VXInstructionMnemonic::PACKSSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3AA */ { VXInstructionMnemonic::PACKSSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3AB */ { VXInstructionMnemonic::PACKSSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3AC */ { VXInstructionMnemonic::PACKUSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3AD */ { VXInstructionMnemonic::PACKUSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3AE */ { VXInstructionMnemonic::PACKUSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3AF */ { VXInstructionMnemonic::PADDB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B0 */ { VXInstructionMnemonic::PADDB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B1 */ { VXInstructionMnemonic::PADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B2 */ { VXInstructionMnemonic::PADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B3 */ { VXInstructionMnemonic::PADDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B4 */ { VXInstructionMnemonic::PADDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B5 */ { VXInstructionMnemonic::PADDSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B6 */ { VXInstructionMnemonic::PADDSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B7 */ { VXInstructionMnemonic::PADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B8 */ { VXInstructionMnemonic::PADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3B9 */ { VXInstructionMnemonic::PADDUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3BA */ { VXInstructionMnemonic::PADDUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3BB */ { VXInstructionMnemonic::PADDUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3BC */ { VXInstructionMnemonic::PADDUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3BD */ { VXInstructionMnemonic::PADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3BE */ { VXInstructionMnemonic::PADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3BF */ { VXInstructionMnemonic::PALIGNR, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C0 */ { VXInstructionMnemonic::PALIGNR, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C1 */ { VXInstructionMnemonic::PAND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C2 */ { VXInstructionMnemonic::PAND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C3 */ { VXInstructionMnemonic::PANDN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C4 */ { VXInstructionMnemonic::PANDN, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C5 */ { VXInstructionMnemonic::PAVGB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C6 */ { VXInstructionMnemonic::PAVGB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C7 */ { VXInstructionMnemonic::PAVGUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C8 */ { VXInstructionMnemonic::PAVGW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3C9 */ { VXInstructionMnemonic::PAVGW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3CA */ { VXInstructionMnemonic::PBLENDVB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3CB */ { VXInstructionMnemonic::PBLENDW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3CC */ { VXInstructionMnemonic::PCLMULQDQ, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3CD */ { VXInstructionMnemonic::PCMPEQB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3CE */ { VXInstructionMnemonic::PCMPEQB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3CF */ { VXInstructionMnemonic::PCMPEQD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3D0 */ { VXInstructionMnemonic::PCMPEQD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3D1 */ { VXInstructionMnemonic::PCMPEQQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 3D2 */ { VXInstructionMnemonic::PCMPEQW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3D3 */ { VXInstructionMnemonic::PCMPEQW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3D4 */ { VXInstructionMnemonic::PCMPESTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 3D5 */ { VXInstructionMnemonic::PCMPESTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 3D6 */ { VXInstructionMnemonic::PCMPGTB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3D7 */ { VXInstructionMnemonic::PCMPGTB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3D8 */ { VXInstructionMnemonic::PCMPGTD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3D9 */ { VXInstructionMnemonic::PCMPGTD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3DA */ { VXInstructionMnemonic::PCMPGTQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 3DB */ { VXInstructionMnemonic::PCMPGTW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3DC */ { VXInstructionMnemonic::PCMPGTW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3DD */ { VXInstructionMnemonic::PCMPISTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 3DE */ { VXInstructionMnemonic::PCMPISTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 3DF */ { VXInstructionMnemonic::PEXTRB, { OPI_MbRv, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 3E0 */ { VXInstructionMnemonic::PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3E1 */ { VXInstructionMnemonic::PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3E2 */ { VXInstructionMnemonic::PEXTRQ, { OPI_Eq, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 3E3 */ { VXInstructionMnemonic::PEXTRW, { OPI_MwRd, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3E4 */ { VXInstructionMnemonic::PEXTRW, { OPI_Gd, OPI_N, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3E5 */ { VXInstructionMnemonic::PEXTRW, { OPI_Gd, OPI_U, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3E6 */ { VXInstructionMnemonic::PF2ID, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3E7 */ { VXInstructionMnemonic::PF2IW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3E8 */ { VXInstructionMnemonic::PFACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3E9 */ { VXInstructionMnemonic::PFADD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3EA */ { VXInstructionMnemonic::PFCMPEQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3EB */ { VXInstructionMnemonic::PFCMPGE, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3EC */ { VXInstructionMnemonic::PFCMPGT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3ED */ { VXInstructionMnemonic::PFMAX, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3EE */ { VXInstructionMnemonic::PFMIN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3EF */ { VXInstructionMnemonic::PFMUL, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3F0 */ { VXInstructionMnemonic::PFNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3F1 */ { VXInstructionMnemonic::PFPNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3F2 */ { VXInstructionMnemonic::PFRCP, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3F3 */ { VXInstructionMnemonic::PFRCPIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3F4 */ { VXInstructionMnemonic::PFRCPIT2, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3F5 */ { VXInstructionMnemonic::PFRSQIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3F6 */ { VXInstructionMnemonic::PFRSQRT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 3F7 */ { VXInstructionMnemonic::PFSUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3F8 */ { VXInstructionMnemonic::PFSUBR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3F9 */ { VXInstructionMnemonic::PHADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3FA */ { VXInstructionMnemonic::PHADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3FB */ { VXInstructionMnemonic::PHADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3FC */ { VXInstructionMnemonic::PHADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3FD */ { VXInstructionMnemonic::PHADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3FE */ { VXInstructionMnemonic::PHADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 3FF */ { VXInstructionMnemonic::PHMINPOSUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 400 */ { VXInstructionMnemonic::PHSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 401 */ { VXInstructionMnemonic::PHSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 402 */ { VXInstructionMnemonic::PHSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 403 */ { VXInstructionMnemonic::PHSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 404 */ { VXInstructionMnemonic::PHSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 405 */ { VXInstructionMnemonic::PHSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 406 */ { VXInstructionMnemonic::PI2FD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 407 */ { VXInstructionMnemonic::PI2FW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 408 */ { VXInstructionMnemonic::PINSRB, { OPI_V, OPI_MbRd, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 409 */ { VXInstructionMnemonic::PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 40A */ { VXInstructionMnemonic::PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 40B */ { VXInstructionMnemonic::PINSRQ, { OPI_V, OPI_Eq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 40C */ { VXInstructionMnemonic::PINSRW, { OPI_V, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 40D */ { VXInstructionMnemonic::PINSRW, { OPI_P, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 40E */ { VXInstructionMnemonic::PMADDUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 40F */ { VXInstructionMnemonic::PMADDUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 410 */ { VXInstructionMnemonic::PMADDWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 411 */ { VXInstructionMnemonic::PMADDWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 412 */ { VXInstructionMnemonic::PMAXSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 413 */ { VXInstructionMnemonic::PMAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 414 */ { VXInstructionMnemonic::PMAXSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 415 */ { VXInstructionMnemonic::PMAXSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 416 */ { VXInstructionMnemonic::PMAXUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 417 */ { VXInstructionMnemonic::PMAXUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 418 */ { VXInstructionMnemonic::PMAXUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 419 */ { VXInstructionMnemonic::PMAXUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 41A */ { VXInstructionMnemonic::PMINSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 41B */ { VXInstructionMnemonic::PMINSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 41C */ { VXInstructionMnemonic::PMINSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 41D */ { VXInstructionMnemonic::PMINSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 41E */ { VXInstructionMnemonic::PMINUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 41F */ { VXInstructionMnemonic::PMINUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 420 */ { VXInstructionMnemonic::PMINUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 421 */ { VXInstructionMnemonic::PMINUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 422 */ { VXInstructionMnemonic::PMOVMSKB, { OPI_Gd, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 423 */ { VXInstructionMnemonic::PMOVMSKB, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 424 */ { VXInstructionMnemonic::PMOVSXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 425 */ { VXInstructionMnemonic::PMOVSXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 426 */ { VXInstructionMnemonic::PMOVSXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 427 */ { VXInstructionMnemonic::PMOVSXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 428 */ { VXInstructionMnemonic::PMOVSXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 429 */ { VXInstructionMnemonic::PMOVSXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 42A */ { VXInstructionMnemonic::PMOVZXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 42B */ { VXInstructionMnemonic::PMOVZXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 42C */ { VXInstructionMnemonic::PMOVZXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 42D */ { VXInstructionMnemonic::PMOVZXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 42E */ { VXInstructionMnemonic::PMOVZXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 42F */ { VXInstructionMnemonic::PMOVZXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 430 */ { VXInstructionMnemonic::PMULDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 431 */ { VXInstructionMnemonic::PMULHRSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 432 */ { VXInstructionMnemonic::PMULHRSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 433 */ { VXInstructionMnemonic::PMULHRW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 434 */ { VXInstructionMnemonic::PMULHUW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 435 */ { VXInstructionMnemonic::PMULHUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 436 */ { VXInstructionMnemonic::PMULHW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 437 */ { VXInstructionMnemonic::PMULHW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 438 */ { VXInstructionMnemonic::PMULLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 439 */ { VXInstructionMnemonic::PMULLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 43A */ { VXInstructionMnemonic::PMULLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 43B */ { VXInstructionMnemonic::PMULUDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 43C */ { VXInstructionMnemonic::PMULUDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 43D */ { VXInstructionMnemonic::POP, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 43E */ { VXInstructionMnemonic::POP, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 43F */ { VXInstructionMnemonic::POP, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 440 */ { VXInstructionMnemonic::POP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 441 */ { VXInstructionMnemonic::POP, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 442 */ { VXInstructionMnemonic::POP, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 443 */ { VXInstructionMnemonic::POP, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, - /* 444 */ { VXInstructionMnemonic::POP, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, - /* 445 */ { VXInstructionMnemonic::POP, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, - /* 446 */ { VXInstructionMnemonic::POP, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, - /* 447 */ { VXInstructionMnemonic::POP, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 448 */ { VXInstructionMnemonic::POP, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 449 */ { VXInstructionMnemonic::POP, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 44A */ { VXInstructionMnemonic::POP, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, - /* 44B */ { VXInstructionMnemonic::POPA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, - /* 44C */ { VXInstructionMnemonic::POPAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, - /* 44D */ { VXInstructionMnemonic::POPCNT, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 44E */ { VXInstructionMnemonic::POPFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 44F */ { VXInstructionMnemonic::POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 450 */ { VXInstructionMnemonic::POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 451 */ { VXInstructionMnemonic::POPFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 452 */ { VXInstructionMnemonic::POR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 453 */ { VXInstructionMnemonic::POR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 454 */ { VXInstructionMnemonic::PREFETCH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 455 */ { VXInstructionMnemonic::PREFETCHNTA, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 456 */ { VXInstructionMnemonic::PREFETCHT0, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 457 */ { VXInstructionMnemonic::PREFETCHT1, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 458 */ { VXInstructionMnemonic::PREFETCHT2, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 459 */ { VXInstructionMnemonic::PSADBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 45A */ { VXInstructionMnemonic::PSADBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 45B */ { VXInstructionMnemonic::PSHUFB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 45C */ { VXInstructionMnemonic::PSHUFB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 45D */ { VXInstructionMnemonic::PSHUFD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 45E */ { VXInstructionMnemonic::PSHUFHW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 45F */ { VXInstructionMnemonic::PSHUFLW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 460 */ { VXInstructionMnemonic::PSHUFW, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 461 */ { VXInstructionMnemonic::PSIGNB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 462 */ { VXInstructionMnemonic::PSIGNB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 463 */ { VXInstructionMnemonic::PSIGND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 464 */ { VXInstructionMnemonic::PSIGND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 465 */ { VXInstructionMnemonic::PSIGNW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 466 */ { VXInstructionMnemonic::PSIGNW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 467 */ { VXInstructionMnemonic::PSLLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 468 */ { VXInstructionMnemonic::PSLLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 469 */ { VXInstructionMnemonic::PSLLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 46A */ { VXInstructionMnemonic::PSLLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 46B */ { VXInstructionMnemonic::PSLLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 46C */ { VXInstructionMnemonic::PSLLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 46D */ { VXInstructionMnemonic::PSLLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 46E */ { VXInstructionMnemonic::PSLLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 46F */ { VXInstructionMnemonic::PSLLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 470 */ { VXInstructionMnemonic::PSLLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 471 */ { VXInstructionMnemonic::PSLLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 472 */ { VXInstructionMnemonic::PSLLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 473 */ { VXInstructionMnemonic::PSLLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 474 */ { VXInstructionMnemonic::PSRAD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 475 */ { VXInstructionMnemonic::PSRAD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 476 */ { VXInstructionMnemonic::PSRAD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 477 */ { VXInstructionMnemonic::PSRAD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 478 */ { VXInstructionMnemonic::PSRAW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 479 */ { VXInstructionMnemonic::PSRAW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 47A */ { VXInstructionMnemonic::PSRAW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 47B */ { VXInstructionMnemonic::PSRAW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 47C */ { VXInstructionMnemonic::PSRLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 47D */ { VXInstructionMnemonic::PSRLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 47E */ { VXInstructionMnemonic::PSRLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 47F */ { VXInstructionMnemonic::PSRLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 480 */ { VXInstructionMnemonic::PSRLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 481 */ { VXInstructionMnemonic::PSRLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 482 */ { VXInstructionMnemonic::PSRLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 483 */ { VXInstructionMnemonic::PSRLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 484 */ { VXInstructionMnemonic::PSRLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 485 */ { VXInstructionMnemonic::PSRLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 486 */ { VXInstructionMnemonic::PSRLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 487 */ { VXInstructionMnemonic::PSRLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 488 */ { VXInstructionMnemonic::PSRLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 489 */ { VXInstructionMnemonic::PSUBB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 48A */ { VXInstructionMnemonic::PSUBB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 48B */ { VXInstructionMnemonic::PSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 48C */ { VXInstructionMnemonic::PSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 48D */ { VXInstructionMnemonic::PSUBQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 48E */ { VXInstructionMnemonic::PSUBQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 48F */ { VXInstructionMnemonic::PSUBSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 490 */ { VXInstructionMnemonic::PSUBSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 491 */ { VXInstructionMnemonic::PSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 492 */ { VXInstructionMnemonic::PSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 493 */ { VXInstructionMnemonic::PSUBUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 494 */ { VXInstructionMnemonic::PSUBUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 495 */ { VXInstructionMnemonic::PSUBUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 496 */ { VXInstructionMnemonic::PSUBUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 497 */ { VXInstructionMnemonic::PSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 498 */ { VXInstructionMnemonic::PSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 499 */ { VXInstructionMnemonic::PSWAPD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 49A */ { VXInstructionMnemonic::PTEST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 49B */ { VXInstructionMnemonic::PUNPCKHBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 49C */ { VXInstructionMnemonic::PUNPCKHBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 49D */ { VXInstructionMnemonic::PUNPCKHDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 49E */ { VXInstructionMnemonic::PUNPCKHDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 49F */ { VXInstructionMnemonic::PUNPCKHQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A0 */ { VXInstructionMnemonic::PUNPCKHWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A1 */ { VXInstructionMnemonic::PUNPCKHWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A2 */ { VXInstructionMnemonic::PUNPCKLBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A3 */ { VXInstructionMnemonic::PUNPCKLBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A4 */ { VXInstructionMnemonic::PUNPCKLDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A5 */ { VXInstructionMnemonic::PUNPCKLDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A6 */ { VXInstructionMnemonic::PUNPCKLQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A7 */ { VXInstructionMnemonic::PUNPCKLWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A8 */ { VXInstructionMnemonic::PUNPCKLWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4A9 */ { VXInstructionMnemonic::PUSH, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, - /* 4AA */ { VXInstructionMnemonic::PUSH, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, - /* 4AB */ { VXInstructionMnemonic::PUSH, { OPI_sIb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, - /* 4AC */ { VXInstructionMnemonic::PUSH, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, - /* 4AD */ { VXInstructionMnemonic::PUSH, { OPI_CS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, - /* 4AE */ { VXInstructionMnemonic::PUSH, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4AF */ { VXInstructionMnemonic::PUSH, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4B0 */ { VXInstructionMnemonic::PUSH, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4B1 */ { VXInstructionMnemonic::PUSH, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4B2 */ { VXInstructionMnemonic::PUSH, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4B3 */ { VXInstructionMnemonic::PUSH, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4B4 */ { VXInstructionMnemonic::PUSH, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4B5 */ { VXInstructionMnemonic::PUSH, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4B6 */ { VXInstructionMnemonic::PUSH, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4B7 */ { VXInstructionMnemonic::PUSH, { OPI_sIz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, - /* 4B8 */ { VXInstructionMnemonic::PUSH, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4B9 */ { VXInstructionMnemonic::PUSH, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 4BA */ { VXInstructionMnemonic::PUSHA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, - /* 4BB */ { VXInstructionMnemonic::PUSHAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, - /* 4BC */ { VXInstructionMnemonic::PUSHFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 4BD */ { VXInstructionMnemonic::PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, - /* 4BE */ { VXInstructionMnemonic::PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, - /* 4BF */ { VXInstructionMnemonic::PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, - /* 4C0 */ { VXInstructionMnemonic::PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, - /* 4C1 */ { VXInstructionMnemonic::PXOR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C2 */ { VXInstructionMnemonic::PXOR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C3 */ { VXInstructionMnemonic::RCL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C4 */ { VXInstructionMnemonic::RCL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C5 */ { VXInstructionMnemonic::RCL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C6 */ { VXInstructionMnemonic::RCL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C7 */ { VXInstructionMnemonic::RCL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C8 */ { VXInstructionMnemonic::RCL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4C9 */ { VXInstructionMnemonic::RCPPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4CA */ { VXInstructionMnemonic::RCPSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4CB */ { VXInstructionMnemonic::RCR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4CC */ { VXInstructionMnemonic::RCR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4CD */ { VXInstructionMnemonic::RCR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4CE */ { VXInstructionMnemonic::RCR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4CF */ { VXInstructionMnemonic::RCR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4D0 */ { VXInstructionMnemonic::RCR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4D1 */ { VXInstructionMnemonic::RDMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4D2 */ { VXInstructionMnemonic::RDPMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4D3 */ { VXInstructionMnemonic::RDRAND, { OPI_R, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4D4 */ { VXInstructionMnemonic::RDTSC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4D5 */ { VXInstructionMnemonic::RDTSCP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4D6 */ { VXInstructionMnemonic::REP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4D7 */ { VXInstructionMnemonic::REPNE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4D8 */ { VXInstructionMnemonic::RET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4D9 */ { VXInstructionMnemonic::RET, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4DA */ { VXInstructionMnemonic::RETF, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4DB */ { VXInstructionMnemonic::RETF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4DC */ { VXInstructionMnemonic::ROL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4DD */ { VXInstructionMnemonic::ROL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4DE */ { VXInstructionMnemonic::ROL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4DF */ { VXInstructionMnemonic::ROL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E0 */ { VXInstructionMnemonic::ROL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E1 */ { VXInstructionMnemonic::ROL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E2 */ { VXInstructionMnemonic::ROR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E3 */ { VXInstructionMnemonic::ROR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E4 */ { VXInstructionMnemonic::ROR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E5 */ { VXInstructionMnemonic::ROR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E6 */ { VXInstructionMnemonic::ROR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E7 */ { VXInstructionMnemonic::ROR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4E8 */ { VXInstructionMnemonic::ROUNDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4E9 */ { VXInstructionMnemonic::ROUNDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4EA */ { VXInstructionMnemonic::ROUNDSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4EB */ { VXInstructionMnemonic::ROUNDSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4EC */ { VXInstructionMnemonic::RSM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4ED */ { VXInstructionMnemonic::RSQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4EE */ { VXInstructionMnemonic::RSQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4EF */ { VXInstructionMnemonic::SAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 4F0 */ { VXInstructionMnemonic::SALC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, - /* 4F1 */ { VXInstructionMnemonic::SAR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4F2 */ { VXInstructionMnemonic::SAR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4F3 */ { VXInstructionMnemonic::SAR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4F4 */ { VXInstructionMnemonic::SAR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4F5 */ { VXInstructionMnemonic::SAR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4F6 */ { VXInstructionMnemonic::SAR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 4F7 */ { VXInstructionMnemonic::SBB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4F8 */ { VXInstructionMnemonic::SBB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4F9 */ { VXInstructionMnemonic::SBB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, - /* 4FA */ { VXInstructionMnemonic::SBB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, - /* 4FB */ { VXInstructionMnemonic::SBB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4FC */ { VXInstructionMnemonic::SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_WRITE }, - /* 4FD */ { VXInstructionMnemonic::SBB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4FE */ { VXInstructionMnemonic::SBB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 4FF */ { VXInstructionMnemonic::SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 500 */ { VXInstructionMnemonic::SBB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 501 */ { VXInstructionMnemonic::SCASB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 502 */ { VXInstructionMnemonic::SCASD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 503 */ { VXInstructionMnemonic::SCASQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 504 */ { VXInstructionMnemonic::SCASW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 505 */ { VXInstructionMnemonic::SETA, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 506 */ { VXInstructionMnemonic::SETAE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 507 */ { VXInstructionMnemonic::SETB, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 508 */ { VXInstructionMnemonic::SETBE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 509 */ { VXInstructionMnemonic::SETE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 50A */ { VXInstructionMnemonic::SETG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 50B */ { VXInstructionMnemonic::SETGE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 50C */ { VXInstructionMnemonic::SETL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 50D */ { VXInstructionMnemonic::SETLE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 50E */ { VXInstructionMnemonic::SETNE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 50F */ { VXInstructionMnemonic::SETNO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 510 */ { VXInstructionMnemonic::SETNP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 511 */ { VXInstructionMnemonic::SETNS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 512 */ { VXInstructionMnemonic::SETO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 513 */ { VXInstructionMnemonic::SETP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 514 */ { VXInstructionMnemonic::SETS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 515 */ { VXInstructionMnemonic::SFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 516 */ { VXInstructionMnemonic::SGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 517 */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 518 */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 519 */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 51A */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 51B */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 51C */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 51D */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 51E */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 51F */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 520 */ { VXInstructionMnemonic::SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 521 */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 522 */ { VXInstructionMnemonic::SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 523 */ { VXInstructionMnemonic::SHLD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 524 */ { VXInstructionMnemonic::SHLD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 525 */ { VXInstructionMnemonic::SHR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 526 */ { VXInstructionMnemonic::SHR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 527 */ { VXInstructionMnemonic::SHR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 528 */ { VXInstructionMnemonic::SHR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 529 */ { VXInstructionMnemonic::SHR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 52A */ { VXInstructionMnemonic::SHR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 52B */ { VXInstructionMnemonic::SHRD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 52C */ { VXInstructionMnemonic::SHRD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 52D */ { VXInstructionMnemonic::SHUFPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 52E */ { VXInstructionMnemonic::SHUFPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 52F */ { VXInstructionMnemonic::SIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 530 */ { VXInstructionMnemonic::SKINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 531 */ { VXInstructionMnemonic::SLDT, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 532 */ { VXInstructionMnemonic::SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 533 */ { VXInstructionMnemonic::SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 534 */ { VXInstructionMnemonic::SQRTPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 535 */ { VXInstructionMnemonic::SQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 536 */ { VXInstructionMnemonic::SQRTSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 537 */ { VXInstructionMnemonic::SQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 538 */ { VXInstructionMnemonic::STC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 539 */ { VXInstructionMnemonic::STD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 53A */ { VXInstructionMnemonic::STGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 53B */ { VXInstructionMnemonic::STI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 53C */ { VXInstructionMnemonic::STMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 53D */ { VXInstructionMnemonic::STOSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 53E */ { VXInstructionMnemonic::STOSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 53F */ { VXInstructionMnemonic::STOSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 540 */ { VXInstructionMnemonic::STOSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 541 */ { VXInstructionMnemonic::STR, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 542 */ { VXInstructionMnemonic::SUB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 543 */ { VXInstructionMnemonic::SUB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 544 */ { VXInstructionMnemonic::SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 545 */ { VXInstructionMnemonic::SUB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 546 */ { VXInstructionMnemonic::SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, - /* 547 */ { VXInstructionMnemonic::SUB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, - /* 548 */ { VXInstructionMnemonic::SUB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 549 */ { VXInstructionMnemonic::SUB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 54A */ { VXInstructionMnemonic::SUB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 54B */ { VXInstructionMnemonic::SUB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 54C */ { VXInstructionMnemonic::SUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 54D */ { VXInstructionMnemonic::SUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 54E */ { VXInstructionMnemonic::SUBSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 54F */ { VXInstructionMnemonic::SUBSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 550 */ { VXInstructionMnemonic::SWAPGS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 551 */ { VXInstructionMnemonic::SYSCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 552 */ { VXInstructionMnemonic::SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 553 */ { VXInstructionMnemonic::SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 554 */ { VXInstructionMnemonic::SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 555 */ { VXInstructionMnemonic::SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 556 */ { VXInstructionMnemonic::SYSRET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 557 */ { VXInstructionMnemonic::TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 558 */ { VXInstructionMnemonic::TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 559 */ { VXInstructionMnemonic::TEST, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 55A */ { VXInstructionMnemonic::TEST, { OPI_Ev, OPI_Iz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 55B */ { VXInstructionMnemonic::TEST, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, - /* 55C */ { VXInstructionMnemonic::TEST, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 55D */ { VXInstructionMnemonic::TEST, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 55E */ { VXInstructionMnemonic::TEST, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 }, - /* 55F */ { VXInstructionMnemonic::UCOMISD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 560 */ { VXInstructionMnemonic::UCOMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 561 */ { VXInstructionMnemonic::UD2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 562 */ { VXInstructionMnemonic::UNPCKHPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 563 */ { VXInstructionMnemonic::UNPCKHPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 564 */ { VXInstructionMnemonic::UNPCKLPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 565 */ { VXInstructionMnemonic::UNPCKLPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 566 */ { VXInstructionMnemonic::VADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 567 */ { VXInstructionMnemonic::VADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 568 */ { VXInstructionMnemonic::VADDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 569 */ { VXInstructionMnemonic::VADDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 56A */ { VXInstructionMnemonic::VADDSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 56B */ { VXInstructionMnemonic::VADDSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 56C */ { VXInstructionMnemonic::VAESDEC, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 56D */ { VXInstructionMnemonic::VAESDECLAST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 56E */ { VXInstructionMnemonic::VAESENC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 56F */ { VXInstructionMnemonic::VAESENCLAST, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 570 */ { VXInstructionMnemonic::VAESIMC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 571 */ { VXInstructionMnemonic::VAESKEYGENASSIST, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 572 */ { VXInstructionMnemonic::VANDNPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 573 */ { VXInstructionMnemonic::VANDNPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 574 */ { VXInstructionMnemonic::VANDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 575 */ { VXInstructionMnemonic::VANDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 576 */ { VXInstructionMnemonic::VBLENDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 577 */ { VXInstructionMnemonic::VBLENDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 578 */ { VXInstructionMnemonic::VBLENDVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 579 */ { VXInstructionMnemonic::VBLENDVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 57A */ { VXInstructionMnemonic::VBROADCASTSD, { OPI_Vqq, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 57B */ { VXInstructionMnemonic::VBROADCASTSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 57C */ { VXInstructionMnemonic::VCMPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 57D */ { VXInstructionMnemonic::VCMPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 57E */ { VXInstructionMnemonic::VCMPSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 57F */ { VXInstructionMnemonic::VCMPSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 580 */ { VXInstructionMnemonic::VCOMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 581 */ { VXInstructionMnemonic::VCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 582 */ { VXInstructionMnemonic::VCVTDQ2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 583 */ { VXInstructionMnemonic::VCVTDQ2PS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 584 */ { VXInstructionMnemonic::VCVTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 585 */ { VXInstructionMnemonic::VCVTPD2PS, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 586 */ { VXInstructionMnemonic::VCVTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 587 */ { VXInstructionMnemonic::VCVTPS2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 588 */ { VXInstructionMnemonic::VCVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 589 */ { VXInstructionMnemonic::VCVTSD2SS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 58A */ { VXInstructionMnemonic::VCVTSI2SD, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 58B */ { VXInstructionMnemonic::VCVTSI2SS, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 58C */ { VXInstructionMnemonic::VCVTSS2SD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 58D */ { VXInstructionMnemonic::VCVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 58E */ { VXInstructionMnemonic::VCVTTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 58F */ { VXInstructionMnemonic::VCVTTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 590 */ { VXInstructionMnemonic::VCVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 591 */ { VXInstructionMnemonic::VCVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 592 */ { VXInstructionMnemonic::VDIVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 593 */ { VXInstructionMnemonic::VDIVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 594 */ { VXInstructionMnemonic::VDIVSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 595 */ { VXInstructionMnemonic::VDIVSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 596 */ { VXInstructionMnemonic::VDPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 597 */ { VXInstructionMnemonic::VDPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 598 */ { VXInstructionMnemonic::VERR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 599 */ { VXInstructionMnemonic::VERW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 59A */ { VXInstructionMnemonic::VEXTRACTF128, { OPI_Wdq, OPI_Vqq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 59B */ { VXInstructionMnemonic::VEXTRACTPS, { OPI_MdRy, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 59C */ { VXInstructionMnemonic::VHADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 59D */ { VXInstructionMnemonic::VHADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 59E */ { VXInstructionMnemonic::VHSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 59F */ { VXInstructionMnemonic::VHSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5A0 */ { VXInstructionMnemonic::VINSERTF128, { OPI_Vqq, OPI_Hqq, OPI_Wdq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5A1 */ { VXInstructionMnemonic::VINSERTPS, { OPI_Vx, OPI_Hx, OPI_Md, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5A2 */ { VXInstructionMnemonic::VLDDQU, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5A3 */ { VXInstructionMnemonic::VMASKMOVDQU, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 5A4 */ { VXInstructionMnemonic::VMASKMOVPD, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5A5 */ { VXInstructionMnemonic::VMASKMOVPD, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5A6 */ { VXInstructionMnemonic::VMASKMOVPS, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5A7 */ { VXInstructionMnemonic::VMASKMOVPS, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5A8 */ { VXInstructionMnemonic::VMAXPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5A9 */ { VXInstructionMnemonic::VMAXPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5AA */ { VXInstructionMnemonic::VMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 5AB */ { VXInstructionMnemonic::VMAXSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 5AC */ { VXInstructionMnemonic::VMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5AD */ { VXInstructionMnemonic::VMCLEAR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 5AE */ { VXInstructionMnemonic::VMINPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5AF */ { VXInstructionMnemonic::VMINPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 5B0 */ { VXInstructionMnemonic::VMINSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 5B1 */ { VXInstructionMnemonic::VMINSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 5B2 */ { VXInstructionMnemonic::VMLAUNCH, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5B3 */ { VXInstructionMnemonic::VMLOAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5B4 */ { VXInstructionMnemonic::VMMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5B5 */ { VXInstructionMnemonic::VMOVAPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5B6 */ { VXInstructionMnemonic::VMOVAPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5B7 */ { VXInstructionMnemonic::VMOVAPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5B8 */ { VXInstructionMnemonic::VMOVAPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5B9 */ { VXInstructionMnemonic::VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5BA */ { VXInstructionMnemonic::VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5BB */ { VXInstructionMnemonic::VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5BC */ { VXInstructionMnemonic::VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5BD */ { VXInstructionMnemonic::VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5BE */ { VXInstructionMnemonic::VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5BF */ { VXInstructionMnemonic::VMOVDQA, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5C0 */ { VXInstructionMnemonic::VMOVDQA, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5C1 */ { VXInstructionMnemonic::VMOVDQU, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5C2 */ { VXInstructionMnemonic::VMOVDQU, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5C3 */ { VXInstructionMnemonic::VMOVHLPS, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5C4 */ { VXInstructionMnemonic::VMOVHPD, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5C5 */ { VXInstructionMnemonic::VMOVHPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5C6 */ { VXInstructionMnemonic::VMOVHPS, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5C7 */ { VXInstructionMnemonic::VMOVHPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5C8 */ { VXInstructionMnemonic::VMOVLHPS, { OPI_Vx, OPI_Hx, OPI_Ux, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5C9 */ { VXInstructionMnemonic::VMOVLPD, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5CA */ { VXInstructionMnemonic::VMOVLPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5CB */ { VXInstructionMnemonic::VMOVLPS, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5CC */ { VXInstructionMnemonic::VMOVLPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5CD */ { VXInstructionMnemonic::VMOVMSKPD, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5CE */ { VXInstructionMnemonic::VMOVMSKPS, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5CF */ { VXInstructionMnemonic::VMOVNTDQ, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5D0 */ { VXInstructionMnemonic::VMOVNTDQA, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5D1 */ { VXInstructionMnemonic::VMOVNTPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5D2 */ { VXInstructionMnemonic::VMOVNTPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5D3 */ { VXInstructionMnemonic::VMOVQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5D4 */ { VXInstructionMnemonic::VMOVQ, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5D5 */ { VXInstructionMnemonic::VMOVQ, { OPI_Vx, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5D6 */ { VXInstructionMnemonic::VMOVQ, { OPI_Eq, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5D7 */ { VXInstructionMnemonic::VMOVSD, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5D8 */ { VXInstructionMnemonic::VMOVSD, { OPI_Mq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5D9 */ { VXInstructionMnemonic::VMOVSD, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5DA */ { VXInstructionMnemonic::VMOVSD, { OPI_V, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5DB */ { VXInstructionMnemonic::VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5DC */ { VXInstructionMnemonic::VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5DD */ { VXInstructionMnemonic::VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5DE */ { VXInstructionMnemonic::VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5DF */ { VXInstructionMnemonic::VMOVSS, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5E0 */ { VXInstructionMnemonic::VMOVSS, { OPI_Md, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5E1 */ { VXInstructionMnemonic::VMOVSS, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5E2 */ { VXInstructionMnemonic::VMOVSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 5E3 */ { VXInstructionMnemonic::VMOVUPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5E4 */ { VXInstructionMnemonic::VMOVUPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5E5 */ { VXInstructionMnemonic::VMOVUPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5E6 */ { VXInstructionMnemonic::VMOVUPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5E7 */ { VXInstructionMnemonic::VMPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5E8 */ { VXInstructionMnemonic::VMPTRLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 5E9 */ { VXInstructionMnemonic::VMPTRST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 5EA */ { VXInstructionMnemonic::VMREAD, { OPI_Ey, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 5EB */ { VXInstructionMnemonic::VMRESUME, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5EC */ { VXInstructionMnemonic::VMRUN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5ED */ { VXInstructionMnemonic::VMSAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5EE */ { VXInstructionMnemonic::VMULPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5EF */ { VXInstructionMnemonic::VMULPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5F0 */ { VXInstructionMnemonic::VMULSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 5F1 */ { VXInstructionMnemonic::VMULSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 5F2 */ { VXInstructionMnemonic::VMWRITE, { OPI_Gy, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, - /* 5F3 */ { VXInstructionMnemonic::VMXOFF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 5F4 */ { VXInstructionMnemonic::VMXON, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 5F5 */ { VXInstructionMnemonic::VORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5F6 */ { VXInstructionMnemonic::VORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, - /* 5F7 */ { VXInstructionMnemonic::VPABSB, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5F8 */ { VXInstructionMnemonic::VPABSD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5F9 */ { VXInstructionMnemonic::VPABSW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 5FA */ { VXInstructionMnemonic::VPACKSSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5FB */ { VXInstructionMnemonic::VPACKSSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5FC */ { VXInstructionMnemonic::VPACKUSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5FD */ { VXInstructionMnemonic::VPACKUSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5FE */ { VXInstructionMnemonic::VPADDB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 5FF */ { VXInstructionMnemonic::VPADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 600 */ { VXInstructionMnemonic::VPADDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 601 */ { VXInstructionMnemonic::VPADDSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 602 */ { VXInstructionMnemonic::VPADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 603 */ { VXInstructionMnemonic::VPADDUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 604 */ { VXInstructionMnemonic::VPADDUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 605 */ { VXInstructionMnemonic::VPADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 606 */ { VXInstructionMnemonic::VPALIGNR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 607 */ { VXInstructionMnemonic::VPAND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 608 */ { VXInstructionMnemonic::VPANDN, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 609 */ { VXInstructionMnemonic::VPAVGB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 60A */ { VXInstructionMnemonic::VPAVGW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 60B */ { VXInstructionMnemonic::VPBLENDVB, { OPI_V, OPI_H, OPI_W, OPI_L }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 60C */ { VXInstructionMnemonic::VPBLENDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 60D */ { VXInstructionMnemonic::VPCLMULQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 60E */ { VXInstructionMnemonic::VPCMPEQB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 60F */ { VXInstructionMnemonic::VPCMPEQD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 610 */ { VXInstructionMnemonic::VPCMPEQQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 611 */ { VXInstructionMnemonic::VPCMPEQW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 612 */ { VXInstructionMnemonic::VPCMPESTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 613 */ { VXInstructionMnemonic::VPCMPESTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 614 */ { VXInstructionMnemonic::VPCMPGTB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 615 */ { VXInstructionMnemonic::VPCMPGTD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 616 */ { VXInstructionMnemonic::VPCMPGTQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 617 */ { VXInstructionMnemonic::VPCMPGTW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 618 */ { VXInstructionMnemonic::VPCMPISTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 619 */ { VXInstructionMnemonic::VPCMPISTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 61A */ { VXInstructionMnemonic::VPERM2F128, { OPI_Vqq, OPI_Hqq, OPI_Wqq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 61B */ { VXInstructionMnemonic::VPERMILPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 61C */ { VXInstructionMnemonic::VPERMILPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 61D */ { VXInstructionMnemonic::VPERMILPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 61E */ { VXInstructionMnemonic::VPERMILPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 61F */ { VXInstructionMnemonic::VPEXTRB, { OPI_MbRv, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 620 */ { VXInstructionMnemonic::VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 621 */ { VXInstructionMnemonic::VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 622 */ { VXInstructionMnemonic::VPEXTRQ, { OPI_Eq, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 623 */ { VXInstructionMnemonic::VPEXTRW, { OPI_Gd, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 624 */ { VXInstructionMnemonic::VPEXTRW, { OPI_MwRd, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 625 */ { VXInstructionMnemonic::VPHADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 626 */ { VXInstructionMnemonic::VPHADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 627 */ { VXInstructionMnemonic::VPHADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 628 */ { VXInstructionMnemonic::VPHMINPOSUW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 629 */ { VXInstructionMnemonic::VPHSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 62A */ { VXInstructionMnemonic::VPHSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 62B */ { VXInstructionMnemonic::VPHSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 62C */ { VXInstructionMnemonic::VPINSRB, { OPI_V, OPI_H, OPI_MbRd, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 62D */ { VXInstructionMnemonic::VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 62E */ { VXInstructionMnemonic::VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 62F */ { VXInstructionMnemonic::VPINSRQ, { OPI_V, OPI_H, OPI_Eq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 630 */ { VXInstructionMnemonic::VPINSRW, { OPI_Vx, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, - /* 631 */ { VXInstructionMnemonic::VPMADDUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 632 */ { VXInstructionMnemonic::VPMADDWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 633 */ { VXInstructionMnemonic::VPMAXSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 634 */ { VXInstructionMnemonic::VPMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 635 */ { VXInstructionMnemonic::VPMAXSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 636 */ { VXInstructionMnemonic::VPMAXUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 637 */ { VXInstructionMnemonic::VPMAXUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 638 */ { VXInstructionMnemonic::VPMAXUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 639 */ { VXInstructionMnemonic::VPMINSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 63A */ { VXInstructionMnemonic::VPMINSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 63B */ { VXInstructionMnemonic::VPMINSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 63C */ { VXInstructionMnemonic::VPMINUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 63D */ { VXInstructionMnemonic::VPMINUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 63E */ { VXInstructionMnemonic::VPMINUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 63F */ { VXInstructionMnemonic::VPMOVMSKB, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 640 */ { VXInstructionMnemonic::VPMOVSXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 641 */ { VXInstructionMnemonic::VPMOVSXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 642 */ { VXInstructionMnemonic::VPMOVSXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 643 */ { VXInstructionMnemonic::VPMOVSXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 644 */ { VXInstructionMnemonic::VPMOVSXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 645 */ { VXInstructionMnemonic::VPMOVZXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 646 */ { VXInstructionMnemonic::VPMOVZXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 647 */ { VXInstructionMnemonic::VPMOVZXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 648 */ { VXInstructionMnemonic::VPMOVZXDQ, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 649 */ { VXInstructionMnemonic::VPMOVZXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 64A */ { VXInstructionMnemonic::VPMOVZXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 64B */ { VXInstructionMnemonic::VPMULDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 64C */ { VXInstructionMnemonic::VPMULHRSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 64D */ { VXInstructionMnemonic::VPMULHUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 64E */ { VXInstructionMnemonic::VPMULHW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 64F */ { VXInstructionMnemonic::VPMULLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 650 */ { VXInstructionMnemonic::VPMULLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 651 */ { VXInstructionMnemonic::VPOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 652 */ { VXInstructionMnemonic::VPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 653 */ { VXInstructionMnemonic::VPSHUFB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 654 */ { VXInstructionMnemonic::VPSHUFD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 655 */ { VXInstructionMnemonic::VPSHUFHW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 656 */ { VXInstructionMnemonic::VPSHUFLW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 657 */ { VXInstructionMnemonic::VPSIGNB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 658 */ { VXInstructionMnemonic::VPSIGND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 659 */ { VXInstructionMnemonic::VPSIGNW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 65A */ { VXInstructionMnemonic::VPSLLD, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 65B */ { VXInstructionMnemonic::VPSLLD, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 65C */ { VXInstructionMnemonic::VPSLLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 65D */ { VXInstructionMnemonic::VPSLLQ, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 65E */ { VXInstructionMnemonic::VPSLLQ, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 65F */ { VXInstructionMnemonic::VPSLLW, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 660 */ { VXInstructionMnemonic::VPSLLW, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 661 */ { VXInstructionMnemonic::VPSRAD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 662 */ { VXInstructionMnemonic::VPSRAD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 663 */ { VXInstructionMnemonic::VPSRAW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 664 */ { VXInstructionMnemonic::VPSRAW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 665 */ { VXInstructionMnemonic::VPSRLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 666 */ { VXInstructionMnemonic::VPSRLD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 667 */ { VXInstructionMnemonic::VPSRLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 668 */ { VXInstructionMnemonic::VPSRLQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 669 */ { VXInstructionMnemonic::VPSRLQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 66A */ { VXInstructionMnemonic::VPSRLW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 66B */ { VXInstructionMnemonic::VPSRLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 66C */ { VXInstructionMnemonic::VPSUBB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 66D */ { VXInstructionMnemonic::VPSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 66E */ { VXInstructionMnemonic::VPSUBQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 66F */ { VXInstructionMnemonic::VPSUBSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 670 */ { VXInstructionMnemonic::VPSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 671 */ { VXInstructionMnemonic::VPSUBUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 672 */ { VXInstructionMnemonic::VPSUBUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 673 */ { VXInstructionMnemonic::VPSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 674 */ { VXInstructionMnemonic::VPTEST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, - /* 675 */ { VXInstructionMnemonic::VPUNPCKHBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 676 */ { VXInstructionMnemonic::VPUNPCKHDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 677 */ { VXInstructionMnemonic::VPUNPCKHQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 678 */ { VXInstructionMnemonic::VPUNPCKHWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 679 */ { VXInstructionMnemonic::VPUNPCKLBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 67A */ { VXInstructionMnemonic::VPUNPCKLDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 67B */ { VXInstructionMnemonic::VPUNPCKLQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 67C */ { VXInstructionMnemonic::VPUNPCKLWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 67D */ { VXInstructionMnemonic::VPXOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 67E */ { VXInstructionMnemonic::VRCPPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 67F */ { VXInstructionMnemonic::VRCPSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 680 */ { VXInstructionMnemonic::VROUNDPD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 681 */ { VXInstructionMnemonic::VROUNDPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 682 */ { VXInstructionMnemonic::VROUNDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 683 */ { VXInstructionMnemonic::VROUNDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 684 */ { VXInstructionMnemonic::VRSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 685 */ { VXInstructionMnemonic::VRSQRTSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 686 */ { VXInstructionMnemonic::VSHUFPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 687 */ { VXInstructionMnemonic::VSHUFPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 688 */ { VXInstructionMnemonic::VSQRTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 689 */ { VXInstructionMnemonic::VSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, - /* 68A */ { VXInstructionMnemonic::VSQRTSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 68B */ { VXInstructionMnemonic::VSQRTSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 68C */ { VXInstructionMnemonic::VSTMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, - /* 68D */ { VXInstructionMnemonic::VSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 68E */ { VXInstructionMnemonic::VSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 68F */ { VXInstructionMnemonic::VSUBSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 690 */ { VXInstructionMnemonic::VSUBSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 691 */ { VXInstructionMnemonic::VTESTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, - /* 692 */ { VXInstructionMnemonic::VTESTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, - /* 693 */ { VXInstructionMnemonic::VUCOMISD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 694 */ { VXInstructionMnemonic::VUCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 695 */ { VXInstructionMnemonic::VUNPCKHPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 696 */ { VXInstructionMnemonic::VUNPCKHPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 697 */ { VXInstructionMnemonic::VUNPCKLPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 698 */ { VXInstructionMnemonic::VUNPCKLPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 699 */ { VXInstructionMnemonic::VXORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, - /* 69A */ { VXInstructionMnemonic::VXORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 69B */ { VXInstructionMnemonic::VZEROALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 69C */ { VXInstructionMnemonic::VZEROUPPER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 69D */ { VXInstructionMnemonic::WAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 69E */ { VXInstructionMnemonic::WBINVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 69F */ { VXInstructionMnemonic::WRMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6A0 */ { VXInstructionMnemonic::XADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE }, - /* 6A1 */ { VXInstructionMnemonic::XADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE }, - /* 6A2 */ { VXInstructionMnemonic::XCHG, { OPI_R4v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6A3 */ { VXInstructionMnemonic::XCHG, { OPI_R3v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6A4 */ { VXInstructionMnemonic::XCHG, { OPI_R5v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6A5 */ { VXInstructionMnemonic::XCHG, { OPI_R7v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6A6 */ { VXInstructionMnemonic::XCHG, { OPI_R6v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6A7 */ { VXInstructionMnemonic::XCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6A8 */ { VXInstructionMnemonic::XCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6A9 */ { VXInstructionMnemonic::XCHG, { OPI_R0v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6AA */ { VXInstructionMnemonic::XCHG, { OPI_R2v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6AB */ { VXInstructionMnemonic::XCHG, { OPI_R1v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, - /* 6AC */ { VXInstructionMnemonic::XCRYPTCBC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6AD */ { VXInstructionMnemonic::XCRYPTCFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6AE */ { VXInstructionMnemonic::XCRYPTCTR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6AF */ { VXInstructionMnemonic::XCRYPTECB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6B0 */ { VXInstructionMnemonic::XCRYPTOFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6B1 */ { VXInstructionMnemonic::XGETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6B2 */ { VXInstructionMnemonic::XLATB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, - /* 6B3 */ { VXInstructionMnemonic::XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, - /* 6B4 */ { VXInstructionMnemonic::XOR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6B5 */ { VXInstructionMnemonic::XOR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6B6 */ { VXInstructionMnemonic::XOR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6B7 */ { VXInstructionMnemonic::XOR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6B8 */ { VXInstructionMnemonic::XOR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6B9 */ { VXInstructionMnemonic::XOR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6BA */ { VXInstructionMnemonic::XOR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, - /* 6BB */ { VXInstructionMnemonic::XOR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, - /* 6BC */ { VXInstructionMnemonic::XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6BD */ { VXInstructionMnemonic::XORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6BE */ { VXInstructionMnemonic::XORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, - /* 6BF */ { VXInstructionMnemonic::XRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 6C0 */ { VXInstructionMnemonic::XSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, - /* 6C1 */ { VXInstructionMnemonic::XSETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6C2 */ { VXInstructionMnemonic::XSHA1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6C3 */ { VXInstructionMnemonic::XSHA256, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, - /* 6C4 */ { VXInstructionMnemonic::XSTORE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, -}; - -#undef OPI_NONE -#undef OPI_AL -#undef OPI_AX -#undef OPI_Av -#undef OPI_C -#undef OPI_CL -#undef OPI_CS -#undef OPI_CX -#undef OPI_D -#undef OPI_DL -#undef OPI_DS -#undef OPI_DX -#undef OPI_E -#undef OPI_ES -#undef OPI_Eb -#undef OPI_Ed -#undef OPI_Eq -#undef OPI_Ev -#undef OPI_Ew -#undef OPI_Ey -#undef OPI_Ez -#undef OPI_FS -#undef OPI_Fv -#undef OPI_G -#undef OPI_GS -#undef OPI_Gb -#undef OPI_Gd -#undef OPI_Gq -#undef OPI_Gv -#undef OPI_Gw -#undef OPI_Gy -#undef OPI_Gz -#undef OPI_H -#undef OPI_Hqq -#undef OPI_Hx -#undef OPI_I1 -#undef OPI_Ib -#undef OPI_Iv -#undef OPI_Iw -#undef OPI_Iz -#undef OPI_Jb -#undef OPI_Jv -#undef OPI_Jz -#undef OPI_L -#undef OPI_Lx -#undef OPI_M -#undef OPI_Mb -#undef OPI_MbRd -#undef OPI_MbRv -#undef OPI_Md -#undef OPI_MdRy -#undef OPI_MdU -#undef OPI_Mdq -#undef OPI_Mo -#undef OPI_Mq -#undef OPI_MqU -#undef OPI_Ms -#undef OPI_Mt -#undef OPI_Mv -#undef OPI_Mw -#undef OPI_MwRd -#undef OPI_MwRv -#undef OPI_MwRy -#undef OPI_MwU -#undef OPI_N -#undef OPI_Ob -#undef OPI_Ov -#undef OPI_Ow -#undef OPI_P -#undef OPI_Q -#undef OPI_R -#undef OPI_R0b -#undef OPI_R0v -#undef OPI_R0w -#undef OPI_R0y -#undef OPI_R0z -#undef OPI_R1b -#undef OPI_R1v -#undef OPI_R1w -#undef OPI_R1y -#undef OPI_R1z -#undef OPI_R2b -#undef OPI_R2v -#undef OPI_R2w -#undef OPI_R2y -#undef OPI_R2z -#undef OPI_R3b -#undef OPI_R3v -#undef OPI_R3w -#undef OPI_R3y -#undef OPI_R3z -#undef OPI_R4b -#undef OPI_R4v -#undef OPI_R4w -#undef OPI_R4y -#undef OPI_R4z -#undef OPI_R5b -#undef OPI_R5v -#undef OPI_R5w -#undef OPI_R5y -#undef OPI_R5z -#undef OPI_R6b -#undef OPI_R6v -#undef OPI_R6w -#undef OPI_R6y -#undef OPI_R6z -#undef OPI_R7b -#undef OPI_R7v -#undef OPI_R7w -#undef OPI_R7y -#undef OPI_R7z -#undef OPI_S -#undef OPI_SS -#undef OPI_ST0 -#undef OPI_ST1 -#undef OPI_ST2 -#undef OPI_ST3 -#undef OPI_ST4 -#undef OPI_ST5 -#undef OPI_ST6 -#undef OPI_ST7 -#undef OPI_U -#undef OPI_Ux -#undef OPI_V -#undef OPI_Vdq -#undef OPI_Vqq -#undef OPI_Vsd -#undef OPI_Vx -#undef OPI_W -#undef OPI_Wdq -#undef OPI_Wqq -#undef OPI_Wsd -#undef OPI_Wx -#undef OPI_eAX -#undef OPI_eCX -#undef OPI_eDX -#undef OPI_rAX -#undef OPI_rCX -#undef OPI_rDX -#undef OPI_sIb -#undef OPI_sIz - -const char* instrMnemonicStrings[] = -{ - /* 000 */ "invalid", - /* 001 */ "aaa", - /* 002 */ "aad", - /* 003 */ "aam", - /* 004 */ "aas", - /* 005 */ "adc", - /* 006 */ "add", - /* 007 */ "addpd", - /* 008 */ "addps", - /* 009 */ "addsd", - /* 00A */ "addss", - /* 00B */ "addsubpd", - /* 00C */ "addsubps", - /* 00D */ "aesdec", - /* 00E */ "aesdeclast", - /* 00F */ "aesenc", - /* 010 */ "aesenclast", - /* 011 */ "aesimc", - /* 012 */ "aeskeygenassist", - /* 013 */ "and", - /* 014 */ "andnpd", - /* 015 */ "andnps", - /* 016 */ "andpd", - /* 017 */ "andps", - /* 018 */ "arpl", - /* 019 */ "blendpd", - /* 01A */ "blendps", - /* 01B */ "blendvpd", - /* 01C */ "blendvps", - /* 01D */ "bound", - /* 01E */ "bsf", - /* 01F */ "bsr", - /* 020 */ "bswap", - /* 021 */ "bt", - /* 022 */ "btc", - /* 023 */ "btr", - /* 024 */ "bts", - /* 025 */ "call", - /* 026 */ "cbw", - /* 027 */ "cdq", - /* 028 */ "cdqe", - /* 029 */ "clc", - /* 02A */ "cld", - /* 02B */ "clflush", - /* 02C */ "clgi", - /* 02D */ "cli", - /* 02E */ "clts", - /* 02F */ "cmc", - /* 030 */ "cmova", - /* 031 */ "cmovae", - /* 032 */ "cmovb", - /* 033 */ "cmovbe", - /* 034 */ "cmove", - /* 035 */ "cmovg", - /* 036 */ "cmovge", - /* 037 */ "cmovl", - /* 038 */ "cmovle", - /* 039 */ "cmovne", - /* 03A */ "cmovno", - /* 03B */ "cmovnp", - /* 03C */ "cmovns", - /* 03D */ "cmovo", - /* 03E */ "cmovp", - /* 03F */ "cmovs", - /* 040 */ "cmp", - /* 041 */ "cmppd", - /* 042 */ "cmpps", - /* 043 */ "cmpsb", - /* 044 */ "cmpsd", - /* 045 */ "cmpsq", - /* 046 */ "cmpss", - /* 047 */ "cmpsw", - /* 048 */ "cmpxchg", - /* 049 */ "cmpxchg16b", - /* 04A */ "cmpxchg8b", - /* 04B */ "comisd", - /* 04C */ "comiss", - /* 04D */ "cpuid", - /* 04E */ "cqo", - /* 04F */ "crc32", - /* 050 */ "cvtdq2pd", - /* 051 */ "cvtdq2ps", - /* 052 */ "cvtpd2dq", - /* 053 */ "cvtpd2pi", - /* 054 */ "cvtpd2ps", - /* 055 */ "cvtpi2pd", - /* 056 */ "cvtpi2ps", - /* 057 */ "cvtps2dq", - /* 058 */ "cvtps2pd", - /* 059 */ "cvtps2pi", - /* 05A */ "cvtsd2si", - /* 05B */ "cvtsd2ss", - /* 05C */ "cvtsi2sd", - /* 05D */ "cvtsi2ss", - /* 05E */ "cvtss2sd", - /* 05F */ "cvtss2si", - /* 060 */ "cvttpd2dq", - /* 061 */ "cvttpd2pi", - /* 062 */ "cvttps2dq", - /* 063 */ "cvttps2pi", - /* 064 */ "cvttsd2si", - /* 065 */ "cvttss2si", - /* 066 */ "cwd", - /* 067 */ "cwde", - /* 068 */ "daa", - /* 069 */ "das", - /* 06A */ "dec", - /* 06B */ "div", - /* 06C */ "divpd", - /* 06D */ "divps", - /* 06E */ "divsd", - /* 06F */ "divss", - /* 070 */ "dppd", - /* 071 */ "dpps", - /* 072 */ "emms", - /* 073 */ "enter", - /* 074 */ "extractps", - /* 075 */ "f2xm1", - /* 076 */ "fabs", - /* 077 */ "fadd", - /* 078 */ "faddp", - /* 079 */ "fbld", - /* 07A */ "fbstp", - /* 07B */ "fchs", - /* 07C */ "fclex", - /* 07D */ "fcmovb", - /* 07E */ "fcmovbe", - /* 07F */ "fcmove", - /* 080 */ "fcmovnb", - /* 081 */ "fcmovnbe", - /* 082 */ "fcmovne", - /* 083 */ "fcmovnu", - /* 084 */ "fcmovu", - /* 085 */ "fcom", - /* 086 */ "fcom2", - /* 087 */ "fcomi", - /* 088 */ "fcomip", - /* 089 */ "fcomp", - /* 08A */ "fcomp3", - /* 08B */ "fcomp5", - /* 08C */ "fcompp", - /* 08D */ "fcos", - /* 08E */ "fdecstp", - /* 08F */ "fdiv", - /* 090 */ "fdivp", - /* 091 */ "fdivr", - /* 092 */ "fdivrp", - /* 093 */ "femms", - /* 094 */ "ffree", - /* 095 */ "ffreep", - /* 096 */ "fiadd", - /* 097 */ "ficom", - /* 098 */ "ficomp", - /* 099 */ "fidiv", - /* 09A */ "fidivr", - /* 09B */ "fild", - /* 09C */ "fimul", - /* 09D */ "fincstp", - /* 09E */ "fist", - /* 09F */ "fistp", - /* 0A0 */ "fisttp", - /* 0A1 */ "fisub", - /* 0A2 */ "fisubr", - /* 0A3 */ "fld", - /* 0A4 */ "fld1", - /* 0A5 */ "fldcw", - /* 0A6 */ "fldenv", - /* 0A7 */ "fldl2e", - /* 0A8 */ "fldl2t", - /* 0A9 */ "fldlg2", - /* 0AA */ "fldln2", - /* 0AB */ "fldpi", - /* 0AC */ "fldz", - /* 0AD */ "fmul", - /* 0AE */ "fmulp", - /* 0AF */ "fndisi", - /* 0B0 */ "fneni", - /* 0B1 */ "fninit", - /* 0B2 */ "fnop", - /* 0B3 */ "fnsave", - /* 0B4 */ "fnsetpm", - /* 0B5 */ "fnstcw", - /* 0B6 */ "fnstenv", - /* 0B7 */ "fnstsw", - /* 0B8 */ "fpatan", - /* 0B9 */ "fprem", - /* 0BA */ "fprem1", - /* 0BB */ "fptan", - /* 0BC */ "frndint", - /* 0BD */ "frstor", - /* 0BE */ "frstpm", - /* 0BF */ "fscale", - /* 0C0 */ "fsin", - /* 0C1 */ "fsincos", - /* 0C2 */ "fsqrt", - /* 0C3 */ "fst", - /* 0C4 */ "fstp", - /* 0C5 */ "fstp1", - /* 0C6 */ "fstp8", - /* 0C7 */ "fstp9", - /* 0C8 */ "fsub", - /* 0C9 */ "fsubp", - /* 0CA */ "fsubr", - /* 0CB */ "fsubrp", - /* 0CC */ "ftst", - /* 0CD */ "fucom", - /* 0CE */ "fucomi", - /* 0CF */ "fucomip", - /* 0D0 */ "fucomp", - /* 0D1 */ "fucompp", - /* 0D2 */ "fxam", - /* 0D3 */ "fxch", - /* 0D4 */ "fxch4", - /* 0D5 */ "fxch7", - /* 0D6 */ "fxrstor", - /* 0D7 */ "fxsave", - /* 0D8 */ "fxtract", - /* 0D9 */ "fyl2x", - /* 0DA */ "fyl2xp1", - /* 0DB */ "getsec", - /* 0DC */ "haddpd", - /* 0DD */ "haddps", - /* 0DE */ "hlt", - /* 0DF */ "hsubpd", - /* 0E0 */ "hsubps", - /* 0E1 */ "idiv", - /* 0E2 */ "imul", - /* 0E3 */ "in", - /* 0E4 */ "inc", - /* 0E5 */ "insb", - /* 0E6 */ "insd", - /* 0E7 */ "insertps", - /* 0E8 */ "insw", - /* 0E9 */ "int", - /* 0EA */ "int1", - /* 0EB */ "int3", - /* 0EC */ "into", - /* 0ED */ "invd", - /* 0EE */ "invept", - /* 0EF */ "invlpg", - /* 0F0 */ "invlpga", - /* 0F1 */ "invvpid", - /* 0F2 */ "iretd", - /* 0F3 */ "iretq", - /* 0F4 */ "iretw", - /* 0F5 */ "ja", - /* 0F6 */ "jb", - /* 0F7 */ "jbe", - /* 0F8 */ "jcxz", - /* 0F9 */ "je", - /* 0FA */ "jecxz", - /* 0FB */ "jg", - /* 0FC */ "jge", - /* 0FD */ "jl", - /* 0FE */ "jle", - /* 0FF */ "jmp", - /* 100 */ "jnb", - /* 101 */ "jne", - /* 102 */ "jno", - /* 103 */ "jnp", - /* 104 */ "jns", - /* 105 */ "jo", - /* 106 */ "jp", - /* 107 */ "jrcxz", - /* 108 */ "js", - /* 109 */ "lahf", - /* 10A */ "lar", - /* 10B */ "lddqu", - /* 10C */ "ldmxcsr", - /* 10D */ "lds", - /* 10E */ "lea", - /* 10F */ "leave", - /* 110 */ "les", - /* 111 */ "lfence", - /* 112 */ "lfs", - /* 113 */ "lgdt", - /* 114 */ "lgs", - /* 115 */ "lidt", - /* 116 */ "lldt", - /* 117 */ "lmsw", - /* 118 */ "lock", - /* 119 */ "lodsb", - /* 11A */ "lodsd", - /* 11B */ "lodsq", - /* 11C */ "lodsw", - /* 11D */ "loop", - /* 11E */ "loope", - /* 11F */ "loopne", - /* 120 */ "lsl", - /* 121 */ "lss", - /* 122 */ "ltr", - /* 123 */ "maskmovdqu", - /* 124 */ "maskmovq", - /* 125 */ "maxpd", - /* 126 */ "maxps", - /* 127 */ "maxsd", - /* 128 */ "maxss", - /* 129 */ "mfence", - /* 12A */ "minpd", - /* 12B */ "minps", - /* 12C */ "minsd", - /* 12D */ "minss", - /* 12E */ "monitor", - /* 12F */ "montmul", - /* 130 */ "mov", - /* 131 */ "movapd", - /* 132 */ "movaps", - /* 133 */ "movbe", - /* 134 */ "movd", - /* 135 */ "movddup", - /* 136 */ "movdq2q", - /* 137 */ "movdqa", - /* 138 */ "movdqu", - /* 139 */ "movhlps", - /* 13A */ "movhpd", - /* 13B */ "movhps", - /* 13C */ "movlhps", - /* 13D */ "movlpd", - /* 13E */ "movlps", - /* 13F */ "movmskpd", - /* 140 */ "movmskps", - /* 141 */ "movntdq", - /* 142 */ "movntdqa", - /* 143 */ "movnti", - /* 144 */ "movntpd", - /* 145 */ "movntps", - /* 146 */ "movntq", - /* 147 */ "movq", - /* 148 */ "movq2dq", - /* 149 */ "movsb", - /* 14A */ "movsd", - /* 14B */ "movshdup", - /* 14C */ "movsldup", - /* 14D */ "movsq", - /* 14E */ "movss", - /* 14F */ "movsw", - /* 150 */ "movsx", - /* 151 */ "movsxd", - /* 152 */ "movupd", - /* 153 */ "movups", - /* 154 */ "movzx", - /* 155 */ "mpsadbw", - /* 156 */ "mul", - /* 157 */ "mulpd", - /* 158 */ "mulps", - /* 159 */ "mulsd", - /* 15A */ "mulss", - /* 15B */ "mwait", - /* 15C */ "neg", - /* 15D */ "nop", - /* 15E */ "not", - /* 15F */ "or", - /* 160 */ "orpd", - /* 161 */ "orps", - /* 162 */ "out", - /* 163 */ "outsb", - /* 164 */ "outsd", - /* 165 */ "outsw", - /* 166 */ "pabsb", - /* 167 */ "pabsd", - /* 168 */ "pabsw", - /* 169 */ "packssdw", - /* 16A */ "packsswb", - /* 16B */ "packusdw", - /* 16C */ "packuswb", - /* 16D */ "paddb", - /* 16E */ "paddd", - /* 16F */ "paddq", - /* 170 */ "paddsb", - /* 171 */ "paddsw", - /* 172 */ "paddusb", - /* 173 */ "paddusw", - /* 174 */ "paddw", - /* 175 */ "palignr", - /* 176 */ "pand", - /* 177 */ "pandn", - /* 178 */ "pause", - /* 179 */ "pavgb", - /* 17A */ "pavgusb", - /* 17B */ "pavgw", - /* 17C */ "pblendvb", - /* 17D */ "pblendw", - /* 17E */ "pclmulqdq", - /* 17F */ "pcmpeqb", - /* 180 */ "pcmpeqd", - /* 181 */ "pcmpeqq", - /* 182 */ "pcmpeqw", - /* 183 */ "pcmpestri", - /* 184 */ "pcmpestrm", - /* 185 */ "pcmpgtb", - /* 186 */ "pcmpgtd", - /* 187 */ "pcmpgtq", - /* 188 */ "pcmpgtw", - /* 189 */ "pcmpistri", - /* 18A */ "pcmpistrm", - /* 18B */ "pextrb", - /* 18C */ "pextrd", - /* 18D */ "pextrq", - /* 18E */ "pextrw", - /* 18F */ "pf2id", - /* 190 */ "pf2iw", - /* 191 */ "pfacc", - /* 192 */ "pfadd", - /* 193 */ "pfcmpeq", - /* 194 */ "pfcmpge", - /* 195 */ "pfcmpgt", - /* 196 */ "pfmax", - /* 197 */ "pfmin", - /* 198 */ "pfmul", - /* 199 */ "pfnacc", - /* 19A */ "pfpnacc", - /* 19B */ "pfrcp", - /* 19C */ "pfrcpit1", - /* 19D */ "pfrcpit2", - /* 19E */ "pfrsqit1", - /* 19F */ "pfrsqrt", - /* 1A0 */ "pfsub", - /* 1A1 */ "pfsubr", - /* 1A2 */ "phaddd", - /* 1A3 */ "phaddsw", - /* 1A4 */ "phaddw", - /* 1A5 */ "phminposuw", - /* 1A6 */ "phsubd", - /* 1A7 */ "phsubsw", - /* 1A8 */ "phsubw", - /* 1A9 */ "pi2fd", - /* 1AA */ "pi2fw", - /* 1AB */ "pinsrb", - /* 1AC */ "pinsrd", - /* 1AD */ "pinsrq", - /* 1AE */ "pinsrw", - /* 1AF */ "pmaddubsw", - /* 1B0 */ "pmaddwd", - /* 1B1 */ "pmaxsb", - /* 1B2 */ "pmaxsd", - /* 1B3 */ "pmaxsw", - /* 1B4 */ "pmaxub", - /* 1B5 */ "pmaxud", - /* 1B6 */ "pmaxuw", - /* 1B7 */ "pminsb", - /* 1B8 */ "pminsd", - /* 1B9 */ "pminsw", - /* 1BA */ "pminub", - /* 1BB */ "pminud", - /* 1BC */ "pminuw", - /* 1BD */ "pmovmskb", - /* 1BE */ "pmovsxbd", - /* 1BF */ "pmovsxbq", - /* 1C0 */ "pmovsxbw", - /* 1C1 */ "pmovsxdq", - /* 1C2 */ "pmovsxwd", - /* 1C3 */ "pmovsxwq", - /* 1C4 */ "pmovzxbd", - /* 1C5 */ "pmovzxbq", - /* 1C6 */ "pmovzxbw", - /* 1C7 */ "pmovzxdq", - /* 1C8 */ "pmovzxwd", - /* 1C9 */ "pmovzxwq", - /* 1CA */ "pmuldq", - /* 1CB */ "pmulhrsw", - /* 1CC */ "pmulhrw", - /* 1CD */ "pmulhuw", - /* 1CE */ "pmulhw", - /* 1CF */ "pmulld", - /* 1D0 */ "pmullw", - /* 1D1 */ "pmuludq", - /* 1D2 */ "pop", - /* 1D3 */ "popa", - /* 1D4 */ "popad", - /* 1D5 */ "popcnt", - /* 1D6 */ "popfd", - /* 1D7 */ "popfq", - /* 1D8 */ "popfw", - /* 1D9 */ "por", - /* 1DA */ "prefetch", - /* 1DB */ "prefetchnta", - /* 1DC */ "prefetcht0", - /* 1DD */ "prefetcht1", - /* 1DE */ "prefetcht2", - /* 1DF */ "psadbw", - /* 1E0 */ "pshufb", - /* 1E1 */ "pshufd", - /* 1E2 */ "pshufhw", - /* 1E3 */ "pshuflw", - /* 1E4 */ "pshufw", - /* 1E5 */ "psignb", - /* 1E6 */ "psignd", - /* 1E7 */ "psignw", - /* 1E8 */ "pslld", - /* 1E9 */ "pslldq", - /* 1EA */ "psllq", - /* 1EB */ "psllw", - /* 1EC */ "psrad", - /* 1ED */ "psraw", - /* 1EE */ "psrld", - /* 1EF */ "psrldq", - /* 1F0 */ "psrlq", - /* 1F1 */ "psrlw", - /* 1F2 */ "psubb", - /* 1F3 */ "psubd", - /* 1F4 */ "psubq", - /* 1F5 */ "psubsb", - /* 1F6 */ "psubsw", - /* 1F7 */ "psubusb", - /* 1F8 */ "psubusw", - /* 1F9 */ "psubw", - /* 1FA */ "pswapd", - /* 1FB */ "ptest", - /* 1FC */ "punpckhbw", - /* 1FD */ "punpckhdq", - /* 1FE */ "punpckhqdq", - /* 1FF */ "punpckhwd", - /* 200 */ "punpcklbw", - /* 201 */ "punpckldq", - /* 202 */ "punpcklqdq", - /* 203 */ "punpcklwd", - /* 204 */ "push", - /* 205 */ "pusha", - /* 206 */ "pushad", - /* 207 */ "pushfd", - /* 208 */ "pushfq", - /* 209 */ "pushfw", - /* 20A */ "pxor", - /* 20B */ "rcl", - /* 20C */ "rcpps", - /* 20D */ "rcpss", - /* 20E */ "rcr", - /* 20F */ "rdmsr", - /* 210 */ "rdpmc", - /* 211 */ "rdrand", - /* 212 */ "rdtsc", - /* 213 */ "rdtscp", - /* 214 */ "rep", - /* 215 */ "repne", - /* 216 */ "ret", - /* 217 */ "retf", - /* 218 */ "rol", - /* 219 */ "ror", - /* 21A */ "roundpd", - /* 21B */ "roundps", - /* 21C */ "roundsd", - /* 21D */ "roundss", - /* 21E */ "rsm", - /* 21F */ "rsqrtps", - /* 220 */ "rsqrtss", - /* 221 */ "sahf", - /* 222 */ "salc", - /* 223 */ "sar", - /* 224 */ "sbb", - /* 225 */ "scasb", - /* 226 */ "scasd", - /* 227 */ "scasq", - /* 228 */ "scasw", - /* 229 */ "seta", - /* 22A */ "setae", - /* 22B */ "setb", - /* 22C */ "setbe", - /* 22D */ "sete", - /* 22E */ "setg", - /* 22F */ "setge", - /* 230 */ "setl", - /* 231 */ "setle", - /* 232 */ "setne", - /* 233 */ "setno", - /* 234 */ "setnp", - /* 235 */ "setns", - /* 236 */ "seto", - /* 237 */ "setp", - /* 238 */ "sets", - /* 239 */ "sfence", - /* 23A */ "sgdt", - /* 23B */ "shl", - /* 23C */ "shld", - /* 23D */ "shr", - /* 23E */ "shrd", - /* 23F */ "shufpd", - /* 240 */ "shufps", - /* 241 */ "sidt", - /* 242 */ "skinit", - /* 243 */ "sldt", - /* 244 */ "smsw", - /* 245 */ "sqrtpd", - /* 246 */ "sqrtps", - /* 247 */ "sqrtsd", - /* 248 */ "sqrtss", - /* 249 */ "stc", - /* 24A */ "std", - /* 24B */ "stgi", - /* 24C */ "sti", - /* 24D */ "stmxcsr", - /* 24E */ "stosb", - /* 24F */ "stosd", - /* 250 */ "stosq", - /* 251 */ "stosw", - /* 252 */ "str", - /* 253 */ "sub", - /* 254 */ "subpd", - /* 255 */ "subps", - /* 256 */ "subsd", - /* 257 */ "subss", - /* 258 */ "swapgs", - /* 259 */ "syscall", - /* 25A */ "sysenter", - /* 25B */ "sysexit", - /* 25C */ "sysret", - /* 25D */ "test", - /* 25E */ "ucomisd", - /* 25F */ "ucomiss", - /* 260 */ "ud2", - /* 261 */ "unpckhpd", - /* 262 */ "unpckhps", - /* 263 */ "unpcklpd", - /* 264 */ "unpcklps", - /* 265 */ "vaddpd", - /* 266 */ "vaddps", - /* 267 */ "vaddsd", - /* 268 */ "vaddss", - /* 269 */ "vaddsubpd", - /* 26A */ "vaddsubps", - /* 26B */ "vaesdec", - /* 26C */ "vaesdeclast", - /* 26D */ "vaesenc", - /* 26E */ "vaesenclast", - /* 26F */ "vaesimc", - /* 270 */ "vaeskeygenassist", - /* 271 */ "vandnpd", - /* 272 */ "vandnps", - /* 273 */ "vandpd", - /* 274 */ "vandps", - /* 275 */ "vblendpd", - /* 276 */ "vblendps", - /* 277 */ "vblendvpd", - /* 278 */ "vblendvps", - /* 279 */ "vbroadcastsd", - /* 27A */ "vbroadcastss", - /* 27B */ "vcmppd", - /* 27C */ "vcmpps", - /* 27D */ "vcmpsd", - /* 27E */ "vcmpss", - /* 27F */ "vcomisd", - /* 280 */ "vcomiss", - /* 281 */ "vcvtdq2pd", - /* 282 */ "vcvtdq2ps", - /* 283 */ "vcvtpd2dq", - /* 284 */ "vcvtpd2ps", - /* 285 */ "vcvtps2dq", - /* 286 */ "vcvtps2pd", - /* 287 */ "vcvtsd2si", - /* 288 */ "vcvtsd2ss", - /* 289 */ "vcvtsi2sd", - /* 28A */ "vcvtsi2ss", - /* 28B */ "vcvtss2sd", - /* 28C */ "vcvtss2si", - /* 28D */ "vcvttpd2dq", - /* 28E */ "vcvttps2dq", - /* 28F */ "vcvttsd2si", - /* 290 */ "vcvttss2si", - /* 291 */ "vdivpd", - /* 292 */ "vdivps", - /* 293 */ "vdivsd", - /* 294 */ "vdivss", - /* 295 */ "vdppd", - /* 296 */ "vdpps", - /* 297 */ "verr", - /* 298 */ "verw", - /* 299 */ "vextractf128", - /* 29A */ "vextractps", - /* 29B */ "vhaddpd", - /* 29C */ "vhaddps", - /* 29D */ "vhsubpd", - /* 29E */ "vhsubps", - /* 29F */ "vinsertf128", - /* 2A0 */ "vinsertps", - /* 2A1 */ "vlddqu", - /* 2A2 */ "vmaskmovdqu", - /* 2A3 */ "vmaskmovpd", - /* 2A4 */ "vmaskmovps", - /* 2A5 */ "vmaxpd", - /* 2A6 */ "vmaxps", - /* 2A7 */ "vmaxsd", - /* 2A8 */ "vmaxss", - /* 2A9 */ "vmcall", - /* 2AA */ "vmclear", - /* 2AB */ "vminpd", - /* 2AC */ "vminps", - /* 2AD */ "vminsd", - /* 2AE */ "vminss", - /* 2AF */ "vmlaunch", - /* 2B0 */ "vmload", - /* 2B1 */ "vmmcall", - /* 2B2 */ "vmovapd", - /* 2B3 */ "vmovaps", - /* 2B4 */ "vmovd", - /* 2B5 */ "vmovddup", - /* 2B6 */ "vmovdqa", - /* 2B7 */ "vmovdqu", - /* 2B8 */ "vmovhlps", - /* 2B9 */ "vmovhpd", - /* 2BA */ "vmovhps", - /* 2BB */ "vmovlhps", - /* 2BC */ "vmovlpd", - /* 2BD */ "vmovlps", - /* 2BE */ "vmovmskpd", - /* 2BF */ "vmovmskps", - /* 2C0 */ "vmovntdq", - /* 2C1 */ "vmovntdqa", - /* 2C2 */ "vmovntpd", - /* 2C3 */ "vmovntps", - /* 2C4 */ "vmovq", - /* 2C5 */ "vmovsd", - /* 2C6 */ "vmovshdup", - /* 2C7 */ "vmovsldup", - /* 2C8 */ "vmovss", - /* 2C9 */ "vmovupd", - /* 2CA */ "vmovups", - /* 2CB */ "vmpsadbw", - /* 2CC */ "vmptrld", - /* 2CD */ "vmptrst", - /* 2CE */ "vmread", - /* 2CF */ "vmresume", - /* 2D0 */ "vmrun", - /* 2D1 */ "vmsave", - /* 2D2 */ "vmulpd", - /* 2D3 */ "vmulps", - /* 2D4 */ "vmulsd", - /* 2D5 */ "vmulss", - /* 2D6 */ "vmwrite", - /* 2D7 */ "vmxoff", - /* 2D8 */ "vmxon", - /* 2D9 */ "vorpd", - /* 2DA */ "vorps", - /* 2DB */ "vpabsb", - /* 2DC */ "vpabsd", - /* 2DD */ "vpabsw", - /* 2DE */ "vpackssdw", - /* 2DF */ "vpacksswb", - /* 2E0 */ "vpackusdw", - /* 2E1 */ "vpackuswb", - /* 2E2 */ "vpaddb", - /* 2E3 */ "vpaddd", - /* 2E4 */ "vpaddq", - /* 2E5 */ "vpaddsb", - /* 2E6 */ "vpaddsw", - /* 2E7 */ "vpaddusb", - /* 2E8 */ "vpaddusw", - /* 2E9 */ "vpaddw", - /* 2EA */ "vpalignr", - /* 2EB */ "vpand", - /* 2EC */ "vpandn", - /* 2ED */ "vpavgb", - /* 2EE */ "vpavgw", - /* 2EF */ "vpblendvb", - /* 2F0 */ "vpblendw", - /* 2F1 */ "vpclmulqdq", - /* 2F2 */ "vpcmpeqb", - /* 2F3 */ "vpcmpeqd", - /* 2F4 */ "vpcmpeqq", - /* 2F5 */ "vpcmpeqw", - /* 2F6 */ "vpcmpestri", - /* 2F7 */ "vpcmpestrm", - /* 2F8 */ "vpcmpgtb", - /* 2F9 */ "vpcmpgtd", - /* 2FA */ "vpcmpgtq", - /* 2FB */ "vpcmpgtw", - /* 2FC */ "vpcmpistri", - /* 2FD */ "vpcmpistrm", - /* 2FE */ "vperm2f128", - /* 2FF */ "vpermilpd", - /* 300 */ "vpermilps", - /* 301 */ "vpextrb", - /* 302 */ "vpextrd", - /* 303 */ "vpextrq", - /* 304 */ "vpextrw", - /* 305 */ "vphaddd", - /* 306 */ "vphaddsw", - /* 307 */ "vphaddw", - /* 308 */ "vphminposuw", - /* 309 */ "vphsubd", - /* 30A */ "vphsubsw", - /* 30B */ "vphsubw", - /* 30C */ "vpinsrb", - /* 30D */ "vpinsrd", - /* 30E */ "vpinsrq", - /* 30F */ "vpinsrw", - /* 310 */ "vpmaddubsw", - /* 311 */ "vpmaddwd", - /* 312 */ "vpmaxsb", - /* 313 */ "vpmaxsd", - /* 314 */ "vpmaxsw", - /* 315 */ "vpmaxub", - /* 316 */ "vpmaxud", - /* 317 */ "vpmaxuw", - /* 318 */ "vpminsb", - /* 319 */ "vpminsd", - /* 31A */ "vpminsw", - /* 31B */ "vpminub", - /* 31C */ "vpminud", - /* 31D */ "vpminuw", - /* 31E */ "vpmovmskb", - /* 31F */ "vpmovsxbd", - /* 320 */ "vpmovsxbq", - /* 321 */ "vpmovsxbw", - /* 322 */ "vpmovsxwd", - /* 323 */ "vpmovsxwq", - /* 324 */ "vpmovzxbd", - /* 325 */ "vpmovzxbq", - /* 326 */ "vpmovzxbw", - /* 327 */ "vpmovzxdq", - /* 328 */ "vpmovzxwd", - /* 329 */ "vpmovzxwq", - /* 32A */ "vpmuldq", - /* 32B */ "vpmulhrsw", - /* 32C */ "vpmulhuw", - /* 32D */ "vpmulhw", - /* 32E */ "vpmulld", - /* 32F */ "vpmullw", - /* 330 */ "vpor", - /* 331 */ "vpsadbw", - /* 332 */ "vpshufb", - /* 333 */ "vpshufd", - /* 334 */ "vpshufhw", - /* 335 */ "vpshuflw", - /* 336 */ "vpsignb", - /* 337 */ "vpsignd", - /* 338 */ "vpsignw", - /* 339 */ "vpslld", - /* 33A */ "vpslldq", - /* 33B */ "vpsllq", - /* 33C */ "vpsllw", - /* 33D */ "vpsrad", - /* 33E */ "vpsraw", - /* 33F */ "vpsrld", - /* 340 */ "vpsrldq", - /* 341 */ "vpsrlq", - /* 342 */ "vpsrlw", - /* 343 */ "vpsubb", - /* 344 */ "vpsubd", - /* 345 */ "vpsubq", - /* 346 */ "vpsubsb", - /* 347 */ "vpsubsw", - /* 348 */ "vpsubusb", - /* 349 */ "vpsubusw", - /* 34A */ "vpsubw", - /* 34B */ "vptest", - /* 34C */ "vpunpckhbw", - /* 34D */ "vpunpckhdq", - /* 34E */ "vpunpckhqdq", - /* 34F */ "vpunpckhwd", - /* 350 */ "vpunpcklbw", - /* 351 */ "vpunpckldq", - /* 352 */ "vpunpcklqdq", - /* 353 */ "vpunpcklwd", - /* 354 */ "vpxor", - /* 355 */ "vrcpps", - /* 356 */ "vrcpss", - /* 357 */ "vroundpd", - /* 358 */ "vroundps", - /* 359 */ "vroundsd", - /* 35A */ "vroundss", - /* 35B */ "vrsqrtps", - /* 35C */ "vrsqrtss", - /* 35D */ "vshufpd", - /* 35E */ "vshufps", - /* 35F */ "vsqrtpd", - /* 360 */ "vsqrtps", - /* 361 */ "vsqrtsd", - /* 362 */ "vsqrtss", - /* 363 */ "vstmxcsr", - /* 364 */ "vsubpd", - /* 365 */ "vsubps", - /* 366 */ "vsubsd", - /* 367 */ "vsubss", - /* 368 */ "vtestpd", - /* 369 */ "vtestps", - /* 36A */ "vucomisd", - /* 36B */ "vucomiss", - /* 36C */ "vunpckhpd", - /* 36D */ "vunpckhps", - /* 36E */ "vunpcklpd", - /* 36F */ "vunpcklps", - /* 370 */ "vxorpd", - /* 371 */ "vxorps", - /* 372 */ "vzeroall", - /* 373 */ "vzeroupper", - /* 374 */ "wait", - /* 375 */ "wbinvd", - /* 376 */ "wrmsr", - /* 377 */ "xadd", - /* 378 */ "xchg", - /* 379 */ "xcryptcbc", - /* 37A */ "xcryptcfb", - /* 37B */ "xcryptctr", - /* 37C */ "xcryptecb", - /* 37D */ "xcryptofb", - /* 37E */ "xgetbv", - /* 37F */ "xlatb", - /* 380 */ "xor", - /* 381 */ "xorpd", - /* 382 */ "xorps", - /* 383 */ "xrstor", - /* 384 */ "xsave", - /* 385 */ "xsetbv", - /* 386 */ "xsha1", - /* 387 */ "xsha256", - /* 388 */ "xstore", -}; - -} - -} diff --git a/VerteronDisassemblerEngine/VerteronDisassemblerEngine.vcxproj b/VerteronDisassemblerEngine/VerteronDisassemblerEngine.vcxproj deleted file mode 100644 index 0628199..0000000 --- a/VerteronDisassemblerEngine/VerteronDisassemblerEngine.vcxproj +++ /dev/null @@ -1,147 +0,0 @@ - - - - - Debug - Win32 - - - Debug - x64 - - - Release - Win32 - - - Release - x64 - - - - - - - - - - - - - - - - - - {F5C6F0A7-F75D-42BD-A8AB-A2D1D5F67099} - Win32Proj - VerteronDisassemblerEngine - - - - StaticLibrary - true - v120 - Unicode - - - StaticLibrary - true - v120 - Unicode - - - StaticLibrary - false - v120 - true - Unicode - - - StaticLibrary - false - v120 - true - Unicode - - - - - - - - - - - - - - - - - - - - - - - Level3 - Disabled - WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) - - - Windows - true - - - - - - - Level3 - Disabled - WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) - - - Windows - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) - - - Windows - true - true - true - - - - - Level3 - - - MaxSpeed - true - true - WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) - - - Windows - true - true - true - - - - - - \ No newline at end of file diff --git a/VerteronDisassemblerEngine/VerteronDisassemblerEngine.vcxproj.filters b/VerteronDisassemblerEngine/VerteronDisassemblerEngine.vcxproj.filters deleted file mode 100644 index e106092..0000000 --- a/VerteronDisassemblerEngine/VerteronDisassemblerEngine.vcxproj.filters +++ /dev/null @@ -1,17 +0,0 @@ - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/Examples/PerformanceTest/Main.cpp b/Zydis/Zydis.hpp similarity index 77% rename from Examples/PerformanceTest/Main.cpp rename to Zydis/Zydis.hpp index afe5a5f..4c77299 100644 --- a/Examples/PerformanceTest/Main.cpp +++ b/Zydis/Zydis.hpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,11 +26,14 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#include +***************************************************************************************************/ -int _tmain(int argc, _TCHAR* argv[]) -{ - // TODO: - return 0; -} +#ifndef _ZYDIS_DISASSEMBLER_HPP_ +#define _ZYDIS_DISASSEMBLER_HPP_ + +#include "ZydisInstructionDecoder.hpp" +#include "ZydisInstructionFormatter.hpp" +#include "ZydisSymbolResolver.hpp" +#include "ZydisUtils.hpp" + +#endif /*_ZYDIS_DISASSEMBLER_HPP_ */ \ No newline at end of file diff --git a/Zydis/ZydisAPI.cpp b/Zydis/ZydisAPI.cpp new file mode 100644 index 0000000..e26dc26 --- /dev/null +++ b/Zydis/ZydisAPI.cpp @@ -0,0 +1,649 @@ +/*************************************************************************************************** + + Zyan Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : Joel Höner + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +***************************************************************************************************/ + +#include "ZydisAPI.h" +#include "ZydisInstructionDecoder.hpp" +#include "ZydisInstructionFormatter.hpp" + +/* Static Checks ================================================================================ */ + +static_assert( + sizeof(ZydisOperandInfo) == sizeof(Zydis::OperandInfo), + "struct size mismatch"); + +static_assert( + sizeof(ZydisInstructionInfo) == sizeof(Zydis::InstructionInfo), + "struct size mismatch"); + +/* Error Handling =============================================================================== */ + +static uint32_t g_zydisLastError = ZYDIS_ERROR_SUCCESS; + +uint32_t ZydisGetLastError() +{ + return g_zydisLastError; +} + +void ZydisSetLastError(uint32_t errorCode) +{ + g_zydisLastError = errorCode; +} + +/* Conversion Helper ============================================================================ */ + +typedef enum _ZydisClassType +{ + ZYDIS_CONTEXT_INPUT = 0x00000080, + ZYDIS_CONTEXT_INPUT_CUSTOM = ZYDIS_CONTEXT_INPUT | 0x00000001, + ZYDIS_CONTEXT_INPUT_MEMORY = ZYDIS_CONTEXT_INPUT | 0x00000002, + ZYDIS_CONTEXT_INSTRUCTIONDECODER = 0x00000040, + ZYDIS_CONTEXT_INSTRUCTIONFORMATTER = 0x00000020, + ZYDIS_CONTEXT_INSTRUCTIONFORMATTER_CUSTOM = ZYDIS_CONTEXT_INSTRUCTIONFORMATTER | 0x00000001, + ZYDIS_CONTEXT_INSTRUCTIONFORMATTER_INTEL = ZYDIS_CONTEXT_INSTRUCTIONFORMATTER | 0x00000002, + ZYDIS_CONTEXT_SYMBOLRESOLVER = 0x00000010, + ZYDIS_CONTEXT_SYMBOLRESOLVER_CUSTOM = ZYDIS_CONTEXT_SYMBOLRESOLVER | 0x00000001, + ZYDIS_CONTEXT_SYMBOLRESOLVER_EXACT = ZYDIS_CONTEXT_SYMBOLRESOLVER | 0x00000002 +} ZydisClassType; + +/** + * @brief This helper class extends a zydis class with a type field. It is used by the C-bindings + * to check type correctness for input parameters. + * @param ZydisClassT The zydis class type. + */ +#pragma pack(push, 1) +template +class ZydisClassEx final +{ +private: + using FullClassT = ZydisClassEx; +public: + uint32_t type; + std::conditional_t::value, char, ZydisClassT> instance; +public: + /** + * @brief Constructor + * @param InstanceCtorArgsT The argument types for the constructor of the zydis class. + * @param classType The type of the zydis class. + * @param args... The arguments for the constructor of the zydis class. + */ + template< + typename ZydisClassTT=ZydisClassT, + std::enable_if_t::value, int> = 0, + typename... InstanceCtorArgsT> + ZydisClassEx(uint32_t classType, InstanceCtorArgsT... args) + : type(classType) + , instance(args...) { }; +public: + /** + * @brief Returns the class type. + * @return The assigned class type. + */ + uint32_t getClassType() const + { + return type; + } + /** + * @brief Returns the zydis class instance. + * @return Pointer to the zydis class instance. + */ + ZydisClassT* getInstance() + { + return reinterpret_cast(&instance); + } +public: + /** + * @brief Casts the given instance to @c ZydisClassEx. + * @param instance The zydis class instance. + * @return Pointer to the @c ZydisClassEx instance. + */ + static FullClassT* fromInstance(ZydisClassT* instance) + { + return reinterpret_cast( + reinterpret_cast(instance) - offsetof(FullClassT, instance)); + } +}; +#pragma pack(pop) + +/** + * @brief Creates a context by constructing a new wrapped zydis class instance. + * @param ContextClassT The context class. + * @param ZydisClassT The zydis class type. + * @param ZydisClassCtorArgsT The argument types for the constructor of the zydis class. + * @param classType The type of the zydis class. + * @param args... The arguments for the constructor of the zydis class. + */ +template +ContextClassT* ZydisCreateContext(uint32_t classType, ZydisClassCtorArgsT... args) +{ + auto instanceEx = new (std::nothrow) ZydisClassEx(classType, args...); + if (!instanceEx) + { + ZydisSetLastError(ZYDIS_ERROR_NOT_ENOUGH_MEMORY); + return nullptr; + } + // Return the original instance as context. + return reinterpret_cast(instanceEx->getInstance()); +} + +/** + * @brief Retrieves the zydis class instance of the given context. + * @param ContextClassT The context class. + * @param ZydisClassT The zydis class type. + * @param expectedType The expected type of the zydis class. + */ +template +ZydisClassT* ZydisRetrieveInstance(uint32_t expectedType, const ContextClassT* context) +{ + auto instanceEx = ZydisClassEx::fromInstance( + reinterpret_cast(const_cast(context))); + if ((instanceEx->getClassType() & expectedType) != expectedType) + { + ZydisSetLastError(ZYDIS_ERROR_INVALID_PARAMETER); + return nullptr; + } + // The context points to the same address as the instance. We just need to cast it. + return reinterpret_cast(const_cast(context)); +} + +/** + * @brief Creates a context by constructing a new wrapped zydis instance. + * @param ContextClassT The context class. + * @param ZydisClassT The zydis class type. + * @param expectedType The expected type of the zydis class. + */ +template +bool ZydisFreeContext(uint32_t expectedType, const ContextClassT* context) +{ + auto instanceEx = ZydisClassEx::fromInstance( + reinterpret_cast(const_cast(context))); + if ((instanceEx->getClassType() & expectedType) != expectedType) + { + ZydisSetLastError(ZYDIS_ERROR_INVALID_PARAMETER); + return false; + } + delete instanceEx; + return true; +} + +/* Input ======================================================================================== */ + +/** + * @brief Helper class for custom input implementations. + */ +class ZydisCustomInput : public Zydis::BaseInput +{ +private: + void* m_userData; + ZydisCustomDestructorT m_cbDestructor; + ZydisCustomInputPeekT m_cbPeek; + ZydisCustomInputNextT m_cbNext; + ZydisCustomInputIsEndOfInputT m_cbIsEndOfInput; + ZydisCustomInputGetPositionT m_cbGetPosition; + ZydisCustomInputSetPositionT m_cbSetPosition; +protected: + uint8_t internalInputPeek() override + { + return m_cbPeek(m_userData); + } + + uint8_t internalInputNext() override + { + return m_cbNext(m_userData); + } +public: + ZydisCustomInput(void* userData, + ZydisCustomInputPeekT cbPeek, ZydisCustomInputNextT cbNext, + ZydisCustomInputIsEndOfInputT cbIsEndOfInput, ZydisCustomInputGetPositionT cbGetPosition, + ZydisCustomInputSetPositionT cbSetPosition, ZydisCustomDestructorT cbDestructor) + : m_userData(userData) + , m_cbDestructor(cbDestructor) + , m_cbPeek(cbPeek) + , m_cbNext(cbNext) + , m_cbIsEndOfInput(cbIsEndOfInput) + , m_cbGetPosition(cbGetPosition) + , m_cbSetPosition(cbSetPosition) + { + + } + + ~ZydisCustomInput() override + { + if (m_cbDestructor) + { + m_cbDestructor(m_userData); + } + } +public: + bool isEndOfInput() const override + { + return m_cbIsEndOfInput(m_userData); + } + + uint64_t getPosition() const override + { + return m_cbGetPosition(m_userData); + } + + bool setPosition(uint64_t position) override + { + return m_cbSetPosition(m_userData, position); + } +}; + +ZydisInputContext* ZydisCreateCustomInput(void* userData, + ZydisCustomInputPeekT cbPeek, ZydisCustomInputNextT cbNext, + ZydisCustomInputIsEndOfInputT cbIsEndOfInput, ZydisCustomInputGetPositionT cbGetPosition, + ZydisCustomInputSetPositionT cbSetPosition, ZydisCustomDestructorT cbDestructor) +{ + if (!cbPeek || !cbNext || !cbIsEndOfInput || !cbGetPosition || !cbSetPosition) + { + ZydisSetLastError(ZYDIS_ERROR_INVALID_PARAMETER); + return nullptr; + } + return ZydisCreateContext(ZYDIS_CONTEXT_INPUT_CUSTOM, + userData, cbPeek, cbNext, cbIsEndOfInput, cbGetPosition, cbSetPosition, cbDestructor); +} + +ZydisInputContext* ZydisCreateMemoryInput(const void* buffer, size_t bufferLen) +{ + return ZydisCreateContext( + ZYDIS_CONTEXT_INPUT_MEMORY, buffer, bufferLen); +} + +bool ZydisIsEndOfInput(const ZydisInputContext* input, bool* isEndOfInput) +{ + Zydis::BaseInput* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INPUT, input); + if (!instance) + { + return false; + } + *isEndOfInput = instance->isEndOfInput(); + return true; +} + +bool ZydisGetInputPosition(const ZydisInputContext* input, uint64_t* position) +{ + Zydis::BaseInput* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INPUT, input); + if (!instance) + { + return false; + } + *position = instance->getPosition(); + return true; +} + +bool ZydisSetInputPosition(const ZydisInputContext* input, uint64_t position) +{ + Zydis::BaseInput* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INPUT, input); + if (!instance) + { + return false; + } + ZydisSetLastError(ZYDIS_ERROR_SUCCESS); + return instance->setPosition(position); +} + +bool ZydisFreeInput(const ZydisInputContext* input) +{ + return ZydisFreeContext(ZYDIS_CONTEXT_INPUT, input); +} + +/* InstructionDecoder =========================================================================== */ + +ZydisInstructionDecoderContext* ZydisCreateInstructionDecoder() +{ + return ZydisCreateContext( + ZYDIS_CONTEXT_INSTRUCTIONDECODER); +} + +ZydisInstructionDecoderContext* ZydisCreateInstructionDecoderEx( + const ZydisInputContext* input, ZydisDisassemblerMode disassemblerMode, + ZydisInstructionSetVendor preferredVendor, uint64_t instructionPointer) +{ + Zydis::BaseInput* object = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INPUT, input); + if (!object) + { + return nullptr; + } + return ZydisCreateContext( + ZYDIS_CONTEXT_INSTRUCTIONDECODER, object, + static_cast(disassemblerMode), + static_cast(preferredVendor), instructionPointer); +} + +bool ZydisDecodeInstruction(const ZydisInstructionDecoderContext* decoder, + ZydisInstructionInfo* info) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + ZydisSetLastError(ZYDIS_ERROR_SUCCESS); + return instance->decodeInstruction(*reinterpret_cast(info)); +} + +bool ZydisGetDataSource(const ZydisInstructionDecoderContext* decoder, + ZydisInputContext** input) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + *input = reinterpret_cast(instance->getDataSource()); + if (!input) + { + return false; + } + return true; +} + +bool ZydisSetDataSource(const ZydisInstructionDecoderContext* decoder, + ZydisInputContext* input) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + Zydis::BaseInput* object = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INPUT, input); + if (!object) + { + return false; + } + instance->setDataSource(object); + return true; +} + +bool ZydisGetDisassemblerMode(const ZydisInstructionDecoderContext* decoder, + ZydisDisassemblerMode* disassemblerMode) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + *disassemblerMode = static_cast(instance->getDisassemblerMode()); + return true; +} + +bool ZydisSetDisassemblerMode(const ZydisInstructionDecoderContext* decoder, + ZydisDisassemblerMode disassemblerMode) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + instance->setDisassemblerMode(static_cast(disassemblerMode)); + return true; +} + +bool ZydisGetPreferredVendor(const ZydisInstructionDecoderContext* decoder, + ZydisInstructionSetVendor* preferredVendor) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + *preferredVendor = static_cast(instance->getPreferredVendor()); + return true; +} + +bool ZydisSetPreferredVendor(const ZydisInstructionDecoderContext* decoder, + ZydisInstructionSetVendor preferredVendor) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + instance->setPreferredVendor(static_cast(preferredVendor)); + return true; +} + + bool ZydisGetInstructionPointer(const ZydisInstructionDecoderContext* decoder, + uint64_t* instructionPointer) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + *instructionPointer = instance->getInstructionPointer(); + return true; +} + +bool ZydisSetInstructionPointer(const ZydisInstructionDecoderContext* decoder, + uint64_t instructionPointer) +{ + Zydis::InstructionDecoder* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); + if (!instance) + { + return false; + } + instance->setInstructionPointer(instructionPointer); + return true; +} + +bool ZydisFreeInstructionDecoder(const ZydisInstructionDecoderContext* decoder) +{ + return ZydisFreeContext( + ZYDIS_CONTEXT_INSTRUCTIONDECODER, decoder); +} + +/* InstructionFormatter ========================================================================= */ + +ZydisInstructionFormatterContext* ZydisCreateCustomInstructionFormatter(/* TODO */) +{ + return nullptr; +} + +ZydisInstructionFormatterContext* ZydisCreateIntelInstructionFormatter() +{ + return ZydisCreateContext(ZYDIS_CONTEXT_INSTRUCTIONFORMATTER_INTEL); +} + +bool ZydisFormatInstruction(const ZydisInstructionFormatterContext* formatter, + const ZydisInstructionInfo* info, const char** instructionText) +{ + Zydis::BaseInstructionFormatter* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONFORMATTER, formatter); + if (!instance) + { + return false; + } + *instructionText = + instance->formatInstruction(*reinterpret_cast(info)); + return true; +} + +bool ZydisGetSymbolResolver(const ZydisInstructionFormatterContext* formatter, + ZydisSymbolResolverContext** resolver) +{ + Zydis::BaseInstructionFormatter* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONFORMATTER, formatter); + if (!instance) + { + return false; + } + *resolver = reinterpret_cast(instance->getSymbolResolver()); + if (!resolver) + { + return false; + } + return true; +} + +bool ZydisSetSymbolResolver(const ZydisInstructionFormatterContext* formatter, + ZydisSymbolResolverContext* resolver) +{ + Zydis::BaseInstructionFormatter* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_INSTRUCTIONFORMATTER, formatter); + if (!instance) + { + return false; + } + Zydis::BaseSymbolResolver* object = + ZydisRetrieveInstance(ZYDIS_CONTEXT_SYMBOLRESOLVER, resolver); + if (!object) + { + return false; + } + instance->setSymbolResolver(object); + return true; +} + +bool ZydisFreeInstructionFormatter(const ZydisInstructionFormatterContext* formatter) +{ + return ZydisFreeContext( + ZYDIS_CONTEXT_INSTRUCTIONFORMATTER, formatter); +} + +/* SymbolResolver =============================================================================== */ + +ZydisSymbolResolverContext* ZydisCreateCustomSymbolResolver(/*TODO*/) +{ + return nullptr; +} + +ZydisSymbolResolverContext* ZydisCreateExactSymbolResolver() +{ + return ZydisCreateContext( + ZYDIS_CONTEXT_SYMBOLRESOLVER_EXACT); +} + +bool ZydisResolveSymbol(const ZydisSymbolResolverContext* resolver, + const ZydisInstructionInfo* info, uint64_t address, const char** symbol, uint64_t* offset) +{ + Zydis::BaseSymbolResolver* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_SYMBOLRESOLVER, resolver); + if (!instance) + { + return false; + } + *symbol = instance->resolveSymbol(*reinterpret_cast(info), + address, *offset); + return true; +} + +bool ZydisExactSymbolResolverContainsSymbol( + const ZydisSymbolResolverContext* resolver, uint64_t address, bool* containsSymbol) +{ + Zydis::ExactSymbolResolver* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_SYMBOLRESOLVER_EXACT, resolver); + if (!instance) + { + return false; + } + *containsSymbol = instance->containsSymbol(address); + return true; +} + +bool ZydisExactSymbolResolverSetSymbol(const ZydisSymbolResolverContext* resolver, + uint64_t address, const char* name) +{ + Zydis::ExactSymbolResolver* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_SYMBOLRESOLVER_EXACT, resolver); + if (!instance) + { + return false; + } + instance->setSymbol(address, name); + return true; +} + +bool ZydisExactSymbolResolverRemoveSymbol(const ZydisSymbolResolverContext* resolver, + uint64_t address) +{ + Zydis::ExactSymbolResolver* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_SYMBOLRESOLVER_EXACT, resolver); + if (!instance) + { + return false; + } + instance->removeSymbol(address); + return true; +} + +bool ZydisExactSymbolResolverClear(const ZydisSymbolResolverContext* resolver) +{ + Zydis::ExactSymbolResolver* instance = + ZydisRetrieveInstance(ZYDIS_CONTEXT_SYMBOLRESOLVER_EXACT, resolver); + if (!instance) + { + return false; + } + instance->clear(); + return true; +} + +bool ZydisFreeSymbolResolver(const ZydisSymbolResolverContext* resolver) +{ + return ZydisFreeContext( + ZYDIS_CONTEXT_SYMBOLRESOLVER, resolver); +} + +/* ============================================================================================== */ \ No newline at end of file diff --git a/Zydis/ZydisAPI.h b/Zydis/ZydisAPI.h new file mode 100644 index 0000000..a5a8b29 --- /dev/null +++ b/Zydis/ZydisAPI.h @@ -0,0 +1,1627 @@ +/*************************************************************************************************** + + Zyan Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : Joel Höner + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +***************************************************************************************************/ + +#ifndef _ZYDIS_API_H_ +#define _ZYDIS_API_H_ + +#define Zydis_EXPORTS + +#include +#include +#include "ZydisExportConfig.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* Zydis Types ================================================================================== */ + +/** + * @brief Values that represent additional flags of a decoded instruction. + */ +typedef enum _ZydisInstructionFlags /* : uint32_t */ +{ + ZYDIS_IF_NONE = 0x00000000, + /** + * @brief The instruction was decoded in 16 bit disassembler mode. + */ + ZYDIS_IF_DISASSEMBLER_MODE_16 = 0x00000001, + /** + * @brief The instruction was decoded in 32 bit disassembler mode. + */ + ZYDIS_IF_DISASSEMBLER_MODE_32 = 0x00000002, + /** + * @brief The instruction was decoded in 64 bit disassembler mode. + */ + ZYDIS_IF_DISASSEMBLER_MODE_64 = 0x00000004, + /** + * @brief The instruction has a segment prefix (0x26, 0x2E, 0x36, 0x3E, 0x64, 0x65). + */ + ZYDIS_IF_PREFIX_SEGMENT = 0x00000008, + /** + * @brief The instruction has a lock prefix (0xF0). + */ + ZYDIS_IF_PREFIX_LOCK = 0x00000010, + /** + * @brief The instruction has a repne prefix (0xF2). + */ + ZYDIS_IF_PREFIX_REPNE = 0x00000020, + /** + * @brief The instruction has a rep prefix (0xF3). + */ + ZYDIS_IF_PREFIX_REP = 0x00000040, + /** + * @brief The instruction has an operand size prefix (0x66). + */ + ZYDIS_IF_PREFIX_OPERAND_SIZE = 0x00000080, + /** + * @brief The instruction has an address size prefix (0x67). + */ + ZYDIS_IF_PREFIX_ADDRESS_SIZE = 0x00000100, + /** + * @brief The instruction has a rex prefix (0x40 - 0x4F). + */ + ZYDIS_IF_PREFIX_REX = 0x00000200, + /** + * @brief The instruction has a vex prefix (0xC4 or 0xC5). + */ + ZYDIS_IF_PREFIX_VEX = 0x00000400, + /** + * @brief The instruction has a modrm byte. + */ + ZYDIS_IF_MODRM = 0x00000800, + /** + * @brief The instruction has a sib byte. + */ + ZYDIS_IF_SIB = 0x00001000, + /** + * @brief The instruction has an operand with a relative address. + */ + ZYDIS_IF_RELATIVE = 0x00002000, + /** + * @brief An error occured while decoding the instruction. + */ + ZYDIS_IF_ERROR_MASK = 0xFFF00000, + /** + * @brief End of input reached while decoding the instruction. + */ + ZYDIS_IF_ERROR_END_OF_INPUT = 0x00100000, + /** + * @brief The instruction length has exceeded the maximum of 15 bytes. + */ + ZYDIS_IF_ERROR_LENGTH = 0x00200000, + /** + * @brief The instruction is invalid. + */ + ZYDIS_IF_ERROR_INVALID = 0x00400000, + /** + * @brief The instruction is invalid in 64 bit mode. + */ + ZYDIS_IF_ERROR_INVALID_64 = 0x00800000, + /** + * @brief An error occured while decoding the instruction operands. + */ + ZYDIS_IF_ERROR_OPERAND = 0x01000000, + + ZYDIS_IF_FORCE_DWORD = 0x7FFFFFFF +} ZydisInstructionFlags; + +/** + * @brief Values that represent a cpu register. + */ +typedef enum _ZydisRegister /* : uint16_t */ +{ + ZYDIS_REG_NONE, + /* 8 bit general purpose registers */ + ZYDIS_REG_AL, ZYDIS_REG_CL, ZYDIS_REG_DL, ZYDIS_REG_BL, + ZYDIS_REG_AH, ZYDIS_REG_CH, ZYDIS_REG_DH, ZYDIS_REG_BH, + ZYDIS_REG_SPL, ZYDIS_REG_BPL, ZYDIS_REG_SIL, ZYDIS_REG_DIL, + ZYDIS_REG_R8B, ZYDIS_REG_R9B, ZYDIS_REG_R10B, ZYDIS_REG_R11B, + ZYDIS_REG_R12B, ZYDIS_REG_R13B, ZYDIS_REG_R14B, ZYDIS_REG_R15B, + /* 16 bit general purpose registers */ + ZYDIS_REG_AX, ZYDIS_REG_CX, ZYDIS_REG_DX, ZYDIS_REG_BX, + ZYDIS_REG_SP, ZYDIS_REG_BP, ZYDIS_REG_SI, ZYDIS_REG_DI, + ZYDIS_REG_R8W, ZYDIS_REG_R9W, ZYDIS_REG_R10W, ZYDIS_REG_R11W, + ZYDIS_REG_R12W, ZYDIS_REG_R13W, ZYDIS_REG_R14W, ZYDIS_REG_R15W, + /* 32 bit general purpose registers */ + ZYDIS_REG_EAX, ZYDIS_REG_ECX, ZYDIS_REG_EDX, ZYDIS_REG_EBX, + ZYDIS_REG_ESP, ZYDIS_REG_EBP, ZYDIS_REG_ESI, ZYDIS_REG_EDI, + ZYDIS_REG_R8D, ZYDIS_REG_R9D, ZYDIS_REG_R10D, ZYDIS_REG_R11D, + ZYDIS_REG_R12D, ZYDIS_REG_R13D, ZYDIS_REG_R14D, ZYDIS_REG_R15D, + /* 64 bit general purpose registers */ + ZYDIS_REG_RAX, ZYDIS_REG_RCX, ZYDIS_REG_RDX, ZYDIS_REG_RBX, + ZYDIS_REG_RSP, ZYDIS_REG_RBP, ZYDIS_REG_RSI, ZYDIS_REG_RDI, + ZYDIS_REG_R8, ZYDIS_REG_R9, ZYDIS_REG_R10, ZYDIS_REG_R11, + ZYDIS_REG_R12, ZYDIS_REG_R13, ZYDIS_REG_R14, ZYDIS_REG_R15, + /* segment registers */ + ZYDIS_REG_ES, ZYDIS_REG_CS, ZYDIS_REG_SS, + ZYDIS_REG_DS, ZYDIS_REG_FS, ZYDIS_REG_GS, + /* control registers */ + ZYDIS_REG_CR0, ZYDIS_REG_CR1, ZYDIS_REG_CR2, ZYDIS_REG_CR3, + ZYDIS_REG_CR4, ZYDIS_REG_CR5, ZYDIS_REG_CR6, ZYDIS_REG_CR7, + ZYDIS_REG_CR8, ZYDIS_REG_CR9, ZYDIS_REG_CR10, ZYDIS_REG_CR11, + ZYDIS_REG_CR12, ZYDIS_REG_CR13, ZYDIS_REG_CR14, ZYDIS_REG_CR15, + /* debug registers */ + ZYDIS_REG_DR0, ZYDIS_REG_DR1, ZYDIS_REG_DR2, ZYDIS_REG_DR3, + ZYDIS_REG_DR4, ZYDIS_REG_DR5, ZYDIS_REG_DR6, ZYDIS_REG_DR7, + ZYDIS_REG_DR8, ZYDIS_REG_DR9, ZYDIS_REG_DR10, ZYDIS_REG_DR11, + ZYDIS_REG_DR12, ZYDIS_REG_DR13, ZYDIS_REG_DR14, ZYDIS_REG_DR15, + /* mmx registers */ + ZYDIS_REG_MM0, ZYDIS_REG_MM1, ZYDIS_REG_MM2, ZYDIS_REG_MM3, + ZYDIS_REG_MM4, ZYDIS_REG_MM5, ZYDIS_REG_MM6, ZYDIS_REG_MM7, + /* x87 registers */ + ZYDIS_REG_ST0, ZYDIS_REG_ST1, ZYDIS_REG_ST2, ZYDIS_REG_ST3, + ZYDIS_REG_ST4, ZYDIS_REG_ST5, ZYDIS_REG_ST6, ZYDIS_REG_ST7, + /* extended multimedia registers */ + ZYDIS_REG_XMM0, ZYDIS_REG_XMM1, ZYDIS_REG_XMM2, ZYDIS_REG_XMM3, + ZYDIS_REG_XMM4, ZYDIS_REG_XMM5, ZYDIS_REG_XMM6, ZYDIS_REG_XMM7, + ZYDIS_REG_XMM8, ZYDIS_REG_XMM9, ZYDIS_REG_XMM10, ZYDIS_REG_XMM11, + ZYDIS_REG_XMM12, ZYDIS_REG_XMM13, ZYDIS_REG_XMM14, ZYDIS_REG_XMM15, + /* 256 bit multimedia registers */ + ZYDIS_REG_YMM0, ZYDIS_REG_YMM1, ZYDIS_REG_YMM2, ZYDIS_REG_YMM3, + ZYDIS_REG_YMM4, ZYDIS_REG_YMM5, ZYDIS_REG_YMM6, ZYDIS_REG_YMM7, + ZYDIS_REG_YMM8, ZYDIS_REG_YMM9, ZYDIS_REG_YMM10, ZYDIS_REG_YMM11, + ZYDIS_REG_YMM12, ZYDIS_REG_YMM13, ZYDIS_REG_YMM14, YMM15, + /* instruction pointer register */ + ZYDIS_REG_RIP, + + ZYDIS_REG_FORCE_WORD = 0x7FFF +} ZydisRegister; + +/** + * @brief Values that represent the type of a decoded operand. + */ +typedef enum _ZydisOperandType /*: uint8_t*/ +{ + /** + * @brief The operand is not used. + */ + ZYDIS_OPTYPE_NONE, + /** + * @brief The operand is a register operand. + */ + ZYDIS_OPTYPE_REGISTER, + /** + * @brief The operand is a memory operand. + */ + ZYDIS_OPTYPE_MEMORY, + /** + * @brief The operand is a pointer operand. + */ + ZYDIS_OPTYPE_POINTER, + /** + * @brief The operand is an immediate operand. + */ + ZYDIS_OPTYPE_IMMEDIATE, + /** + * @brief The operand is a relative immediate operand. + */ + ZYDIS_OPTYPE_REL_IMMEDIATE, + /** + * @brief The operand is a constant value. + */ + ZYDIS_OPTYPE_CONSTANT +} ZydisOperandType; + +/** + * @brief Values that represent the operand access mode. + */ +typedef enum _ZydisOperandAccessMode /* : uint8_t */ +{ + ZYDIS_OPACCESSMODE_NA, + /** + * @brief The operand is accessed in read-only mode. + */ + ZYDIS_OPACCESSMODE_READ, + /** + * @brief The operand is accessed in write mode. + */ + ZYDIS_OPACCESSMODE_WRITE, + /** + * @brief The operand is accessed in read-write mode. + */ + ZYDIS_OPACCESSMODE_READWRITE +} ZydisOperandAccessMode; + +/** + * @brief This struct holds information about a decoded operand. + */ +typedef struct _ZydisOperandInfo +{ + /** + * @brief The type of the operand. + * @see ZydisOperandType + */ + uint8_t type; + /** + * @brief The size of the operand. + */ + uint16_t size; + /** + * @brief The operand access mode. + * @see ZydisOperandAccessMode + */ + uint8_t access_mode; + /** + * @brief The base register. + * @see ZydisRegister + */ + uint16_t base; + /** + * @brief The index register. + * @see ZydisRegister + */ + uint16_t index; + /** + * @brief The scale factor. + */ + uint8_t scale; + /** + * @brief The lvalue offset. If the @c offset is zero and the operand @c type is not + * @c CONSTANT, no lvalue is present. + */ + uint8_t offset; + /** + * @brief Signals, if the lval is signed. + */ + bool signed_lval; + /** + * @brief The lvalue. + */ + union { + int8_t sbyte; + uint8_t ubyte; + int16_t sword; + uint16_t uword; + int32_t sdword; + uint32_t udword; + int64_t sqword; + uint64_t uqword; + struct { + uint16_t seg; + uint32_t off; + } ptr; + } lval; +} ZydisOperandInfo; + +/** + * @brief This struct holds information about a decoded instruction. + */ +typedef struct _ZydisInstructionInfo +{ + /** + * @brief The instruction flags. + */ + uint32_t flags; + /** + * @brief The instruction mnemonic. + * @see ZydisInstructionMnemonic + */ + uint16_t mnemonic; + /** + * @brief The total length of the instruction. + */ + uint8_t length; + /** + * @brief Contains all bytes of the instruction. + */ + uint8_t data[15]; + /** + * @brief The length of the instruction opcodes. + */ + uint8_t opcode_length; + /** + * @brief The instruction opcodes. + */ + uint8_t opcode[3]; + /** + * @brief The operand mode. + */ + uint8_t operand_mode; + /** + * @brief The address mode. + */ + uint8_t address_mode; + /** + * @brief The decoded operands. + */ + ZydisOperandInfo operand[4]; + /** + * @brief The segment register. This value will default to @c NONE, if no segment register + * prefix is present. + * @see ZydisRegister + */ + uint16_t segment; + /** + * @brief The rex prefix byte. + */ + uint8_t rex; + /** + * @brief When 1, a 64-bit operand size is used. Otherwise, when 0, the default operand size + * is used. + */ + uint8_t rex_w; + /** + * @brief This 1-bit value is an extension to the MODRM.reg field. + */ + uint8_t rex_r; + /** + * @brief This 1-bit value is an extension to the SIB.index field. + */ + uint8_t rex_x; + /** + * @brief This 1-bit value is an extension to the MODRM.rm field or the SIB.base field. + */ + uint8_t rex_b; + /** + * @brief The modrm byte. + */ + uint8_t modrm; + /** + * @brief The modrm modus bits. When this field is b11, then register-direct addressing mode + * is used; otherwise register-indirect addressing mode is used. + */ + uint8_t modrm_mod; + /** + * @brief The modrm register bits. The REX.R, VEX.~R or XOP.~R field can extend this field + * with 1 most-significant bit to 4 bits total. + */ + uint8_t modrm_reg; + /** + * @brief The extended modrm register bits. If the instruction definition does not have the + * @c IDF_ACCEPTS_REXR flag set, this value defaults to the normal @c modrm_reg + * field. + */ + uint8_t modrm_reg_ext; + /** + * @brief The modrm register/memory bits. Specifies a direct or indirect register operand, + * optionally with a displacement. The REX.B, VEX.~B or XOP.~B field can extend this + * field with 1 most-significant bit to 4 bits total. + */ + uint8_t modrm_rm; + /** + * @brief The extended modrm register/memory bits. If the instruction definition does not + * have the @c IDF_ACCEPTS_REXB flag set, this value defaults to the normal + * @c modrm_rm field. + */ + uint8_t modrm_rm_ext; + /** + * @brief The sib byte. + */ + uint8_t sib; + /** + * @brief This field indicates the scaling factor of SIB.index. + */ + uint8_t sib_scale; + /** + * @brief The index register to use. The REX.X, VEX.~X or XOP.~X field can extend this field + * with 1 most-significant bit to 4 bits total. + */ + uint8_t sib_index; + /** + * @brief The extended index register. If the instruction definition does not have the + * @c IDF_ACCEPTS_REXX flag set, this value defaults to the normal @c sib_index + * field. + */ + uint8_t sib_index_ext; + /** + * @brief The base register to use. The REX.B, VEX.~B or XOP.~B field can extend this field + * with 1 most-significant bit to 4 bits total. + */ + uint8_t sib_base; + /** + * @brief The extended base register. If the instruction definition does not have the + * @c IDF_ACCEPTS_REXB flag set, this value defaults to the normal @c sib_index + * field. + */ + uint8_t sib_base_ext; + /** + * @brief The primary vex prefix byte. + */ + uint8_t vex_op; + /** + * @brief The second vex prefix byte. + */ + uint8_t vex_b1; + /** + * @brief The third vex prefix byte. + */ + uint8_t vex_b2; + /** + * @brief This 1-bit value is an 'inverted' extension to the MODRM.reg field. The inverse of + * REX.R. + */ + uint8_t vex_r; + /** + * @brief This 1-bit value is an 'inverted' extension to the SIB.index field. The inverse of + * REX.X. + */ + uint8_t vex_x; + /** + * @brief This 1-bit value is an 'inverted' extension to the MODRM.rm field or the SIB.base + * field. The inverse of REX.B. + */ + uint8_t vex_b; + /** + * @brief Specifies the opcode map to use. + * 00 = 0x0F + * 01 = 0x0F 0x38 + * 02 = 0x0F 0x3A + */ + uint8_t vex_m_mmmm; + /** + * @brief For integer instructions: when 1, a 64-bit operand size is used; otherwise, + * when 0, the default operand size is used (equivalent with REX.W). For non-integer + * instructions, this bit is a general opcode extension bit. + */ + uint8_t vex_w; + /** + * @brief An additional operand for the instruction. The value of the XMM or YMM register + * is 'inverted'. + */ + uint8_t vex_vvvv; + /** + * @brief When 0, a 128-bit vector lengh is used. Otherwise, when 1, a 256-bit vector length + * is used. + */ + uint8_t vex_l; + /** + * @brief Specifies an implied mandatory prefix for the opcode. + * 00 = none + * 01 = 0x66 + * 10 = 0xF3 + * 11 = 0xF2 + */ + uint8_t vex_pp; + /** + * @brief The effectively used REX/VEX.w value. If the instruction definition does not have + * the @c IDF_ACCEPTS_REXW flag set, this value defaults to zero. + */ + uint8_t eff_rexvex_w; + /** + * @brief The effectively used REX/VEX.r value. If the instruction definition does not have + * the @c IDF_ACCEPTS_REXR flag set, this value defaults to zero. + */ + uint8_t eff_rexvex_r; + /** + * @brief The effectively used REX/VEX.x value. If the instruction definition does not have + * the @c IDF_ACCEPTS_REXX flag set, this value defaults to zero. + */ + uint8_t eff_rexvex_x; + /** + * @brief The effectively used REX/VEX.b value. If the instruction definition does not have + * the @c IDF_ACCEPTS_REXB flag set, this value defaults to zero. + */ + uint8_t eff_rexvex_b; + /** + * @brief The effectively used VEX.l value. If the instruction definition does not have + * the @c IDF_ACCEPTS_VEXL flag set, this value defaults to zero. + */ + uint8_t eff_vex_l; + /** + * @brief The instruction definition. + */ + const void* instrDefinition; /* TODO: Port instruction definition types */ + /** + * @brief The instruction address points to the current instruction (relative to the + * initial instruction pointer). + */ + uint64_t instrAddress; + /** + * @brief The instruction pointer points to the address of the next instruction (relative + * to the initial instruction pointer). + * This field is used to properly format relative instructions. + */ + uint64_t instrPointer; +} ZydisInstructionInfo; + +/* Context Declarations ========================================================================= */ + +typedef struct _ZydisInputContext { int dummy; } ZydisInputContext; + +typedef struct _ZydisInstructionDecoderContext { int dummy; } ZydisInstructionDecoderContext; + +typedef struct _ZydisInstructionFormatterContext { int dummy; } ZydisInstructionFormatterContext; + +typedef struct _ZydisSymbolResolverContext { int dummy; } ZydisSymbolResolverContext; + +/* Callback Declarations ======================================================================== */ + +/* General -------------------------------------------------------------------------------------- */ + +typedef void (*ZydisCustomDestructorT)(void* userData); + +/* Input ---------------------------------------------------------------------------------------- */ + +typedef uint8_t (*ZydisCustomInputPeekT)(void* userData); +typedef uint8_t (*ZydisCustomInputNextT)(void* userData); +typedef bool (*ZydisCustomInputIsEndOfInputT)(void* userData); +typedef uint64_t (*ZydisCustomInputGetPositionT)(void* userData); +typedef bool (*ZydisCustomInputSetPositionT)(void* userData, uint64_t position); + +/* InstructionFormatter ------------------------------------------------------------------------- */ + +// TODO: + +/* SymbolResolver ------------------------------------------------------------------------------- */ + +// TODO: + +/* Error Handling =============================================================================== */ + +typedef enum _ZydisErrorCode /* : uint8_t */ +{ + ZYDIS_ERROR_SUCCESS, + ZYDIS_ERROR_UNKNOWN, + ZYDIS_ERROR_NOT_ENOUGH_MEMORY, + ZYDIS_ERROR_INVALID_PARAMETER +} ZydisErrorCode; + +ZYDIS_EXPORT uint32_t ZydisGetLastError(); + +/* Input ======================================================================================== */ + +ZYDIS_EXPORT ZydisInputContext* ZydisCreateCustomInput(void* userData, + ZydisCustomInputPeekT cbPeek, ZydisCustomInputNextT cbNext, + ZydisCustomInputIsEndOfInputT cbIsEndOfInput, ZydisCustomInputGetPositionT cbGetPosition, + ZydisCustomInputSetPositionT cbSetPosition, ZydisCustomDestructorT cbDestructor); + +ZYDIS_EXPORT ZydisInputContext* ZydisCreateMemoryInput(const void* buffer, size_t bufferLen); + +ZYDIS_EXPORT bool ZydisIsEndOfInput(const ZydisInputContext* input, bool* isEndOfInput); + +ZYDIS_EXPORT bool ZydisGetInputPosition(const ZydisInputContext* input, uint64_t* position); + +ZYDIS_EXPORT bool ZydisSetInputPosition(const ZydisInputContext* input, uint64_t position); + +ZYDIS_EXPORT bool ZydisFreeInput(const ZydisInputContext* input); + +/* InstructionDecoder =========================================================================== */ + +/** + * @brief Values that represent a disassembler mode. + */ +typedef enum _ZydisDisassemblerMode /* : uint8_t */ +{ + ZYDIS_DM_M16BIT, + ZYDIS_DM_M32BIT, + ZYDIS_DM_M64BIT +} ZydisDisassemblerMode; + +/** + * @brief Values that represent an instruction-set vendor. + */ +typedef enum _ZydisInstructionSetVendor /* : uint8_t */ +{ + ZYDIS_ISV_ANY, + ZYDIS_ISV_INTEL, + ZYDIS_ISV_AMD +} ZydisInstructionSetVendor; + +ZYDIS_EXPORT ZydisInstructionDecoderContext* ZydisCreateInstructionDecoder(); + +ZYDIS_EXPORT ZydisInstructionDecoderContext* ZydisCreateInstructionDecoderEx( + const ZydisInputContext* input, ZydisDisassemblerMode disassemblerMode, + ZydisInstructionSetVendor preferredVendor, uint64_t instructionPointer); + +ZYDIS_EXPORT bool ZydisDecodeInstruction(const ZydisInstructionDecoderContext* decoder, + ZydisInstructionInfo* info); + +ZYDIS_EXPORT bool ZydisGetDataSource(const ZydisInstructionDecoderContext* decoder, + ZydisInputContext** input); + +ZYDIS_EXPORT bool ZydisSetDataSource(const ZydisInstructionDecoderContext* decoder, + ZydisInputContext* input); + +ZYDIS_EXPORT bool ZydisGetDisassemblerMode(const ZydisInstructionDecoderContext* decoder, + ZydisDisassemblerMode* disassemblerMode); + +ZYDIS_EXPORT bool ZydisSetDisassemblerMode(const ZydisInstructionDecoderContext* decoder, + ZydisDisassemblerMode disassemblerMode); + +ZYDIS_EXPORT bool ZydisGetPreferredVendor(const ZydisInstructionDecoderContext* decoder, + ZydisInstructionSetVendor* preferredVendor); + +ZYDIS_EXPORT bool ZydisSetPreferredVendor(const ZydisInstructionDecoderContext* decoder, + ZydisInstructionSetVendor preferredVendor); + + ZYDIS_EXPORT bool ZydisGetInstructionPointer(const ZydisInstructionDecoderContext* decoder, + uint64_t* instructionPointer); + +ZYDIS_EXPORT bool ZydisSetInstructionPointer(const ZydisInstructionDecoderContext* decoder, + uint64_t instructionPointer); + +ZYDIS_EXPORT bool ZydisFreeInstructionDecoder(const ZydisInstructionDecoderContext* decoder); + +/* InstructionFormatter ========================================================================= */ + +ZYDIS_EXPORT ZydisInstructionFormatterContext* ZydisCreateCustomInstructionFormatter(/*TODO*/); + +ZYDIS_EXPORT ZydisInstructionFormatterContext* ZydisCreateIntelInstructionFormatter(); + +ZYDIS_EXPORT bool ZydisFormatInstruction(const ZydisInstructionFormatterContext* formatter, + const ZydisInstructionInfo* info, const char** instructionText); + +ZYDIS_EXPORT bool ZydisGetSymbolResolver(const ZydisInstructionFormatterContext* formatter, + ZydisSymbolResolverContext** resolver); + +ZYDIS_EXPORT bool ZydisSetSymbolResolver(const ZydisInstructionFormatterContext* formatter, + ZydisSymbolResolverContext* resolver); + +ZYDIS_EXPORT bool ZydisFreeInstructionFormatter(const ZydisInstructionFormatterContext* formatter); + +/* SymbolResolver =============================================================================== */ + +ZYDIS_EXPORT ZydisSymbolResolverContext* ZydisCreateCustomSymbolResolver(/*TODO*/); + +ZYDIS_EXPORT ZydisSymbolResolverContext* ZydisCreateExactSymbolResolver(); + +ZYDIS_EXPORT bool ZydisResolveSymbol(const ZydisSymbolResolverContext* resolver, + const ZydisInstructionInfo* info, uint64_t address, const char** symbol, uint64_t* offset); + +ZYDIS_EXPORT bool ZydisExactSymbolResolverContainsSymbol( + const ZydisSymbolResolverContext* resolver, uint64_t address, bool* containsSymbol); + +ZYDIS_EXPORT bool ZydisExactSymbolResolverSetSymbol(const ZydisSymbolResolverContext* resolver, + uint64_t address, const char** symbol); + +ZYDIS_EXPORT bool ZydisExactSymbolResolverRemoveSymbol(const ZydisSymbolResolverContext* resolver, + uint64_t address); + +ZYDIS_EXPORT bool ZydisExactSymbolResolverClear(const ZydisSymbolResolverContext* resolver); + +ZYDIS_EXPORT bool ZydisFreeSymbolResolver(const ZydisSymbolResolverContext* resolver); + +/* Opcode Table ================================================================================= */ + +/** + * @brief Values that represent an instruction mnemonic. + */ +typedef enum _ZydisInstructionMnemonic /* : uint16_t */ +{ + /* 000 */ ZYDIS_MNEM_INVALID, + /* 001 */ ZYDIS_MNEM_AAA, + /* 002 */ ZYDIS_MNEM_AAD, + /* 003 */ ZYDIS_MNEM_AAM, + /* 004 */ ZYDIS_MNEM_AAS, + /* 005 */ ZYDIS_MNEM_ADC, + /* 006 */ ZYDIS_MNEM_ADD, + /* 007 */ ZYDIS_MNEM_ADDPD, + /* 008 */ ZYDIS_MNEM_ADDPS, + /* 009 */ ZYDIS_MNEM_ADDSD, + /* 00A */ ZYDIS_MNEM_ADDSS, + /* 00B */ ZYDIS_MNEM_ADDSUBPD, + /* 00C */ ZYDIS_MNEM_ADDSUBPS, + /* 00D */ ZYDIS_MNEM_AESDEC, + /* 00E */ ZYDIS_MNEM_AESDECLAST, + /* 00F */ ZYDIS_MNEM_AESENC, + /* 010 */ ZYDIS_MNEM_AESENCLAST, + /* 011 */ ZYDIS_MNEM_AESIMC, + /* 012 */ ZYDIS_MNEM_AESKEYGENASSIST, + /* 013 */ ZYDIS_MNEM_AND, + /* 014 */ ZYDIS_MNEM_ANDNPD, + /* 015 */ ZYDIS_MNEM_ANDNPS, + /* 016 */ ZYDIS_MNEM_ANDPD, + /* 017 */ ZYDIS_MNEM_ANDPS, + /* 018 */ ZYDIS_MNEM_ARPL, + /* 019 */ ZYDIS_MNEM_BLENDPD, + /* 01A */ ZYDIS_MNEM_BLENDPS, + /* 01B */ ZYDIS_MNEM_BLENDVPD, + /* 01C */ ZYDIS_MNEM_BLENDVPS, + /* 01D */ ZYDIS_MNEM_BOUND, + /* 01E */ ZYDIS_MNEM_BSF, + /* 01F */ ZYDIS_MNEM_BSR, + /* 020 */ ZYDIS_MNEM_BSWAP, + /* 021 */ ZYDIS_MNEM_BT, + /* 022 */ ZYDIS_MNEM_BTC, + /* 023 */ ZYDIS_MNEM_BTR, + /* 024 */ ZYDIS_MNEM_BTS, + /* 025 */ ZYDIS_MNEM_CALL, + /* 026 */ ZYDIS_MNEM_CBW, + /* 027 */ ZYDIS_MNEM_CDQ, + /* 028 */ ZYDIS_MNEM_CDQE, + /* 029 */ ZYDIS_MNEM_CLC, + /* 02A */ ZYDIS_MNEM_CLD, + /* 02B */ ZYDIS_MNEM_CLFLUSH, + /* 02C */ ZYDIS_MNEM_CLGI, + /* 02D */ ZYDIS_MNEM_CLI, + /* 02E */ ZYDIS_MNEM_CLTS, + /* 02F */ ZYDIS_MNEM_CMC, + /* 030 */ ZYDIS_MNEM_CMOVA, + /* 031 */ ZYDIS_MNEM_CMOVAE, + /* 032 */ ZYDIS_MNEM_CMOVB, + /* 033 */ ZYDIS_MNEM_CMOVBE, + /* 034 */ ZYDIS_MNEM_CMOVE, + /* 035 */ ZYDIS_MNEM_CMOVG, + /* 036 */ ZYDIS_MNEM_CMOVGE, + /* 037 */ ZYDIS_MNEM_CMOVL, + /* 038 */ ZYDIS_MNEM_CMOVLE, + /* 039 */ ZYDIS_MNEM_CMOVNE, + /* 03A */ ZYDIS_MNEM_CMOVNO, + /* 03B */ ZYDIS_MNEM_CMOVNP, + /* 03C */ ZYDIS_MNEM_CMOVNS, + /* 03D */ ZYDIS_MNEM_CMOVO, + /* 03E */ ZYDIS_MNEM_CMOVP, + /* 03F */ ZYDIS_MNEM_CMOVS, + /* 040 */ ZYDIS_MNEM_CMP, + /* 041 */ ZYDIS_MNEM_CMPPD, + /* 042 */ ZYDIS_MNEM_CMPPS, + /* 043 */ ZYDIS_MNEM_CMPSB, + /* 044 */ ZYDIS_MNEM_CMPSD, + /* 045 */ ZYDIS_MNEM_CMPSQ, + /* 046 */ ZYDIS_MNEM_CMPSS, + /* 047 */ ZYDIS_MNEM_CMPSW, + /* 048 */ ZYDIS_MNEM_CMPXCHG, + /* 049 */ ZYDIS_MNEM_CMPXCHG16B, + /* 04A */ ZYDIS_MNEM_CMPXCHG8B, + /* 04B */ ZYDIS_MNEM_COMISD, + /* 04C */ ZYDIS_MNEM_COMISS, + /* 04D */ ZYDIS_MNEM_CPUID, + /* 04E */ ZYDIS_MNEM_CQO, + /* 04F */ ZYDIS_MNEM_CRC32, + /* 050 */ ZYDIS_MNEM_CVTDQ2PD, + /* 051 */ ZYDIS_MNEM_CVTDQ2PS, + /* 052 */ ZYDIS_MNEM_CVTPD2DQ, + /* 053 */ ZYDIS_MNEM_CVTPD2PI, + /* 054 */ ZYDIS_MNEM_CVTPD2PS, + /* 055 */ ZYDIS_MNEM_CVTPI2PD, + /* 056 */ ZYDIS_MNEM_CVTPI2PS, + /* 057 */ ZYDIS_MNEM_CVTPS2DQ, + /* 058 */ ZYDIS_MNEM_CVTPS2PD, + /* 059 */ ZYDIS_MNEM_CVTPS2PI, + /* 05A */ ZYDIS_MNEM_CVTSD2SI, + /* 05B */ ZYDIS_MNEM_CVTSD2SS, + /* 05C */ ZYDIS_MNEM_CVTSI2SD, + /* 05D */ ZYDIS_MNEM_CVTSI2SS, + /* 05E */ ZYDIS_MNEM_CVTSS2SD, + /* 05F */ ZYDIS_MNEM_CVTSS2SI, + /* 060 */ ZYDIS_MNEM_CVTTPD2DQ, + /* 061 */ ZYDIS_MNEM_CVTTPD2PI, + /* 062 */ ZYDIS_MNEM_CVTTPS2DQ, + /* 063 */ ZYDIS_MNEM_CVTTPS2PI, + /* 064 */ ZYDIS_MNEM_CVTTSD2SI, + /* 065 */ ZYDIS_MNEM_CVTTSS2SI, + /* 066 */ ZYDIS_MNEM_CWD, + /* 067 */ ZYDIS_MNEM_CWDE, + /* 068 */ ZYDIS_MNEM_DAA, + /* 069 */ ZYDIS_MNEM_DAS, + /* 06A */ ZYDIS_MNEM_DEC, + /* 06B */ ZYDIS_MNEM_DIV, + /* 06C */ ZYDIS_MNEM_DIVPD, + /* 06D */ ZYDIS_MNEM_DIVPS, + /* 06E */ ZYDIS_MNEM_DIVSD, + /* 06F */ ZYDIS_MNEM_DIVSS, + /* 070 */ ZYDIS_MNEM_DPPD, + /* 071 */ ZYDIS_MNEM_DPPS, + /* 072 */ ZYDIS_MNEM_EMMS, + /* 073 */ ZYDIS_MNEM_ENTER, + /* 074 */ ZYDIS_MNEM_EXTRACTPS, + /* 075 */ ZYDIS_MNEM_F2XM1, + /* 076 */ ZYDIS_MNEM_FABS, + /* 077 */ ZYDIS_MNEM_FADD, + /* 078 */ ZYDIS_MNEM_FADDP, + /* 079 */ ZYDIS_MNEM_FBLD, + /* 07A */ ZYDIS_MNEM_FBSTP, + /* 07B */ ZYDIS_MNEM_FCHS, + /* 07C */ ZYDIS_MNEM_FCLEX, + /* 07D */ ZYDIS_MNEM_FCMOVB, + /* 07E */ ZYDIS_MNEM_FCMOVBE, + /* 07F */ ZYDIS_MNEM_FCMOVE, + /* 080 */ ZYDIS_MNEM_FCMOVNB, + /* 081 */ ZYDIS_MNEM_FCMOVNBE, + /* 082 */ ZYDIS_MNEM_FCMOVNE, + /* 083 */ ZYDIS_MNEM_FCMOVNU, + /* 084 */ ZYDIS_MNEM_FCMOVU, + /* 085 */ ZYDIS_MNEM_FCOM, + /* 086 */ ZYDIS_MNEM_FCOM2, + /* 087 */ ZYDIS_MNEM_FCOMI, + /* 088 */ ZYDIS_MNEM_FCOMIP, + /* 089 */ ZYDIS_MNEM_FCOMP, + /* 08A */ ZYDIS_MNEM_FCOMP3, + /* 08B */ ZYDIS_MNEM_FCOMP5, + /* 08C */ ZYDIS_MNEM_FCOMPP, + /* 08D */ ZYDIS_MNEM_FCOS, + /* 08E */ ZYDIS_MNEM_FDECSTP, + /* 08F */ ZYDIS_MNEM_FDIV, + /* 090 */ ZYDIS_MNEM_FDIVP, + /* 091 */ ZYDIS_MNEM_FDIVR, + /* 092 */ ZYDIS_MNEM_FDIVRP, + /* 093 */ ZYDIS_MNEM_FEMMS, + /* 094 */ ZYDIS_MNEM_FFREE, + /* 095 */ ZYDIS_MNEM_FFREEP, + /* 096 */ ZYDIS_MNEM_FIADD, + /* 097 */ ZYDIS_MNEM_FICOM, + /* 098 */ ZYDIS_MNEM_FICOMP, + /* 099 */ ZYDIS_MNEM_FIDIV, + /* 09A */ ZYDIS_MNEM_FIDIVR, + /* 09B */ ZYDIS_MNEM_FILD, + /* 09C */ ZYDIS_MNEM_FIMUL, + /* 09D */ ZYDIS_MNEM_FINCSTP, + /* 09E */ ZYDIS_MNEM_FIST, + /* 09F */ ZYDIS_MNEM_FISTP, + /* 0A0 */ ZYDIS_MNEM_FISTTP, + /* 0A1 */ ZYDIS_MNEM_FISUB, + /* 0A2 */ ZYDIS_MNEM_FISUBR, + /* 0A3 */ ZYDIS_MNEM_FLD, + /* 0A4 */ ZYDIS_MNEM_FLD1, + /* 0A5 */ ZYDIS_MNEM_FLDCW, + /* 0A6 */ ZYDIS_MNEM_FLDENV, + /* 0A7 */ ZYDIS_MNEM_FLDL2E, + /* 0A8 */ ZYDIS_MNEM_FLDL2T, + /* 0A9 */ ZYDIS_MNEM_FLDLG2, + /* 0AA */ ZYDIS_MNEM_FLDLN2, + /* 0AB */ ZYDIS_MNEM_FLDPI, + /* 0AC */ ZYDIS_MNEM_FLDZ, + /* 0AD */ ZYDIS_MNEM_FMUL, + /* 0AE */ ZYDIS_MNEM_FMULP, + /* 0AF */ ZYDIS_MNEM_FNDISI, + /* 0B0 */ ZYDIS_MNEM_FNENI, + /* 0B1 */ ZYDIS_MNEM_FNINIT, + /* 0B2 */ ZYDIS_MNEM_FNOP, + /* 0B3 */ ZYDIS_MNEM_FNSAVE, + /* 0B4 */ ZYDIS_MNEM_FNSETPM, + /* 0B5 */ ZYDIS_MNEM_FNSTCW, + /* 0B6 */ ZYDIS_MNEM_FNSTENV, + /* 0B7 */ ZYDIS_MNEM_FNSTSW, + /* 0B8 */ ZYDIS_MNEM_FPATAN, + /* 0B9 */ ZYDIS_MNEM_FPREM, + /* 0BA */ ZYDIS_MNEM_FPREM1, + /* 0BB */ ZYDIS_MNEM_FPTAN, + /* 0BC */ ZYDIS_MNEM_FRNDINT, + /* 0BD */ ZYDIS_MNEM_FRSTOR, + /* 0BE */ ZYDIS_MNEM_FRSTPM, + /* 0BF */ ZYDIS_MNEM_FSCALE, + /* 0C0 */ ZYDIS_MNEM_FSIN, + /* 0C1 */ ZYDIS_MNEM_FSINCOS, + /* 0C2 */ ZYDIS_MNEM_FSQRT, + /* 0C3 */ ZYDIS_MNEM_FST, + /* 0C4 */ ZYDIS_MNEM_FSTP, + /* 0C5 */ ZYDIS_MNEM_FSTP1, + /* 0C6 */ ZYDIS_MNEM_FSTP8, + /* 0C7 */ ZYDIS_MNEM_FSTP9, + /* 0C8 */ ZYDIS_MNEM_FSUB, + /* 0C9 */ ZYDIS_MNEM_FSUBP, + /* 0CA */ ZYDIS_MNEM_FSUBR, + /* 0CB */ ZYDIS_MNEM_FSUBRP, + /* 0CC */ ZYDIS_MNEM_FTST, + /* 0CD */ ZYDIS_MNEM_FUCOM, + /* 0CE */ ZYDIS_MNEM_FUCOMI, + /* 0CF */ ZYDIS_MNEM_FUCOMIP, + /* 0D0 */ ZYDIS_MNEM_FUCOMP, + /* 0D1 */ ZYDIS_MNEM_FUCOMPP, + /* 0D2 */ ZYDIS_MNEM_FXAM, + /* 0D3 */ ZYDIS_MNEM_FXCH, + /* 0D4 */ ZYDIS_MNEM_FXCH4, + /* 0D5 */ ZYDIS_MNEM_FXCH7, + /* 0D6 */ ZYDIS_MNEM_FXRSTOR, + /* 0D7 */ ZYDIS_MNEM_FXSAVE, + /* 0D8 */ ZYDIS_MNEM_FXTRACT, + /* 0D9 */ ZYDIS_MNEM_FYL2X, + /* 0DA */ ZYDIS_MNEM_FYL2XP1, + /* 0DB */ ZYDIS_MNEM_GETSEC, + /* 0DC */ ZYDIS_MNEM_HADDPD, + /* 0DD */ ZYDIS_MNEM_HADDPS, + /* 0DE */ ZYDIS_MNEM_HLT, + /* 0DF */ ZYDIS_MNEM_HSUBPD, + /* 0E0 */ ZYDIS_MNEM_HSUBPS, + /* 0E1 */ ZYDIS_MNEM_IDIV, + /* 0E2 */ ZYDIS_MNEM_IMUL, + /* 0E3 */ ZYDIS_MNEM_IN, + /* 0E4 */ ZYDIS_MNEM_INC, + /* 0E5 */ ZYDIS_MNEM_INSB, + /* 0E6 */ ZYDIS_MNEM_INSD, + /* 0E7 */ ZYDIS_MNEM_INSERTPS, + /* 0E8 */ ZYDIS_MNEM_INSW, + /* 0E9 */ ZYDIS_MNEM_INT, + /* 0EA */ ZYDIS_MNEM_INT1, + /* 0EB */ ZYDIS_MNEM_INT3, + /* 0EC */ ZYDIS_MNEM_INTO, + /* 0ED */ ZYDIS_MNEM_INVD, + /* 0EE */ ZYDIS_MNEM_INVEPT, + /* 0EF */ ZYDIS_MNEM_INVLPG, + /* 0F0 */ ZYDIS_MNEM_INVLPGA, + /* 0F1 */ ZYDIS_MNEM_INVVPID, + /* 0F2 */ ZYDIS_MNEM_IRETD, + /* 0F3 */ ZYDIS_MNEM_IRETQ, + /* 0F4 */ ZYDIS_MNEM_IRETW, + /* 0F5 */ ZYDIS_MNEM_JA, + /* 0F6 */ ZYDIS_MNEM_JB, + /* 0F7 */ ZYDIS_MNEM_JBE, + /* 0F8 */ ZYDIS_MNEM_JCXZ, + /* 0F9 */ ZYDIS_MNEM_JE, + /* 0FA */ ZYDIS_MNEM_JECXZ, + /* 0FB */ ZYDIS_MNEM_JG, + /* 0FC */ ZYDIS_MNEM_JGE, + /* 0FD */ ZYDIS_MNEM_JL, + /* 0FE */ ZYDIS_MNEM_JLE, + /* 0FF */ ZYDIS_MNEM_JMP, + /* 100 */ ZYDIS_MNEM_JNB, + /* 101 */ ZYDIS_MNEM_JNE, + /* 102 */ ZYDIS_MNEM_JNO, + /* 103 */ ZYDIS_MNEM_JNP, + /* 104 */ ZYDIS_MNEM_JNS, + /* 105 */ ZYDIS_MNEM_JO, + /* 106 */ ZYDIS_MNEM_JP, + /* 107 */ ZYDIS_MNEM_JRCXZ, + /* 108 */ ZYDIS_MNEM_JS, + /* 109 */ ZYDIS_MNEM_LAHF, + /* 10A */ ZYDIS_MNEM_LAR, + /* 10B */ ZYDIS_MNEM_LDDQU, + /* 10C */ ZYDIS_MNEM_LDMXCSR, + /* 10D */ ZYDIS_MNEM_LDS, + /* 10E */ ZYDIS_MNEM_LEA, + /* 10F */ ZYDIS_MNEM_LEAVE, + /* 110 */ ZYDIS_MNEM_LES, + /* 111 */ ZYDIS_MNEM_LFENCE, + /* 112 */ ZYDIS_MNEM_LFS, + /* 113 */ ZYDIS_MNEM_LGDT, + /* 114 */ ZYDIS_MNEM_LGS, + /* 115 */ ZYDIS_MNEM_LIDT, + /* 116 */ ZYDIS_MNEM_LLDT, + /* 117 */ ZYDIS_MNEM_LMSW, + /* 118 */ ZYDIS_MNEM_LOCK, + /* 119 */ ZYDIS_MNEM_LODSB, + /* 11A */ ZYDIS_MNEM_LODSD, + /* 11B */ ZYDIS_MNEM_LODSQ, + /* 11C */ ZYDIS_MNEM_LODSW, + /* 11D */ ZYDIS_MNEM_LOOP, + /* 11E */ ZYDIS_MNEM_LOOPE, + /* 11F */ ZYDIS_MNEM_LOOPNE, + /* 120 */ ZYDIS_MNEM_LSL, + /* 121 */ ZYDIS_MNEM_LSS, + /* 122 */ ZYDIS_MNEM_LTR, + /* 123 */ ZYDIS_MNEM_MASKMOVDQU, + /* 124 */ ZYDIS_MNEM_MASKMOVQ, + /* 125 */ ZYDIS_MNEM_MAXPD, + /* 126 */ ZYDIS_MNEM_MAXPS, + /* 127 */ ZYDIS_MNEM_MAXSD, + /* 128 */ ZYDIS_MNEM_MAXSS, + /* 129 */ ZYDIS_MNEM_MFENCE, + /* 12A */ ZYDIS_MNEM_MINPD, + /* 12B */ ZYDIS_MNEM_MINPS, + /* 12C */ ZYDIS_MNEM_MINSD, + /* 12D */ ZYDIS_MNEM_MINSS, + /* 12E */ ZYDIS_MNEM_MONITOR, + /* 12F */ ZYDIS_MNEM_MONTMUL, + /* 130 */ ZYDIS_MNEM_MOV, + /* 131 */ ZYDIS_MNEM_MOVAPD, + /* 132 */ ZYDIS_MNEM_MOVAPS, + /* 133 */ ZYDIS_MNEM_MOVBE, + /* 134 */ ZYDIS_MNEM_MOVD, + /* 135 */ ZYDIS_MNEM_MOVDDUP, + /* 136 */ ZYDIS_MNEM_MOVDQ2Q, + /* 137 */ ZYDIS_MNEM_MOVDQA, + /* 138 */ ZYDIS_MNEM_MOVDQU, + /* 139 */ ZYDIS_MNEM_MOVHLPS, + /* 13A */ ZYDIS_MNEM_MOVHPD, + /* 13B */ ZYDIS_MNEM_MOVHPS, + /* 13C */ ZYDIS_MNEM_MOVLHPS, + /* 13D */ ZYDIS_MNEM_MOVLPD, + /* 13E */ ZYDIS_MNEM_MOVLPS, + /* 13F */ ZYDIS_MNEM_MOVMSKPD, + /* 140 */ ZYDIS_MNEM_MOVMSKPS, + /* 141 */ ZYDIS_MNEM_MOVNTDQ, + /* 142 */ ZYDIS_MNEM_MOVNTDQA, + /* 143 */ ZYDIS_MNEM_MOVNTI, + /* 144 */ ZYDIS_MNEM_MOVNTPD, + /* 145 */ ZYDIS_MNEM_MOVNTPS, + /* 146 */ ZYDIS_MNEM_MOVNTQ, + /* 147 */ ZYDIS_MNEM_MOVQ, + /* 148 */ ZYDIS_MNEM_MOVQ2DQ, + /* 149 */ ZYDIS_MNEM_MOVSB, + /* 14A */ ZYDIS_MNEM_MOVSD, + /* 14B */ ZYDIS_MNEM_MOVSHDUP, + /* 14C */ ZYDIS_MNEM_MOVSLDUP, + /* 14D */ ZYDIS_MNEM_MOVSQ, + /* 14E */ ZYDIS_MNEM_MOVSS, + /* 14F */ ZYDIS_MNEM_MOVSW, + /* 150 */ ZYDIS_MNEM_MOVSX, + /* 151 */ ZYDIS_MNEM_MOVSXD, + /* 152 */ ZYDIS_MNEM_MOVUPD, + /* 153 */ ZYDIS_MNEM_MOVUPS, + /* 154 */ ZYDIS_MNEM_MOVZX, + /* 155 */ ZYDIS_MNEM_MPSADBW, + /* 156 */ ZYDIS_MNEM_MUL, + /* 157 */ ZYDIS_MNEM_MULPD, + /* 158 */ ZYDIS_MNEM_MULPS, + /* 159 */ ZYDIS_MNEM_MULSD, + /* 15A */ ZYDIS_MNEM_MULSS, + /* 15B */ ZYDIS_MNEM_MWAIT, + /* 15C */ ZYDIS_MNEM_NEG, + /* 15D */ ZYDIS_MNEM_NOP, + /* 15E */ ZYDIS_MNEM_NOT, + /* 15F */ ZYDIS_MNEM_OR, + /* 160 */ ZYDIS_MNEM_ORPD, + /* 161 */ ZYDIS_MNEM_ORPS, + /* 162 */ ZYDIS_MNEM_OUT, + /* 163 */ ZYDIS_MNEM_OUTSB, + /* 164 */ ZYDIS_MNEM_OUTSD, + /* 165 */ ZYDIS_MNEM_OUTSW, + /* 166 */ ZYDIS_MNEM_PABSB, + /* 167 */ ZYDIS_MNEM_PABSD, + /* 168 */ ZYDIS_MNEM_PABSW, + /* 169 */ ZYDIS_MNEM_PACKSSDW, + /* 16A */ ZYDIS_MNEM_PACKSSWB, + /* 16B */ ZYDIS_MNEM_PACKUSDW, + /* 16C */ ZYDIS_MNEM_PACKUSWB, + /* 16D */ ZYDIS_MNEM_PADDB, + /* 16E */ ZYDIS_MNEM_PADDD, + /* 16F */ ZYDIS_MNEM_PADDQ, + /* 170 */ ZYDIS_MNEM_PADDSB, + /* 171 */ ZYDIS_MNEM_PADDSW, + /* 172 */ ZYDIS_MNEM_PADDUSB, + /* 173 */ ZYDIS_MNEM_PADDUSW, + /* 174 */ ZYDIS_MNEM_PADDW, + /* 175 */ ZYDIS_MNEM_PALIGNR, + /* 176 */ ZYDIS_MNEM_PAND, + /* 177 */ ZYDIS_MNEM_PANDN, + /* 178 */ ZYDIS_MNEM_PAUSE, + /* 179 */ ZYDIS_MNEM_PAVGB, + /* 17A */ ZYDIS_MNEM_PAVGUSB, + /* 17B */ ZYDIS_MNEM_PAVGW, + /* 17C */ ZYDIS_MNEM_PBLENDVB, + /* 17D */ ZYDIS_MNEM_PBLENDW, + /* 17E */ ZYDIS_MNEM_PCLMULQDQ, + /* 17F */ ZYDIS_MNEM_PCMPEQB, + /* 180 */ ZYDIS_MNEM_PCMPEQD, + /* 181 */ ZYDIS_MNEM_PCMPEQQ, + /* 182 */ ZYDIS_MNEM_PCMPEQW, + /* 183 */ ZYDIS_MNEM_PCMPESTRI, + /* 184 */ ZYDIS_MNEM_PCMPESTRM, + /* 185 */ ZYDIS_MNEM_PCMPGTB, + /* 186 */ ZYDIS_MNEM_PCMPGTD, + /* 187 */ ZYDIS_MNEM_PCMPGTQ, + /* 188 */ ZYDIS_MNEM_PCMPGTW, + /* 189 */ ZYDIS_MNEM_PCMPISTRI, + /* 18A */ ZYDIS_MNEM_PCMPISTRM, + /* 18B */ ZYDIS_MNEM_PEXTRB, + /* 18C */ ZYDIS_MNEM_PEXTRD, + /* 18D */ ZYDIS_MNEM_PEXTRQ, + /* 18E */ ZYDIS_MNEM_PEXTRW, + /* 18F */ ZYDIS_MNEM_PF2ID, + /* 190 */ ZYDIS_MNEM_PF2IW, + /* 191 */ ZYDIS_MNEM_PFACC, + /* 192 */ ZYDIS_MNEM_PFADD, + /* 193 */ ZYDIS_MNEM_PFCMPEQ, + /* 194 */ ZYDIS_MNEM_PFCMPGE, + /* 195 */ ZYDIS_MNEM_PFCMPGT, + /* 196 */ ZYDIS_MNEM_PFMAX, + /* 197 */ ZYDIS_MNEM_PFMIN, + /* 198 */ ZYDIS_MNEM_PFMUL, + /* 199 */ ZYDIS_MNEM_PFNACC, + /* 19A */ ZYDIS_MNEM_PFPNACC, + /* 19B */ ZYDIS_MNEM_PFRCP, + /* 19C */ ZYDIS_MNEM_PFRCPIT1, + /* 19D */ ZYDIS_MNEM_PFRCPIT2, + /* 19E */ ZYDIS_MNEM_PFRSQIT1, + /* 19F */ ZYDIS_MNEM_PFRSQRT, + /* 1A0 */ ZYDIS_MNEM_PFSUB, + /* 1A1 */ ZYDIS_MNEM_PFSUBR, + /* 1A2 */ ZYDIS_MNEM_PHADDD, + /* 1A3 */ ZYDIS_MNEM_PHADDSW, + /* 1A4 */ ZYDIS_MNEM_PHADDW, + /* 1A5 */ ZYDIS_MNEM_PHMINPOSUW, + /* 1A6 */ ZYDIS_MNEM_PHSUBD, + /* 1A7 */ ZYDIS_MNEM_PHSUBSW, + /* 1A8 */ ZYDIS_MNEM_PHSUBW, + /* 1A9 */ ZYDIS_MNEM_PI2FD, + /* 1AA */ ZYDIS_MNEM_PI2FW, + /* 1AB */ ZYDIS_MNEM_PINSRB, + /* 1AC */ ZYDIS_MNEM_PINSRD, + /* 1AD */ ZYDIS_MNEM_PINSRQ, + /* 1AE */ ZYDIS_MNEM_PINSRW, + /* 1AF */ ZYDIS_MNEM_PMADDUBSW, + /* 1B0 */ ZYDIS_MNEM_PMADDWD, + /* 1B1 */ ZYDIS_MNEM_PMAXSB, + /* 1B2 */ ZYDIS_MNEM_PMAXSD, + /* 1B3 */ ZYDIS_MNEM_PMAXSW, + /* 1B4 */ ZYDIS_MNEM_PMAXUB, + /* 1B5 */ ZYDIS_MNEM_PMAXUD, + /* 1B6 */ ZYDIS_MNEM_PMAXUW, + /* 1B7 */ ZYDIS_MNEM_PMINSB, + /* 1B8 */ ZYDIS_MNEM_PMINSD, + /* 1B9 */ ZYDIS_MNEM_PMINSW, + /* 1BA */ ZYDIS_MNEM_PMINUB, + /* 1BB */ ZYDIS_MNEM_PMINUD, + /* 1BC */ ZYDIS_MNEM_PMINUW, + /* 1BD */ ZYDIS_MNEM_PMOVMSKB, + /* 1BE */ ZYDIS_MNEM_PMOVSXBD, + /* 1BF */ ZYDIS_MNEM_PMOVSXBQ, + /* 1C0 */ ZYDIS_MNEM_PMOVSXBW, + /* 1C1 */ ZYDIS_MNEM_PMOVSXDQ, + /* 1C2 */ ZYDIS_MNEM_PMOVSXWD, + /* 1C3 */ ZYDIS_MNEM_PMOVSXWQ, + /* 1C4 */ ZYDIS_MNEM_PMOVZXBD, + /* 1C5 */ ZYDIS_MNEM_PMOVZXBQ, + /* 1C6 */ ZYDIS_MNEM_PMOVZXBW, + /* 1C7 */ ZYDIS_MNEM_PMOVZXDQ, + /* 1C8 */ ZYDIS_MNEM_PMOVZXWD, + /* 1C9 */ ZYDIS_MNEM_PMOVZXWQ, + /* 1CA */ ZYDIS_MNEM_PMULDQ, + /* 1CB */ ZYDIS_MNEM_PMULHRSW, + /* 1CC */ ZYDIS_MNEM_PMULHRW, + /* 1CD */ ZYDIS_MNEM_PMULHUW, + /* 1CE */ ZYDIS_MNEM_PMULHW, + /* 1CF */ ZYDIS_MNEM_PMULLD, + /* 1D0 */ ZYDIS_MNEM_PMULLW, + /* 1D1 */ ZYDIS_MNEM_PMULUDQ, + /* 1D2 */ ZYDIS_MNEM_POP, + /* 1D3 */ ZYDIS_MNEM_POPA, + /* 1D4 */ ZYDIS_MNEM_POPAD, + /* 1D5 */ ZYDIS_MNEM_POPCNT, + /* 1D6 */ ZYDIS_MNEM_POPFD, + /* 1D7 */ ZYDIS_MNEM_POPFQ, + /* 1D8 */ ZYDIS_MNEM_POPFW, + /* 1D9 */ ZYDIS_MNEM_POR, + /* 1DA */ ZYDIS_MNEM_PREFETCH, + /* 1DB */ ZYDIS_MNEM_PREFETCHNTA, + /* 1DC */ ZYDIS_MNEM_PREFETCHT0, + /* 1DD */ ZYDIS_MNEM_PREFETCHT1, + /* 1DE */ ZYDIS_MNEM_PREFETCHT2, + /* 1DF */ ZYDIS_MNEM_PSADBW, + /* 1E0 */ ZYDIS_MNEM_PSHUFB, + /* 1E1 */ ZYDIS_MNEM_PSHUFD, + /* 1E2 */ ZYDIS_MNEM_PSHUFHW, + /* 1E3 */ ZYDIS_MNEM_PSHUFLW, + /* 1E4 */ ZYDIS_MNEM_PSHUFW, + /* 1E5 */ ZYDIS_MNEM_PSIGNB, + /* 1E6 */ ZYDIS_MNEM_PSIGND, + /* 1E7 */ ZYDIS_MNEM_PSIGNW, + /* 1E8 */ ZYDIS_MNEM_PSLLD, + /* 1E9 */ ZYDIS_MNEM_PSLLDQ, + /* 1EA */ ZYDIS_MNEM_PSLLQ, + /* 1EB */ ZYDIS_MNEM_PSLLW, + /* 1EC */ ZYDIS_MNEM_PSRAD, + /* 1ED */ ZYDIS_MNEM_PSRAW, + /* 1EE */ ZYDIS_MNEM_PSRLD, + /* 1EF */ ZYDIS_MNEM_PSRLDQ, + /* 1F0 */ ZYDIS_MNEM_PSRLQ, + /* 1F1 */ ZYDIS_MNEM_PSRLW, + /* 1F2 */ ZYDIS_MNEM_PSUBB, + /* 1F3 */ ZYDIS_MNEM_PSUBD, + /* 1F4 */ ZYDIS_MNEM_PSUBQ, + /* 1F5 */ ZYDIS_MNEM_PSUBSB, + /* 1F6 */ ZYDIS_MNEM_PSUBSW, + /* 1F7 */ ZYDIS_MNEM_PSUBUSB, + /* 1F8 */ ZYDIS_MNEM_PSUBUSW, + /* 1F9 */ ZYDIS_MNEM_PSUBW, + /* 1FA */ ZYDIS_MNEM_PSWAPD, + /* 1FB */ ZYDIS_MNEM_PTEST, + /* 1FC */ ZYDIS_MNEM_PUNPCKHBW, + /* 1FD */ ZYDIS_MNEM_PUNPCKHDQ, + /* 1FE */ ZYDIS_MNEM_PUNPCKHQDQ, + /* 1FF */ ZYDIS_MNEM_PUNPCKHWD, + /* 200 */ ZYDIS_MNEM_PUNPCKLBW, + /* 201 */ ZYDIS_MNEM_PUNPCKLDQ, + /* 202 */ ZYDIS_MNEM_PUNPCKLQDQ, + /* 203 */ ZYDIS_MNEM_PUNPCKLWD, + /* 204 */ ZYDIS_MNEM_PUSH, + /* 205 */ ZYDIS_MNEM_PUSHA, + /* 206 */ ZYDIS_MNEM_PUSHAD, + /* 207 */ ZYDIS_MNEM_PUSHFD, + /* 208 */ ZYDIS_MNEM_PUSHFQ, + /* 209 */ ZYDIS_MNEM_PUSHFW, + /* 20A */ ZYDIS_MNEM_PXOR, + /* 20B */ ZYDIS_MNEM_RCL, + /* 20C */ ZYDIS_MNEM_RCPPS, + /* 20D */ ZYDIS_MNEM_RCPSS, + /* 20E */ ZYDIS_MNEM_RCR, + /* 20F */ ZYDIS_MNEM_RDMSR, + /* 210 */ ZYDIS_MNEM_RDPMC, + /* 211 */ ZYDIS_MNEM_RDRAND, + /* 212 */ ZYDIS_MNEM_RDTSC, + /* 213 */ ZYDIS_MNEM_RDTSCP, + /* 214 */ ZYDIS_MNEM_REP, + /* 215 */ ZYDIS_MNEM_REPNE, + /* 216 */ ZYDIS_MNEM_RET, + /* 217 */ ZYDIS_MNEM_RETF, + /* 218 */ ZYDIS_MNEM_ROL, + /* 219 */ ZYDIS_MNEM_ROR, + /* 21A */ ZYDIS_MNEM_ROUNDPD, + /* 21B */ ZYDIS_MNEM_ROUNDPS, + /* 21C */ ZYDIS_MNEM_ROUNDSD, + /* 21D */ ZYDIS_MNEM_ROUNDSS, + /* 21E */ ZYDIS_MNEM_RSM, + /* 21F */ ZYDIS_MNEM_RSQRTPS, + /* 220 */ ZYDIS_MNEM_RSQRTSS, + /* 221 */ ZYDIS_MNEM_SAHF, + /* 222 */ ZYDIS_MNEM_SALC, + /* 223 */ ZYDIS_MNEM_SAR, + /* 224 */ ZYDIS_MNEM_SBB, + /* 225 */ ZYDIS_MNEM_SCASB, + /* 226 */ ZYDIS_MNEM_SCASD, + /* 227 */ ZYDIS_MNEM_SCASQ, + /* 228 */ ZYDIS_MNEM_SCASW, + /* 229 */ ZYDIS_MNEM_SETA, + /* 22A */ ZYDIS_MNEM_SETAE, + /* 22B */ ZYDIS_MNEM_SETB, + /* 22C */ ZYDIS_MNEM_SETBE, + /* 22D */ ZYDIS_MNEM_SETE, + /* 22E */ ZYDIS_MNEM_SETG, + /* 22F */ ZYDIS_MNEM_SETGE, + /* 230 */ ZYDIS_MNEM_SETL, + /* 231 */ ZYDIS_MNEM_SETLE, + /* 232 */ ZYDIS_MNEM_SETNE, + /* 233 */ ZYDIS_MNEM_SETNO, + /* 234 */ ZYDIS_MNEM_SETNP, + /* 235 */ ZYDIS_MNEM_SETNS, + /* 236 */ ZYDIS_MNEM_SETO, + /* 237 */ ZYDIS_MNEM_SETP, + /* 238 */ ZYDIS_MNEM_SETS, + /* 239 */ ZYDIS_MNEM_SFENCE, + /* 23A */ ZYDIS_MNEM_SGDT, + /* 23B */ ZYDIS_MNEM_SHL, + /* 23C */ ZYDIS_MNEM_SHLD, + /* 23D */ ZYDIS_MNEM_SHR, + /* 23E */ ZYDIS_MNEM_SHRD, + /* 23F */ ZYDIS_MNEM_SHUFPD, + /* 240 */ ZYDIS_MNEM_SHUFPS, + /* 241 */ ZYDIS_MNEM_SIDT, + /* 242 */ ZYDIS_MNEM_SKINIT, + /* 243 */ ZYDIS_MNEM_SLDT, + /* 244 */ ZYDIS_MNEM_SMSW, + /* 245 */ ZYDIS_MNEM_SQRTPD, + /* 246 */ ZYDIS_MNEM_SQRTPS, + /* 247 */ ZYDIS_MNEM_SQRTSD, + /* 248 */ ZYDIS_MNEM_SQRTSS, + /* 249 */ ZYDIS_MNEM_STC, + /* 24A */ ZYDIS_MNEM_STD, + /* 24B */ ZYDIS_MNEM_STGI, + /* 24C */ ZYDIS_MNEM_STI, + /* 24D */ ZYDIS_MNEM_STMXCSR, + /* 24E */ ZYDIS_MNEM_STOSB, + /* 24F */ ZYDIS_MNEM_STOSD, + /* 250 */ ZYDIS_MNEM_STOSQ, + /* 251 */ ZYDIS_MNEM_STOSW, + /* 252 */ ZYDIS_MNEM_STR, + /* 253 */ ZYDIS_MNEM_SUB, + /* 254 */ ZYDIS_MNEM_SUBPD, + /* 255 */ ZYDIS_MNEM_SUBPS, + /* 256 */ ZYDIS_MNEM_SUBSD, + /* 257 */ ZYDIS_MNEM_SUBSS, + /* 258 */ ZYDIS_MNEM_SWAPGS, + /* 259 */ ZYDIS_MNEM_SYSCALL, + /* 25A */ ZYDIS_MNEM_SYSENTER, + /* 25B */ ZYDIS_MNEM_SYSEXIT, + /* 25C */ ZYDIS_MNEM_SYSRET, + /* 25D */ ZYDIS_MNEM_TEST, + /* 25E */ ZYDIS_MNEM_UCOMISD, + /* 25F */ ZYDIS_MNEM_UCOMISS, + /* 260 */ ZYDIS_MNEM_UD2, + /* 261 */ ZYDIS_MNEM_UNPCKHPD, + /* 262 */ ZYDIS_MNEM_UNPCKHPS, + /* 263 */ ZYDIS_MNEM_UNPCKLPD, + /* 264 */ ZYDIS_MNEM_UNPCKLPS, + /* 265 */ ZYDIS_MNEM_VADDPD, + /* 266 */ ZYDIS_MNEM_VADDPS, + /* 267 */ ZYDIS_MNEM_VADDSD, + /* 268 */ ZYDIS_MNEM_VADDSS, + /* 269 */ ZYDIS_MNEM_VADDSUBPD, + /* 26A */ ZYDIS_MNEM_VADDSUBPS, + /* 26B */ ZYDIS_MNEM_VAESDEC, + /* 26C */ ZYDIS_MNEM_VAESDECLAST, + /* 26D */ ZYDIS_MNEM_VAESENC, + /* 26E */ ZYDIS_MNEM_VAESENCLAST, + /* 26F */ ZYDIS_MNEM_VAESIMC, + /* 270 */ ZYDIS_MNEM_VAESKEYGENASSIST, + /* 271 */ ZYDIS_MNEM_VANDNPD, + /* 272 */ ZYDIS_MNEM_VANDNPS, + /* 273 */ ZYDIS_MNEM_VANDPD, + /* 274 */ ZYDIS_MNEM_VANDPS, + /* 275 */ ZYDIS_MNEM_VBLENDPD, + /* 276 */ ZYDIS_MNEM_VBLENDPS, + /* 277 */ ZYDIS_MNEM_VBLENDVPD, + /* 278 */ ZYDIS_MNEM_VBLENDVPS, + /* 279 */ ZYDIS_MNEM_VBROADCASTSD, + /* 27A */ ZYDIS_MNEM_VBROADCASTSS, + /* 27B */ ZYDIS_MNEM_VCMPPD, + /* 27C */ ZYDIS_MNEM_VCMPPS, + /* 27D */ ZYDIS_MNEM_VCMPSD, + /* 27E */ ZYDIS_MNEM_VCMPSS, + /* 27F */ ZYDIS_MNEM_VCOMISD, + /* 280 */ ZYDIS_MNEM_VCOMISS, + /* 281 */ ZYDIS_MNEM_VCVTDQ2PD, + /* 282 */ ZYDIS_MNEM_VCVTDQ2PS, + /* 283 */ ZYDIS_MNEM_VCVTPD2DQ, + /* 284 */ ZYDIS_MNEM_VCVTPD2PS, + /* 285 */ ZYDIS_MNEM_VCVTPS2DQ, + /* 286 */ ZYDIS_MNEM_VCVTPS2PD, + /* 287 */ ZYDIS_MNEM_VCVTSD2SI, + /* 288 */ ZYDIS_MNEM_VCVTSD2SS, + /* 289 */ ZYDIS_MNEM_VCVTSI2SD, + /* 28A */ ZYDIS_MNEM_VCVTSI2SS, + /* 28B */ ZYDIS_MNEM_VCVTSS2SD, + /* 28C */ ZYDIS_MNEM_VCVTSS2SI, + /* 28D */ ZYDIS_MNEM_VCVTTPD2DQ, + /* 28E */ ZYDIS_MNEM_VCVTTPS2DQ, + /* 28F */ ZYDIS_MNEM_VCVTTSD2SI, + /* 290 */ ZYDIS_MNEM_VCVTTSS2SI, + /* 291 */ ZYDIS_MNEM_VDIVPD, + /* 292 */ ZYDIS_MNEM_VDIVPS, + /* 293 */ ZYDIS_MNEM_VDIVSD, + /* 294 */ ZYDIS_MNEM_VDIVSS, + /* 295 */ ZYDIS_MNEM_VDPPD, + /* 296 */ ZYDIS_MNEM_VDPPS, + /* 297 */ ZYDIS_MNEM_VERR, + /* 298 */ ZYDIS_MNEM_VERW, + /* 299 */ ZYDIS_MNEM_VEXTRACTF128, + /* 29A */ ZYDIS_MNEM_VEXTRACTPS, + /* 29B */ ZYDIS_MNEM_VHADDPD, + /* 29C */ ZYDIS_MNEM_VHADDPS, + /* 29D */ ZYDIS_MNEM_VHSUBPD, + /* 29E */ ZYDIS_MNEM_VHSUBPS, + /* 29F */ ZYDIS_MNEM_VINSERTF128, + /* 2A0 */ ZYDIS_MNEM_VINSERTPS, + /* 2A1 */ ZYDIS_MNEM_VLDDQU, + /* 2A2 */ ZYDIS_MNEM_VMASKMOVDQU, + /* 2A3 */ ZYDIS_MNEM_VMASKMOVPD, + /* 2A4 */ ZYDIS_MNEM_VMASKMOVPS, + /* 2A5 */ ZYDIS_MNEM_VMAXPD, + /* 2A6 */ ZYDIS_MNEM_VMAXPS, + /* 2A7 */ ZYDIS_MNEM_VMAXSD, + /* 2A8 */ ZYDIS_MNEM_VMAXSS, + /* 2A9 */ ZYDIS_MNEM_VMCALL, + /* 2AA */ ZYDIS_MNEM_VMCLEAR, + /* 2AB */ ZYDIS_MNEM_VMINPD, + /* 2AC */ ZYDIS_MNEM_VMINPS, + /* 2AD */ ZYDIS_MNEM_VMINSD, + /* 2AE */ ZYDIS_MNEM_VMINSS, + /* 2AF */ ZYDIS_MNEM_VMLAUNCH, + /* 2B0 */ ZYDIS_MNEM_VMLOAD, + /* 2B1 */ ZYDIS_MNEM_VMMCALL, + /* 2B2 */ ZYDIS_MNEM_VMOVAPD, + /* 2B3 */ ZYDIS_MNEM_VMOVAPS, + /* 2B4 */ ZYDIS_MNEM_VMOVD, + /* 2B5 */ ZYDIS_MNEM_VMOVDDUP, + /* 2B6 */ ZYDIS_MNEM_VMOVDQA, + /* 2B7 */ ZYDIS_MNEM_VMOVDQU, + /* 2B8 */ ZYDIS_MNEM_VMOVHLPS, + /* 2B9 */ ZYDIS_MNEM_VMOVHPD, + /* 2BA */ ZYDIS_MNEM_VMOVHPS, + /* 2BB */ ZYDIS_MNEM_VMOVLHPS, + /* 2BC */ ZYDIS_MNEM_VMOVLPD, + /* 2BD */ ZYDIS_MNEM_VMOVLPS, + /* 2BE */ ZYDIS_MNEM_VMOVMSKPD, + /* 2BF */ ZYDIS_MNEM_VMOVMSKPS, + /* 2C0 */ ZYDIS_MNEM_VMOVNTDQ, + /* 2C1 */ ZYDIS_MNEM_VMOVNTDQA, + /* 2C2 */ ZYDIS_MNEM_VMOVNTPD, + /* 2C3 */ ZYDIS_MNEM_VMOVNTPS, + /* 2C4 */ ZYDIS_MNEM_VMOVQ, + /* 2C5 */ ZYDIS_MNEM_VMOVSD, + /* 2C6 */ ZYDIS_MNEM_VMOVSHDUP, + /* 2C7 */ ZYDIS_MNEM_VMOVSLDUP, + /* 2C8 */ ZYDIS_MNEM_VMOVSS, + /* 2C9 */ ZYDIS_MNEM_VMOVUPD, + /* 2CA */ ZYDIS_MNEM_VMOVUPS, + /* 2CB */ ZYDIS_MNEM_VMPSADBW, + /* 2CC */ ZYDIS_MNEM_VMPTRLD, + /* 2CD */ ZYDIS_MNEM_VMPTRST, + /* 2CE */ ZYDIS_MNEM_VMREAD, + /* 2CF */ ZYDIS_MNEM_VMRESUME, + /* 2D0 */ ZYDIS_MNEM_VMRUN, + /* 2D1 */ ZYDIS_MNEM_VMSAVE, + /* 2D2 */ ZYDIS_MNEM_VMULPD, + /* 2D3 */ ZYDIS_MNEM_VMULPS, + /* 2D4 */ ZYDIS_MNEM_VMULSD, + /* 2D5 */ ZYDIS_MNEM_VMULSS, + /* 2D6 */ ZYDIS_MNEM_VMWRITE, + /* 2D7 */ ZYDIS_MNEM_VMXOFF, + /* 2D8 */ ZYDIS_MNEM_VMXON, + /* 2D9 */ ZYDIS_MNEM_VORPD, + /* 2DA */ ZYDIS_MNEM_VORPS, + /* 2DB */ ZYDIS_MNEM_VPABSB, + /* 2DC */ ZYDIS_MNEM_VPABSD, + /* 2DD */ ZYDIS_MNEM_VPABSW, + /* 2DE */ ZYDIS_MNEM_VPACKSSDW, + /* 2DF */ ZYDIS_MNEM_VPACKSSWB, + /* 2E0 */ ZYDIS_MNEM_VPACKUSDW, + /* 2E1 */ ZYDIS_MNEM_VPACKUSWB, + /* 2E2 */ ZYDIS_MNEM_VPADDB, + /* 2E3 */ ZYDIS_MNEM_VPADDD, + /* 2E4 */ ZYDIS_MNEM_VPADDQ, + /* 2E5 */ ZYDIS_MNEM_VPADDSB, + /* 2E6 */ ZYDIS_MNEM_VPADDSW, + /* 2E7 */ ZYDIS_MNEM_VPADDUSB, + /* 2E8 */ ZYDIS_MNEM_VPADDUSW, + /* 2E9 */ ZYDIS_MNEM_VPADDW, + /* 2EA */ ZYDIS_MNEM_VPALIGNR, + /* 2EB */ ZYDIS_MNEM_VPAND, + /* 2EC */ ZYDIS_MNEM_VPANDN, + /* 2ED */ ZYDIS_MNEM_VPAVGB, + /* 2EE */ ZYDIS_MNEM_VPAVGW, + /* 2EF */ ZYDIS_MNEM_VPBLENDVB, + /* 2F0 */ ZYDIS_MNEM_VPBLENDW, + /* 2F1 */ ZYDIS_MNEM_VPCLMULQDQ, + /* 2F2 */ ZYDIS_MNEM_VPCMPEQB, + /* 2F3 */ ZYDIS_MNEM_VPCMPEQD, + /* 2F4 */ ZYDIS_MNEM_VPCMPEQQ, + /* 2F5 */ ZYDIS_MNEM_VPCMPEQW, + /* 2F6 */ ZYDIS_MNEM_VPCMPESTRI, + /* 2F7 */ ZYDIS_MNEM_VPCMPESTRM, + /* 2F8 */ ZYDIS_MNEM_VPCMPGTB, + /* 2F9 */ ZYDIS_MNEM_VPCMPGTD, + /* 2FA */ ZYDIS_MNEM_VPCMPGTQ, + /* 2FB */ ZYDIS_MNEM_VPCMPGTW, + /* 2FC */ ZYDIS_MNEM_VPCMPISTRI, + /* 2FD */ ZYDIS_MNEM_VPCMPISTRM, + /* 2FE */ ZYDIS_MNEM_VPERM2F128, + /* 2FF */ ZYDIS_MNEM_VPERMILPD, + /* 300 */ ZYDIS_MNEM_VPERMILPS, + /* 301 */ ZYDIS_MNEM_VPEXTRB, + /* 302 */ ZYDIS_MNEM_VPEXTRD, + /* 303 */ ZYDIS_MNEM_VPEXTRQ, + /* 304 */ ZYDIS_MNEM_VPEXTRW, + /* 305 */ ZYDIS_MNEM_VPHADDD, + /* 306 */ ZYDIS_MNEM_VPHADDSW, + /* 307 */ ZYDIS_MNEM_VPHADDW, + /* 308 */ ZYDIS_MNEM_VPHMINPOSUW, + /* 309 */ ZYDIS_MNEM_VPHSUBD, + /* 30A */ ZYDIS_MNEM_VPHSUBSW, + /* 30B */ ZYDIS_MNEM_VPHSUBW, + /* 30C */ ZYDIS_MNEM_VPINSRB, + /* 30D */ ZYDIS_MNEM_VPINSRD, + /* 30E */ ZYDIS_MNEM_VPINSRQ, + /* 30F */ ZYDIS_MNEM_VPINSRW, + /* 310 */ ZYDIS_MNEM_VPMADDUBSW, + /* 311 */ ZYDIS_MNEM_VPMADDWD, + /* 312 */ ZYDIS_MNEM_VPMAXSB, + /* 313 */ ZYDIS_MNEM_VPMAXSD, + /* 314 */ ZYDIS_MNEM_VPMAXSW, + /* 315 */ ZYDIS_MNEM_VPMAXUB, + /* 316 */ ZYDIS_MNEM_VPMAXUD, + /* 317 */ ZYDIS_MNEM_VPMAXUW, + /* 318 */ ZYDIS_MNEM_VPMINSB, + /* 319 */ ZYDIS_MNEM_VPMINSD, + /* 31A */ ZYDIS_MNEM_VPMINSW, + /* 31B */ ZYDIS_MNEM_VPMINUB, + /* 31C */ ZYDIS_MNEM_VPMINUD, + /* 31D */ ZYDIS_MNEM_VPMINUW, + /* 31E */ ZYDIS_MNEM_VPMOVMSKB, + /* 31F */ ZYDIS_MNEM_VPMOVSXBD, + /* 320 */ ZYDIS_MNEM_VPMOVSXBQ, + /* 321 */ ZYDIS_MNEM_VPMOVSXBW, + /* 322 */ ZYDIS_MNEM_VPMOVSXWD, + /* 323 */ ZYDIS_MNEM_VPMOVSXWQ, + /* 324 */ ZYDIS_MNEM_VPMOVZXBD, + /* 325 */ ZYDIS_MNEM_VPMOVZXBQ, + /* 326 */ ZYDIS_MNEM_VPMOVZXBW, + /* 327 */ ZYDIS_MNEM_VPMOVZXDQ, + /* 328 */ ZYDIS_MNEM_VPMOVZXWD, + /* 329 */ ZYDIS_MNEM_VPMOVZXWQ, + /* 32A */ ZYDIS_MNEM_VPMULDQ, + /* 32B */ ZYDIS_MNEM_VPMULHRSW, + /* 32C */ ZYDIS_MNEM_VPMULHUW, + /* 32D */ ZYDIS_MNEM_VPMULHW, + /* 32E */ ZYDIS_MNEM_VPMULLD, + /* 32F */ ZYDIS_MNEM_VPMULLW, + /* 330 */ ZYDIS_MNEM_VPOR, + /* 331 */ ZYDIS_MNEM_VPSADBW, + /* 332 */ ZYDIS_MNEM_VPSHUFB, + /* 333 */ ZYDIS_MNEM_VPSHUFD, + /* 334 */ ZYDIS_MNEM_VPSHUFHW, + /* 335 */ ZYDIS_MNEM_VPSHUFLW, + /* 336 */ ZYDIS_MNEM_VPSIGNB, + /* 337 */ ZYDIS_MNEM_VPSIGND, + /* 338 */ ZYDIS_MNEM_VPSIGNW, + /* 339 */ ZYDIS_MNEM_VPSLLD, + /* 33A */ ZYDIS_MNEM_VPSLLDQ, + /* 33B */ ZYDIS_MNEM_VPSLLQ, + /* 33C */ ZYDIS_MNEM_VPSLLW, + /* 33D */ ZYDIS_MNEM_VPSRAD, + /* 33E */ ZYDIS_MNEM_VPSRAW, + /* 33F */ ZYDIS_MNEM_VPSRLD, + /* 340 */ ZYDIS_MNEM_VPSRLDQ, + /* 341 */ ZYDIS_MNEM_VPSRLQ, + /* 342 */ ZYDIS_MNEM_VPSRLW, + /* 343 */ ZYDIS_MNEM_VPSUBB, + /* 344 */ ZYDIS_MNEM_VPSUBD, + /* 345 */ ZYDIS_MNEM_VPSUBQ, + /* 346 */ ZYDIS_MNEM_VPSUBSB, + /* 347 */ ZYDIS_MNEM_VPSUBSW, + /* 348 */ ZYDIS_MNEM_VPSUBUSB, + /* 349 */ ZYDIS_MNEM_VPSUBUSW, + /* 34A */ ZYDIS_MNEM_VPSUBW, + /* 34B */ ZYDIS_MNEM_VPTEST, + /* 34C */ ZYDIS_MNEM_VPUNPCKHBW, + /* 34D */ ZYDIS_MNEM_VPUNPCKHDQ, + /* 34E */ ZYDIS_MNEM_VPUNPCKHQDQ, + /* 34F */ ZYDIS_MNEM_VPUNPCKHWD, + /* 350 */ ZYDIS_MNEM_VPUNPCKLBW, + /* 351 */ ZYDIS_MNEM_VPUNPCKLDQ, + /* 352 */ ZYDIS_MNEM_VPUNPCKLQDQ, + /* 353 */ ZYDIS_MNEM_VPUNPCKLWD, + /* 354 */ ZYDIS_MNEM_VPXOR, + /* 355 */ ZYDIS_MNEM_VRCPPS, + /* 356 */ ZYDIS_MNEM_VRCPSS, + /* 357 */ ZYDIS_MNEM_VROUNDPD, + /* 358 */ ZYDIS_MNEM_VROUNDPS, + /* 359 */ ZYDIS_MNEM_VROUNDSD, + /* 35A */ ZYDIS_MNEM_VROUNDSS, + /* 35B */ ZYDIS_MNEM_VRSQRTPS, + /* 35C */ ZYDIS_MNEM_VRSQRTSS, + /* 35D */ ZYDIS_MNEM_VSHUFPD, + /* 35E */ ZYDIS_MNEM_VSHUFPS, + /* 35F */ ZYDIS_MNEM_VSQRTPD, + /* 360 */ ZYDIS_MNEM_VSQRTPS, + /* 361 */ ZYDIS_MNEM_VSQRTSD, + /* 362 */ ZYDIS_MNEM_VSQRTSS, + /* 363 */ ZYDIS_MNEM_VSTMXCSR, + /* 364 */ ZYDIS_MNEM_VSUBPD, + /* 365 */ ZYDIS_MNEM_VSUBPS, + /* 366 */ ZYDIS_MNEM_VSUBSD, + /* 367 */ ZYDIS_MNEM_VSUBSS, + /* 368 */ ZYDIS_MNEM_VTESTPD, + /* 369 */ ZYDIS_MNEM_VTESTPS, + /* 36A */ ZYDIS_MNEM_VUCOMISD, + /* 36B */ ZYDIS_MNEM_VUCOMISS, + /* 36C */ ZYDIS_MNEM_VUNPCKHPD, + /* 36D */ ZYDIS_MNEM_VUNPCKHPS, + /* 36E */ ZYDIS_MNEM_VUNPCKLPD, + /* 36F */ ZYDIS_MNEM_VUNPCKLPS, + /* 370 */ ZYDIS_MNEM_VXORPD, + /* 371 */ ZYDIS_MNEM_VXORPS, + /* 372 */ ZYDIS_MNEM_VZEROALL, + /* 373 */ ZYDIS_MNEM_VZEROUPPER, + /* 374 */ ZYDIS_MNEM_WAIT, + /* 375 */ ZYDIS_MNEM_WBINVD, + /* 376 */ ZYDIS_MNEM_WRMSR, + /* 377 */ ZYDIS_MNEM_XADD, + /* 378 */ ZYDIS_MNEM_XCHG, + /* 379 */ ZYDIS_MNEM_XCRYPTCBC, + /* 37A */ ZYDIS_MNEM_XCRYPTCFB, + /* 37B */ ZYDIS_MNEM_XCRYPTCTR, + /* 37C */ ZYDIS_MNEM_XCRYPTECB, + /* 37D */ ZYDIS_MNEM_XCRYPTOFB, + /* 37E */ ZYDIS_MNEM_XGETBV, + /* 37F */ ZYDIS_MNEM_XLATB, + /* 380 */ ZYDIS_MNEM_XOR, + /* 381 */ ZYDIS_MNEM_XORPD, + /* 382 */ ZYDIS_MNEM_XORPS, + /* 383 */ ZYDIS_MNEM_XRSTOR, + /* 384 */ ZYDIS_MNEM_XSAVE, + /* 385 */ ZYDIS_MNEM_XSETBV, + /* 386 */ ZYDIS_MNEM_XSHA1, + /* 387 */ ZYDIS_MNEM_XSHA256, + /* 388 */ ZYDIS_MNEM_XSTORE, + + ZYDIS_MNEM_FORCE_WORD = 0x7FFF +} ZydisInstructionMnemonic; + +/* TODO: Port instruction definition types */ + +/* ============================================================================================== */ + +#ifdef __cplusplus +} +#endif + +#endif /* _ZYDIS_API_H_ */ diff --git a/VerteronDisassemblerEngine/VXInstructionDecoder.cpp b/Zydis/ZydisInstructionDecoder.cpp similarity index 56% rename from VerteronDisassemblerEngine/VXInstructionDecoder.cpp rename to Zydis/ZydisInstructionDecoder.cpp index 1534af1..0a1f34d 100644 --- a/VerteronDisassemblerEngine/VXInstructionDecoder.cpp +++ b/Zydis/ZydisInstructionDecoder.cpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,17 +26,21 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#include "VXInstructionDecoder.h" -#include +***************************************************************************************************/ -namespace Verteron +#include "ZydisInstructionDecoder.hpp" +#include + +namespace Zydis { -bool VXInstructionDecoder::decodeRegisterOperand(VXInstructionInfo &info, VXOperandInfo &operand, - RegisterClass registerClass, uint8_t registerId, VXDefinedOperandSize operandSize) const +/* InstructionDecoder ====================================================================== */ + +bool InstructionDecoder::decodeRegisterOperand(InstructionInfo& info, + OperandInfo& operand, RegisterClass registerClass, uint8_t registerId, + DefinedOperandSize operandSize) const { - VXRegister reg = VXRegister::NONE; + Register reg = Register::NONE; uint16_t size = getEffectiveOperandSize(info, operandSize); switch (registerClass) { @@ -46,79 +48,84 @@ bool VXInstructionDecoder::decodeRegisterOperand(VXInstructionInfo &info, VXOper switch (size) { case 64: - reg = static_cast(static_cast(VXRegister::RAX) + registerId); + reg = static_cast( + static_cast(Register::RAX) + registerId); break; case 32: - reg = static_cast(static_cast(VXRegister::EAX) + registerId); + reg = static_cast( + static_cast(Register::EAX) + registerId); break; case 16: - reg = static_cast(static_cast(VXRegister::AX) + registerId); + reg = static_cast( + static_cast(Register::AX) + registerId); break; case 8: // TODO: Only REX? Or VEX too? - if (m_disassemblerMode == VXDisassemblerMode::M64BIT && (info.flags & IF_PREFIX_REX)) + if (m_disassemblerMode == DisassemblerMode::M64BIT&& (info.flags& IF_PREFIX_REX)) { if (registerId >= 4) { - reg = static_cast( - static_cast(VXRegister::SPL) + (registerId - 4)); + reg = static_cast( + static_cast(Register::SPL) + (registerId - 4)); } else { - reg = static_cast( - static_cast(VXRegister::AL) + registerId); + reg = static_cast( + static_cast(Register::AL) + registerId); } } else { - reg = static_cast(static_cast(VXRegister::AL) + registerId); + reg = static_cast( + static_cast(Register::AL) + registerId); } break; case 0: // TODO: Error? - reg = VXRegister::NONE; + reg = Register::NONE; break; default: assert(0); } break; case RegisterClass::MMX: - reg = - static_cast(static_cast(VXRegister::MM0) + (registerId & 0x07)); + reg = static_cast( + static_cast(Register::MM0) + (registerId& 0x07)); break; case RegisterClass::CONTROL: - reg = static_cast(static_cast(VXRegister::CR0) + registerId); + reg = static_cast(static_cast(Register::CR0) + registerId); break; case RegisterClass::DEBUG: - reg = static_cast(static_cast(VXRegister::DR0) + registerId); + reg = static_cast(static_cast(Register::DR0) + registerId); break; case RegisterClass::SEGMENT: - if ((registerId & 7) > 5) + if ((registerId& 7) > 5) { info.flags |= IF_ERROR_OPERAND; return false; } - reg = static_cast(static_cast(VXRegister::ES) + (registerId & 0x07)); + reg = static_cast( + static_cast(Register::ES) + (registerId& 0x07)); break; case RegisterClass::XMM: - reg = static_cast(registerId + static_cast( - ((size == 256) ? VXRegister::YMM0 : VXRegister::XMM0))); + reg = static_cast(registerId + static_cast( + ((size == 256) ? Register::YMM0 : Register::XMM0))); break; default: assert(0); } - operand.type = VXOperandType::REGISTER; - operand.base = static_cast(reg); + operand.type = OperandType::REGISTER; + operand.base = static_cast(reg); operand.size = size; return true; } -bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, - VXOperandInfo &operand, RegisterClass registerClass, VXDefinedOperandSize operandSize) +bool InstructionDecoder::decodeRegisterMemoryOperand(InstructionInfo& info, + OperandInfo& operand, RegisterClass registerClass, DefinedOperandSize operandSize) { if (!decodeModrm(info)) { return false; } - assert(info.flags & IF_MODRM); + assert(info.flags& IF_MODRM); // Decode register operand if (info.modrm_mod == 3) { @@ -127,24 +134,25 @@ bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, } // Decode memory operand uint8_t offset = 0; - operand.type = VXOperandType::MEMORY; + operand.type = OperandType::MEMORY; operand.size = getEffectiveOperandSize(info, operandSize); switch (info.address_mode) { case 16: { - static const VXRegister bases[] = { - VXRegister::BX, VXRegister::BX, VXRegister::BP, VXRegister::BP, - VXRegister::SI, VXRegister::DI, VXRegister::BP, VXRegister::BX }; - static const VXRegister indices[] = { - VXRegister::SI, VXRegister::DI, VXRegister::SI, VXRegister::DI, - VXRegister::NONE, VXRegister::NONE, VXRegister::NONE, VXRegister::NONE }; - operand.base = static_cast(bases[info.modrm_rm_ext & 0x07]); - operand.index = static_cast(indices[info.modrm_rm_ext & 0x07]); + static const Register bases[] = { + Register::BX, Register::BX, Register::BP, Register::BP, + Register::SI, Register::DI, Register::BP, Register::BX }; + static const Register indices[] = { + Register::SI, Register::DI, Register::SI, Register::DI, + Register::NONE, Register::NONE, Register::NONE, + Register::NONE }; + operand.base = static_cast(bases[info.modrm_rm_ext& 0x07]); + operand.index = static_cast(indices[info.modrm_rm_ext& 0x07]); operand.scale = 0; - if (info.modrm_mod == 0 && info.modrm_rm_ext == 6) { + if (info.modrm_mod == 0&& info.modrm_rm_ext == 6) { offset = 16; - operand.base = VXRegister::NONE; + operand.base = Register::NONE; } else if (info.modrm_mod == 1) { offset = 8; } else if (info.modrm_mod == 2) { @@ -153,14 +161,14 @@ bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, } break; case 32: - operand.base = - static_cast(static_cast(VXRegister::EAX) + info.modrm_rm_ext); + operand.base = static_cast( + static_cast(Register::EAX) + info.modrm_rm_ext); switch (info.modrm_mod) { case 0: if (info.modrm_rm_ext == 5) { - operand.base = VXRegister::NONE; + operand.base = Register::NONE; offset = 32; } break; @@ -173,29 +181,29 @@ bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, default: assert(0); } - if ((info.modrm_rm_ext & 0x07) == 4) + if ((info.modrm_rm_ext& 0x07) == 4) { if (!decodeSIB(info)) { return false; } operand.base = - static_cast(static_cast(VXRegister::EAX) + + static_cast(static_cast(Register::EAX) + info.sib_base_ext); operand.index = - static_cast(static_cast(VXRegister::EAX) + + static_cast(static_cast(Register::EAX) + info.sib_index_ext); - operand.scale = (1 << info.sib_scale) & ~1; - if (operand.index == VXRegister::ESP) + operand.scale = (1 << info.sib_scale)& ~1; + if (operand.index == Register::ESP) { - operand.index = VXRegister::NONE; + operand.index = Register::NONE; operand.scale = 0; } - if (operand.base == VXRegister::EBP) + if (operand.base == Register::EBP) { if (info.modrm_mod == 0) { - operand.base = VXRegister::NONE; + operand.base = Register::NONE; } if (info.modrm_mod == 1) { @@ -207,20 +215,20 @@ bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, } } else { - operand.index = VXRegister::NONE; + operand.index = Register::NONE; operand.scale = 0; } break; case 64: - operand.base = - static_cast(static_cast(VXRegister::RAX) + info.modrm_rm_ext); + operand.base = static_cast( + static_cast(Register::RAX) + info.modrm_rm_ext); switch (info.modrm_mod) { case 0: - if ((info.modrm_rm_ext & 0x07) == 5) + if ((info.modrm_rm_ext& 0x07) == 5) { info.flags |= IF_RELATIVE; - operand.base = VXRegister::RIP; + operand.base = Register::RIP; offset = 32; } break; @@ -233,31 +241,31 @@ bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, default: assert(0); } - if ((info.modrm_rm_ext & 0x07) == 4) + if ((info.modrm_rm_ext& 0x07) == 4) { if (!decodeSIB(info)) { return false; } operand.base = - static_cast(static_cast(VXRegister::RAX) + + static_cast(static_cast(Register::RAX) + info.sib_base_ext); operand.index = - static_cast(static_cast(VXRegister::RAX) + + static_cast(static_cast(Register::RAX) + info.sib_index_ext); - if (operand.index == VXRegister::RSP) + if (operand.index == Register::RSP) { - operand.index = VXRegister::NONE; + operand.index = Register::NONE; operand.scale = 0; } else { - operand.scale = (1 << info.sib_scale) & ~1; + operand.scale = (1 << info.sib_scale)& ~1; } - if ((operand.base == VXRegister::RBP) || (operand.base == VXRegister::R13)) + if ((operand.base == Register::RBP) || (operand.base == Register::R13)) { if (info.modrm_mod == 0) { - operand.base = VXRegister::NONE; + operand.base = Register::NONE; } if (info.modrm_mod == 1) { @@ -269,7 +277,7 @@ bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, } } else { - operand.index = VXRegister::NONE; + operand.index = Register::NONE; operand.scale = 0; } break; @@ -287,10 +295,10 @@ bool VXInstructionDecoder::decodeRegisterMemoryOperand(VXInstructionInfo &info, return true; } -bool VXInstructionDecoder::decodeImmediate(VXInstructionInfo &info, VXOperandInfo &operand, - VXDefinedOperandSize operandSize) +bool InstructionDecoder::decodeImmediate(InstructionInfo& info, OperandInfo& operand, + DefinedOperandSize operandSize) { - operand.type = VXOperandType::IMMEDIATE; + operand.type = OperandType::IMMEDIATE; operand.size = getEffectiveOperandSize(info, operandSize); switch (operand.size) { @@ -310,15 +318,15 @@ bool VXInstructionDecoder::decodeImmediate(VXInstructionInfo &info, VXOperandInf // TODO: Maybe return false instead of assert assert(0); } - if (!operand.lval.uqword && (info.flags & IF_ERROR_MASK)) + if (!operand.lval.uqword&& (info.flags& IF_ERROR_MASK)) { return false; } return true; } -bool VXInstructionDecoder::decodeDisplacement(VXInstructionInfo &info, VXOperandInfo &operand, - uint8_t size) +bool InstructionDecoder::decodeDisplacement(InstructionInfo& info, + OperandInfo& operand, uint8_t size) { switch (size) { @@ -342,26 +350,26 @@ bool VXInstructionDecoder::decodeDisplacement(VXInstructionInfo &info, VXOperand // TODO: Maybe return false instead of assert assert(0); } - if (!operand.lval.uqword && (info.flags & IF_ERROR_MASK)) + if (!operand.lval.uqword&& (info.flags& IF_ERROR_MASK)) { return false; } return true; } -bool VXInstructionDecoder::decodeModrm(VXInstructionInfo &info) +bool InstructionDecoder::decodeModrm(InstructionInfo& info) { - if (!(info.flags & IF_MODRM)) + if (!(info.flags& IF_MODRM)) { info.modrm = inputNext(info); - if (!info.modrm && (info.flags & IF_ERROR_MASK)) + if (!info.modrm&& (info.flags& IF_ERROR_MASK)) { return false; } info.flags |= IF_MODRM; - info.modrm_mod = (info.modrm >> 6) & 0x03; - info.modrm_reg = (info.modrm >> 3) & 0x07; - info.modrm_rm = (info.modrm >> 0) & 0x07; + info.modrm_mod = (info.modrm >> 6)& 0x03; + info.modrm_reg = (info.modrm >> 3)& 0x07; + info.modrm_rm = (info.modrm >> 0)& 0x07; } // The @c decodeModrm method might get called multiple times during the opcode- and the // operand decoding, but the effective REX/VEX fields are not initialized before the end of @@ -372,21 +380,21 @@ bool VXInstructionDecoder::decodeModrm(VXInstructionInfo &info) return true; } -bool VXInstructionDecoder::decodeSIB(VXInstructionInfo &info) +bool InstructionDecoder::decodeSIB(InstructionInfo& info) { - assert(info.flags & IF_MODRM); - assert((info.modrm_rm & 0x7) == 4); - if (!(info.flags & IF_SIB)) + assert(info.flags& IF_MODRM); + assert((info.modrm_rm& 0x7) == 4); + if (!(info.flags& IF_SIB)) { info.sib = inputNext(info); - if (!info.sib && (info.flags & IF_ERROR_MASK)) + if (!info.sib&& (info.flags& IF_ERROR_MASK)) { return false; } info.flags |= IF_SIB; - info.sib_scale = (info.sib >> 6) & 0x03; - info.sib_index = (info.sib >> 3) & 0x07; - info.sib_base = (info.sib >> 0) & 0x07; + info.sib_scale = (info.sib >> 6)& 0x03; + info.sib_index = (info.sib >> 3)& 0x07; + info.sib_base = (info.sib >> 0)& 0x07; // The @c decodeSib method is only called during the operand decoding, so updating the // extended values at this point should be safe. info.sib_index_ext = (info.eff_rexvex_x << 3) | info.sib_index; @@ -395,47 +403,47 @@ bool VXInstructionDecoder::decodeSIB(VXInstructionInfo &info) return true; } -bool VXInstructionDecoder::decodeVex(VXInstructionInfo &info) +bool InstructionDecoder::decodeVex(InstructionInfo& info) { - if (!(info.flags & IF_PREFIX_VEX)) + if (!(info.flags& IF_PREFIX_VEX)) { info.vex_op = inputCurrent(); switch (info.vex_op) { case 0xC4: info.vex_b1 = inputNext(info); - if (!info.vex_b1 || (info.flags & IF_ERROR_MASK)) + if (!info.vex_b1 || (info.flags& IF_ERROR_MASK)) { return false; } info.vex_b2 = inputNext(info); - if (!info.vex_b2 || (info.flags & IF_ERROR_MASK)) + if (!info.vex_b2 || (info.flags& IF_ERROR_MASK)) { return false; } - info.vex_r = (info.vex_b1 >> 7) & 0x01; - info.vex_x = (info.vex_b1 >> 6) & 0x01; - info.vex_b = (info.vex_b1 >> 5) & 0x01; - info.vex_m_mmmm = (info.vex_b1 >> 0) & 0x1F; - info.vex_w = (info.vex_b2 >> 7) & 0x01; - info.vex_vvvv = (info.vex_b2 >> 3) & 0x0F; - info.vex_l = (info.vex_b2 >> 2) & 0x01; - info.vex_pp = (info.vex_b2 >> 0) & 0x03; + info.vex_r = (info.vex_b1 >> 7)& 0x01; + info.vex_x = (info.vex_b1 >> 6)& 0x01; + info.vex_b = (info.vex_b1 >> 5)& 0x01; + info.vex_m_mmmm = (info.vex_b1 >> 0)& 0x1F; + info.vex_w = (info.vex_b2 >> 7)& 0x01; + info.vex_vvvv = (info.vex_b2 >> 3)& 0x0F; + info.vex_l = (info.vex_b2 >> 2)& 0x01; + info.vex_pp = (info.vex_b2 >> 0)& 0x03; break; case 0xC5: info.vex_b1 = inputNext(info); - if (!info.vex_b1 || (info.flags & IF_ERROR_MASK)) + if (!info.vex_b1 || (info.flags& IF_ERROR_MASK)) { return false; } - info.vex_r = (info.vex_b1 >> 7) & 0x01; + info.vex_r = (info.vex_b1 >> 7)& 0x01; info.vex_x = 1; info.vex_b = 1; info.vex_m_mmmm = 1; info.vex_w = 0; - info.vex_vvvv = (info.vex_b1 >> 3) & 0x0F; - info.vex_l = (info.vex_b1 >> 2) & 0x01; - info.vex_pp = (info.vex_b1 >> 0) & 0x03; + info.vex_vvvv = (info.vex_b1 >> 3)& 0x0F; + info.vex_l = (info.vex_b1 >> 2)& 0x01; + info.vex_pp = (info.vex_b1 >> 0)& 0x03; break; default: assert(0); @@ -451,32 +459,32 @@ bool VXInstructionDecoder::decodeVex(VXInstructionInfo &info) return true; } -uint16_t VXInstructionDecoder::getEffectiveOperandSize(const VXInstructionInfo &info, - VXDefinedOperandSize operandSize) const +uint16_t InstructionDecoder::getEffectiveOperandSize(const InstructionInfo& info, + DefinedOperandSize operandSize) const { switch (operandSize) { - case VXDefinedOperandSize::NA: + case DefinedOperandSize::NA: return 0; - case VXDefinedOperandSize::Z: + case DefinedOperandSize::Z: return (info.operand_mode == 16) ? 16 : 32; - case VXDefinedOperandSize::V: + case DefinedOperandSize::V: return info.operand_mode; - case VXDefinedOperandSize::Y: + case DefinedOperandSize::Y: return (info.operand_mode == 16) ? 32 : info.operand_mode; - case VXDefinedOperandSize::X: + case DefinedOperandSize::X: assert(info.vex_op != 0); return (info.eff_vex_l) ? - getEffectiveOperandSize(info, VXDefinedOperandSize::QQ) : - getEffectiveOperandSize(info, VXDefinedOperandSize::DQ); - case VXDefinedOperandSize::RDQ: - return (m_disassemblerMode == VXDisassemblerMode::M64BIT) ? 64 : 32; + getEffectiveOperandSize(info, DefinedOperandSize::QQ) : + getEffectiveOperandSize(info, DefinedOperandSize::DQ); + case DefinedOperandSize::RDQ: + return (m_disassemblerMode == DisassemblerMode::M64BIT) ? 64 : 32; default: - return Internal::VDEGetSimpleOperandSize(operandSize); + return Internal::GetSimpleOperandSize(operandSize); } } -bool VXInstructionDecoder::decodeOperands(VXInstructionInfo &info) +bool InstructionDecoder::decodeOperands(InstructionInfo& info) { assert(info.instrDefinition); // Always try to decode the first operand @@ -488,7 +496,7 @@ bool VXInstructionDecoder::decodeOperands(VXInstructionInfo &info) // Decode other operands on demand for (unsigned int i = 1; i < 4; ++i) { - if (info.operand[i - 1].type != VXOperandType::NONE) + if (info.operand[i - 1].type != OperandType::NONE) { if (!decodeOperand(info, info.operand[i], info.instrDefinition->operand[i].type, info.instrDefinition->operand[i].size)) @@ -500,26 +508,26 @@ bool VXInstructionDecoder::decodeOperands(VXInstructionInfo &info) // Update operand access modes for (unsigned int i = 0; i < 4; ++i) { - if (info.operand[i].type != VXOperandType::NONE) + if (info.operand[i].type != OperandType::NONE) { - info.operand[i].access_mode = VXOperandAccessMode::READ; + info.operand[i].access_mode = OperandAccessMode::READ; if (i == 0) { - if (info.instrDefinition->flags & IDF_OPERAND1_WRITE) + if (info.instrDefinition->flags& IDF_OPERAND1_WRITE) { - info.operand[0].access_mode = VXOperandAccessMode::WRITE; - } else if (info.instrDefinition->flags & IDF_OPERAND1_READWRITE) + info.operand[0].access_mode = OperandAccessMode::WRITE; + } else if (info.instrDefinition->flags& IDF_OPERAND1_READWRITE) { - info.operand[0].access_mode = VXOperandAccessMode::READWRITE; + info.operand[0].access_mode = OperandAccessMode::READWRITE; } } else if (i == 1) { - if (info.instrDefinition->flags & IDF_OPERAND2_WRITE) + if (info.instrDefinition->flags& IDF_OPERAND2_WRITE) { - info.operand[1].access_mode = VXOperandAccessMode::WRITE; - } else if (info.instrDefinition->flags & IDF_OPERAND2_READWRITE) + info.operand[1].access_mode = OperandAccessMode::WRITE; + } else if (info.instrDefinition->flags& IDF_OPERAND2_READWRITE) { - info.operand[1].access_mode = VXOperandAccessMode::READWRITE; + info.operand[1].access_mode = OperandAccessMode::READWRITE; } } } @@ -527,17 +535,17 @@ bool VXInstructionDecoder::decodeOperands(VXInstructionInfo &info) return true; } -bool VXInstructionDecoder::decodeOperand(VXInstructionInfo &info, VXOperandInfo &operand, - VXDefinedOperandType operandType, VXDefinedOperandSize operandSize) +bool InstructionDecoder::decodeOperand(InstructionInfo& info, OperandInfo& operand, + DefinedOperandType operandType, DefinedOperandSize operandSize) { using namespace Internal; - operand.type = VXOperandType::NONE; + operand.type = OperandType::NONE; switch (operandType) { - case VXDefinedOperandType::NONE: + case DefinedOperandType::NONE: break; - case VXDefinedOperandType::A: - operand.type = VXOperandType::POINTER; + case DefinedOperandType::A: + operand.type = OperandType::POINTER; if (info.operand_mode == 16) { operand.size = 32; @@ -548,109 +556,111 @@ bool VXInstructionDecoder::decodeOperand(VXInstructionInfo &info, VXOperandInfo operand.lval.ptr.off = inputNext(info); operand.lval.ptr.seg = inputNext(info); } - if ((!operand.lval.ptr.off || !operand.lval.ptr.seg) && (info.flags & IF_ERROR_MASK)) + if ((!operand.lval.ptr.off || !operand.lval.ptr.seg)&& (info.flags& IF_ERROR_MASK)) { return false; } break; - case VXDefinedOperandType::C: + case DefinedOperandType::C: if (!decodeModrm(info)) { return false; } return decodeRegisterOperand(info, operand, RegisterClass::CONTROL, info.modrm_reg_ext, operandSize); - case VXDefinedOperandType::D: + case DefinedOperandType::D: if (!decodeModrm(info)) { return false; } return decodeRegisterOperand(info, operand, RegisterClass::DEBUG, info.modrm_reg_ext, operandSize); - case VXDefinedOperandType::F: + case DefinedOperandType::F: // TODO: FAR flag - case VXDefinedOperandType::M: + case DefinedOperandType::M: // ModR/M byte may refer only to a register if (info.modrm_mod == 3) { info.flags |= IF_ERROR_OPERAND; return false; } - case VXDefinedOperandType::E: + case DefinedOperandType::E: return decodeRegisterMemoryOperand(info, operand, RegisterClass::GENERAL_PURPOSE, operandSize); - case VXDefinedOperandType::G: + case DefinedOperandType::G: if (!decodeModrm(info)) { return false; } return decodeRegisterOperand(info, operand, RegisterClass::GENERAL_PURPOSE, info.modrm_reg_ext, operandSize); - case VXDefinedOperandType::H: + case DefinedOperandType::H: assert(info.vex_op != 0); - return decodeRegisterOperand(info, operand, RegisterClass::XMM, (0xF & ~info.vex_vvvv), + return decodeRegisterOperand(info, operand, RegisterClass::XMM, (0xF& ~info.vex_vvvv), operandSize); - case VXDefinedOperandType::sI: + case DefinedOperandType::sI: operand.signed_lval = true; - case VXDefinedOperandType::I: + case DefinedOperandType::I: return decodeImmediate(info, operand, operandSize); - case VXDefinedOperandType::I1: - operand.type = VXOperandType::CONSTANT; + case DefinedOperandType::I1: + operand.type = OperandType::CONSTANT; operand.lval.udword = 1; break; - case VXDefinedOperandType::J: + case DefinedOperandType::J: if (!decodeImmediate(info, operand, operandSize)) { return false; } - operand.type = VXOperandType::REL_IMMEDIATE; + operand.type = OperandType::REL_IMMEDIATE; operand.signed_lval = true; info.flags |= IF_RELATIVE; break; - case VXDefinedOperandType::L: + case DefinedOperandType::L: { assert(info.vex_op != 0); uint8_t imm = inputNext(info); - if (!imm && (info.flags & IF_ERROR_MASK)) + if (!imm&& (info.flags& IF_ERROR_MASK)) { return false; } - uint8_t mask = (m_disassemblerMode == VXDisassemblerMode::M64BIT) ? 0xF : 0x7; - return decodeRegisterOperand(info, operand, RegisterClass::XMM, mask & (imm >> 4), + uint8_t mask = (m_disassemblerMode == DisassemblerMode::M64BIT) ? 0xF : 0x7; + return decodeRegisterOperand(info, operand, RegisterClass::XMM, mask& (imm >> 4), operandSize); } - case VXDefinedOperandType::MR: + case DefinedOperandType::MR: return decodeRegisterMemoryOperand(info, operand, RegisterClass::GENERAL_PURPOSE, info.modrm_mod == 3 ? - VDEGetComplexOperandRegSize(operandSize) : VDEGetComplexOperandMemSize(operandSize)); - case VXDefinedOperandType::MU: + GetComplexOperandRegSize(operandSize) : + GetComplexOperandMemSize(operandSize)); + case DefinedOperandType::MU: return decodeRegisterMemoryOperand(info, operand, RegisterClass::XMM, info.modrm_mod == 3 ? - VDEGetComplexOperandRegSize(operandSize) : VDEGetComplexOperandMemSize(operandSize)); - case VXDefinedOperandType::N: + GetComplexOperandRegSize(operandSize) : + GetComplexOperandMemSize(operandSize)); + case DefinedOperandType::N: // ModR/M byte may refer only to memory if (info.modrm_mod != 3) { info.flags |= IF_ERROR_OPERAND; return false; } - case VXDefinedOperandType::Q: + case DefinedOperandType::Q: return decodeRegisterMemoryOperand(info, operand, RegisterClass::MMX, operandSize); - case VXDefinedOperandType::O: - operand.type = VXOperandType::MEMORY; - operand.base = VXRegister::NONE; - operand.index = VXRegister::NONE; + case DefinedOperandType::O: + operand.type = OperandType::MEMORY; + operand.base = Register::NONE; + operand.index = Register::NONE; operand.scale = 0; operand.size = getEffectiveOperandSize(info, operandSize); return decodeDisplacement(info, operand, info.address_mode); - case VXDefinedOperandType::P: + case DefinedOperandType::P: if (!decodeModrm(info)) { return false; } return decodeRegisterOperand(info, operand, RegisterClass::MMX, info.modrm_reg_ext, operandSize); - case VXDefinedOperandType::R: + case DefinedOperandType::R: // ModR/M byte may refer only to memory if (info.modrm_mod != 3) { @@ -659,91 +669,91 @@ bool VXInstructionDecoder::decodeOperand(VXInstructionInfo &info, VXOperandInfo } return decodeRegisterMemoryOperand(info, operand, RegisterClass::GENERAL_PURPOSE, operandSize); - case VXDefinedOperandType::S: + case DefinedOperandType::S: if (!decodeModrm(info)) { return false; } return decodeRegisterOperand(info, operand, RegisterClass::SEGMENT, info.modrm_reg_ext, operandSize); - case VXDefinedOperandType::U: + case DefinedOperandType::U: // ModR/M byte may refer only to memory if (info.modrm_mod != 3) { info.flags |= IF_ERROR_OPERAND; return false; } - case VXDefinedOperandType::W: + case DefinedOperandType::W: return decodeRegisterMemoryOperand(info, operand, RegisterClass::XMM, operandSize); - case VXDefinedOperandType::V: + case DefinedOperandType::V: if (!decodeModrm(info)) { return false; } return decodeRegisterOperand(info, operand, RegisterClass::XMM, info.modrm_reg_ext, operandSize); - case VXDefinedOperandType::R0: - case VXDefinedOperandType::R1: - case VXDefinedOperandType::R2: - case VXDefinedOperandType::R3: - case VXDefinedOperandType::R4: - case VXDefinedOperandType::R5: - case VXDefinedOperandType::R6: - case VXDefinedOperandType::R7: + case DefinedOperandType::R0: + case DefinedOperandType::R1: + case DefinedOperandType::R2: + case DefinedOperandType::R3: + case DefinedOperandType::R4: + case DefinedOperandType::R5: + case DefinedOperandType::R6: + case DefinedOperandType::R7: return decodeRegisterOperand(info, operand, RegisterClass::GENERAL_PURPOSE, ((info.eff_rexvex_b << 3) | (static_cast(operandType) - - static_cast(VXDefinedOperandType::R0))), operandSize); - case VXDefinedOperandType::AL: - case VXDefinedOperandType::AX: - case VXDefinedOperandType::EAX: - case VXDefinedOperandType::RAX: + static_cast(DefinedOperandType::R0))), operandSize); + case DefinedOperandType::AL: + case DefinedOperandType::AX: + case DefinedOperandType::EAX: + case DefinedOperandType::RAX: return decodeRegisterOperand(info, operand, RegisterClass::GENERAL_PURPOSE, 0, operandSize); - case VXDefinedOperandType::CL: - case VXDefinedOperandType::CX: - case VXDefinedOperandType::ECX: - case VXDefinedOperandType::RCX: + case DefinedOperandType::CL: + case DefinedOperandType::CX: + case DefinedOperandType::ECX: + case DefinedOperandType::RCX: return decodeRegisterOperand(info, operand, RegisterClass::GENERAL_PURPOSE, 1, operandSize); - case VXDefinedOperandType::DL: - case VXDefinedOperandType::DX: - case VXDefinedOperandType::EDX: - case VXDefinedOperandType::RDX: + case DefinedOperandType::DL: + case DefinedOperandType::DX: + case DefinedOperandType::EDX: + case DefinedOperandType::RDX: return decodeRegisterOperand(info, operand, RegisterClass::GENERAL_PURPOSE, 2, operandSize); - case VXDefinedOperandType::ES: - case VXDefinedOperandType::CS: - case VXDefinedOperandType::SS: - case VXDefinedOperandType::DS: - case VXDefinedOperandType::FS: - case VXDefinedOperandType::GS: - if (m_disassemblerMode == VXDisassemblerMode::M64BIT) + case DefinedOperandType::ES: + case DefinedOperandType::CS: + case DefinedOperandType::SS: + case DefinedOperandType::DS: + case DefinedOperandType::FS: + case DefinedOperandType::GS: + if (m_disassemblerMode == DisassemblerMode::M64BIT) { - if ((operandType != VXDefinedOperandType::FS) && - (operandType != VXDefinedOperandType::GS)) + if ((operandType != DefinedOperandType::FS)&& + (operandType != DefinedOperandType::GS)) { info.flags |= IF_ERROR_OPERAND; return false; } } - operand.type = VXOperandType::REGISTER; - operand.base = static_cast((static_cast(operandType) - - static_cast(VXDefinedOperandType::ES)) + - static_cast(VXRegister::ES)); + operand.type = OperandType::REGISTER; + operand.base = static_cast((static_cast(operandType) - + static_cast(DefinedOperandType::ES)) + + static_cast(Register::ES)); operand.size = 16; break; - case VXDefinedOperandType::ST0: - case VXDefinedOperandType::ST1: - case VXDefinedOperandType::ST2: - case VXDefinedOperandType::ST3: - case VXDefinedOperandType::ST4: - case VXDefinedOperandType::ST5: - case VXDefinedOperandType::ST6: - case VXDefinedOperandType::ST7: - operand.type = VXOperandType::REGISTER; - operand.base = static_cast((static_cast(operandType) - - static_cast(VXDefinedOperandType::ST0)) + - static_cast(VXRegister::ST0)); + case DefinedOperandType::ST0: + case DefinedOperandType::ST1: + case DefinedOperandType::ST2: + case DefinedOperandType::ST3: + case DefinedOperandType::ST4: + case DefinedOperandType::ST5: + case DefinedOperandType::ST6: + case DefinedOperandType::ST7: + operand.type = OperandType::REGISTER; + operand.base = static_cast((static_cast(operandType) - + static_cast(DefinedOperandType::ST0)) + + static_cast(Register::ST0)); operand.size = 80; break; default: @@ -752,64 +762,64 @@ bool VXInstructionDecoder::decodeOperand(VXInstructionInfo &info, VXOperandInfo return true; } -void VXInstructionDecoder::resolveOperandAndAddressMode(VXInstructionInfo &info) const +void InstructionDecoder::resolveOperandAndAddressMode(InstructionInfo& info) const { assert(info.instrDefinition); switch (m_disassemblerMode) { - case VXDisassemblerMode::M16BIT: - info.operand_mode = (info.flags & IF_PREFIX_OPERAND_SIZE) ? 32 : 16; - info.address_mode = (info.flags & IF_PREFIX_ADDRESS_SIZE) ? 32 : 16; + case DisassemblerMode::M16BIT: + info.operand_mode = (info.flags& IF_PREFIX_OPERAND_SIZE) ? 32 : 16; + info.address_mode = (info.flags& IF_PREFIX_ADDRESS_SIZE) ? 32 : 16; break; - case VXDisassemblerMode::M32BIT: - info.operand_mode = (info.flags & IF_PREFIX_OPERAND_SIZE) ? 16 : 32; - info.address_mode = (info.flags & IF_PREFIX_ADDRESS_SIZE) ? 16 : 32; + case DisassemblerMode::M32BIT: + info.operand_mode = (info.flags& IF_PREFIX_OPERAND_SIZE) ? 16 : 32; + info.address_mode = (info.flags& IF_PREFIX_ADDRESS_SIZE) ? 16 : 32; break; - case VXDisassemblerMode::M64BIT: + case DisassemblerMode::M64BIT: if (info.eff_rexvex_w) { info.operand_mode = 64; - } else if ((info.flags & IF_PREFIX_OPERAND_SIZE)) + } else if ((info.flags& IF_PREFIX_OPERAND_SIZE)) { info.operand_mode = 16; } else { - info.operand_mode = (info.instrDefinition->flags & IDF_DEFAULT_64) ? 64 : 32; + info.operand_mode = (info.instrDefinition->flags& IDF_DEFAULT_64) ? 64 : 32; } - info.address_mode = (info.flags & IF_PREFIX_ADDRESS_SIZE) ? 32 : 64; + info.address_mode = (info.flags& IF_PREFIX_ADDRESS_SIZE) ? 32 : 64; break; default: assert(0); } } -void VXInstructionDecoder::calculateEffectiveRexVexValues(VXInstructionInfo &info) const +void InstructionDecoder::calculateEffectiveRexVexValues(InstructionInfo& info) const { assert(info.instrDefinition); uint8_t rex = info.rex; - if (info.flags & IF_PREFIX_VEX) + if (info.flags& IF_PREFIX_VEX) { switch (info.vex_op) { case 0xC4: - rex = ((~(info.vex_b1 >> 5) & 0x07) | ((info.vex_b2 >> 4) & 0x08)); + rex = ((~(info.vex_b1 >> 5)& 0x07) | ((info.vex_b2 >> 4)& 0x08)); break; case 0xC5: - rex = (~(info.vex_b1 >> 5)) & 4; + rex = (~(info.vex_b1 >> 5))& 4; break; default: assert(0); } } - rex &= (info.instrDefinition->flags & 0x000F); - info.eff_rexvex_w = (rex >> 3) & 0x01; - info.eff_rexvex_r = (rex >> 2) & 0x01; - info.eff_rexvex_x = (rex >> 1) & 0x01; - info.eff_rexvex_b = (rex >> 0) & 0x01; - info.eff_vex_l = info.vex_l && (info.instrDefinition->flags & IDF_ACCEPTS_VEXL); + rex &= (info.instrDefinition->flags& 0x000F); + info.eff_rexvex_w = (rex >> 3)& 0x01; + info.eff_rexvex_r = (rex >> 2)& 0x01; + info.eff_rexvex_x = (rex >> 1)& 0x01; + info.eff_rexvex_b = (rex >> 0)& 0x01; + info.eff_vex_l = info.vex_l&& (info.instrDefinition->flags& IDF_ACCEPTS_VEXL); } -bool VXInstructionDecoder::decodePrefixes(VXInstructionInfo &info) +bool InstructionDecoder::decodePrefixes(InstructionInfo& info) { bool done = false; do @@ -831,27 +841,27 @@ bool VXInstructionDecoder::decodePrefixes(VXInstructionInfo &info) break; case 0x2E: info.flags |= IF_PREFIX_SEGMENT; - info.segment = VXRegister::CS; + info.segment = Register::CS; break; case 0x36: info.flags |= IF_PREFIX_SEGMENT; - info.segment = VXRegister::SS; + info.segment = Register::SS; break; case 0x3E: info.flags |= IF_PREFIX_SEGMENT; - info.segment = VXRegister::DS; + info.segment = Register::DS; break; case 0x26: info.flags |= IF_PREFIX_SEGMENT; - info.segment = VXRegister::ES; + info.segment = Register::ES; break; case 0x64: info.flags |= IF_PREFIX_SEGMENT; - info.segment = VXRegister::FS; + info.segment = Register::FS; break; case 0x65: info.flags |= IF_PREFIX_SEGMENT; - info.segment = VXRegister::GS; + info.segment = Register::GS; break; case 0x66: info.flags |= IF_PREFIX_OPERAND_SIZE; @@ -860,8 +870,8 @@ bool VXInstructionDecoder::decodePrefixes(VXInstructionInfo &info) info.flags |= IF_PREFIX_ADDRESS_SIZE; break; default: - if ((m_disassemblerMode == VXDisassemblerMode::M64BIT) && - (inputCurrent() & 0xF0) == 0x40) + if ((m_disassemblerMode == DisassemblerMode::M64BIT)&& + (inputCurrent()& 0xF0) == 0x40) { info.flags |= IF_PREFIX_REX; info.rex = inputCurrent(); @@ -874,7 +884,7 @@ bool VXInstructionDecoder::decodePrefixes(VXInstructionInfo &info) // Increase the input offset, if a prefix was found if (!done) { - if (!inputNext(info) && (info.flags & IF_ERROR_MASK)) + if (!inputNext(info)&& (info.flags& IF_ERROR_MASK)) { return false; } @@ -882,21 +892,21 @@ bool VXInstructionDecoder::decodePrefixes(VXInstructionInfo &info) } while (!done); // TODO: Check for multiple prefixes of the same group // Parse REX Prefix - if (info.flags & IF_PREFIX_REX) + if (info.flags& IF_PREFIX_REX) { - info.rex_w = (info.rex >> 3) & 0x01; - info.rex_r = (info.rex >> 2) & 0x01; - info.rex_x = (info.rex >> 1) & 0x01; - info.rex_b = (info.rex >> 0) & 0x01; + info.rex_w = (info.rex >> 3)& 0x01; + info.rex_r = (info.rex >> 2)& 0x01; + info.rex_x = (info.rex >> 1)& 0x01; + info.rex_b = (info.rex >> 0)& 0x01; } return true; } -bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) +bool InstructionDecoder::decodeOpcode(InstructionInfo& info) { using namespace Internal; // Read first opcode byte - if (!inputNext(info) && (info.flags & IF_ERROR_MASK)) + if (!inputNext(info)&& (info.flags& IF_ERROR_MASK)) { return false; } @@ -904,27 +914,28 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) info.opcode[0] = inputCurrent(); info.opcode_length = 1; // Iterate through opcode tree - VXOpcodeTreeNode node = VDEGetOpcodeTreeChild(VDEGetOpcodeTreeRoot(), inputCurrent()); - VXOpcodeTreeNodeType nodeType; + OpcodeTreeNode node = GetOpcodeTreeChild(GetOpcodeTreeRoot(), inputCurrent()); + OpcodeTreeNodeType nodeType; do { uint16_t index = 0; - nodeType = VDEGetOpcodeNodeType(node); + nodeType = GetOpcodeNodeType(node); switch (nodeType) { - case VXOpcodeTreeNodeType::INSTRUCTION_DEFINITION: + case OpcodeTreeNodeType::INSTRUCTION_DEFINITION: { // Check for invalid instruction - if (VDEGetOpcodeNodeValue(node) == 0) + if (GetOpcodeNodeValue(node) == 0) { info.flags |= IF_ERROR_INVALID; return false; } // Get instruction definition - const VXInstructionDefinition *instrDefinition = VDEGetInstructionDefinition(node); + const InstructionDefinition *instrDefinition = + GetInstructionDefinition(node); // Check for invalid 64 bit instruction - if ((m_disassemblerMode == VXDisassemblerMode::M64BIT) && - (instrDefinition->flags & IDF_INVALID_64)) + if ((m_disassemblerMode == DisassemblerMode::M64BIT)&& + (instrDefinition->flags& IDF_INVALID_64)) { info.flags |= IF_ERROR_INVALID_64; return false; @@ -943,20 +954,20 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) } } return true; - case VXOpcodeTreeNodeType::TABLE: + case OpcodeTreeNodeType::TABLE: // Read next opcode byte - if (!inputNext(info) && (info.flags & IF_ERROR_MASK)) + if (!inputNext(info)&& (info.flags& IF_ERROR_MASK)) { return false; } // Update instruction info - assert((info.opcode_length > 0) && (info.opcode_length < 3)); + assert((info.opcode_length > 0)&& (info.opcode_length < 3)); info.opcode[info.opcode_length] = inputCurrent(); info.opcode_length++; // Set child node index for next iteration index = inputCurrent(); break; - case VXOpcodeTreeNodeType::MODRM_MOD: + case OpcodeTreeNodeType::MODRM_MOD: // Decode modrm byte if (!decodeModrm(info)) { @@ -964,7 +975,7 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) } index = (info.modrm_mod == 0x3) ? 1 : 0; break; - case VXOpcodeTreeNodeType::MODRM_REG: + case OpcodeTreeNodeType::MODRM_REG: // Decode modrm byte if (!decodeModrm(info)) { @@ -972,7 +983,7 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) } index = info.modrm_reg; break; - case VXOpcodeTreeNodeType::MODRM_RM: + case OpcodeTreeNodeType::MODRM_RM: // Decode modrm byte if (!decodeModrm(info)) { @@ -980,23 +991,23 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) } index = info.modrm_rm; break; - case VXOpcodeTreeNodeType::MANDATORY: + case OpcodeTreeNodeType::MANDATORY: // Check if there are any prefixes present - if (info.flags & IF_PREFIX_REP) + if (info.flags& IF_PREFIX_REP) { index = 1; // F2 - } else if (info.flags & IF_PREFIX_REPNE) + } else if (info.flags& IF_PREFIX_REPNE) { index = 2; // F3 - } else if (info.flags & IF_PREFIX_OPERAND_SIZE) + } else if (info.flags& IF_PREFIX_OPERAND_SIZE) { index = 3; // 66 } - if (VDEGetOpcodeTreeChild(node, index) == 0) + if (GetOpcodeTreeChild(node, index) == 0) { index = 0; } - if (index && (VDEGetOpcodeTreeChild(node, index) != 0)) + if (index&& (GetOpcodeTreeChild(node, index) != 0)) { // Remove REP and REPNE prefix info.flags &= ~IF_PREFIX_REP; @@ -1009,7 +1020,7 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) } } break; - case VXOpcodeTreeNodeType::X87: + case OpcodeTreeNodeType::X87: // Decode modrm byte if (!decodeModrm(info)) { @@ -1017,64 +1028,64 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) } index = info.modrm - 0xC0; break; - case VXOpcodeTreeNodeType::ADDRESS_SIZE: + case OpcodeTreeNodeType::ADDRESS_SIZE: switch (m_disassemblerMode) { - case VXDisassemblerMode::M16BIT: - index = (info.flags & IF_PREFIX_ADDRESS_SIZE) ? 1 : 0; + case DisassemblerMode::M16BIT: + index = (info.flags& IF_PREFIX_ADDRESS_SIZE) ? 1 : 0; break; - case VXDisassemblerMode::M32BIT: - index = (info.flags & IF_PREFIX_ADDRESS_SIZE) ? 0 : 1; + case DisassemblerMode::M32BIT: + index = (info.flags& IF_PREFIX_ADDRESS_SIZE) ? 0 : 1; break; - case VXDisassemblerMode::M64BIT: - index = (info.flags & IF_PREFIX_ADDRESS_SIZE) ? 1 : 2; + case DisassemblerMode::M64BIT: + index = (info.flags& IF_PREFIX_ADDRESS_SIZE) ? 1 : 2; break; default: assert(0); } break; - case VXOpcodeTreeNodeType::OPERAND_SIZE: + case OpcodeTreeNodeType::OPERAND_SIZE: switch (m_disassemblerMode) { - case VXDisassemblerMode::M16BIT: - index = (info.flags & IF_PREFIX_OPERAND_SIZE) ? 1 : 0; + case DisassemblerMode::M16BIT: + index = (info.flags& IF_PREFIX_OPERAND_SIZE) ? 1 : 0; break; - case VXDisassemblerMode::M32BIT: - index = (info.flags & IF_PREFIX_OPERAND_SIZE) ? 0 : 1; + case DisassemblerMode::M32BIT: + index = (info.flags& IF_PREFIX_OPERAND_SIZE) ? 0 : 1; break; - case VXDisassemblerMode::M64BIT: - index = (info.rex_w) ? 2 : ((info.flags & IF_PREFIX_OPERAND_SIZE) ? 0 : 1); + case DisassemblerMode::M64BIT: + index = (info.rex_w) ? 2 : ((info.flags& IF_PREFIX_OPERAND_SIZE) ? 0 : 1); break; default: assert(0); } break; - case VXOpcodeTreeNodeType::MODE: - index = (m_disassemblerMode != VXDisassemblerMode::M64BIT) ? 0 : 1; + case OpcodeTreeNodeType::MODE: + index = (m_disassemblerMode != DisassemblerMode::M64BIT) ? 0 : 1; break; - case VXOpcodeTreeNodeType::VENDOR: + case OpcodeTreeNodeType::VENDOR: switch (m_preferredVendor) { - case VXInstructionSetVendor::ANY: - index = (VDEGetOpcodeTreeChild(node, 0) != 0) ? 0 : 1; + case InstructionSetVendor::ANY: + index = (GetOpcodeTreeChild(node, 0) != 0) ? 0 : 1; break; - case VXInstructionSetVendor::INTEL: + case InstructionSetVendor::INTEL: index = 1; break; - case VXInstructionSetVendor::AMD: + case InstructionSetVendor::AMD: index = 0; break; default: assert(0); } break; - case VXOpcodeTreeNodeType::AMD3DNOW: + case OpcodeTreeNodeType::AMD3DNOW: { // As all 3dnow instructions got the same operands and flag definitions, we just // decode a random instruction and determine the specific opcode later. - assert(VDEGetOpcodeTreeChild(node, 0x0C) != 0); - const VXInstructionDefinition *instrDefinition = - VDEGetInstructionDefinition(VDEGetOpcodeTreeChild(node, 0x0C)); + assert(GetOpcodeTreeChild(node, 0x0C) != 0); + const InstructionDefinition *instrDefinition = + GetInstructionDefinition(GetOpcodeTreeChild(node, 0x0C)); // Update instruction info info.instrDefinition = instrDefinition; info.mnemonic = instrDefinition->mnemonic; @@ -1089,15 +1100,15 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) } // Read the actual 3dnow opcode info.opcode[2] = inputNext(info); - if (!info.opcode[2] && (info.flags & IF_ERROR_MASK)) + if (!info.opcode[2]&& (info.flags& IF_ERROR_MASK)) { return false; } // Update instruction info instrDefinition = - VDEGetInstructionDefinition(VDEGetOpcodeTreeChild(node, info.opcode[2])); + GetInstructionDefinition(GetOpcodeTreeChild(node, info.opcode[2])); if (!instrDefinition || - (instrDefinition->mnemonic == VXInstructionMnemonic::INVALID)) + (instrDefinition->mnemonic == InstructionMnemonic::INVALID)) { info.flags |= IF_ERROR_INVALID; return false; @@ -1107,37 +1118,37 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) // Update operand access modes for (unsigned int i = 0; i < 4; ++i) { - if (info.operand[i].type != VXOperandType::NONE) + if (info.operand[i].type != OperandType::NONE) { - info.operand[i - 1].access_mode = VXOperandAccessMode::READ; + info.operand[i - 1].access_mode = OperandAccessMode::READ; } } - if (info.operand[0].type != VXOperandType::NONE) + if (info.operand[0].type != OperandType::NONE) { - if (info.instrDefinition->flags & IDF_OPERAND1_WRITE) + if (info.instrDefinition->flags& IDF_OPERAND1_WRITE) { - info.operand[0].access_mode = VXOperandAccessMode::WRITE; - } else if (info.instrDefinition->flags & IDF_OPERAND1_READWRITE) + info.operand[0].access_mode = OperandAccessMode::WRITE; + } else if (info.instrDefinition->flags& IDF_OPERAND1_READWRITE) { - info.operand[0].access_mode = VXOperandAccessMode::READWRITE; + info.operand[0].access_mode = OperandAccessMode::READWRITE; } } - if (info.operand[1].type != VXOperandType::NONE) + if (info.operand[1].type != OperandType::NONE) { - if (info.instrDefinition->flags & IDF_OPERAND2_WRITE) + if (info.instrDefinition->flags& IDF_OPERAND2_WRITE) { - info.operand[1].access_mode = VXOperandAccessMode::WRITE; - } else if (info.instrDefinition->flags & IDF_OPERAND2_READWRITE) + info.operand[1].access_mode = OperandAccessMode::WRITE; + } else if (info.instrDefinition->flags& IDF_OPERAND2_READWRITE) { - info.operand[1].access_mode = VXOperandAccessMode::READWRITE; + info.operand[1].access_mode = OperandAccessMode::READWRITE; } } // Terminate loop return true; } - case VXOpcodeTreeNodeType::VEX: - if ((m_disassemblerMode == VXDisassemblerMode::M64BIT) || - (((inputCurrent() >> 6) & 0x03) == 0x03)) + case OpcodeTreeNodeType::VEX: + if ((m_disassemblerMode == DisassemblerMode::M64BIT) || + (((inputCurrent() >> 6)& 0x03) == 0x03)) { // Decode vex prefix if (!decodeVex(info)) @@ -1169,35 +1180,35 @@ bool VXInstructionDecoder::decodeOpcode(VXInstructionInfo &info) index = 0; } break; - case VXOpcodeTreeNodeType::VEXW: - assert(info.flags & IF_PREFIX_VEX); + case OpcodeTreeNodeType::VEXW: + assert(info.flags& IF_PREFIX_VEX); index = info.vex_w; break; - case VXOpcodeTreeNodeType::VEXL: - assert(info.flags & IF_PREFIX_VEX); + case OpcodeTreeNodeType::VEXL: + assert(info.flags& IF_PREFIX_VEX); index = info.vex_l; break; default: assert(0); } - node = VDEGetOpcodeTreeChild(node, index); - } while (nodeType != VXOpcodeTreeNodeType::INSTRUCTION_DEFINITION); + node = GetOpcodeTreeChild(node, index); + } while (nodeType != OpcodeTreeNodeType::INSTRUCTION_DEFINITION); return false; } -VXInstructionDecoder::VXInstructionDecoder() - : m_dataSource(nullptr) - , m_disassemblerMode(VXDisassemblerMode::M32BIT) - , m_preferredVendor(VXInstructionSetVendor::ANY) +InstructionDecoder::InstructionDecoder() + : m_input(nullptr) + , m_disassemblerMode(DisassemblerMode::M32BIT) + , m_preferredVendor(InstructionSetVendor::ANY) , m_instructionPointer(0) { } -VXInstructionDecoder::VXInstructionDecoder(VXBaseDataSource *input, - VXDisassemblerMode disassemblerMode, VXInstructionSetVendor preferredVendor, +InstructionDecoder::InstructionDecoder(BaseInput *input, + DisassemblerMode disassemblerMode, InstructionSetVendor preferredVendor, uint64_t instructionPointer) - : m_dataSource(input) + : m_input(input) , m_disassemblerMode(disassemblerMode) , m_preferredVendor(preferredVendor) , m_instructionPointer(instructionPointer) @@ -1205,20 +1216,20 @@ VXInstructionDecoder::VXInstructionDecoder(VXBaseDataSource *input, } -bool VXInstructionDecoder::decodeInstruction(VXInstructionInfo &info) +bool InstructionDecoder::decodeInstruction(InstructionInfo& info) { // Clear instruction info memset(&info, 0, sizeof(info)); // Set disassembler mode flags switch (m_disassemblerMode) { - case VXDisassemblerMode::M16BIT: + case DisassemblerMode::M16BIT: info.flags |= IF_DISASSEMBLER_MODE_16; break; - case VXDisassemblerMode::M32BIT: + case DisassemblerMode::M32BIT: info.flags |= IF_DISASSEMBLER_MODE_32; break; - case VXDisassemblerMode::M64BIT: + case DisassemblerMode::M64BIT: info.flags |= IF_DISASSEMBLER_MODE_64; break; default: @@ -1232,34 +1243,34 @@ bool VXInstructionDecoder::decodeInstruction(VXInstructionInfo &info) goto DecodeError; } // SWAPGS is only valid in 64 bit mode - if ((info.mnemonic == VXInstructionMnemonic::SWAPGS) && - (m_disassemblerMode != VXDisassemblerMode::M64BIT)) + if ((info.mnemonic == InstructionMnemonic::SWAPGS)&& + (m_disassemblerMode != DisassemblerMode::M64BIT)) { info.flags &= IF_ERROR_INVALID; goto DecodeError; } // Handle aliases - if (info.mnemonic == VXInstructionMnemonic::XCHG) + if (info.mnemonic == InstructionMnemonic::XCHG) { - if ((info.operand[0].type == VXOperandType::REGISTER && - info.operand[0].base == VXRegister::AX && - info.operand[1].type == VXOperandType::REGISTER && - info.operand[1].base == VXRegister::AX) || - (info.operand[0].type == VXOperandType::REGISTER && - info.operand[0].base == VXRegister::EAX && - info.operand[1].type == VXOperandType::REGISTER && - info.operand[1].base == VXRegister::EAX)) + if ((info.operand[0].type == OperandType::REGISTER&& + info.operand[0].base == Register::AX&& + info.operand[1].type == OperandType::REGISTER&& + info.operand[1].base == Register::AX) || + (info.operand[0].type == OperandType::REGISTER&& + info.operand[0].base == Register::EAX&& + info.operand[1].type == OperandType::REGISTER&& + info.operand[1].base == Register::EAX)) { - info.mnemonic = VXInstructionMnemonic::NOP; - info.operand[0].type = VXOperandType::NONE; - info.operand[1].type = VXOperandType::NONE; - info.operand[0].access_mode = VXOperandAccessMode::NA; - info.operand[1].access_mode = VXOperandAccessMode::NA; + info.mnemonic = InstructionMnemonic::NOP; + info.operand[0].type = OperandType::NONE; + info.operand[1].type = OperandType::NONE; + info.operand[0].access_mode = OperandAccessMode::NA; + info.operand[1].access_mode = OperandAccessMode::NA; } } - if ((info.mnemonic == VXInstructionMnemonic::NOP) && (info.flags & IF_PREFIX_REP)) + if ((info.mnemonic == InstructionMnemonic::NOP)&& (info.flags& IF_PREFIX_REP)) { - info.mnemonic = VXInstructionMnemonic::PAUSE; + info.mnemonic = InstructionMnemonic::PAUSE; info.flags &= ~IF_PREFIX_REP; } // Increment instruction pointer @@ -1271,7 +1282,7 @@ DecodeError: // Increment instruction pointer. m_instructionPointer += 1; // Backup all error flags, the instruction length and the instruction address - uint32_t flags = info.flags & (IF_ERROR_MASK | 0x00000007); + uint32_t flags = info.flags& (IF_ERROR_MASK | 0x00000007); uint8_t length = info.length; uint8_t firstByte = info.data[0]; uint64_t instrAddress = info.instrAddress; @@ -1282,22 +1293,24 @@ DecodeError: info.length = length; info.data[0] = firstByte; info.instrAddress = instrAddress; - info.instrDefinition = Internal::VDEGetInstructionDefinition(0); - // Return with error, if the end of the input source was reached while decoding the - // invalid instruction - if (info.flags & IF_ERROR_END_OF_INPUT) - { - info.length = 0; - return false; - } + info.instrDefinition = Internal::GetInstructionDefinition(0); // Decrement the input position, if more than one byte was read from the input data // source while decoding the invalid instruction. if (info.length != 1) { - m_dataSource->setPosition(m_dataSource->getPosition() - info.length + 1); + m_input->setPosition(m_input->getPosition() - info.length + 1); info.length = 1; } + // Return with error, if the end of the input source was reached while decoding the + // invalid instruction + if (info.flags& IF_ERROR_END_OF_INPUT) + { + info.length = 0; + return false; + } return true; } -} +/* ============================================================================================== */ + +} \ No newline at end of file diff --git a/VerteronDisassemblerEngine/VXInstructionDecoder.h b/Zydis/ZydisInstructionDecoder.hpp similarity index 71% rename from VerteronDisassemblerEngine/VXInstructionDecoder.h rename to Zydis/ZydisInstructionDecoder.hpp index ba5cf54..84f9355 100644 --- a/VerteronDisassemblerEngine/VXInstructionDecoder.h +++ b/Zydis/ZydisInstructionDecoder.hpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,22 +26,24 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#pragma once +***************************************************************************************************/ + +#ifndef _ZYDIS_INSTRUCTIONDECODER_HPP_ +#define _ZYDIS_INSTRUCTIONDECODER_HPP_ #include #include -#include "VXDisassemblerTypes.h" +#include "ZydisTypes.hpp" -namespace Verteron +namespace Zydis { -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* BaseInput ==================================================================================== */ /** * @brief The base class for all data-source implementations. */ -class VXBaseDataSource +class BaseInput { private: uint8_t m_currentInput; @@ -66,12 +66,12 @@ protected: /** * @brief Default constructor. */ - VXBaseDataSource() { }; + BaseInput() { }; public: /** * @brief Destructor. */ - virtual ~VXBaseDataSource() { }; + virtual ~BaseInput() { }; public: /** * @brief Reads the next byte from the data source. This method does NOT increase the @@ -81,7 +81,7 @@ public: * @c flags field of the @c info parameter for error flags. * Possible error values are @c IF_ERROR_END_OF_INPUT or @c IF_ERROR_LENGTH. */ - uint8_t inputPeek(VXInstructionInfo &info); + uint8_t inputPeek(InstructionInfo& info); /** * @brief Reads the next byte from the data source. This method increases the current * input position and the @c length field of the @c info parameter. @@ -92,7 +92,7 @@ public: * @c flags field of the @c info parameter for error flags. * Possible error values are @c IF_ERROR_END_OF_INPUT or @c IF_ERROR_LENGTH. */ - uint8_t inputNext(VXInstructionInfo &info); + uint8_t inputNext(InstructionInfo& info); /** * @brief Reads the next byte(s) from the data source. This method increases the current * input position and the @c length field of the @c info parameter. @@ -104,7 +104,7 @@ public: * Possible error values are @c IF_ERROR_END_OF_INPUT or @c IF_ERROR_LENGTH. */ template - T inputNext(VXInstructionInfo &info); + T inputNext(InstructionInfo& info); /** * @brief Returns the current input byte. The current input byte is set everytime the * @c inputPeek or @c inputNext method is called. @@ -133,7 +133,7 @@ public: virtual bool setPosition(uint64_t position) = 0; }; -inline uint8_t VXBaseDataSource::inputPeek(VXInstructionInfo &info) +inline uint8_t BaseInput::inputPeek(InstructionInfo& info) { if (info.length == 15) { @@ -149,7 +149,7 @@ inline uint8_t VXBaseDataSource::inputPeek(VXInstructionInfo &info) return m_currentInput; } -inline uint8_t VXBaseDataSource::inputNext(VXInstructionInfo &info) +inline uint8_t BaseInput::inputNext(InstructionInfo& info) { if (info.length == 15) { @@ -168,14 +168,14 @@ inline uint8_t VXBaseDataSource::inputNext(VXInstructionInfo &info) } template -inline T VXBaseDataSource::inputNext(VXInstructionInfo &info) +inline T BaseInput::inputNext(InstructionInfo& info) { static_assert(std::is_integral::value, "integral type required"); T result = 0; for (unsigned i = 0; i < (sizeof(T) / sizeof(uint8_t)); ++i) { T b = inputNext(info); - if (!b && (info.flags & IF_ERROR_MASK)) + if (!b&& (info.flags& IF_ERROR_MASK)) { return 0; } @@ -184,20 +184,20 @@ inline T VXBaseDataSource::inputNext(VXInstructionInfo &info) return result; } -inline uint8_t VXBaseDataSource::inputCurrent() const +inline uint8_t BaseInput::inputCurrent() const { return m_currentInput; } -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* MemoryInput ================================================================================== */ /** - * @brief A memory-buffer based data source for the @c VXInstructionDecoder class. + * @brief A memory-buffer based data source for the @c InstructionDecoder class. */ -class VXMemoryDataSource : public VXBaseDataSource +class MemoryInput : public BaseInput { private: - const void *m_inputBuffer; + const void* m_inputBuffer; uint64_t m_inputBufferLen; uint64_t m_inputBufferPos; protected: @@ -219,7 +219,7 @@ public: * @param buffer The input buffer. * @param bufferLen The length of the input buffer. */ - VXMemoryDataSource(const void* buffer, size_t bufferLen) + MemoryInput(const void* buffer, size_t bufferLen) : m_inputBuffer(buffer) , m_inputBufferLen(bufferLen) , m_inputBufferPos(0) { }; @@ -242,42 +242,42 @@ public: bool setPosition(uint64_t position) override; }; -inline uint8_t VXMemoryDataSource::internalInputPeek() +inline uint8_t MemoryInput::internalInputPeek() { return *(static_cast(m_inputBuffer) + m_inputBufferPos); } -inline uint8_t VXMemoryDataSource::internalInputNext() +inline uint8_t MemoryInput::internalInputNext() { ++m_inputBufferPos; return *(static_cast(m_inputBuffer) + m_inputBufferPos - 1); } -inline bool VXMemoryDataSource::isEndOfInput() const +inline bool MemoryInput::isEndOfInput() const { return (m_inputBufferPos >= m_inputBufferLen); } -inline uint64_t VXMemoryDataSource::getPosition() const +inline uint64_t MemoryInput::getPosition() const { return m_inputBufferPos; } -inline bool VXMemoryDataSource::setPosition(uint64_t position) +inline bool MemoryInput::setPosition(uint64_t position) { m_inputBufferPos = position; return isEndOfInput(); } -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* StreamInput ================================================================================== */ /** - * @brief A stream based data source for the @c VXInstructionDecoder class. + * @brief A stream based data source for the @c InstructionDecoder class. */ -class VXStreamDataSource : public VXBaseDataSource +class StreamInput : public BaseInput { private: - std::istream *m_inputStream; + std::istream* m_inputStream; protected: /** * @brief Reads the next byte from the data source. This method increases the current @@ -296,7 +296,7 @@ public: * @brief Constructor. * @param stream The input stream. */ - explicit VXStreamDataSource(std::istream *stream) + explicit StreamInput(std::istream* stream) : m_inputStream(stream) { }; public: /** @@ -317,25 +317,25 @@ public: bool setPosition(uint64_t position) override; }; -inline uint8_t VXStreamDataSource::internalInputPeek() +inline uint8_t StreamInput::internalInputPeek() { if (!m_inputStream) { return 0; } - return m_inputStream->peek(); + return static_cast(m_inputStream->peek()); } -inline uint8_t VXStreamDataSource::internalInputNext() +inline uint8_t StreamInput::internalInputNext() { if (!m_inputStream) { return 0; } - return m_inputStream->get(); + return static_cast(m_inputStream->get()); } -inline bool VXStreamDataSource::isEndOfInput() const +inline bool StreamInput::isEndOfInput() const { if (!m_inputStream) { @@ -346,7 +346,7 @@ inline bool VXStreamDataSource::isEndOfInput() const return !m_inputStream->good(); } -inline uint64_t VXStreamDataSource::getPosition() const +inline uint64_t StreamInput::getPosition() const { if (!m_inputStream) { @@ -355,7 +355,7 @@ inline uint64_t VXStreamDataSource::getPosition() const return m_inputStream->tellg(); } -inline bool VXStreamDataSource::setPosition(uint64_t position) +inline bool StreamInput::setPosition(uint64_t position) { if (!m_inputStream) { @@ -365,12 +365,12 @@ inline bool VXStreamDataSource::setPosition(uint64_t position) return isEndOfInput(); } -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* Enums ======================================================================================== */ /** * @brief Values that represent a disassembler mode. */ -enum class VXDisassemblerMode +enum class DisassemblerMode : uint8_t { M16BIT, M32BIT, @@ -380,21 +380,23 @@ enum class VXDisassemblerMode /** * @brief Values that represent an instruction-set vendor. */ -enum class VXInstructionSetVendor +enum class InstructionSetVendor : uint8_t { ANY, INTEL, AMD }; +/* InstructionDecoder =========================================================================== */ + /** - * @brief The @c VXInstructionDecoder class decodes x86/x86-64 assembly instructions from a + * @brief The @c InstructionDecoder class decodes x86/x86-64 assembly instructions from a * given data source. */ -class VXInstructionDecoder +class InstructionDecoder { private: - enum class RegisterClass + enum class RegisterClass : uint8_t { GENERAL_PURPOSE, MMX, @@ -404,10 +406,10 @@ private: XMM }; private: - VXBaseDataSource *m_dataSource; - VXDisassemblerMode m_disassemblerMode; - VXInstructionSetVendor m_preferredVendor; - uint64_t m_instructionPointer; + BaseInput* m_input; + DisassemblerMode m_disassemblerMode; + InstructionSetVendor m_preferredVendor; + uint64_t m_instructionPointer; private: /** * @brief Reads the next byte from the data source. This method does NOT increase the @@ -417,7 +419,7 @@ private: * @c flags field of the @c info parameter for error flags. * Possible error values are @c IF_ERROR_END_OF_INPUT or @c IF_ERROR_LENGTH. */ - uint8_t inputPeek(VXInstructionInfo &info); + uint8_t inputPeek(InstructionInfo& info); /** * @brief Reads the next byte from the data source. This method increases the current * input position and the @c length field of the @info parameter. @@ -428,7 +430,7 @@ private: * @c flags field of the @c info parameter for error flags. * Possible error values are @c IF_ERROR_END_OF_INPUT or @c IF_ERROR_LENGTH. */ - uint8_t inputNext(VXInstructionInfo &info); + uint8_t inputNext(InstructionInfo& info); /** * @brief Reads the next byte(s) from the data source. This method increases the current * input position and the @c length field of the @info parameter. @@ -440,7 +442,7 @@ private: * Possible error values are @c IF_ERROR_END_OF_INPUT or @c IF_ERROR_LENGTH. */ template - T inputNext(VXInstructionInfo &info); + T inputNext(InstructionInfo& info); /** * @brief Returns the current input byte. The current input byte is set everytime the * @c inputPeek or @c inputNext method is called. @@ -451,64 +453,64 @@ private: /** * @brief Decodes a register operand. * @param info The instruction info. - * @param operand The @c VXOperandInfo struct that receives the decoded data. + * @param operand The @c OperandInfo struct that receives the decoded data. * @param registerClass The register class to use. * @param registerId The register id. * @param operandSize The defined size of the operand. * @return True if it succeeds, false if it fails. */ - bool decodeRegisterOperand(VXInstructionInfo &info, VXOperandInfo &operand, - RegisterClass registerClass, uint8_t registerId, VXDefinedOperandSize operandSize) const; + bool decodeRegisterOperand(InstructionInfo& info, OperandInfo& operand, + RegisterClass registerClass, uint8_t registerId, DefinedOperandSize operandSize) const; /** * @brief Decodes a register/memory operand. * @param info The instruction info. - * @param operand The @c VXOperandInfo struct that receives the decoded data. + * @param operand The @c OperandInfo struct that receives the decoded data. * @param registerClass The register class to use. * @param operandSize The defined size of the operand. * @return True if it succeeds, false if it fails. */ - bool decodeRegisterMemoryOperand(VXInstructionInfo &info, VXOperandInfo &operand, - RegisterClass registerClass, VXDefinedOperandSize operandSize); + bool decodeRegisterMemoryOperand(InstructionInfo& info, OperandInfo& operand, + RegisterClass registerClass, DefinedOperandSize operandSize); /** * @brief Decodes an immediate operand. * @param info The instruction info. - * @param operand The @c VXOperandInfo struct that receives the decoded data. + * @param operand The @c OperandInfo struct that receives the decoded data. * @param operandSize The defined size of the operand. * @return True if it succeeds, false if it fails. */ - bool decodeImmediate(VXInstructionInfo &info, VXOperandInfo &operand, - VXDefinedOperandSize operandSize); + bool decodeImmediate(InstructionInfo& info, OperandInfo& operand, + DefinedOperandSize operandSize); /** * @brief Decodes a displacement operand. * @param info The instruction info. - * @param operand The @c VXOperandInfo struct that receives the decoded data. + * @param operand The @c OperandInfo struct that receives the decoded data. * @param size The size of the displacement data. * @return True if it succeeds, false if it fails. */ - bool decodeDisplacement(VXInstructionInfo &info, VXOperandInfo &operand, uint8_t size); + bool decodeDisplacement(InstructionInfo& info, OperandInfo& operand, uint8_t size); private: /** * @brief Decodes the modrm field of the instruction. This method reads an additional * input byte. - * @param The @c VXInstructionInfo struct that receives the decoded data. + * @param The @c InstructionInfo struct that receives the decoded data. * @return True if it succeeds, false if it fails. */ - bool decodeModrm(VXInstructionInfo &info); + bool decodeModrm(InstructionInfo& info); /** * @brief Decodes the sib field of the instruction. This method reads an additional * input byte. - * @param info The @c VXInstructionInfo struct that receives the decoded data. + * @param info The @c InstructionInfo struct that receives the decoded data. * @return True if it succeeds, false if it fails. */ - bool decodeSIB(VXInstructionInfo &info); + bool decodeSIB(InstructionInfo& info); /** * @brief Decodes vex prefix of the instruction. This method takes the current input byte * to determine the vex prefix type and reads one or two additional input bytes * on demand. - * @param info The @c VXInstructionInfo struct that receives the decoded data. + * @param info The @c InstructionInfo struct that receives the decoded data. * @return True if it succeeds, false if it fails. */ - bool decodeVex(VXInstructionInfo &info); + bool decodeVex(InstructionInfo& info); private: /** * @brief Returns the effective operand size. @@ -516,59 +518,59 @@ private: * @param operandSize The defined operand size. * @return The effective operand size. */ - uint16_t getEffectiveOperandSize(const VXInstructionInfo &info, - VXDefinedOperandSize operandSize) const; + uint16_t getEffectiveOperandSize(const InstructionInfo& info, + DefinedOperandSize operandSize) const; /** * @brief Decodes all instruction operands. - * @param info The @c VXInstructionInfo struct that receives the decoded data. + * @param info The @c InstructionInfo struct that receives the decoded data. * @return True if it succeeds, false if it fails. */ - bool decodeOperands(VXInstructionInfo &info); + bool decodeOperands(InstructionInfo& info); /** * @brief Decodes the specified instruction operand. * @param info The instruction info. - * @param operand The @c VXOperandInfo struct that receives the decoded data. + * @param operand The @c OperandInfo struct that receives the decoded data. * @param operandType The defined type of the operand. * @param operandSize The defined size of the operand. * @return True if it succeeds, false if it fails. */ - bool decodeOperand(VXInstructionInfo &info, VXOperandInfo &operand, - VXDefinedOperandType operandType, VXDefinedOperandSize operandSize); + bool decodeOperand(InstructionInfo& info, OperandInfo& operand, + DefinedOperandType operandType, DefinedOperandSize operandSize); private: /** * @brief Resolves the effective operand and address mode of the instruction. * This method requires a non-null value in the @c instrDefinition field of the * @c info struct. - * @param info The @c VXInstructionInfo struct that receives the effective operand and + * @param info The @c InstructionInfo struct that receives the effective operand and * address mode. */ - void resolveOperandAndAddressMode(VXInstructionInfo &info) const; + void resolveOperandAndAddressMode(InstructionInfo& info) const; /** * @brief Calculates the effective REX/VEX.w, r, x, b, l values. * This method requires a non-null value in the @c instrDefinition field of the * @c info struct. - * @param info The @c VXInstructionInfo struct that receives the effective operand and + * @param info The @c InstructionInfo struct that receives the effective operand and * address mode. */ - void calculateEffectiveRexVexValues(VXInstructionInfo &info) const; + void calculateEffectiveRexVexValues(InstructionInfo& info) const; private: /** * @brief Collects and decodes optional instruction prefixes. - * @param info The @c VXInstructionInfo struct that receives the decoded data. + * @param info The @c InstructionInfo struct that receives the decoded data. * @return True if it succeeds, false if it fails. */ - bool decodePrefixes(VXInstructionInfo &info); + bool decodePrefixes(InstructionInfo& info); /** * @brief Collects and decodes the instruction opcodes using the opcode tree. - * @param info The @c VXInstructionInfo struct that receives the decoded data. + * @param info The @c InstructionInfo struct that receives the decoded data. * @return True if it succeeds, false if it fails. */ - bool decodeOpcode(VXInstructionInfo &info); + bool decodeOpcode(InstructionInfo& info); public: /** * @brief Default constructor. */ - VXInstructionDecoder(); + InstructionDecoder(); /** * @brief Constructor. * @param input A reference to the input data source. @@ -576,51 +578,51 @@ public: * @param preferredVendor The preferred instruction-set vendor. * @param instructionPointer The initial instruction pointer. */ - explicit VXInstructionDecoder(VXBaseDataSource *input, - VXDisassemblerMode disassemblerMode = VXDisassemblerMode::M32BIT, - VXInstructionSetVendor preferredVendor = VXInstructionSetVendor::ANY, + explicit InstructionDecoder(BaseInput* input, + DisassemblerMode disassemblerMode = DisassemblerMode::M32BIT, + InstructionSetVendor preferredVendor = InstructionSetVendor::ANY, uint64_t instructionPointer = 0); public: /** * @brief Decodes the next instruction from the input data source. - * @param info The @c VXInstructionInfo struct that receives the information about the + * @param info The @c InstructionInfo struct that receives the information about the * decoded instruction. * @return This method returns false, if the current position has exceeded the maximum input * length. * In all other cases (valid and invalid instructions) the return value is true. */ - bool decodeInstruction(VXInstructionInfo &info); + bool decodeInstruction(InstructionInfo& info); public: /** * @brief Returns a pointer to the current data source. * @return A pointer to the current data source. */ - VXBaseDataSource* getDataSource() const; + BaseInput* getDataSource() const; /** * @brief Sets a new data source. * @param input A reference to the new input data source. */ - void setDataSource(VXBaseDataSource *input); + void setDataSource(BaseInput* input); /** * @brief Returns the current disassembler mode. * @return The current disassembler mode. */ - VXDisassemblerMode getDisassemblerMode() const; + DisassemblerMode getDisassemblerMode() const; /** * @brief Sets the current disassembler mode. * @param disassemblerMode The new disassembler mode. */ - void setDisassemblerMode(VXDisassemblerMode disassemblerMode); + void setDisassemblerMode(DisassemblerMode disassemblerMode); /** * @brief Returns the preferred instruction-set vendor. * @return The preferred instruction-set vendor. */ - VXInstructionSetVendor getPreferredVendor() const; + InstructionSetVendor getPreferredVendor() const; /** * @brief Sets the preferred instruction-set vendor. * @param preferredVendor The new preferred instruction-set vendor. */ - void setPreferredVendor(VXInstructionSetVendor preferredVendor); + void setPreferredVendor(InstructionSetVendor preferredVendor); /** * @brief Returns the current instruction pointer. * @return The current instruction pointer. @@ -633,86 +635,88 @@ public: void setInstructionPointer(uint64_t instructionPointer); }; -inline uint8_t VXInstructionDecoder::inputPeek(VXInstructionInfo &info) +inline uint8_t InstructionDecoder::inputPeek(InstructionInfo& info) { - if (!m_dataSource) + if (!m_input) { info.flags |= IF_ERROR_END_OF_INPUT; return 0; } - return m_dataSource->inputPeek(info); + return m_input->inputPeek(info); } -inline uint8_t VXInstructionDecoder::inputNext(VXInstructionInfo &info) +inline uint8_t InstructionDecoder::inputNext(InstructionInfo& info) { - if (!m_dataSource) + if (!m_input) { info.flags |= IF_ERROR_END_OF_INPUT; return 0; } - return m_dataSource->inputNext(info); + return m_input->inputNext(info); } template -inline T VXInstructionDecoder::inputNext(VXInstructionInfo &info) +inline T InstructionDecoder::inputNext(InstructionInfo& info) { - if (!m_dataSource) + if (!m_input) { info.flags |= IF_ERROR_END_OF_INPUT; return 0; } - return m_dataSource->inputNext(info); + return m_input->inputNext(info); } -inline uint8_t VXInstructionDecoder::inputCurrent() const +inline uint8_t InstructionDecoder::inputCurrent() const { - if (!m_dataSource) + if (!m_input) { return 0; } - return m_dataSource->inputCurrent(); + return m_input->inputCurrent(); } -inline VXBaseDataSource* VXInstructionDecoder::getDataSource() const +inline BaseInput *InstructionDecoder::getDataSource() const { - return m_dataSource; + return m_input; } -inline void VXInstructionDecoder::setDataSource(VXBaseDataSource *input) +inline void InstructionDecoder::setDataSource(BaseInput* input) { - m_dataSource = input; + m_input = input; } -inline VXDisassemblerMode VXInstructionDecoder::getDisassemblerMode() const +inline DisassemblerMode InstructionDecoder::getDisassemblerMode() const { return m_disassemblerMode; } -inline void VXInstructionDecoder::setDisassemblerMode(VXDisassemblerMode disassemblerMode) +inline void InstructionDecoder::setDisassemblerMode(DisassemblerMode disassemblerMode) { m_disassemblerMode = disassemblerMode; } -inline VXInstructionSetVendor VXInstructionDecoder::getPreferredVendor() const +inline InstructionSetVendor InstructionDecoder::getPreferredVendor() const { return m_preferredVendor; } -inline void VXInstructionDecoder::setPreferredVendor(VXInstructionSetVendor preferredVendor) +inline void InstructionDecoder::setPreferredVendor(InstructionSetVendor preferredVendor) { m_preferredVendor = preferredVendor; } -inline uint64_t VXInstructionDecoder::getInstructionPointer() const +inline uint64_t InstructionDecoder::getInstructionPointer() const { return m_instructionPointer; } -inline void VXInstructionDecoder::setInstructionPointer(uint64_t instructionPointer) +inline void InstructionDecoder::setInstructionPointer(uint64_t instructionPointer) { m_instructionPointer = instructionPointer; } -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* ============================================================================================== */ } + +#endif /* _ZYDIS_INSTRUCTIONDECODER_HPP_ */ \ No newline at end of file diff --git a/VerteronDisassemblerEngine/VXInstructionFormatter.cpp b/Zydis/ZydisInstructionFormatter.cpp similarity index 63% rename from VerteronDisassemblerEngine/VXInstructionFormatter.cpp rename to Zydis/ZydisInstructionFormatter.cpp index 94df4ec..5866609 100644 --- a/VerteronDisassemblerEngine/VXInstructionFormatter.cpp +++ b/Zydis/ZydisInstructionFormatter.cpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 22. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,31 +26,20 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#include "VXInstructionFormatter.h" -#include "VXDisassemblerUtils.h" +***************************************************************************************************/ + +#include "ZydisInstructionFormatter.hpp" +#include "ZydisUtils.hpp" #include #include +#include -namespace Verteron +namespace Zydis { -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* BaseInstructionFormatter ================================================================ */ -VXBaseSymbolResolver::~VXBaseSymbolResolver() -{ - -} - -const char* VXBaseSymbolResolver::resolveSymbol(const VXInstructionInfo &info, uint64_t address, - uint64_t &offset) -{ - return nullptr; -} - -/////////////////////////////////////////////////////////////////////////////////////////////////// - -const char* VXBaseInstructionFormatter::m_registerStrings[] = +const char *BaseInstructionFormatter::m_registerStrings[] = { /* 8 bit general purpose registers */ "al", "cl", "dl", "bl", @@ -108,12 +95,12 @@ const char* VXBaseInstructionFormatter::m_registerStrings[] = "rip" }; -void VXBaseInstructionFormatter::internalFormatInstruction(const VXInstructionInfo &info) +void BaseInstructionFormatter::internalFormatInstruction(const InstructionInfo& /*info*/) { // Nothing to do here } -VXBaseInstructionFormatter::VXBaseInstructionFormatter() +BaseInstructionFormatter::BaseInstructionFormatter() : m_symbolResolver(nullptr) , m_outputStringLen(0) , m_outputUppercase(false) @@ -121,7 +108,8 @@ VXBaseInstructionFormatter::VXBaseInstructionFormatter() } -VXBaseInstructionFormatter::VXBaseInstructionFormatter(VXBaseSymbolResolver *symbolResolver) +BaseInstructionFormatter::BaseInstructionFormatter( + BaseSymbolResolver *symbolResolver) : m_symbolResolver(symbolResolver) , m_outputStringLen(0) , m_outputUppercase(false) @@ -129,7 +117,7 @@ VXBaseInstructionFormatter::VXBaseInstructionFormatter(VXBaseSymbolResolver *sym } -const char* VXBaseInstructionFormatter::formatInstruction(const VXInstructionInfo &info) +const char* BaseInstructionFormatter::formatInstruction(const InstructionInfo& info) { // Clears the internal string buffer outputClear(); @@ -138,28 +126,28 @@ const char* VXBaseInstructionFormatter::formatInstruction(const VXInstructionInf if (m_outputBuffer.size() == 0) { // The basic instruction formatter only returns the instruction menmonic. - return Internal::VDEGetInstructionMnemonicString(info.mnemonic); + return Internal::GetInstructionMnemonicString(info.mnemonic); } // Return the formatted instruction string return outputString(); } -VXBaseInstructionFormatter::~VXBaseInstructionFormatter() +BaseInstructionFormatter::~BaseInstructionFormatter() { } -void VXBaseInstructionFormatter::outputClear() +void BaseInstructionFormatter::outputClear() { m_outputStringLen = 0; } -char const* VXBaseInstructionFormatter::outputString() +char const *BaseInstructionFormatter::outputString() { - return &m_outputBuffer[0]; + return& m_outputBuffer[0]; } - void VXBaseInstructionFormatter::outputAppend(char const *text) + void BaseInstructionFormatter::outputAppend(char const* text) { // Get the string length including the null-terminator char size_t strLen = strlen(text) + 1; @@ -183,12 +171,12 @@ char const* VXBaseInstructionFormatter::outputString() { for (size_t i = offset; i < m_outputStringLen - 1; ++i) { - m_outputBuffer[i] = toupper(m_outputBuffer[i]); + m_outputBuffer[i] = static_cast(toupper(m_outputBuffer[i])); } } } - void VXBaseInstructionFormatter::outputAppendFormatted(char const *format, ...) + void BaseInstructionFormatter::outputAppendFormatted(char const* format, ...) { va_list arguments; va_start(arguments, format); @@ -214,8 +202,7 @@ char const* VXBaseInstructionFormatter::outputString() } // Write the formatted text to the output buffer assert((bufLen - offset) > 0); - strLen = - vsnprintf_s(&m_outputBuffer[offset], bufLen - offset, _TRUNCATE, format, arguments); + strLen = std::vsnprintf(&m_outputBuffer[offset], bufLen - offset, format, arguments); } while (strLen < 0); // Increase the string length m_outputStringLen = offset + strLen + 1; @@ -224,17 +211,17 @@ char const* VXBaseInstructionFormatter::outputString() { for (size_t i = offset; i < m_outputStringLen - 1; ++i) { - m_outputBuffer[i] = toupper(m_outputBuffer[i]); + m_outputBuffer[i] = static_cast(toupper(m_outputBuffer[i])); } } va_end(arguments); } -void VXBaseInstructionFormatter::outputAppendAddress(const VXInstructionInfo &info, +void BaseInstructionFormatter::outputAppendAddress(const InstructionInfo& info, uint64_t address, bool resolveSymbols) { uint64_t offset = 0; - const char* name = nullptr; + const char *name = nullptr; if (resolveSymbols) { name = resolveSymbol(info, address, offset); @@ -250,13 +237,13 @@ void VXBaseInstructionFormatter::outputAppendAddress(const VXInstructionInfo &in } } else { - if (info.flags & IF_DISASSEMBLER_MODE_16) + if (info.flags& IF_DISASSEMBLER_MODE_16) { outputAppendFormatted("%.4X", address); - } else if (info.flags & IF_DISASSEMBLER_MODE_32) + } else if (info.flags& IF_DISASSEMBLER_MODE_32) { outputAppendFormatted("%.8lX", address); - } else if (info.flags & IF_DISASSEMBLER_MODE_64) + } else if (info.flags& IF_DISASSEMBLER_MODE_64) { outputAppendFormatted("%.16llX", address); } else @@ -266,12 +253,12 @@ void VXBaseInstructionFormatter::outputAppendAddress(const VXInstructionInfo &in } } -void VXBaseInstructionFormatter::outputAppendImmediate(const VXInstructionInfo &info, - const VXOperandInfo &operand, bool resolveSymbols) +void BaseInstructionFormatter::outputAppendImmediate(const InstructionInfo& info, + const OperandInfo& operand, bool resolveSymbols) { - assert(operand.type == VXOperandType::IMMEDIATE); + assert(operand.type == OperandType::IMMEDIATE); uint64_t value = 0; - if (operand.signed_lval && (operand.size != info.operand_mode)) + if (operand.signed_lval&& (operand.size != info.operand_mode)) { if (operand.size == 8) { @@ -283,7 +270,7 @@ void VXBaseInstructionFormatter::outputAppendImmediate(const VXInstructionInfo & } if (info.operand_mode < 64) { - value = value & ((1ull << info.operand_mode) - 1ull); + value = value& ((1ull << info.operand_mode) - 1ull); } } else { @@ -306,7 +293,7 @@ void VXBaseInstructionFormatter::outputAppendImmediate(const VXInstructionInfo & } } uint64_t offset = 0; - const char* name = nullptr; + const char *name = nullptr; if (resolveSymbols) { name = resolveSymbol(info, value, offset); @@ -326,11 +313,10 @@ void VXBaseInstructionFormatter::outputAppendImmediate(const VXInstructionInfo & } } -void VXBaseInstructionFormatter::outputAppendDisplacement(const VXInstructionInfo &info, - const VXOperandInfo &operand) +void BaseInstructionFormatter::outputAppendDisplacement(const OperandInfo& operand) { assert(operand.offset > 0); - if ((operand.base == VXRegister::NONE) && (operand.index == VXRegister::NONE)) + if ((operand.base == Register::NONE)&& (operand.index == Register::NONE)) { // Assume the displacement value is unsigned assert(operand.scale == 0); @@ -375,16 +361,15 @@ void VXBaseInstructionFormatter::outputAppendDisplacement(const VXInstructionInf outputAppendFormatted("-%.2lX", -value); } else { - outputAppendFormatted("%s%.2lX", (operand.base != VXRegister::NONE || - operand.index != VXRegister::NONE) ? "+" : "", value); + outputAppendFormatted("%s%.2lX", (operand.base != Register::NONE || + operand.index != Register::NONE) ? "+" : "", value); } } } -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* IntelInstructionFormatter =============================================================== */ -void VXIntelInstructionFormatter::outputAppendOperandCast(const VXInstructionInfo &info, - const VXOperandInfo &operand) +void IntelInstructionFormatter::outputAppendOperandCast(const OperandInfo& operand) { switch(operand.size) { @@ -414,33 +399,33 @@ void VXIntelInstructionFormatter::outputAppendOperandCast(const VXInstructionInf } } -void VXIntelInstructionFormatter::formatOperand(const VXInstructionInfo &info, - const VXOperandInfo &operand) +void IntelInstructionFormatter::formatOperand(const InstructionInfo& info, + const OperandInfo& operand) { switch (operand.type) { - case VXOperandType::REGISTER: + case OperandType::REGISTER: outputAppend(registerToString(operand.base)); break; - case VXOperandType::MEMORY: - if (info.flags & IF_PREFIX_SEGMENT) + case OperandType::MEMORY: + if (info.flags& IF_PREFIX_SEGMENT) { outputAppendFormatted("%s:", registerToString(info.segment)); } outputAppend("["); - if (operand.base == VXRegister::RIP) + if (operand.base == Register::RIP) { // TODO: Add option - outputAppendAddress(info, VDECalcAbsoluteTarget(info, operand), true); + outputAppendAddress(info, CalcAbsoluteTarget(info, operand), true); } else { - if (operand.base != VXRegister::NONE) + if (operand.base != Register::NONE) { outputAppend(registerToString(operand.base)); } - if (operand.index != VXRegister::NONE) + if (operand.index != Register::NONE) { - outputAppendFormatted("%s%s", operand.base != VXRegister::NONE ? "+" : "", + outputAppendFormatted("%s%s", operand.base != Register::NONE ? "+" : "", registerToString(operand.index)); if (operand.scale) { @@ -449,18 +434,18 @@ void VXIntelInstructionFormatter::formatOperand(const VXInstructionInfo &info, } if (operand.offset) { - outputAppendDisplacement(info, operand); + outputAppendDisplacement(operand); } } outputAppend("]"); break; - case VXOperandType::POINTER: + case OperandType::POINTER: // TODO: resolve symbols switch (operand.size) { case 32: outputAppendFormatted("word %.4X:%.4X", operand.lval.ptr.seg, - operand.lval.ptr.off & 0xFFFF); + operand.lval.ptr.off& 0xFFFF); break; case 48: outputAppendFormatted("dword %.4X:%.8lX", operand.lval.ptr.seg, operand.lval.ptr.off); @@ -469,21 +454,21 @@ void VXIntelInstructionFormatter::formatOperand(const VXInstructionInfo &info, assert(0); } break; - case VXOperandType::IMMEDIATE: + case OperandType::IMMEDIATE: { outputAppendImmediate(info, operand, true); } break; - case VXOperandType::REL_IMMEDIATE: + case OperandType::REL_IMMEDIATE: { if (operand.size == 8) { outputAppend("short "); } - outputAppendAddress(info, VDECalcAbsoluteTarget(info, operand), true); + outputAppendAddress(info, CalcAbsoluteTarget(info, operand), true); } break; - case VXOperandType::CONSTANT: + case OperandType::CONSTANT: outputAppendFormatted("%.2X", operand.lval.udword); break; default: @@ -492,47 +477,47 @@ void VXIntelInstructionFormatter::formatOperand(const VXInstructionInfo &info, } } -void VXIntelInstructionFormatter::internalFormatInstruction(const VXInstructionInfo &info) +void IntelInstructionFormatter::internalFormatInstruction(const InstructionInfo& info) { // Append string prefixes - if (info.flags & IF_PREFIX_LOCK) + if (info.flags& IF_PREFIX_LOCK) { outputAppend("lock "); } - if (info.flags & IF_PREFIX_REP) + if (info.flags& IF_PREFIX_REP) { outputAppend("rep "); - } else if (info.flags & IF_PREFIX_REPNE) + } else if (info.flags& IF_PREFIX_REPNE) { outputAppend("repne "); } // Append the instruction mnemonic - outputAppend(Internal::VDEGetInstructionMnemonicString(info.mnemonic)); + outputAppend(Internal::GetInstructionMnemonicString(info.mnemonic)); // Append the first operand - if (info.operand[0].type != VXOperandType::NONE) + if (info.operand[0].type != OperandType::NONE) { outputAppend(" "); bool cast = false; - if (info.operand[0].type == VXOperandType::MEMORY) + if (info.operand[0].type == OperandType::MEMORY) { - if (info.operand[1].type == VXOperandType::IMMEDIATE || - info.operand[1].type == VXOperandType::CONSTANT || - info.operand[1].type == VXOperandType::NONE || + if (info.operand[1].type == OperandType::IMMEDIATE || + info.operand[1].type == OperandType::CONSTANT || + info.operand[1].type == OperandType::NONE || (info.operand[0].size != info.operand[1].size)) { cast = true; - } else if (info.operand[1].type == VXOperandType::REGISTER && - info.operand[1].base == VXRegister::CL) + } else if (info.operand[1].type == OperandType::REGISTER&& + info.operand[1].base == Register::CL) { switch (info.mnemonic) { - case VXInstructionMnemonic::RCL: - case VXInstructionMnemonic::ROL: - case VXInstructionMnemonic::ROR: - case VXInstructionMnemonic::RCR: - case VXInstructionMnemonic::SHL: - case VXInstructionMnemonic::SHR: - case VXInstructionMnemonic::SAR: + case InstructionMnemonic::RCL: + case InstructionMnemonic::ROL: + case InstructionMnemonic::ROR: + case InstructionMnemonic::RCR: + case InstructionMnemonic::SHL: + case InstructionMnemonic::SHR: + case InstructionMnemonic::SAR: cast = true; break; default: @@ -542,114 +527,75 @@ void VXIntelInstructionFormatter::internalFormatInstruction(const VXInstructionI } if (cast) { - outputAppendOperandCast(info, info.operand[0]); + outputAppendOperandCast(info.operand[0]); } formatOperand(info, info.operand[0]); } // Append the second operand - if (info.operand[1].type != VXOperandType::NONE) + if (info.operand[1].type != OperandType::NONE) { outputAppend(", "); bool cast = false; - if (info.operand[1].type == VXOperandType::MEMORY && - info.operand[0].size != info.operand[1].size && - ((info.operand[0].type != VXOperandType::REGISTER) || - ((info.operand[0].base != VXRegister::ES) && - (info.operand[0].base != VXRegister::CS) && - (info.operand[0].base != VXRegister::SS) && - (info.operand[0].base != VXRegister::DS) && - (info.operand[0].base != VXRegister::FS) && - (info.operand[0].base != VXRegister::GS)))) + if (info.operand[1].type == OperandType::MEMORY&& + info.operand[0].size != info.operand[1].size&& + ((info.operand[0].type != OperandType::REGISTER) || + ((info.operand[0].base != Register::ES)&& + (info.operand[0].base != Register::CS)&& + (info.operand[0].base != Register::SS)&& + (info.operand[0].base != Register::DS)&& + (info.operand[0].base != Register::FS)&& + (info.operand[0].base != Register::GS)))) { cast = true; } if (cast) { - outputAppendOperandCast(info, info.operand[1]); + outputAppendOperandCast(info.operand[1]); } formatOperand(info, info.operand[1]); } // Append the third operand - if (info.operand[2].type != VXOperandType::NONE) + if (info.operand[2].type != OperandType::NONE) { outputAppend(", "); bool cast = false; - if (info.operand[2].type == VXOperandType::MEMORY && + if (info.operand[2].type == OperandType::MEMORY&& (info.operand[2].size != info.operand[1].size)) { cast = true; } if (cast) { - outputAppendOperandCast(info, info.operand[2]); + outputAppendOperandCast(info.operand[2]); } formatOperand(info, info.operand[2]); } // Append the fourth operand - if (info.operand[3].type != VXOperandType::NONE) + if (info.operand[3].type != OperandType::NONE) { outputAppend(", "); formatOperand(info, info.operand[3]); } } -VXIntelInstructionFormatter::VXIntelInstructionFormatter() - : VXBaseInstructionFormatter() +IntelInstructionFormatter::IntelInstructionFormatter() + : BaseInstructionFormatter() { } -VXIntelInstructionFormatter::VXIntelInstructionFormatter(VXBaseSymbolResolver* symbolResolver) - : VXBaseInstructionFormatter(symbolResolver) +IntelInstructionFormatter::IntelInstructionFormatter( + BaseSymbolResolver *symbolResolver) + : BaseInstructionFormatter(symbolResolver) { } -VXIntelInstructionFormatter::~VXIntelInstructionFormatter() +IntelInstructionFormatter::~IntelInstructionFormatter() { } -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* ============================================================================================== */ -VXExactSymbolResolver::~VXExactSymbolResolver() -{ - -} - -const char* VXExactSymbolResolver::resolveSymbol(const VXInstructionInfo &info, uint64_t address, - uint64_t &offset) -{ - std::unordered_map::const_iterator iterator = m_symbolMap.find(address); - if (iterator != m_symbolMap.end()) - { - offset = 0; - return iterator->second.c_str(); - } - return nullptr; -} - -bool VXExactSymbolResolver::containsSymbol(uint64_t address) const -{ - std::unordered_map::const_iterator iterator = m_symbolMap.find(address); - return (iterator != m_symbolMap.end()); -} - -void VXExactSymbolResolver::setSymbol(uint64_t address, const char* name) -{ - m_symbolMap[address].assign(name); -} - -void VXExactSymbolResolver::removeSymbol(uint64_t address) -{ - m_symbolMap.erase(address); -} - -void VXExactSymbolResolver::clear() -{ - m_symbolMap.clear(); -} - -/////////////////////////////////////////////////////////////////////////////////////////////////// - -} +} \ No newline at end of file diff --git a/VerteronDisassemblerEngine/VXInstructionFormatter.h b/Zydis/ZydisInstructionFormatter.hpp similarity index 53% rename from VerteronDisassemblerEngine/VXInstructionFormatter.h rename to Zydis/ZydisInstructionFormatter.hpp index f24b0a3..d2d8789 100644 --- a/VerteronDisassemblerEngine/VXInstructionFormatter.h +++ b/Zydis/ZydisInstructionFormatter.hpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 22. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,54 +26,31 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#pragma once +***************************************************************************************************/ + +#ifndef _ZYDIS_INSTRUCTIONFORMATTER_HPP_ +#define _ZYDIS_INSTRUCTIONFORMATTER_HPP_ #include -#include -#include "VXDisassemblerTypes.h" +#include "ZydisTypes.hpp" +#include "ZydisSymbolResolver.hpp" -namespace Verteron +namespace Zydis { -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** - * @brief Base class for all symbol resolver implementations. - */ -class VXBaseSymbolResolver -{ -public: - /** - * @brief Destructor. - */ - virtual ~VXBaseSymbolResolver(); -public: - /** - * @brief Resolves a symbol. - * @param info The instruction info. - * @param address The address. - * @param offset Reference to an unsigned 64 bit integer that receives an offset - * relative to the base address of the symbol. - * @return The name of the symbol, if the symbol was found, @c NULL if not. - */ - virtual const char* resolveSymbol(const VXInstructionInfo &info, uint64_t address, - uint64_t &offset); -}; - -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* BaseInstructionFormatter ===================================================================== */ /** * @brief Base class for all instruction formatter implementations. */ -class VXBaseInstructionFormatter +class BaseInstructionFormatter { private: - static const char *m_registerStrings[]; - VXBaseSymbolResolver *m_symbolResolver; - std::vector m_outputBuffer; - size_t m_outputStringLen; - bool m_outputUppercase; + static const char* m_registerStrings[]; + BaseSymbolResolver* m_symbolResolver; + std::vector m_outputBuffer; + size_t m_outputStringLen; + bool m_outputUppercase; protected: /** * @brief Clears the output string buffer. @@ -90,12 +65,12 @@ protected: * @brief Appends text to the ouput string buffer. * @param text The text. */ - void outputAppend(const char *text); + void outputAppend(const char* text); /** * @brief Appends formatted text to the output string buffer. * @param format The format string. */ - void outputAppendFormatted(const char *format, ...); + void outputAppendFormatted(const char* format, ...); /** * @brief Changes automatic conversion of characters to uppercase. * @param uppercase Set true to enable automatic uppercase conversion. @@ -108,7 +83,7 @@ protected: * @param resolveSymbols If this parameter is true, the method will try to display a * smybol name instead of the numeric value. */ - void outputAppendAddress(const VXInstructionInfo &info, uint64_t address, + void outputAppendAddress(const InstructionInfo& info, uint64_t address, bool resolveSymbols = true); /** * @brief Appends a formatted immediate value to the output string buffer. @@ -117,21 +92,20 @@ protected: * @param resolveSymbols If this parameter is true, the method will try to display a * smybol name instead of the numeric value. */ - void outputAppendImmediate(const VXInstructionInfo &info, const VXOperandInfo &operand, + void outputAppendImmediate(const InstructionInfo& info, const OperandInfo& operand, bool resolveSymbols = false); /** * @brief Appends a formatted memory displacement value to the output string buffer. - * @param info The instruction info. * @param operand The memory operand. */ - void outputAppendDisplacement(const VXInstructionInfo &info, const VXOperandInfo &operand); + void outputAppendDisplacement(const OperandInfo& operand); protected: /** * @brief Returns the string representation of a given register. * @param reg The register. * @return The string representation of the given register. */ - const char* registerToString(VXRegister reg) const; + const char *registerToString(Register reg) const; /** * @brief Resolves a symbol. * @param info The instruction info. @@ -140,8 +114,8 @@ protected: * relative to the base address of the symbol. * @return The name of the symbol, if the symbol was found, @c NULL if not. */ - const char* resolveSymbol(const VXInstructionInfo &info, uint64_t address, - uint64_t &offset) const; + const char* resolveSymbol(const InstructionInfo& info, uint64_t address, + uint64_t& offset) const; protected: /** * @brief Override this method to implement a custom disassembly syntax. Use the @@ -149,59 +123,59 @@ protected: * string buffer. * @param info The instruction info. */ - virtual void internalFormatInstruction(const VXInstructionInfo &info); + virtual void internalFormatInstruction(const InstructionInfo& info); /** * @brief Default constructor. */ - VXBaseInstructionFormatter(); + BaseInstructionFormatter(); /** * @brief Constructor. * @param symbolResolver Pointer to a symbol resolver instance or @c NULL, if no smybol * resolver should be used. */ - explicit VXBaseInstructionFormatter(VXBaseSymbolResolver *symbolResolver); + explicit BaseInstructionFormatter(BaseSymbolResolver* symbolResolver); public: /** * @brief Destructor. */ - virtual ~VXBaseInstructionFormatter(); + virtual ~BaseInstructionFormatter(); public: /** * @brief Formats a decoded instruction. * @param info The instruction info. * @return Pointer to the formatted instruction string. */ - const char* formatInstruction(const VXInstructionInfo &info); + const char* formatInstruction(const InstructionInfo& info); public: /** * @brief Returns a pointer to the current symbol resolver. * @return Pointer to the current symbol resolver or @c NULL, if no symbol resolver is used. */ - VXBaseSymbolResolver* getSymbolResolver() const; + BaseSymbolResolver* getSymbolResolver() const; /** * @brief Sets a new symbol resolver. * @param symbolResolver Pointer to a symbol resolver instance or @c NULL, if no smybol * resolver should be used. */ - void setSymbolResolver(VXBaseSymbolResolver *symbolResolver); + void setSymbolResolver(BaseSymbolResolver* symbolResolver); }; -inline void VXBaseInstructionFormatter::outputSetUppercase(bool uppercase) +inline void BaseInstructionFormatter::outputSetUppercase(bool uppercase) { m_outputUppercase = uppercase; } -inline char const* VXBaseInstructionFormatter::registerToString(VXRegister reg) const +inline char const* BaseInstructionFormatter::registerToString(Register reg) const { - if (reg == VXRegister::NONE) + if (reg == Register::NONE) { return "error"; } return m_registerStrings[static_cast(reg) - 1]; } -inline char const* VXBaseInstructionFormatter::resolveSymbol(const VXInstructionInfo &info, - uint64_t address, uint64_t &offset) const +inline char const* BaseInstructionFormatter::resolveSymbol(const InstructionInfo& info, + uint64_t address, uint64_t& offset) const { if (m_symbolResolver) { @@ -210,110 +184,62 @@ inline char const* VXBaseInstructionFormatter::resolveSymbol(const VXInstruction return nullptr; } -inline VXBaseSymbolResolver* VXBaseInstructionFormatter::getSymbolResolver() const +inline BaseSymbolResolver* BaseInstructionFormatter::getSymbolResolver() const { return m_symbolResolver; } -inline void VXBaseInstructionFormatter::setSymbolResolver(VXBaseSymbolResolver *symbolResolver) +inline void BaseInstructionFormatter::setSymbolResolver( + BaseSymbolResolver* symbolResolver) { m_symbolResolver = symbolResolver; } -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* IntelInstructionFormatter ==================================================================== */ /** * @brief Intel syntax instruction formatter. */ -class VXIntelInstructionFormatter : public VXBaseInstructionFormatter +class IntelInstructionFormatter : public BaseInstructionFormatter { private: /** * @brief Appends an operand cast to the output string buffer. - * @param info The instruction info. * @param operand The operand. */ - void outputAppendOperandCast(const VXInstructionInfo &info, const VXOperandInfo &operand); + void outputAppendOperandCast(const OperandInfo& operand); /** * @brief Formats the specified operand and appends the resulting string to the output * buffer. * @param info The instruction info. * @param operand The operand. */ - void formatOperand(const VXInstructionInfo &info, const VXOperandInfo &operand); + void formatOperand(const InstructionInfo& info, const OperandInfo& operand); protected: /** * @brief Fills the internal string buffer with an intel style formatted instruction string. * @param info The instruction info. */ - void internalFormatInstruction(const VXInstructionInfo &info) override; + void internalFormatInstruction(const InstructionInfo& info) override; public: /** * @brief Default constructor. */ - VXIntelInstructionFormatter(); + IntelInstructionFormatter(); /** * @brief Constructor. * @param symbolResolver Pointer to a symbol resolver instance or @c NULL, if no smybol * resolver should be used. */ - explicit VXIntelInstructionFormatter(VXBaseSymbolResolver *symbolResolver); + explicit IntelInstructionFormatter(BaseSymbolResolver* symbolResolver); /** * @brief Destructor. */ - ~VXIntelInstructionFormatter() override; + ~IntelInstructionFormatter() override; }; -/////////////////////////////////////////////////////////////////////////////////////////////////// - -/** - * @brief Simple symbol resolver that only matches exact addresses. - */ -class VXExactSymbolResolver : public VXBaseSymbolResolver -{ -private: - std::unordered_map m_symbolMap; -public: - /** - * @brief Destructor. - */ - ~VXExactSymbolResolver() override; -public: - /** - * @brief Resolves a symbol. - * @param info The instruction info. - * @param address The address. - * @param offset Reference to an unsigned 64 bit integer that receives an offset - * relative to the base address of the symbol. - * @return The name of the symbol, if the symbol was found, @c NULL if not. - */ - const char* resolveSymbol(const VXInstructionInfo &info, uint64_t address, - uint64_t &offset) override; -public: - /** - * @brief Query if the given address is a known symbol. - * @param address The address. - * @return True if the address is known, false if not. - */ - bool containsSymbol(uint64_t address) const; - /** - * @brief Adds or changes a symbol. - * @param address The address. - * @param name The symbol name. - */ - void setSymbol(uint64_t address, const char* name); - /** - * @brief Removes the symbol described by address. This will invalidate all char pointers - * to the specific symbol name. - * @param address The address. - */ - void removeSymbol(uint64_t address); - /** - * @brief Clears the symbol tree. - */ - void clear(); -}; - -/////////////////////////////////////////////////////////////////////////////////////////////////// +/* ============================================================================================== */ } + +#endif /* _ZYDIS_INSTRUCTIONFORMATTER_HPP_ */ diff --git a/Zydis/ZydisOpcodeTable.cpp b/Zydis/ZydisOpcodeTable.cpp new file mode 100644 index 0000000..bac0710 --- /dev/null +++ b/Zydis/ZydisOpcodeTable.cpp @@ -0,0 +1,9654 @@ +/*************************************************************************************************** + + Zyan Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : Joel Höner + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +***************************************************************************************************/ + +#include "ZydisOpcodeTable.hpp" + +namespace Zydis +{ + +namespace Internal +{ + +#define ZYDIS_INVALID 0 +#define NODE(type, n) (static_cast(type) << 12 | (n)) + +const OpcodeTreeNode optreeTable[][256] = +{ + { + /* 00 */ 0x0015, + /* 01 */ 0x0014, + /* 02 */ 0x0016, + /* 03 */ 0x0018, + /* 04 */ 0x0017, + /* 05 */ 0x0010, + /* 06 */ NODE(OpcodeTreeNodeType::MODE, 0x0000), + /* 07 */ NODE(OpcodeTreeNodeType::MODE, 0x0001), + /* 08 */ 0x0394, + /* 09 */ 0x0393, + /* 0A */ 0x0396, + /* 0B */ 0x0395, + /* 0C */ 0x0390, + /* 0D */ 0x038F, + /* 0E */ NODE(OpcodeTreeNodeType::MODE, 0x0002), + /* 0F */ NODE(OpcodeTreeNodeType::TABLE, 0x0001), + /* 10 */ 0x000B, + /* 11 */ 0x000A, + /* 12 */ 0x000C, + /* 13 */ 0x000E, + /* 14 */ 0x000D, + /* 15 */ 0x0006, + /* 16 */ NODE(OpcodeTreeNodeType::MODE, 0x0007), + /* 17 */ NODE(OpcodeTreeNodeType::MODE, 0x0008), + /* 18 */ 0x04FE, + /* 19 */ 0x04F7, + /* 1A */ 0x04F8, + /* 1B */ 0x04FB, + /* 1C */ 0x04FA, + /* 1D */ 0x04F9, + /* 1E */ NODE(OpcodeTreeNodeType::MODE, 0x0009), + /* 1F */ NODE(OpcodeTreeNodeType::MODE, 0x000A), + /* 20 */ 0x0026, + /* 21 */ 0x0027, + /* 22 */ 0x0025, + /* 23 */ 0x002C, + /* 24 */ 0x002D, + /* 25 */ 0x002E, + /* 26 */ ZYDIS_INVALID, + /* 27 */ NODE(OpcodeTreeNodeType::MODE, 0x000B), + /* 28 */ 0x0542, + /* 29 */ 0x0549, + /* 2A */ 0x0548, + /* 2B */ 0x054B, + /* 2C */ 0x054A, + /* 2D */ 0x0547, + /* 2E */ ZYDIS_INVALID, + /* 2F */ NODE(OpcodeTreeNodeType::MODE, 0x000C), + /* 30 */ 0x06B8, + /* 31 */ 0x06B9, + /* 32 */ 0x06B6, + /* 33 */ 0x06B7, + /* 34 */ 0x06BA, + /* 35 */ 0x06BB, + /* 36 */ ZYDIS_INVALID, + /* 37 */ NODE(OpcodeTreeNodeType::MODE, 0x000D), + /* 38 */ 0x006C, + /* 39 */ 0x006D, + /* 3A */ 0x006B, + /* 3B */ 0x006A, + /* 3C */ 0x0070, + /* 3D */ 0x006F, + /* 3E */ ZYDIS_INVALID, + /* 3F */ NODE(OpcodeTreeNodeType::MODE, 0x000E), + /* 40 */ 0x02AB, + /* 41 */ 0x02AC, + /* 42 */ 0x02B2, + /* 43 */ 0x02B1, + /* 44 */ 0x02B3, + /* 45 */ 0x02B4, + /* 46 */ 0x02AE, + /* 47 */ 0x02AD, + /* 48 */ 0x00A7, + /* 49 */ 0x00A6, + /* 4A */ 0x00A8, + /* 4B */ 0x00AA, + /* 4C */ 0x00A9, + /* 4D */ 0x00A2, + /* 4E */ 0x00A1, + /* 4F */ 0x00A3, + /* 50 */ 0x04B4, + /* 51 */ 0x04B9, + /* 52 */ 0x04B3, + /* 53 */ 0x04AE, + /* 54 */ 0x04AF, + /* 55 */ 0x04B0, + /* 56 */ 0x04B1, + /* 57 */ 0x04B2, + /* 58 */ 0x0449, + /* 59 */ 0x0447, + /* 5A */ 0x0448, + /* 5B */ 0x0442, + /* 5C */ 0x043E, + /* 5D */ 0x043D, + /* 5E */ 0x043F, + /* 5F */ 0x0441, + /* 60 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0007), + /* 61 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0008), + /* 62 */ NODE(OpcodeTreeNodeType::MODE, 0x0013), + /* 63 */ NODE(OpcodeTreeNodeType::MODE, 0x0014), + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ 0x04B7, + /* 69 */ 0x02A4, + /* 6A */ 0x04AB, + /* 6B */ 0x02A6, + /* 6C */ 0x02B5, + /* 6D */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0009), + /* 6E */ 0x039F, + /* 6F */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x000A), + /* 70 */ 0x02E8, + /* 71 */ 0x02E2, + /* 72 */ 0x02CA, + /* 73 */ 0x02DE, + /* 74 */ 0x02CE, + /* 75 */ 0x02E1, + /* 76 */ 0x02CB, + /* 77 */ 0x02C7, + /* 78 */ 0x02ED, + /* 79 */ 0x02E6, + /* 7A */ 0x02EB, + /* 7B */ 0x02E5, + /* 7C */ 0x02D5, + /* 7D */ 0x02D3, + /* 7E */ 0x02D8, + /* 7F */ 0x02D1, + /* 80 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0013), + /* 81 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0014), + /* 82 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0015), + /* 83 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0016), + /* 84 */ 0x055C, + /* 85 */ 0x055D, + /* 86 */ 0x06A8, + /* 87 */ 0x06A7, + /* 88 */ 0x0334, + /* 89 */ 0x0336, + /* 8A */ 0x0335, + /* 8B */ 0x0331, + /* 8C */ 0x031D, + /* 8D */ 0x02F4, + /* 8E */ 0x031C, + /* 8F */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0017), + /* 90 */ 0x06A9, + /* 91 */ 0x06AB, + /* 92 */ 0x06AA, + /* 93 */ 0x06A3, + /* 94 */ 0x06A2, + /* 95 */ 0x06A4, + /* 96 */ 0x06A6, + /* 97 */ 0x06A5, + /* 98 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x000B), + /* 99 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x000C), + /* 9A */ NODE(OpcodeTreeNodeType::MODE, 0x001D), + /* 9B */ 0x069D, + /* 9C */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x000D), + /* 9D */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x000E), + /* 9E */ 0x04EF, + /* 9F */ 0x02EF, + /* A0 */ 0x031B, + /* A1 */ 0x0320, + /* A2 */ 0x031F, + /* A3 */ 0x031E, + /* A4 */ 0x0367, + /* A5 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x000F), + /* A6 */ 0x0076, + /* A7 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0010), + /* A8 */ 0x055E, + /* A9 */ 0x055B, + /* AA */ 0x053D, + /* AB */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0011), + /* AC */ 0x0300, + /* AD */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0012), + /* AE */ 0x0501, + /* AF */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0013), + /* B0 */ 0x0317, + /* B1 */ 0x031A, + /* B2 */ 0x0318, + /* B3 */ 0x0319, + /* B4 */ 0x0321, + /* B5 */ 0x032C, + /* B6 */ 0x032B, + /* B7 */ 0x032A, + /* B8 */ 0x032D, + /* B9 */ 0x0330, + /* BA */ 0x032F, + /* BB */ 0x032E, + /* BC */ 0x0329, + /* BD */ 0x0324, + /* BE */ 0x0323, + /* BF */ 0x0322, + /* C0 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0018), + /* C1 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0019), + /* C2 */ 0x04D9, + /* C3 */ 0x04D8, + /* C4 */ NODE(OpcodeTreeNodeType::VEX, 0x0000), + /* C5 */ NODE(OpcodeTreeNodeType::VEX, 0x0001), + /* C6 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x001E), + /* C7 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x001F), + /* C8 */ 0x00B4, + /* C9 */ 0x02F5, + /* CA */ 0x04DA, + /* CB */ 0x04DB, + /* CC */ 0x02BB, + /* CD */ 0x02B9, + /* CE */ NODE(OpcodeTreeNodeType::MODE, 0x0027), + /* CF */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0017), + /* D0 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0020), + /* D1 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0021), + /* D2 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0022), + /* D3 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0023), + /* D4 */ NODE(OpcodeTreeNodeType::MODE, 0x0028), + /* D5 */ NODE(OpcodeTreeNodeType::MODE, 0x0029), + /* D6 */ NODE(OpcodeTreeNodeType::MODE, 0x002A), + /* D7 */ 0x06B2, + /* D8 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0015), + /* D9 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0016), + /* DA */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0017), + /* DB */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0018), + /* DC */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0019), + /* DD */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x001A), + /* DE */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x001B), + /* DF */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x001C), + /* E0 */ 0x0306, + /* E1 */ 0x0305, + /* E2 */ 0x0304, + /* E3 */ NODE(OpcodeTreeNodeType::ADDRESS_SIZE, 0x0000), + /* E4 */ 0x02A9, + /* E5 */ 0x02AA, + /* E6 */ 0x039D, + /* E7 */ 0x039E, + /* E8 */ 0x004E, + /* E9 */ 0x02DB, + /* EA */ NODE(OpcodeTreeNodeType::MODE, 0x002B), + /* EB */ 0x02DD, + /* EC */ 0x02A7, + /* ED */ 0x02A8, + /* EE */ 0x039B, + /* EF */ 0x039C, + /* F0 */ 0x02FF, + /* F1 */ 0x02BA, + /* F2 */ 0x04D7, + /* F3 */ 0x04D6, + /* F4 */ 0x029D, + /* F5 */ 0x0059, + /* F6 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x002C), + /* F7 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x002D), + /* F8 */ 0x0053, + /* F9 */ 0x0538, + /* FA */ 0x0057, + /* FB */ 0x053B, + /* FC */ 0x0054, + /* FD */ 0x0539, + /* FE */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x002E), + /* FF */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x002F), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0000), + /* 01 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0000), + /* 02 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0003), + /* 03 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0004), + /* 04 */ ZYDIS_INVALID, + /* 05 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0005), + /* 06 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0006), + /* 07 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0007), + /* 08 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0008), + /* 09 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0009), + /* 0A */ ZYDIS_INVALID, + /* 0B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x000A), + /* 0C */ ZYDIS_INVALID, + /* 0D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x000B), + /* 0E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x000C), + /* 0F */ NODE(OpcodeTreeNodeType::AMD3DNOW, 0x0000), + /* 10 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x000D), + /* 11 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x000E), + /* 12 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0001), + /* 13 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0011), + /* 14 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0012), + /* 15 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0013), + /* 16 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0002), + /* 17 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0016), + /* 18 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0017), + /* 19 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0018), + /* 1A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0019), + /* 1B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x001A), + /* 1C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x001B), + /* 1D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x001C), + /* 1E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x001D), + /* 1F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x001E), + /* 20 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x001F), + /* 21 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0020), + /* 22 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0021), + /* 23 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0022), + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0023), + /* 29 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0024), + /* 2A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0025), + /* 2B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0026), + /* 2C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0027), + /* 2D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0028), + /* 2E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0029), + /* 2F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x002A), + /* 30 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x002B), + /* 31 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x002C), + /* 32 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x002D), + /* 33 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x002E), + /* 34 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x002F), + /* 35 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0030), + /* 36 */ ZYDIS_INVALID, + /* 37 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0031), + /* 38 */ NODE(OpcodeTreeNodeType::TABLE, 0x0002), + /* 39 */ ZYDIS_INVALID, + /* 3A */ NODE(OpcodeTreeNodeType::TABLE, 0x0003), + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0081), + /* 41 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0082), + /* 42 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0083), + /* 43 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0084), + /* 44 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0085), + /* 45 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0086), + /* 46 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0087), + /* 47 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0088), + /* 48 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0089), + /* 49 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x008A), + /* 4A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x008B), + /* 4B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x008C), + /* 4C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x008D), + /* 4D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x008E), + /* 4E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x008F), + /* 4F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0090), + /* 50 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0091), + /* 51 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0092), + /* 52 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0093), + /* 53 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0094), + /* 54 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0095), + /* 55 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0096), + /* 56 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0097), + /* 57 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0098), + /* 58 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0099), + /* 59 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x009A), + /* 5A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x009B), + /* 5B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x009C), + /* 5C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x009D), + /* 5D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x009E), + /* 5E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x009F), + /* 5F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A0), + /* 60 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A1), + /* 61 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A2), + /* 62 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A3), + /* 63 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A4), + /* 64 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A5), + /* 65 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A6), + /* 66 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A7), + /* 67 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A8), + /* 68 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00A9), + /* 69 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00AA), + /* 6A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00AB), + /* 6B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00AC), + /* 6C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00AD), + /* 6D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00AE), + /* 6E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00AF), + /* 6F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B0), + /* 70 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B1), + /* 71 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B2), + /* 72 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B3), + /* 73 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B4), + /* 74 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B5), + /* 75 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B6), + /* 76 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B7), + /* 77 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B8), + /* 78 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00B9), + /* 79 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00BA), + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00BB), + /* 7D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00BC), + /* 7E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00BD), + /* 7F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00BE), + /* 80 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00BF), + /* 81 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C0), + /* 82 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C1), + /* 83 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C2), + /* 84 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C3), + /* 85 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C4), + /* 86 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C5), + /* 87 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C6), + /* 88 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C7), + /* 89 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C8), + /* 8A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00C9), + /* 8B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00CA), + /* 8C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00CB), + /* 8D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00CC), + /* 8E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00CD), + /* 8F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00CE), + /* 90 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00CF), + /* 91 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D0), + /* 92 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D1), + /* 93 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D2), + /* 94 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D3), + /* 95 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D4), + /* 96 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D5), + /* 97 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D6), + /* 98 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D7), + /* 99 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D8), + /* 9A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00D9), + /* 9B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00DA), + /* 9C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00DB), + /* 9D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00DC), + /* 9E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00DD), + /* 9F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00DE), + /* A0 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00DF), + /* A1 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E0), + /* A2 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E1), + /* A3 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E2), + /* A4 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E3), + /* A5 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E4), + /* A6 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0003), + /* A7 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0004), + /* A8 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E7), + /* A9 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E8), + /* AA */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E9), + /* AB */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00EA), + /* AC */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00EB), + /* AD */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00EC), + /* AE */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0005), + /* AF */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00EF), + /* B0 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F0), + /* B1 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F1), + /* B2 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F2), + /* B3 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F3), + /* B4 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F4), + /* B5 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F5), + /* B6 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F6), + /* B7 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F7), + /* B8 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F8), + /* B9 */ ZYDIS_INVALID, + /* BA */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00F9), + /* BB */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00FA), + /* BC */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00FB), + /* BD */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00FC), + /* BE */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00FD), + /* BF */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00FE), + /* C0 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00FF), + /* C1 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0100), + /* C2 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0101), + /* C3 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0102), + /* C4 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0103), + /* C5 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0104), + /* C6 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0105), + /* C7 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0006), + /* C8 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0108), + /* C9 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0109), + /* CA */ NODE(OpcodeTreeNodeType::MANDATORY, 0x010A), + /* CB */ NODE(OpcodeTreeNodeType::MANDATORY, 0x010B), + /* CC */ NODE(OpcodeTreeNodeType::MANDATORY, 0x010C), + /* CD */ NODE(OpcodeTreeNodeType::MANDATORY, 0x010D), + /* CE */ NODE(OpcodeTreeNodeType::MANDATORY, 0x010E), + /* CF */ NODE(OpcodeTreeNodeType::MANDATORY, 0x010F), + /* D0 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0110), + /* D1 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0111), + /* D2 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0112), + /* D3 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0113), + /* D4 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0114), + /* D5 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0115), + /* D6 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0116), + /* D7 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0117), + /* D8 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0118), + /* D9 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0119), + /* DA */ NODE(OpcodeTreeNodeType::MANDATORY, 0x011A), + /* DB */ NODE(OpcodeTreeNodeType::MANDATORY, 0x011B), + /* DC */ NODE(OpcodeTreeNodeType::MANDATORY, 0x011C), + /* DD */ NODE(OpcodeTreeNodeType::MANDATORY, 0x011D), + /* DE */ NODE(OpcodeTreeNodeType::MANDATORY, 0x011E), + /* DF */ NODE(OpcodeTreeNodeType::MANDATORY, 0x011F), + /* E0 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0120), + /* E1 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0121), + /* E2 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0122), + /* E3 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0123), + /* E4 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0124), + /* E5 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0125), + /* E6 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0126), + /* E7 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0127), + /* E8 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0128), + /* E9 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0129), + /* EA */ NODE(OpcodeTreeNodeType::MANDATORY, 0x012A), + /* EB */ NODE(OpcodeTreeNodeType::MANDATORY, 0x012B), + /* EC */ NODE(OpcodeTreeNodeType::MANDATORY, 0x012C), + /* ED */ NODE(OpcodeTreeNodeType::MANDATORY, 0x012D), + /* EE */ NODE(OpcodeTreeNodeType::MANDATORY, 0x012E), + /* EF */ NODE(OpcodeTreeNodeType::MANDATORY, 0x012F), + /* F0 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0130), + /* F1 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0131), + /* F2 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0132), + /* F3 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0133), + /* F4 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0134), + /* F5 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0135), + /* F6 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0136), + /* F7 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0007), + /* F8 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0138), + /* F9 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0139), + /* FA */ NODE(OpcodeTreeNodeType::MANDATORY, 0x013A), + /* FB */ NODE(OpcodeTreeNodeType::MANDATORY, 0x013B), + /* FC */ NODE(OpcodeTreeNodeType::MANDATORY, 0x013C), + /* FD */ NODE(OpcodeTreeNodeType::MANDATORY, 0x013D), + /* FE */ NODE(OpcodeTreeNodeType::MANDATORY, 0x013E), + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0032), + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0033), + /* 02 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0034), + /* 03 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0035), + /* 04 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0036), + /* 05 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0037), + /* 06 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0038), + /* 07 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0039), + /* 08 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x003A), + /* 09 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x003B), + /* 0A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x003C), + /* 0B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x003D), + /* 0C */ ZYDIS_INVALID, + /* 0D */ ZYDIS_INVALID, + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + /* 10 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x003E), + /* 11 */ ZYDIS_INVALID, + /* 12 */ ZYDIS_INVALID, + /* 13 */ ZYDIS_INVALID, + /* 14 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x003F), + /* 15 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0040), + /* 16 */ ZYDIS_INVALID, + /* 17 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0041), + /* 18 */ ZYDIS_INVALID, + /* 19 */ ZYDIS_INVALID, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0042), + /* 1D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0043), + /* 1E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0044), + /* 1F */ ZYDIS_INVALID, + /* 20 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0045), + /* 21 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0046), + /* 22 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0047), + /* 23 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0048), + /* 24 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0049), + /* 25 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x004A), + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x004B), + /* 29 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x004C), + /* 2A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x004D), + /* 2B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x004E), + /* 2C */ ZYDIS_INVALID, + /* 2D */ ZYDIS_INVALID, + /* 2E */ ZYDIS_INVALID, + /* 2F */ ZYDIS_INVALID, + /* 30 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x004F), + /* 31 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0050), + /* 32 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0051), + /* 33 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0052), + /* 34 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0053), + /* 35 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0054), + /* 36 */ ZYDIS_INVALID, + /* 37 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0055), + /* 38 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0056), + /* 39 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0057), + /* 3A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0058), + /* 3B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0059), + /* 3C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x005A), + /* 3D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x005B), + /* 3E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x005C), + /* 3F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x005D), + /* 40 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x005E), + /* 41 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x005F), + /* 42 */ ZYDIS_INVALID, + /* 43 */ ZYDIS_INVALID, + /* 44 */ ZYDIS_INVALID, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ ZYDIS_INVALID, + /* 51 */ ZYDIS_INVALID, + /* 52 */ ZYDIS_INVALID, + /* 53 */ ZYDIS_INVALID, + /* 54 */ ZYDIS_INVALID, + /* 55 */ ZYDIS_INVALID, + /* 56 */ ZYDIS_INVALID, + /* 57 */ ZYDIS_INVALID, + /* 58 */ ZYDIS_INVALID, + /* 59 */ ZYDIS_INVALID, + /* 5A */ ZYDIS_INVALID, + /* 5B */ ZYDIS_INVALID, + /* 5C */ ZYDIS_INVALID, + /* 5D */ ZYDIS_INVALID, + /* 5E */ ZYDIS_INVALID, + /* 5F */ ZYDIS_INVALID, + /* 60 */ ZYDIS_INVALID, + /* 61 */ ZYDIS_INVALID, + /* 62 */ ZYDIS_INVALID, + /* 63 */ ZYDIS_INVALID, + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ ZYDIS_INVALID, + /* 70 */ ZYDIS_INVALID, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ ZYDIS_INVALID, + /* 7D */ ZYDIS_INVALID, + /* 7E */ ZYDIS_INVALID, + /* 7F */ ZYDIS_INVALID, + /* 80 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0060), + /* 81 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0061), + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ ZYDIS_INVALID, + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ ZYDIS_INVALID, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ ZYDIS_INVALID, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ ZYDIS_INVALID, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0062), + /* DC */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0063), + /* DD */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0064), + /* DE */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0065), + /* DF */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0066), + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ ZYDIS_INVALID, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0067), + /* F1 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0068), + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + /* 08 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0069), + /* 09 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x006A), + /* 0A */ NODE(OpcodeTreeNodeType::MANDATORY, 0x006B), + /* 0B */ NODE(OpcodeTreeNodeType::MANDATORY, 0x006C), + /* 0C */ NODE(OpcodeTreeNodeType::MANDATORY, 0x006D), + /* 0D */ NODE(OpcodeTreeNodeType::MANDATORY, 0x006E), + /* 0E */ NODE(OpcodeTreeNodeType::MANDATORY, 0x006F), + /* 0F */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0070), + /* 10 */ ZYDIS_INVALID, + /* 11 */ ZYDIS_INVALID, + /* 12 */ ZYDIS_INVALID, + /* 13 */ ZYDIS_INVALID, + /* 14 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0071), + /* 15 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0072), + /* 16 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0073), + /* 17 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0074), + /* 18 */ ZYDIS_INVALID, + /* 19 */ ZYDIS_INVALID, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ ZYDIS_INVALID, + /* 1D */ ZYDIS_INVALID, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0075), + /* 21 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0076), + /* 22 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0077), + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ ZYDIS_INVALID, + /* 29 */ ZYDIS_INVALID, + /* 2A */ ZYDIS_INVALID, + /* 2B */ ZYDIS_INVALID, + /* 2C */ ZYDIS_INVALID, + /* 2D */ ZYDIS_INVALID, + /* 2E */ ZYDIS_INVALID, + /* 2F */ ZYDIS_INVALID, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0078), + /* 41 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0079), + /* 42 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x007A), + /* 43 */ ZYDIS_INVALID, + /* 44 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x007B), + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ ZYDIS_INVALID, + /* 51 */ ZYDIS_INVALID, + /* 52 */ ZYDIS_INVALID, + /* 53 */ ZYDIS_INVALID, + /* 54 */ ZYDIS_INVALID, + /* 55 */ ZYDIS_INVALID, + /* 56 */ ZYDIS_INVALID, + /* 57 */ ZYDIS_INVALID, + /* 58 */ ZYDIS_INVALID, + /* 59 */ ZYDIS_INVALID, + /* 5A */ ZYDIS_INVALID, + /* 5B */ ZYDIS_INVALID, + /* 5C */ ZYDIS_INVALID, + /* 5D */ ZYDIS_INVALID, + /* 5E */ ZYDIS_INVALID, + /* 5F */ ZYDIS_INVALID, + /* 60 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x007C), + /* 61 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x007D), + /* 62 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x007E), + /* 63 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x007F), + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ ZYDIS_INVALID, + /* 70 */ ZYDIS_INVALID, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ ZYDIS_INVALID, + /* 7D */ ZYDIS_INVALID, + /* 7E */ ZYDIS_INVALID, + /* 7F */ ZYDIS_INVALID, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ ZYDIS_INVALID, + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ ZYDIS_INVALID, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ ZYDIS_INVALID, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ ZYDIS_INVALID, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ ZYDIS_INVALID, + /* DC */ ZYDIS_INVALID, + /* DD */ ZYDIS_INVALID, + /* DE */ ZYDIS_INVALID, + /* DF */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0080), + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ ZYDIS_INVALID, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ ZYDIS_INVALID, + /* F1 */ ZYDIS_INVALID, + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + /* 08 */ ZYDIS_INVALID, + /* 09 */ ZYDIS_INVALID, + /* 0A */ ZYDIS_INVALID, + /* 0B */ ZYDIS_INVALID, + /* 0C */ ZYDIS_INVALID, + /* 0D */ ZYDIS_INVALID, + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + /* 10 */ 0x05E6, + /* 11 */ 0x05E5, + /* 12 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0008), + /* 13 */ 0x05CC, + /* 14 */ 0x0698, + /* 15 */ 0x0696, + /* 16 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0009), + /* 17 */ 0x05C7, + /* 18 */ ZYDIS_INVALID, + /* 19 */ ZYDIS_INVALID, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ ZYDIS_INVALID, + /* 1D */ ZYDIS_INVALID, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ ZYDIS_INVALID, + /* 21 */ ZYDIS_INVALID, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ 0x05B8, + /* 29 */ 0x05B7, + /* 2A */ ZYDIS_INVALID, + /* 2B */ 0x05D2, + /* 2C */ ZYDIS_INVALID, + /* 2D */ ZYDIS_INVALID, + /* 2E */ 0x0694, + /* 2F */ 0x0581, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ ZYDIS_INVALID, + /* 41 */ ZYDIS_INVALID, + /* 42 */ ZYDIS_INVALID, + /* 43 */ ZYDIS_INVALID, + /* 44 */ ZYDIS_INVALID, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ 0x05CE, + /* 51 */ 0x0689, + /* 52 */ 0x0684, + /* 53 */ 0x067E, + /* 54 */ 0x0575, + /* 55 */ 0x0573, + /* 56 */ 0x05F6, + /* 57 */ 0x069A, + /* 58 */ 0x0567, + /* 59 */ 0x05EF, + /* 5A */ 0x0587, + /* 5B */ 0x0583, + /* 5C */ 0x068E, + /* 5D */ 0x05AF, + /* 5E */ 0x0593, + /* 5F */ 0x05A9, + /* 60 */ ZYDIS_INVALID, + /* 61 */ ZYDIS_INVALID, + /* 62 */ ZYDIS_INVALID, + /* 63 */ ZYDIS_INVALID, + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ ZYDIS_INVALID, + /* 70 */ ZYDIS_INVALID, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ NODE(OpcodeTreeNodeType::VEXL, 0x0000), + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ ZYDIS_INVALID, + /* 7D */ ZYDIS_INVALID, + /* 7E */ ZYDIS_INVALID, + /* 7F */ ZYDIS_INVALID, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x000A), + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ 0x057D, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ 0x0687, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ ZYDIS_INVALID, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ ZYDIS_INVALID, + /* DC */ ZYDIS_INVALID, + /* DD */ ZYDIS_INVALID, + /* DE */ ZYDIS_INVALID, + /* DF */ ZYDIS_INVALID, + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ ZYDIS_INVALID, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ ZYDIS_INVALID, + /* F1 */ ZYDIS_INVALID, + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + /* 08 */ ZYDIS_INVALID, + /* 09 */ ZYDIS_INVALID, + /* 0A */ ZYDIS_INVALID, + /* 0B */ ZYDIS_INVALID, + /* 0C */ ZYDIS_INVALID, + /* 0D */ ZYDIS_INVALID, + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + /* 10 */ 0x05E4, + /* 11 */ 0x05E3, + /* 12 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x000B), + /* 13 */ 0x05CA, + /* 14 */ 0x0697, + /* 15 */ 0x0695, + /* 16 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x000C), + /* 17 */ 0x05C5, + /* 18 */ ZYDIS_INVALID, + /* 19 */ ZYDIS_INVALID, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ ZYDIS_INVALID, + /* 1D */ ZYDIS_INVALID, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ ZYDIS_INVALID, + /* 21 */ ZYDIS_INVALID, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ 0x05B5, + /* 29 */ 0x05B6, + /* 2A */ ZYDIS_INVALID, + /* 2B */ 0x05D1, + /* 2C */ ZYDIS_INVALID, + /* 2D */ ZYDIS_INVALID, + /* 2E */ 0x0693, + /* 2F */ 0x0580, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ ZYDIS_INVALID, + /* 41 */ ZYDIS_INVALID, + /* 42 */ ZYDIS_INVALID, + /* 43 */ ZYDIS_INVALID, + /* 44 */ ZYDIS_INVALID, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ 0x05CD, + /* 51 */ 0x0688, + /* 52 */ ZYDIS_INVALID, + /* 53 */ ZYDIS_INVALID, + /* 54 */ 0x0574, + /* 55 */ 0x0572, + /* 56 */ 0x05F5, + /* 57 */ 0x0699, + /* 58 */ 0x0566, + /* 59 */ 0x05EE, + /* 5A */ 0x0585, + /* 5B */ 0x0586, + /* 5C */ 0x068D, + /* 5D */ 0x05AE, + /* 5E */ 0x0592, + /* 5F */ 0x05A8, + /* 60 */ 0x0679, + /* 61 */ 0x067C, + /* 62 */ 0x067A, + /* 63 */ 0x05FB, + /* 64 */ 0x0614, + /* 65 */ 0x0617, + /* 66 */ 0x0615, + /* 67 */ 0x05FD, + /* 68 */ 0x0675, + /* 69 */ 0x0678, + /* 6A */ 0x0676, + /* 6B */ 0x05FA, + /* 6C */ 0x067B, + /* 6D */ 0x0677, + /* 6E */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0014), + /* 6F */ 0x05BF, + /* 70 */ 0x0654, + /* 71 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x001B), + /* 72 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x001C), + /* 73 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x001D), + /* 74 */ 0x060E, + /* 75 */ 0x0611, + /* 76 */ 0x060F, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ 0x059C, + /* 7D */ 0x059E, + /* 7E */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0015), + /* 7F */ 0x05C0, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ ZYDIS_INVALID, + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ 0x057C, + /* C3 */ ZYDIS_INVALID, + /* C4 */ 0x0630, + /* C5 */ 0x0623, + /* C6 */ 0x0686, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ 0x056A, + /* D1 */ 0x066B, + /* D2 */ 0x0665, + /* D3 */ 0x0669, + /* D4 */ 0x0600, + /* D5 */ 0x0650, + /* D6 */ 0x05D4, + /* D7 */ NODE(OpcodeTreeNodeType::VEXL, 0x0004), + /* D8 */ 0x0671, + /* D9 */ 0x0672, + /* DA */ 0x063C, + /* DB */ 0x0607, + /* DC */ 0x0603, + /* DD */ 0x0604, + /* DE */ 0x0636, + /* DF */ 0x0608, + /* E0 */ 0x0609, + /* E1 */ 0x0663, + /* E2 */ 0x0662, + /* E3 */ 0x060A, + /* E4 */ 0x064D, + /* E5 */ 0x064E, + /* E6 */ 0x058E, + /* E7 */ 0x05CF, + /* E8 */ 0x066F, + /* E9 */ 0x0670, + /* EA */ 0x063B, + /* EB */ 0x0651, + /* EC */ 0x0601, + /* ED */ 0x0602, + /* EE */ 0x0635, + /* EF */ 0x067D, + /* F0 */ ZYDIS_INVALID, + /* F1 */ NODE(OpcodeTreeNodeType::VEXL, 0x0005), + /* F2 */ NODE(OpcodeTreeNodeType::VEXL, 0x0006), + /* F3 */ NODE(OpcodeTreeNodeType::VEXL, 0x0007), + /* F4 */ ZYDIS_INVALID, + /* F5 */ 0x0632, + /* F6 */ 0x0652, + /* F7 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x000D), + /* F8 */ 0x066C, + /* F9 */ 0x0673, + /* FA */ 0x066D, + /* FB */ 0x066E, + /* FC */ 0x05FE, + /* FD */ 0x0605, + /* FE */ 0x05FF, + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0653, + /* 01 */ 0x0627, + /* 02 */ 0x0625, + /* 03 */ 0x0626, + /* 04 */ 0x0631, + /* 05 */ 0x062B, + /* 06 */ 0x0629, + /* 07 */ 0x062A, + /* 08 */ 0x0657, + /* 09 */ 0x0659, + /* 0A */ 0x0658, + /* 0B */ 0x064C, + /* 0C */ NODE(OpcodeTreeNodeType::VEXW, 0x0000), + /* 0D */ NODE(OpcodeTreeNodeType::VEXW, 0x0001), + /* 0E */ NODE(OpcodeTreeNodeType::VEXW, 0x0002), + /* 0F */ NODE(OpcodeTreeNodeType::VEXW, 0x0003), + /* 10 */ ZYDIS_INVALID, + /* 11 */ ZYDIS_INVALID, + /* 12 */ ZYDIS_INVALID, + /* 13 */ ZYDIS_INVALID, + /* 14 */ ZYDIS_INVALID, + /* 15 */ ZYDIS_INVALID, + /* 16 */ ZYDIS_INVALID, + /* 17 */ 0x0674, + /* 18 */ NODE(OpcodeTreeNodeType::VEXW, 0x0004), + /* 19 */ NODE(OpcodeTreeNodeType::VEXW, 0x0005), + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ 0x05F7, + /* 1D */ 0x05F9, + /* 1E */ 0x05F8, + /* 1F */ ZYDIS_INVALID, + /* 20 */ 0x0642, + /* 21 */ 0x0640, + /* 22 */ 0x0641, + /* 23 */ 0x0643, + /* 24 */ 0x0644, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ 0x064B, + /* 29 */ 0x0610, + /* 2A */ 0x05D0, + /* 2B */ 0x05FC, + /* 2C */ NODE(OpcodeTreeNodeType::VEXW, 0x0006), + /* 2D */ NODE(OpcodeTreeNodeType::VEXW, 0x0007), + /* 2E */ NODE(OpcodeTreeNodeType::VEXW, 0x0008), + /* 2F */ NODE(OpcodeTreeNodeType::VEXW, 0x0009), + /* 30 */ 0x0647, + /* 31 */ 0x0645, + /* 32 */ 0x0646, + /* 33 */ 0x0649, + /* 34 */ 0x064A, + /* 35 */ 0x0648, + /* 36 */ ZYDIS_INVALID, + /* 37 */ 0x0616, + /* 38 */ 0x0639, + /* 39 */ 0x063A, + /* 3A */ 0x063E, + /* 3B */ 0x063D, + /* 3C */ 0x0633, + /* 3D */ 0x0634, + /* 3E */ 0x0638, + /* 3F */ 0x0637, + /* 40 */ 0x064F, + /* 41 */ 0x0628, + /* 42 */ ZYDIS_INVALID, + /* 43 */ ZYDIS_INVALID, + /* 44 */ ZYDIS_INVALID, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ ZYDIS_INVALID, + /* 51 */ ZYDIS_INVALID, + /* 52 */ ZYDIS_INVALID, + /* 53 */ ZYDIS_INVALID, + /* 54 */ ZYDIS_INVALID, + /* 55 */ ZYDIS_INVALID, + /* 56 */ ZYDIS_INVALID, + /* 57 */ ZYDIS_INVALID, + /* 58 */ ZYDIS_INVALID, + /* 59 */ ZYDIS_INVALID, + /* 5A */ ZYDIS_INVALID, + /* 5B */ ZYDIS_INVALID, + /* 5C */ ZYDIS_INVALID, + /* 5D */ ZYDIS_INVALID, + /* 5E */ ZYDIS_INVALID, + /* 5F */ ZYDIS_INVALID, + /* 60 */ ZYDIS_INVALID, + /* 61 */ ZYDIS_INVALID, + /* 62 */ ZYDIS_INVALID, + /* 63 */ ZYDIS_INVALID, + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ ZYDIS_INVALID, + /* 70 */ ZYDIS_INVALID, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ ZYDIS_INVALID, + /* 7D */ ZYDIS_INVALID, + /* 7E */ ZYDIS_INVALID, + /* 7F */ ZYDIS_INVALID, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ ZYDIS_INVALID, + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ ZYDIS_INVALID, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ ZYDIS_INVALID, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ ZYDIS_INVALID, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ 0x0570, + /* DC */ 0x056E, + /* DD */ 0x056F, + /* DE */ 0x056C, + /* DF */ 0x056D, + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ ZYDIS_INVALID, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ ZYDIS_INVALID, + /* F1 */ ZYDIS_INVALID, + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ NODE(OpcodeTreeNodeType::VEXW, 0x000A), + /* 05 */ NODE(OpcodeTreeNodeType::VEXW, 0x000B), + /* 06 */ NODE(OpcodeTreeNodeType::VEXW, 0x000C), + /* 07 */ ZYDIS_INVALID, + /* 08 */ 0x0681, + /* 09 */ 0x0680, + /* 0A */ 0x0683, + /* 0B */ 0x0682, + /* 0C */ 0x0577, + /* 0D */ 0x0576, + /* 0E */ 0x060C, + /* 0F */ 0x0606, + /* 10 */ ZYDIS_INVALID, + /* 11 */ ZYDIS_INVALID, + /* 12 */ ZYDIS_INVALID, + /* 13 */ ZYDIS_INVALID, + /* 14 */ NODE(OpcodeTreeNodeType::VEXW, 0x000D), + /* 15 */ 0x0624, + /* 16 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0016), + /* 17 */ 0x059B, + /* 18 */ NODE(OpcodeTreeNodeType::VEXW, 0x0011), + /* 19 */ NODE(OpcodeTreeNodeType::VEXW, 0x0012), + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ ZYDIS_INVALID, + /* 1D */ ZYDIS_INVALID, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ NODE(OpcodeTreeNodeType::VEXW, 0x0013), + /* 21 */ 0x05A1, + /* 22 */ NODE(OpcodeTreeNodeType::MODE, 0x0025), + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ ZYDIS_INVALID, + /* 29 */ ZYDIS_INVALID, + /* 2A */ ZYDIS_INVALID, + /* 2B */ ZYDIS_INVALID, + /* 2C */ ZYDIS_INVALID, + /* 2D */ ZYDIS_INVALID, + /* 2E */ ZYDIS_INVALID, + /* 2F */ ZYDIS_INVALID, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ 0x0597, + /* 41 */ 0x0596, + /* 42 */ 0x05E7, + /* 43 */ ZYDIS_INVALID, + /* 44 */ 0x060D, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ NODE(OpcodeTreeNodeType::VEXW, 0x0016), + /* 4B */ NODE(OpcodeTreeNodeType::VEXW, 0x0017), + /* 4C */ NODE(OpcodeTreeNodeType::VEXW, 0x0018), + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ ZYDIS_INVALID, + /* 51 */ ZYDIS_INVALID, + /* 52 */ ZYDIS_INVALID, + /* 53 */ ZYDIS_INVALID, + /* 54 */ ZYDIS_INVALID, + /* 55 */ ZYDIS_INVALID, + /* 56 */ ZYDIS_INVALID, + /* 57 */ ZYDIS_INVALID, + /* 58 */ ZYDIS_INVALID, + /* 59 */ ZYDIS_INVALID, + /* 5A */ ZYDIS_INVALID, + /* 5B */ ZYDIS_INVALID, + /* 5C */ ZYDIS_INVALID, + /* 5D */ ZYDIS_INVALID, + /* 5E */ ZYDIS_INVALID, + /* 5F */ ZYDIS_INVALID, + /* 60 */ 0x0613, + /* 61 */ 0x0612, + /* 62 */ 0x0619, + /* 63 */ 0x0618, + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ ZYDIS_INVALID, + /* 70 */ ZYDIS_INVALID, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ ZYDIS_INVALID, + /* 7D */ ZYDIS_INVALID, + /* 7E */ ZYDIS_INVALID, + /* 7F */ ZYDIS_INVALID, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ ZYDIS_INVALID, + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ ZYDIS_INVALID, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ ZYDIS_INVALID, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ ZYDIS_INVALID, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ ZYDIS_INVALID, + /* DC */ ZYDIS_INVALID, + /* DD */ ZYDIS_INVALID, + /* DE */ ZYDIS_INVALID, + /* DF */ 0x0571, + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ ZYDIS_INVALID, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ ZYDIS_INVALID, + /* F1 */ ZYDIS_INVALID, + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + /* 08 */ ZYDIS_INVALID, + /* 09 */ ZYDIS_INVALID, + /* 0A */ ZYDIS_INVALID, + /* 0B */ ZYDIS_INVALID, + /* 0C */ ZYDIS_INVALID, + /* 0D */ ZYDIS_INVALID, + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + /* 10 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x000E), + /* 11 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x000F), + /* 12 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0010), + /* 13 */ ZYDIS_INVALID, + /* 14 */ ZYDIS_INVALID, + /* 15 */ ZYDIS_INVALID, + /* 16 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0011), + /* 17 */ ZYDIS_INVALID, + /* 18 */ ZYDIS_INVALID, + /* 19 */ ZYDIS_INVALID, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ ZYDIS_INVALID, + /* 1D */ ZYDIS_INVALID, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ ZYDIS_INVALID, + /* 21 */ ZYDIS_INVALID, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ ZYDIS_INVALID, + /* 29 */ ZYDIS_INVALID, + /* 2A */ 0x058B, + /* 2B */ ZYDIS_INVALID, + /* 2C */ 0x0591, + /* 2D */ 0x058D, + /* 2E */ ZYDIS_INVALID, + /* 2F */ ZYDIS_INVALID, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ ZYDIS_INVALID, + /* 41 */ ZYDIS_INVALID, + /* 42 */ ZYDIS_INVALID, + /* 43 */ ZYDIS_INVALID, + /* 44 */ ZYDIS_INVALID, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ ZYDIS_INVALID, + /* 51 */ 0x068B, + /* 52 */ 0x0685, + /* 53 */ 0x067F, + /* 54 */ ZYDIS_INVALID, + /* 55 */ ZYDIS_INVALID, + /* 56 */ ZYDIS_INVALID, + /* 57 */ ZYDIS_INVALID, + /* 58 */ 0x0569, + /* 59 */ 0x05F1, + /* 5A */ 0x058C, + /* 5B */ 0x058F, + /* 5C */ 0x0690, + /* 5D */ 0x05B1, + /* 5E */ 0x0595, + /* 5F */ 0x05AB, + /* 60 */ ZYDIS_INVALID, + /* 61 */ ZYDIS_INVALID, + /* 62 */ ZYDIS_INVALID, + /* 63 */ ZYDIS_INVALID, + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ 0x05C2, + /* 70 */ 0x0655, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ ZYDIS_INVALID, + /* 7D */ ZYDIS_INVALID, + /* 7E */ 0x05D3, + /* 7F */ 0x05C1, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ ZYDIS_INVALID, + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ 0x057F, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ ZYDIS_INVALID, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ ZYDIS_INVALID, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ ZYDIS_INVALID, + /* DC */ ZYDIS_INVALID, + /* DD */ ZYDIS_INVALID, + /* DE */ ZYDIS_INVALID, + /* DF */ ZYDIS_INVALID, + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ 0x0582, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ ZYDIS_INVALID, + /* F1 */ ZYDIS_INVALID, + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + /* 08 */ ZYDIS_INVALID, + /* 09 */ ZYDIS_INVALID, + /* 0A */ ZYDIS_INVALID, + /* 0B */ ZYDIS_INVALID, + /* 0C */ ZYDIS_INVALID, + /* 0D */ ZYDIS_INVALID, + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + /* 10 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0012), + /* 11 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0013), + /* 12 */ NODE(OpcodeTreeNodeType::MODRM_MOD, 0x0014), + /* 13 */ ZYDIS_INVALID, + /* 14 */ ZYDIS_INVALID, + /* 15 */ ZYDIS_INVALID, + /* 16 */ ZYDIS_INVALID, + /* 17 */ ZYDIS_INVALID, + /* 18 */ ZYDIS_INVALID, + /* 19 */ ZYDIS_INVALID, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ ZYDIS_INVALID, + /* 1D */ ZYDIS_INVALID, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ ZYDIS_INVALID, + /* 21 */ ZYDIS_INVALID, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ ZYDIS_INVALID, + /* 29 */ ZYDIS_INVALID, + /* 2A */ 0x058A, + /* 2B */ ZYDIS_INVALID, + /* 2C */ 0x0590, + /* 2D */ 0x0588, + /* 2E */ ZYDIS_INVALID, + /* 2F */ ZYDIS_INVALID, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ ZYDIS_INVALID, + /* 41 */ ZYDIS_INVALID, + /* 42 */ ZYDIS_INVALID, + /* 43 */ ZYDIS_INVALID, + /* 44 */ ZYDIS_INVALID, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ ZYDIS_INVALID, + /* 51 */ 0x068A, + /* 52 */ ZYDIS_INVALID, + /* 53 */ ZYDIS_INVALID, + /* 54 */ ZYDIS_INVALID, + /* 55 */ ZYDIS_INVALID, + /* 56 */ ZYDIS_INVALID, + /* 57 */ ZYDIS_INVALID, + /* 58 */ 0x0568, + /* 59 */ 0x05F0, + /* 5A */ 0x0589, + /* 5B */ ZYDIS_INVALID, + /* 5C */ 0x068F, + /* 5D */ 0x05B0, + /* 5E */ 0x0594, + /* 5F */ 0x05AA, + /* 60 */ ZYDIS_INVALID, + /* 61 */ ZYDIS_INVALID, + /* 62 */ ZYDIS_INVALID, + /* 63 */ ZYDIS_INVALID, + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ ZYDIS_INVALID, + /* 70 */ 0x0656, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ 0x059D, + /* 7D */ 0x059F, + /* 7E */ ZYDIS_INVALID, + /* 7F */ ZYDIS_INVALID, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ ZYDIS_INVALID, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ ZYDIS_INVALID, + /* 8F */ ZYDIS_INVALID, + /* 90 */ ZYDIS_INVALID, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ ZYDIS_INVALID, + /* 95 */ ZYDIS_INVALID, + /* 96 */ ZYDIS_INVALID, + /* 97 */ ZYDIS_INVALID, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ ZYDIS_INVALID, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ ZYDIS_INVALID, + /* 9F */ ZYDIS_INVALID, + /* A0 */ ZYDIS_INVALID, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ ZYDIS_INVALID, + /* A5 */ ZYDIS_INVALID, + /* A6 */ ZYDIS_INVALID, + /* A7 */ ZYDIS_INVALID, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ ZYDIS_INVALID, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ ZYDIS_INVALID, + /* AF */ ZYDIS_INVALID, + /* B0 */ ZYDIS_INVALID, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ ZYDIS_INVALID, + /* B5 */ ZYDIS_INVALID, + /* B6 */ ZYDIS_INVALID, + /* B7 */ ZYDIS_INVALID, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ ZYDIS_INVALID, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ ZYDIS_INVALID, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ 0x057E, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ ZYDIS_INVALID, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ 0x056B, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ ZYDIS_INVALID, + /* DC */ ZYDIS_INVALID, + /* DD */ ZYDIS_INVALID, + /* DE */ ZYDIS_INVALID, + /* DF */ ZYDIS_INVALID, + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ 0x0584, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ 0x05A2, + /* F1 */ ZYDIS_INVALID, + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, +}; + +const OpcodeTreeNode optreeModrmMod[][2] = +{ + { + /* 00 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0001), + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0002), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x000F), + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0010), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0014), + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0015), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E5), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00E6), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00ED), + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x00EE), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0106), + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0107), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ NODE(OpcodeTreeNodeType::MANDATORY, 0x0137), + }, + { + /* 00 */ 0x05CB, + /* 01 */ 0x05C3, + }, + { + /* 00 */ 0x05C6, + /* 01 */ 0x05C8, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x001A), + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05C9, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05C4, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05A3, + }, + { + /* 00 */ 0x05E2, + /* 01 */ 0x05DF, + }, + { + /* 00 */ 0x05E0, + /* 01 */ 0x05E1, + }, + { + /* 00 */ 0x05DE, + /* 01 */ 0x05DD, + }, + { + /* 00 */ 0x05DB, + /* 01 */ 0x05DC, + }, + { + /* 00 */ 0x05DA, + /* 01 */ 0x05D9, + }, + { + /* 00 */ 0x05D8, + /* 01 */ 0x05D7, + }, + { + /* 00 */ 0x05BE, + /* 01 */ 0x05BD, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0024), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0000), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0025), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0001), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0026), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0002), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0027), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0003), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0028), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0004), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0029), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0005), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x002A), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0006), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x002B), + /* 01 */ NODE(OpcodeTreeNodeType::X87, 0x0007), + }, +}; + +const OpcodeTreeNode optreeModrmReg[][8] = +{ + { + /* 00 */ 0x0531, + /* 01 */ 0x0541, + /* 02 */ 0x02FC, + /* 03 */ 0x0309, + /* 04 */ 0x0598, + /* 05 */ 0x0599, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0516, + /* 01 */ 0x052F, + /* 02 */ 0x02F9, + /* 03 */ 0x02FB, + /* 04 */ 0x0533, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x02FE, + /* 07 */ 0x02C0, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0000), + /* 01 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0001), + /* 02 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0002), + /* 03 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0003), + /* 04 */ 0x0532, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x02FD, + /* 07 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0004), + }, + { + /* 00 */ 0x0455, + /* 01 */ 0x0456, + /* 02 */ 0x0457, + /* 03 */ 0x0458, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x0486, + /* 03 */ ZYDIS_INVALID, + /* 04 */ 0x0479, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x0470, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x0485, + /* 03 */ ZYDIS_INVALID, + /* 04 */ 0x0478, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x0473, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x047E, + /* 03 */ ZYDIS_INVALID, + /* 04 */ 0x0475, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x0468, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x047C, + /* 03 */ ZYDIS_INVALID, + /* 04 */ 0x0476, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x046A, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x0482, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x046D, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x0481, + /* 03 */ 0x0480, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x046C, + /* 07 */ 0x046B, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0005), + /* 01 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0006), + /* 02 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0007), + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0008), + /* 01 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x0009), + /* 02 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x000A), + /* 03 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x000B), + /* 04 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x000C), + /* 05 */ NODE(OpcodeTreeNodeType::MODRM_RM, 0x000D), + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0296, + /* 01 */ 0x0295, + /* 02 */ 0x02F2, + /* 03 */ 0x053C, + /* 04 */ 0x06C0, + /* 05 */ 0x06BF, + /* 06 */ ZYDIS_INVALID, + /* 07 */ 0x0055, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ 0x02F7, + /* 06 */ 0x0310, + /* 07 */ 0x0515, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ 0x0043, + /* 05 */ 0x0049, + /* 06 */ 0x0047, + /* 07 */ 0x0045, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0006), + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0015), + /* 07 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0016), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0017), + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0018), + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x04D3, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x000F, + /* 01 */ 0x0392, + /* 02 */ 0x0005, + /* 03 */ 0x04FF, + /* 04 */ 0x0028, + /* 05 */ 0x0544, + /* 06 */ 0x06BC, + /* 07 */ 0x006E, + }, + { + /* 00 */ 0x0013, + /* 01 */ 0x0391, + /* 02 */ 0x0009, + /* 03 */ 0x0500, + /* 04 */ 0x0029, + /* 05 */ 0x0543, + /* 06 */ 0x06B5, + /* 07 */ 0x0072, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x0015), + /* 01 */ NODE(OpcodeTreeNodeType::MODE, 0x0016), + /* 02 */ NODE(OpcodeTreeNodeType::MODE, 0x0017), + /* 03 */ NODE(OpcodeTreeNodeType::MODE, 0x0018), + /* 04 */ NODE(OpcodeTreeNodeType::MODE, 0x0019), + /* 05 */ NODE(OpcodeTreeNodeType::MODE, 0x001A), + /* 06 */ NODE(OpcodeTreeNodeType::MODE, 0x001B), + /* 07 */ NODE(OpcodeTreeNodeType::MODE, 0x001C), + }, + { + /* 00 */ 0x0012, + /* 01 */ 0x0397, + /* 02 */ 0x0008, + /* 03 */ 0x04FD, + /* 04 */ 0x002B, + /* 05 */ 0x0545, + /* 06 */ 0x06B4, + /* 07 */ 0x0071, + }, + { + /* 00 */ 0x0440, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04DE, + /* 01 */ 0x04E6, + /* 02 */ 0x04C6, + /* 03 */ 0x04D0, + /* 04 */ 0x0517, + /* 05 */ 0x0526, + /* 06 */ 0x051D, + /* 07 */ 0x04F3, + }, + { + /* 00 */ 0x04DF, + /* 01 */ 0x04E7, + /* 02 */ 0x04C7, + /* 03 */ 0x04CE, + /* 04 */ 0x051C, + /* 05 */ 0x0528, + /* 06 */ 0x051E, + /* 07 */ 0x04F6, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x068C, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x066A, + /* 03 */ ZYDIS_INVALID, + /* 04 */ 0x0664, + /* 05 */ ZYDIS_INVALID, + /* 06 */ NODE(OpcodeTreeNodeType::VEXL, 0x0001), + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x0666, + /* 03 */ ZYDIS_INVALID, + /* 04 */ 0x0661, + /* 05 */ ZYDIS_INVALID, + /* 06 */ NODE(OpcodeTreeNodeType::VEXL, 0x0002), + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x0668, + /* 03 */ 0x0667, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ NODE(OpcodeTreeNodeType::VEXL, 0x0003), + /* 07 */ 0x065C, + }, + { + /* 00 */ 0x0333, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0332, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04DD, + /* 01 */ 0x04E5, + /* 02 */ 0x04C8, + /* 03 */ 0x04CD, + /* 04 */ 0x0522, + /* 05 */ 0x0527, + /* 06 */ 0x051F, + /* 07 */ 0x04F1, + }, + { + /* 00 */ 0x04DC, + /* 01 */ 0x04E2, + /* 02 */ 0x04C5, + /* 03 */ 0x04CF, + /* 04 */ 0x0520, + /* 05 */ 0x052A, + /* 06 */ 0x0519, + /* 07 */ 0x04F4, + }, + { + /* 00 */ 0x04E1, + /* 01 */ 0x04E3, + /* 02 */ 0x04C3, + /* 03 */ 0x04CC, + /* 04 */ 0x0521, + /* 05 */ 0x0529, + /* 06 */ 0x051A, + /* 07 */ 0x04F2, + }, + { + /* 00 */ 0x04E0, + /* 01 */ 0x04E4, + /* 02 */ 0x04C4, + /* 03 */ 0x04CB, + /* 04 */ 0x0518, + /* 05 */ 0x0525, + /* 06 */ 0x051B, + /* 07 */ 0x04F5, + }, + { + /* 00 */ 0x00BB, + /* 01 */ 0x01CF, + /* 02 */ 0x0119, + /* 03 */ 0x013D, + /* 04 */ 0x022C, + /* 05 */ 0x0245, + /* 06 */ 0x0166, + /* 07 */ 0x0171, + }, + { + /* 00 */ 0x01BC, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x01FF, + /* 03 */ 0x020B, + /* 04 */ 0x01C3, + /* 05 */ 0x01C2, + /* 06 */ 0x01EB, + /* 07 */ 0x01EA, + }, + { + /* 00 */ 0x019A, + /* 01 */ 0x01A8, + /* 02 */ 0x019C, + /* 03 */ 0x019F, + /* 04 */ 0x01B3, + /* 05 */ 0x01B5, + /* 06 */ 0x01A1, + /* 07 */ 0x01A3, + }, + { + /* 00 */ 0x01A4, + /* 01 */ 0x01B1, + /* 02 */ 0x01AB, + /* 03 */ 0x01AD, + /* 04 */ ZYDIS_INVALID, + /* 05 */ 0x01BA, + /* 06 */ ZYDIS_INVALID, + /* 07 */ 0x020A, + }, + { + /* 00 */ 0x00BA, + /* 01 */ 0x01D2, + /* 02 */ 0x0118, + /* 03 */ 0x013E, + /* 04 */ 0x022B, + /* 05 */ 0x0243, + /* 06 */ 0x0158, + /* 07 */ 0x017A, + }, + { + /* 00 */ 0x01BB, + /* 01 */ 0x01AF, + /* 02 */ 0x01FE, + /* 03 */ 0x0209, + /* 04 */ 0x01F3, + /* 05 */ ZYDIS_INVALID, + /* 06 */ 0x01E8, + /* 07 */ 0x01ED, + }, + { + /* 00 */ 0x019B, + /* 01 */ 0x01A7, + /* 02 */ 0x019D, + /* 03 */ 0x019E, + /* 04 */ 0x01B2, + /* 05 */ 0x01B4, + /* 06 */ 0x01A0, + /* 07 */ 0x01A2, + }, + { + /* 00 */ 0x01A6, + /* 01 */ 0x01B0, + /* 02 */ 0x01AA, + /* 03 */ 0x01AE, + /* 04 */ 0x00D2, + /* 05 */ 0x01A5, + /* 06 */ 0x00D3, + /* 07 */ 0x01AC, + }, + { + /* 00 */ 0x0557, + /* 01 */ 0x0558, + /* 02 */ 0x038E, + /* 03 */ 0x0385, + /* 04 */ 0x037E, + /* 05 */ 0x02A5, + /* 06 */ 0x00AC, + /* 07 */ 0x02A0, + }, + { + /* 00 */ 0x0559, + /* 01 */ 0x055A, + /* 02 */ 0x038D, + /* 03 */ 0x0384, + /* 04 */ 0x037D, + /* 05 */ 0x02A3, + /* 06 */ 0x00AB, + /* 07 */ 0x02A1, + }, + { + /* 00 */ 0x02AF, + /* 01 */ 0x00A4, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02B0, + /* 01 */ 0x00A5, + /* 02 */ NODE(OpcodeTreeNodeType::MODE, 0x002C), + /* 03 */ 0x004C, + /* 04 */ 0x02D9, + /* 05 */ 0x02DA, + /* 06 */ 0x04B8, + /* 07 */ ZYDIS_INVALID, + }, +}; + +const OpcodeTreeNode optreeModrmRm[][8] = +{ + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0000), + /* 02 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0001), + /* 03 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0002), + /* 04 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0003), + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0315, + /* 01 */ 0x0383, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06B1, + /* 01 */ 0x06C1, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0004), + /* 01 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0005), + /* 02 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0006), + /* 03 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0007), + /* 04 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0008), + /* 05 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0009), + /* 06 */ NODE(OpcodeTreeNodeType::VENDOR, 0x000A), + /* 07 */ NODE(OpcodeTreeNodeType::VENDOR, 0x000B), + }, + { + /* 00 */ 0x0550, + /* 01 */ NODE(OpcodeTreeNodeType::VENDOR, 0x000C), + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0316, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06C2, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06C3, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06C4, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06AF, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06AC, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06AE, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06AD, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06B0, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + }, +}; + +const OpcodeTreeNode optreeMandatory[][4] = +{ + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0000), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0001), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0002), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02F0, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0307, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0551, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0058, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0556, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02BD, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x069E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0561, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0454, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0189, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0379, + /* 01 */ 0x0368, + /* 02 */ 0x0371, + /* 03 */ 0x0377, + }, + { + /* 00 */ 0x0378, + /* 01 */ 0x036A, + /* 02 */ 0x0370, + /* 03 */ 0x0376, + }, + { + /* 00 */ 0x0355, + /* 01 */ 0x0345, + /* 02 */ 0x036D, + /* 03 */ 0x0353, + }, + { + /* 00 */ 0x034C, + /* 01 */ 0x0346, + /* 02 */ 0x036E, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0354, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0352, + }, + { + /* 00 */ 0x0565, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0564, + }, + { + /* 00 */ 0x0563, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0562, + }, + { + /* 00 */ 0x0350, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x036B, + /* 03 */ 0x034E, + }, + { + /* 00 */ 0x0351, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x036C, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x034F, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x034D, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0003), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x038A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x038B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x038C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0389, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0386, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0387, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0388, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0325, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0328, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0327, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0326, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x033A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0338, + }, + { + /* 00 */ 0x0339, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0337, + }, + { + /* 00 */ 0x008D, + /* 01 */ 0x0093, + /* 02 */ 0x0094, + /* 03 */ 0x008C, + }, + { + /* 00 */ 0x035C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x035B, + }, + { + /* 00 */ 0x009A, + /* 01 */ 0x009B, + /* 02 */ 0x009C, + /* 03 */ 0x0098, + }, + { + /* 00 */ 0x0090, + /* 01 */ 0x0091, + /* 02 */ 0x0096, + /* 03 */ 0x008A, + }, + { + /* 00 */ 0x0560, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x055F, + }, + { + /* 00 */ 0x0082, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0081, + }, + { + /* 00 */ 0x069F, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04D4, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04D1, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04D2, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x0003), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x0004), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x029A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x045B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x045C, + }, + { + /* 00 */ 0x03FD, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03FE, + }, + { + /* 00 */ 0x03FA, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03F9, + }, + { + /* 00 */ 0x03FB, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03FC, + }, + { + /* 00 */ 0x040E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x040F, + }, + { + /* 00 */ 0x0405, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0404, + }, + { + /* 00 */ 0x0400, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0401, + }, + { + /* 00 */ 0x0402, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0403, + }, + { + /* 00 */ 0x0461, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0462, + }, + { + /* 00 */ 0x0466, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0465, + }, + { + /* 00 */ 0x0464, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0463, + }, + { + /* 00 */ 0x0431, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0432, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03CA, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0037, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0036, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x049A, + }, + { + /* 00 */ 0x03A3, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03A2, + }, + { + /* 00 */ 0x03A6, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03A7, + }, + { + /* 00 */ 0x03A4, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03A5, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0426, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0424, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0425, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0428, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0429, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0427, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0430, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03D1, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0359, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03AC, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x042C, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x042A, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x042B, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x042E, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x042F, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x042D, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03DA, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x041A, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x041B, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0421, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0420, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0412, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0413, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0419, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0418, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0438, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03FF, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::MODE, 0x0005), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::MODE, 0x0006), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0023, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0021, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0022, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x001F, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0020, + }, + { + /* 00 */ 0x033B, + /* 01 */ 0x0086, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x033C, + /* 01 */ 0x0085, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04E9, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04E8, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04EB, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04EA, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0035, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0034, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03CB, + }, + { + /* 00 */ 0x03BF, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03C0, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03DF, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03E3, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0000), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x00B5, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0408, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x02B7, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0001), + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x00B2, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x00B1, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x037C, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03CC, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03D5, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03D4, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03DE, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03DD, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0024, + }, + { + /* 00 */ 0x0067, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0064, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x005C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x005B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x005E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0063, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x005D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x005A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0069, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0066, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0068, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0065, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0061, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0060, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0062, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x005F, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0357, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0356, + }, + { + /* 00 */ 0x0535, + /* 01 */ 0x0536, + /* 02 */ 0x0537, + /* 03 */ 0x0534, + }, + { + /* 00 */ 0x04ED, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x04EE, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04C9, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x04CA, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0032, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0031, + }, + { + /* 00 */ 0x0030, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x002F, + }, + { + /* 00 */ 0x039A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0399, + }, + { + /* 00 */ 0x06BE, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x06BD, + }, + { + /* 00 */ 0x001A, + /* 01 */ 0x001B, + /* 02 */ 0x001C, + /* 03 */ 0x0019, + }, + { + /* 00 */ 0x0380, + /* 01 */ 0x0381, + /* 02 */ 0x0382, + /* 03 */ 0x037F, + }, + { + /* 00 */ 0x008F, + /* 01 */ 0x0092, + /* 02 */ 0x0095, + /* 03 */ 0x008B, + }, + { + /* 00 */ 0x0088, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x0099, + /* 03 */ 0x008E, + }, + { + /* 00 */ 0x054D, + /* 01 */ 0x054E, + /* 02 */ 0x054F, + /* 03 */ 0x054C, + }, + { + /* 00 */ 0x0312, + /* 01 */ 0x0313, + /* 02 */ 0x0314, + /* 03 */ 0x0311, + }, + { + /* 00 */ 0x00AE, + /* 01 */ 0x00AF, + /* 02 */ 0x00B0, + /* 03 */ 0x00AD, + }, + { + /* 00 */ 0x030D, + /* 01 */ 0x030E, + /* 02 */ 0x030F, + /* 03 */ 0x030C, + }, + { + /* 00 */ 0x04A2, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04A3, + }, + { + /* 00 */ 0x04A7, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04A8, + }, + { + /* 00 */ 0x04A5, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04A4, + }, + { + /* 00 */ 0x03AA, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03AB, + }, + { + /* 00 */ 0x03D7, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03D6, + }, + { + /* 00 */ 0x03DC, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03DB, + }, + { + /* 00 */ 0x03D8, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03D9, + }, + { + /* 00 */ 0x03AD, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03AE, + }, + { + /* 00 */ 0x049B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x049C, + }, + { + /* 00 */ 0x04A1, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04A0, + }, + { + /* 00 */ 0x049E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x049D, + }, + { + /* 00 */ 0x03A8, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03A9, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04A6, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x049F, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0002), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0003), + }, + { + /* 00 */ 0x0363, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x034A, + /* 03 */ 0x0348, + }, + { + /* 00 */ 0x0460, + /* 01 */ 0x045F, + /* 02 */ 0x045E, + /* 03 */ 0x045D, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0004), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0005), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0006), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0007), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0008), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0009), + }, + { + /* 00 */ 0x03CD, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03CE, + }, + { + /* 00 */ 0x03D2, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03D3, + }, + { + /* 00 */ 0x03D0, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03CF, + }, + { + /* 00 */ 0x00B3, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0013), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0014), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x029C, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x029B, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x029F, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x029E, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0004), + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x035F, + /* 03 */ NODE(OpcodeTreeNodeType::OPERAND_SIZE, 0x0005), + }, + { + /* 00 */ 0x0362, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x034B, + /* 03 */ 0x0349, + }, + { + /* 00 */ 0x02E9, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02E3, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02C9, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02DF, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02CF, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02E0, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02CC, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02C8, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02EE, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02E7, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02EA, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02E4, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02D6, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02D4, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02D7, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02D2, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0512, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x050F, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0507, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0506, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0509, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x050E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0508, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0505, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0514, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0511, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0513, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0510, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x050C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x050B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x050D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x050A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04B5, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x044A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0083, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0044, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0524, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0523, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x000A), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x000B), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04B6, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0444, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04EC, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x004A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x052C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x052B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x000C), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x000D), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02A2, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x007C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x007D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0308, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0048, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02F8, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02FA, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x037B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x037A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ 0x044D, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x000E), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0046, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0039, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x003A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0373, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0374, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06A1, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06A0, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0075, + /* 01 */ 0x0077, + /* 02 */ 0x007A, + /* 03 */ 0x0074, + }, + { + /* 00 */ 0x035A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x040D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x040C, + }, + { + /* 00 */ 0x03E4, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03E5, + }, + { + /* 00 */ 0x052E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x052D, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x000F), + /* 01 */ ZYDIS_INVALID, + /* 02 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0010), + /* 03 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0011), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODRM_REG, 0x0012), + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x003F, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x003D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0040, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x003C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x003E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x003B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0042, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0041, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x001E, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x001D, + }, + { + /* 00 */ 0x0487, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0488, + }, + { + /* 00 */ 0x047D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x047F, + }, + { + /* 00 */ 0x0483, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0484, + }, + { + /* 00 */ 0x03B3, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03B4, + }, + { + /* 00 */ 0x0439, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x043A, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x0347, + /* 02 */ 0x0366, + /* 03 */ 0x0361, + }, + { + /* 00 */ 0x0422, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0423, + }, + { + /* 00 */ 0x0494, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0493, + }, + { + /* 00 */ 0x0496, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0495, + }, + { + /* 00 */ 0x041E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x041F, + }, + { + /* 00 */ 0x03C1, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03C2, + }, + { + /* 00 */ 0x03BA, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03B9, + }, + { + /* 00 */ 0x03BB, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03BC, + }, + { + /* 00 */ 0x0417, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0416, + }, + { + /* 00 */ 0x03C3, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03C4, + }, + { + /* 00 */ 0x03C5, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03C6, + }, + { + /* 00 */ 0x047A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x047B, + }, + { + /* 00 */ 0x0477, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0474, + }, + { + /* 00 */ 0x03C8, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03C9, + }, + { + /* 00 */ 0x0434, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0435, + }, + { + /* 00 */ 0x0436, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0437, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x0089, + /* 02 */ 0x0087, + /* 03 */ 0x0097, + }, + { + /* 00 */ 0x035D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0358, + }, + { + /* 00 */ 0x048F, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0490, + }, + { + /* 00 */ 0x0492, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0491, + }, + { + /* 00 */ 0x041C, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x041D, + }, + { + /* 00 */ 0x0453, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0452, + }, + { + /* 00 */ 0x03B6, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03B5, + }, + { + /* 00 */ 0x03B8, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03B7, + }, + { + /* 00 */ 0x0414, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0415, + }, + { + /* 00 */ 0x04C1, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x04C2, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x02F1, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0472, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0471, + }, + { + /* 00 */ 0x0469, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0467, + }, + { + /* 00 */ 0x046E, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x046F, + }, + { + /* 00 */ 0x043B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x043C, + }, + { + /* 00 */ 0x0411, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0410, + }, + { + /* 00 */ 0x045A, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0459, + }, + { + /* 00 */ 0x030B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x030A, + }, + { + /* 00 */ 0x0489, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x048A, + }, + { + /* 00 */ 0x0498, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x0497, + }, + { + /* 00 */ 0x048B, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x048C, + }, + { + /* 00 */ 0x048D, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x048E, + }, + { + /* 00 */ 0x03AF, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03B0, + }, + { + /* 00 */ 0x03BE, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03BD, + }, + { + /* 00 */ 0x03B1, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ 0x03B2, + }, +}; + +const OpcodeTreeNode optreeX87[][64] = +{ + { + /* 00 */ 0x00BC, + /* 01 */ 0x00BF, + /* 02 */ 0x00C2, + /* 03 */ 0x00C1, + /* 04 */ 0x00C0, + /* 05 */ 0x00C5, + /* 06 */ 0x00C3, + /* 07 */ 0x00C4, + /* 08 */ 0x01CE, + /* 09 */ 0x01CD, + /* 0A */ 0x01D9, + /* 0B */ 0x01DA, + /* 0C */ 0x01DB, + /* 0D */ 0x01D6, + /* 0E */ 0x01D7, + /* 0F */ 0x01D8, + /* 10 */ 0x011A, + /* 11 */ 0x011C, + /* 12 */ 0x011B, + /* 13 */ 0x0117, + /* 14 */ 0x0116, + /* 15 */ 0x011D, + /* 16 */ 0x011F, + /* 17 */ 0x011E, + /* 18 */ 0x013A, + /* 19 */ 0x0141, + /* 1A */ 0x013C, + /* 1B */ 0x0138, + /* 1C */ 0x013B, + /* 1D */ 0x0140, + /* 1E */ 0x013F, + /* 1F */ 0x0139, + /* 20 */ 0x022E, + /* 21 */ 0x0226, + /* 22 */ 0x0229, + /* 23 */ 0x0232, + /* 24 */ 0x0231, + /* 25 */ 0x022D, + /* 26 */ 0x022A, + /* 27 */ 0x0227, + /* 28 */ 0x0246, + /* 29 */ 0x024B, + /* 2A */ 0x024C, + /* 2B */ 0x024A, + /* 2C */ 0x0248, + /* 2D */ 0x0249, + /* 2E */ 0x0250, + /* 2F */ 0x0251, + /* 30 */ 0x0161, + /* 31 */ 0x0162, + /* 32 */ 0x0155, + /* 33 */ 0x015A, + /* 34 */ 0x0159, + /* 35 */ 0x0156, + /* 36 */ 0x0157, + /* 37 */ 0x0163, + /* 38 */ 0x0172, + /* 39 */ 0x016F, + /* 3A */ 0x0170, + /* 3B */ 0x0173, + /* 3C */ 0x0176, + /* 3D */ 0x0177, + /* 3E */ 0x0174, + /* 3F */ 0x0175, + }, + { + /* 00 */ 0x01BD, + /* 01 */ 0x01C0, + /* 02 */ 0x01BF, + /* 03 */ 0x01BE, + /* 04 */ 0x01B7, + /* 05 */ 0x01B6, + /* 06 */ 0x01B9, + /* 07 */ 0x01B8, + /* 08 */ 0x0281, + /* 09 */ 0x0282, + /* 0A */ 0x0283, + /* 0B */ 0x0280, + /* 0C */ 0x027D, + /* 0D */ 0x027E, + /* 0E */ 0x027F, + /* 0F */ 0x0284, + /* 10 */ 0x01E7, + /* 11 */ ZYDIS_INVALID, + /* 12 */ ZYDIS_INVALID, + /* 13 */ ZYDIS_INVALID, + /* 14 */ ZYDIS_INVALID, + /* 15 */ ZYDIS_INVALID, + /* 16 */ ZYDIS_INVALID, + /* 17 */ ZYDIS_INVALID, + /* 18 */ 0x0213, + /* 19 */ 0x0212, + /* 1A */ 0x0215, + /* 1B */ 0x0214, + /* 1C */ 0x020F, + /* 1D */ 0x020E, + /* 1E */ 0x0211, + /* 1F */ 0x0210, + /* 20 */ 0x00D4, + /* 21 */ 0x00B7, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ 0x025A, + /* 25 */ 0x027C, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ 0x01C1, + /* 29 */ 0x01C5, + /* 2A */ 0x01C4, + /* 2B */ 0x01C8, + /* 2C */ 0x01C6, + /* 2D */ 0x01C7, + /* 2E */ 0x01C9, + /* 2F */ ZYDIS_INVALID, + /* 30 */ 0x00B6, + /* 31 */ 0x0298, + /* 32 */ 0x01F1, + /* 33 */ 0x01EE, + /* 34 */ 0x0297, + /* 35 */ 0x01F0, + /* 36 */ 0x0154, + /* 37 */ 0x01A9, + /* 38 */ 0x01EF, + /* 39 */ 0x0299, + /* 3A */ 0x01F8, + /* 3B */ 0x01F7, + /* 3C */ 0x01F2, + /* 3D */ 0x01F5, + /* 3E */ 0x01F6, + /* 3F */ 0x0153, + }, + { + /* 00 */ 0x00D9, + /* 01 */ 0x00DA, + /* 02 */ 0x00DB, + /* 03 */ 0x00D6, + /* 04 */ 0x00D7, + /* 05 */ 0x00D8, + /* 06 */ 0x00DD, + /* 07 */ 0x00DC, + /* 08 */ 0x00E6, + /* 09 */ 0x00E7, + /* 0A */ 0x00E8, + /* 0B */ 0x00EC, + /* 0C */ 0x00ED, + /* 0D */ 0x00EB, + /* 0E */ 0x00E9, + /* 0F */ 0x00EA, + /* 10 */ 0x00E4, + /* 11 */ 0x00E5, + /* 12 */ 0x00E2, + /* 13 */ 0x00E3, + /* 14 */ 0x00DF, + /* 15 */ 0x00DE, + /* 16 */ 0x00E0, + /* 17 */ 0x00E1, + /* 18 */ 0x0113, + /* 19 */ 0x0114, + /* 1A */ 0x0115, + /* 1B */ 0x010F, + /* 1C */ 0x010E, + /* 1D */ 0x0110, + /* 1E */ 0x0111, + /* 1F */ 0x0112, + /* 20 */ ZYDIS_INVALID, + /* 21 */ ZYDIS_INVALID, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ ZYDIS_INVALID, + /* 29 */ 0x027B, + /* 2A */ ZYDIS_INVALID, + /* 2B */ ZYDIS_INVALID, + /* 2C */ ZYDIS_INVALID, + /* 2D */ ZYDIS_INVALID, + /* 2E */ ZYDIS_INVALID, + /* 2F */ ZYDIS_INVALID, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x00F0, + /* 01 */ 0x00F1, + /* 02 */ 0x00EE, + /* 03 */ 0x00EF, + /* 04 */ 0x00F4, + /* 05 */ 0x00F5, + /* 06 */ 0x00F2, + /* 07 */ 0x00F3, + /* 08 */ 0x0103, + /* 09 */ 0x0102, + /* 0A */ 0x0105, + /* 0B */ 0x0104, + /* 0C */ 0x00FF, + /* 0D */ 0x00FE, + /* 0E */ 0x0101, + /* 0F */ 0x0100, + /* 10 */ 0x00F8, + /* 11 */ 0x00F9, + /* 12 */ 0x00F6, + /* 13 */ 0x00F7, + /* 14 */ 0x00FC, + /* 15 */ 0x00FD, + /* 16 */ 0x00FA, + /* 17 */ 0x00FB, + /* 18 */ 0x010B, + /* 19 */ 0x010A, + /* 1A */ 0x010D, + /* 1B */ 0x010C, + /* 1C */ 0x0107, + /* 1D */ 0x0106, + /* 1E */ 0x0109, + /* 1F */ 0x0108, + /* 20 */ 0x01E5, + /* 21 */ 0x01E4, + /* 22 */ 0x00D5, + /* 23 */ 0x01E6, + /* 24 */ 0x01E9, + /* 25 */ 0x01F4, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ 0x0269, + /* 29 */ 0x026A, + /* 2A */ 0x0265, + /* 2B */ 0x0264, + /* 2C */ 0x0263, + /* 2D */ 0x0268, + /* 2E */ 0x0267, + /* 2F */ 0x0266, + /* 30 */ 0x0129, + /* 31 */ 0x0128, + /* 32 */ 0x012B, + /* 33 */ 0x012A, + /* 34 */ 0x012F, + /* 35 */ 0x012E, + /* 36 */ 0x012D, + /* 37 */ 0x012C, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x00B9, + /* 01 */ 0x00B8, + /* 02 */ 0x00C6, + /* 03 */ 0x00C9, + /* 04 */ 0x00C8, + /* 05 */ 0x00C7, + /* 06 */ 0x00BE, + /* 07 */ 0x00BD, + /* 08 */ 0x01D1, + /* 09 */ 0x01D0, + /* 0A */ 0x01D5, + /* 0B */ 0x01D4, + /* 0C */ 0x01D3, + /* 0D */ 0x01CC, + /* 0E */ 0x01CB, + /* 0F */ 0x01CA, + /* 10 */ 0x0125, + /* 11 */ 0x0124, + /* 12 */ 0x0127, + /* 13 */ 0x0126, + /* 14 */ 0x0121, + /* 15 */ 0x0120, + /* 16 */ 0x0123, + /* 17 */ 0x0122, + /* 18 */ 0x0148, + /* 19 */ 0x0142, + /* 1A */ 0x0145, + /* 1B */ 0x0144, + /* 1C */ 0x0143, + /* 1D */ 0x0147, + /* 1E */ 0x0146, + /* 1F */ 0x0149, + /* 20 */ 0x024F, + /* 21 */ 0x0247, + /* 22 */ 0x0241, + /* 23 */ 0x0242, + /* 24 */ 0x0240, + /* 25 */ 0x024E, + /* 26 */ 0x024D, + /* 27 */ 0x0244, + /* 28 */ 0x0228, + /* 29 */ 0x0235, + /* 2A */ 0x0234, + /* 2B */ 0x0237, + /* 2C */ 0x0236, + /* 2D */ 0x0233, + /* 2E */ 0x0230, + /* 2F */ 0x022F, + /* 30 */ 0x017B, + /* 31 */ 0x0178, + /* 32 */ 0x0179, + /* 33 */ 0x017C, + /* 34 */ 0x017F, + /* 35 */ 0x0180, + /* 36 */ 0x017D, + /* 37 */ 0x017E, + /* 38 */ 0x015E, + /* 39 */ 0x015F, + /* 3A */ 0x0160, + /* 3B */ 0x015B, + /* 3C */ 0x015C, + /* 3D */ 0x015D, + /* 3E */ 0x0164, + /* 3F */ 0x0165, + }, + { + /* 00 */ 0x018F, + /* 01 */ 0x018E, + /* 02 */ 0x0191, + /* 03 */ 0x0190, + /* 04 */ 0x018B, + /* 05 */ 0x018A, + /* 06 */ 0x018D, + /* 07 */ 0x018C, + /* 08 */ 0x028A, + /* 09 */ 0x0289, + /* 0A */ 0x028C, + /* 0B */ 0x028B, + /* 0C */ 0x0286, + /* 0D */ 0x0285, + /* 0E */ 0x0288, + /* 0F */ 0x0287, + /* 10 */ 0x0200, + /* 11 */ 0x0202, + /* 12 */ 0x0201, + /* 13 */ 0x01FA, + /* 14 */ 0x01F9, + /* 15 */ 0x01FB, + /* 16 */ 0x01FD, + /* 17 */ 0x01FC, + /* 18 */ 0x020D, + /* 19 */ 0x020C, + /* 1A */ 0x0208, + /* 1B */ 0x0204, + /* 1C */ 0x0203, + /* 1D */ 0x0205, + /* 1E */ 0x0207, + /* 1F */ 0x0206, + /* 20 */ 0x025D, + /* 21 */ 0x025C, + /* 22 */ 0x025B, + /* 23 */ 0x025E, + /* 24 */ 0x0261, + /* 25 */ 0x0262, + /* 26 */ 0x025F, + /* 27 */ 0x0260, + /* 28 */ 0x0278, + /* 29 */ 0x0277, + /* 2A */ 0x027A, + /* 2B */ 0x0279, + /* 2C */ 0x0274, + /* 2D */ 0x0273, + /* 2E */ 0x0276, + /* 2F */ 0x0275, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x00CC, + /* 01 */ 0x00CD, + /* 02 */ 0x00CA, + /* 03 */ 0x00CB, + /* 04 */ 0x00D0, + /* 05 */ 0x00D1, + /* 06 */ 0x00CE, + /* 07 */ 0x00CF, + /* 08 */ 0x01E1, + /* 09 */ 0x01E0, + /* 0A */ 0x01E3, + /* 0B */ 0x01E2, + /* 0C */ 0x01DD, + /* 0D */ 0x01DC, + /* 0E */ 0x01DF, + /* 0F */ 0x01DE, + /* 10 */ 0x014F, + /* 11 */ 0x014E, + /* 12 */ 0x0151, + /* 13 */ 0x0150, + /* 14 */ 0x014B, + /* 15 */ 0x014A, + /* 16 */ 0x014D, + /* 17 */ 0x014C, + /* 18 */ ZYDIS_INVALID, + /* 19 */ 0x0152, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ ZYDIS_INVALID, + /* 1D */ ZYDIS_INVALID, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ 0x0258, + /* 21 */ 0x0259, + /* 22 */ 0x0256, + /* 23 */ 0x0257, + /* 24 */ 0x0253, + /* 25 */ 0x0252, + /* 26 */ 0x0255, + /* 27 */ 0x0254, + /* 28 */ 0x023B, + /* 29 */ 0x023D, + /* 2A */ 0x023C, + /* 2B */ 0x0239, + /* 2C */ 0x0238, + /* 2D */ 0x023A, + /* 2E */ 0x023E, + /* 2F */ 0x023F, + /* 30 */ 0x0186, + /* 31 */ 0x0185, + /* 32 */ 0x0188, + /* 33 */ 0x0187, + /* 34 */ 0x0182, + /* 35 */ 0x0181, + /* 36 */ 0x0184, + /* 37 */ 0x0183, + /* 38 */ 0x016C, + /* 39 */ 0x016B, + /* 3A */ 0x016E, + /* 3B */ 0x016D, + /* 3C */ 0x0168, + /* 3D */ 0x0167, + /* 3E */ 0x016A, + /* 3F */ 0x0169, + }, + { + /* 00 */ 0x0199, + /* 01 */ 0x0196, + /* 02 */ 0x0197, + /* 03 */ 0x0198, + /* 04 */ 0x0193, + /* 05 */ 0x0192, + /* 06 */ 0x0195, + /* 07 */ 0x0194, + /* 08 */ 0x028F, + /* 09 */ 0x0290, + /* 0A */ 0x028D, + /* 0B */ 0x028E, + /* 0C */ 0x0293, + /* 0D */ 0x0294, + /* 0E */ 0x0291, + /* 0F */ 0x0292, + /* 10 */ 0x021B, + /* 11 */ 0x021A, + /* 12 */ 0x021D, + /* 13 */ 0x021C, + /* 14 */ 0x0217, + /* 15 */ 0x0216, + /* 16 */ 0x0219, + /* 17 */ 0x0218, + /* 18 */ 0x0220, + /* 19 */ 0x0221, + /* 1A */ 0x021E, + /* 1B */ 0x021F, + /* 1C */ 0x0224, + /* 1D */ 0x0225, + /* 1E */ 0x0222, + /* 1F */ 0x0223, + /* 20 */ 0x01EC, + /* 21 */ ZYDIS_INVALID, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ 0x0271, + /* 29 */ 0x0272, + /* 2A */ 0x026D, + /* 2B */ 0x026C, + /* 2C */ 0x026B, + /* 2D */ 0x0270, + /* 2E */ 0x026F, + /* 2F */ 0x026E, + /* 30 */ 0x0136, + /* 31 */ 0x0137, + /* 32 */ 0x0133, + /* 33 */ 0x0134, + /* 34 */ 0x0135, + /* 35 */ 0x0130, + /* 36 */ 0x0131, + /* 37 */ 0x0132, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + }, +}; + +const OpcodeTreeNode optreeAddressSize[][3] = +{ + { + /* 00 */ 0x02CD, + /* 01 */ 0x02D0, + /* 02 */ 0x02EC, + }, +}; + +const OpcodeTreeNode optreeOperandSize[][3] = +{ + { + /* 00 */ 0x03E0, + /* 01 */ 0x03E1, + /* 02 */ 0x03E2, + }, + { + /* 00 */ 0x0409, + /* 01 */ 0x040A, + /* 02 */ 0x040B, + }, + { + /* 00 */ 0x033D, + /* 01 */ 0x0343, + /* 02 */ 0x035E, + }, + { + /* 00 */ 0x0341, + /* 01 */ 0x0342, + /* 02 */ 0x0364, + }, + { + /* 00 */ 0x0344, + /* 01 */ 0x033E, + /* 02 */ 0x0365, + }, + { + /* 00 */ 0x0340, + /* 01 */ 0x033F, + /* 02 */ 0x0360, + }, + { + /* 00 */ 0x007F, + /* 01 */ 0x0080, + /* 02 */ 0x007E, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x000F), + /* 01 */ NODE(OpcodeTreeNodeType::MODE, 0x0010), + /* 02 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x0011), + /* 01 */ NODE(OpcodeTreeNodeType::MODE, 0x0012), + /* 02 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02B8, + /* 01 */ 0x02B6, + /* 02 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x03A1, + /* 01 */ 0x03A0, + /* 02 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0050, + /* 01 */ 0x009E, + /* 02 */ 0x0052, + }, + { + /* 00 */ 0x009D, + /* 01 */ 0x0051, + /* 02 */ 0x0084, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x001E), + /* 01 */ NODE(OpcodeTreeNodeType::MODE, 0x001F), + /* 02 */ NODE(OpcodeTreeNodeType::MODE, 0x0020), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x0021), + /* 01 */ NODE(OpcodeTreeNodeType::MODE, 0x0022), + /* 02 */ NODE(OpcodeTreeNodeType::MODE, 0x0023), + }, + { + /* 00 */ 0x0372, + /* 01 */ 0x0369, + /* 02 */ 0x036F, + }, + { + /* 00 */ 0x007B, + /* 01 */ 0x0078, + /* 02 */ 0x0079, + }, + { + /* 00 */ 0x0540, + /* 01 */ 0x053E, + /* 02 */ 0x053F, + }, + { + /* 00 */ 0x0303, + /* 01 */ 0x0301, + /* 02 */ 0x0302, + }, + { + /* 00 */ 0x0504, + /* 01 */ 0x0502, + /* 02 */ 0x0503, + }, + { + /* 00 */ 0x05BB, + /* 01 */ 0x05BA, + /* 02 */ 0x05D5, + }, + { + /* 00 */ 0x05B9, + /* 01 */ 0x05BC, + /* 02 */ 0x05D6, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXW, 0x000E), + /* 01 */ NODE(OpcodeTreeNodeType::VEXW, 0x000F), + /* 02 */ NODE(OpcodeTreeNodeType::VEXW, 0x0010), + }, + { + /* 00 */ 0x02C6, + /* 01 */ 0x02C4, + /* 02 */ 0x02C5, + }, +}; + +const OpcodeTreeNode optreeMode[][2] = +{ + { + /* 00 */ 0x04AA, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0445, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04AD, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0553, + /* 01 */ NODE(OpcodeTreeNodeType::VENDOR, 0x000D), + }, + { + /* 00 */ 0x0555, + /* 01 */ NODE(OpcodeTreeNodeType::VENDOR, 0x000E), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VENDOR, 0x000F), + /* 01 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0010), + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0011), + /* 01 */ NODE(OpcodeTreeNodeType::VENDOR, 0x0012), + }, + { + /* 00 */ 0x04AC, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0446, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04A9, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0443, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x009F, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x00A0, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0001, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0004, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04BA, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04BB, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x044B, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x044C, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0038, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0033, + /* 01 */ 0x0375, + }, + { + /* 00 */ 0x0011, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0398, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0007, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04FC, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x002A, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0546, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x06B3, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0073, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x004F, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04C0, + /* 01 */ 0x04BF, + }, + { + /* 00 */ 0x04BC, + /* 01 */ 0x04BE, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x04BD, + }, + { + /* 00 */ 0x0451, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x044E, + /* 01 */ 0x0450, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x044F, + }, + { + /* 00 */ 0x02F6, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXW, 0x0014), + /* 01 */ NODE(OpcodeTreeNodeType::VEXW, 0x0015), + }, + { + /* 00 */ 0x02F3, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02BC, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0003, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0002, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04F0, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02DC, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x004D, + /* 01 */ 0x004B, + }, +}; + +const OpcodeTreeNode optreeVendor[][2] = +{ + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05AC, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05B2, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05EB, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05F3, + }, + { + /* 00 */ 0x05EC, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05B4, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05B3, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05ED, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x053A, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0056, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0530, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x02C1, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x04D5, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x0552, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x0554, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x02BE, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x02BF, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x02C3, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x02C2, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05EA, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05F2, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05E8, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05E9, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05F4, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05AD, + }, +}; + +const OpcodeTreeNode optree3dnow[][256] = +{ + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ ZYDIS_INVALID, + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ ZYDIS_INVALID, + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + /* 08 */ ZYDIS_INVALID, + /* 09 */ ZYDIS_INVALID, + /* 0A */ ZYDIS_INVALID, + /* 0B */ ZYDIS_INVALID, + /* 0C */ 0x0407, + /* 0D */ 0x0406, + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + /* 10 */ ZYDIS_INVALID, + /* 11 */ ZYDIS_INVALID, + /* 12 */ ZYDIS_INVALID, + /* 13 */ ZYDIS_INVALID, + /* 14 */ ZYDIS_INVALID, + /* 15 */ ZYDIS_INVALID, + /* 16 */ ZYDIS_INVALID, + /* 17 */ ZYDIS_INVALID, + /* 18 */ ZYDIS_INVALID, + /* 19 */ ZYDIS_INVALID, + /* 1A */ ZYDIS_INVALID, + /* 1B */ ZYDIS_INVALID, + /* 1C */ 0x03E7, + /* 1D */ 0x03E6, + /* 1E */ ZYDIS_INVALID, + /* 1F */ ZYDIS_INVALID, + /* 20 */ ZYDIS_INVALID, + /* 21 */ ZYDIS_INVALID, + /* 22 */ ZYDIS_INVALID, + /* 23 */ ZYDIS_INVALID, + /* 24 */ ZYDIS_INVALID, + /* 25 */ ZYDIS_INVALID, + /* 26 */ ZYDIS_INVALID, + /* 27 */ ZYDIS_INVALID, + /* 28 */ ZYDIS_INVALID, + /* 29 */ ZYDIS_INVALID, + /* 2A */ ZYDIS_INVALID, + /* 2B */ ZYDIS_INVALID, + /* 2C */ ZYDIS_INVALID, + /* 2D */ ZYDIS_INVALID, + /* 2E */ ZYDIS_INVALID, + /* 2F */ ZYDIS_INVALID, + /* 30 */ ZYDIS_INVALID, + /* 31 */ ZYDIS_INVALID, + /* 32 */ ZYDIS_INVALID, + /* 33 */ ZYDIS_INVALID, + /* 34 */ ZYDIS_INVALID, + /* 35 */ ZYDIS_INVALID, + /* 36 */ ZYDIS_INVALID, + /* 37 */ ZYDIS_INVALID, + /* 38 */ ZYDIS_INVALID, + /* 39 */ ZYDIS_INVALID, + /* 3A */ ZYDIS_INVALID, + /* 3B */ ZYDIS_INVALID, + /* 3C */ ZYDIS_INVALID, + /* 3D */ ZYDIS_INVALID, + /* 3E */ ZYDIS_INVALID, + /* 3F */ ZYDIS_INVALID, + /* 40 */ ZYDIS_INVALID, + /* 41 */ ZYDIS_INVALID, + /* 42 */ ZYDIS_INVALID, + /* 43 */ ZYDIS_INVALID, + /* 44 */ ZYDIS_INVALID, + /* 45 */ ZYDIS_INVALID, + /* 46 */ ZYDIS_INVALID, + /* 47 */ ZYDIS_INVALID, + /* 48 */ ZYDIS_INVALID, + /* 49 */ ZYDIS_INVALID, + /* 4A */ ZYDIS_INVALID, + /* 4B */ ZYDIS_INVALID, + /* 4C */ ZYDIS_INVALID, + /* 4D */ ZYDIS_INVALID, + /* 4E */ ZYDIS_INVALID, + /* 4F */ ZYDIS_INVALID, + /* 50 */ ZYDIS_INVALID, + /* 51 */ ZYDIS_INVALID, + /* 52 */ ZYDIS_INVALID, + /* 53 */ ZYDIS_INVALID, + /* 54 */ ZYDIS_INVALID, + /* 55 */ ZYDIS_INVALID, + /* 56 */ ZYDIS_INVALID, + /* 57 */ ZYDIS_INVALID, + /* 58 */ ZYDIS_INVALID, + /* 59 */ ZYDIS_INVALID, + /* 5A */ ZYDIS_INVALID, + /* 5B */ ZYDIS_INVALID, + /* 5C */ ZYDIS_INVALID, + /* 5D */ ZYDIS_INVALID, + /* 5E */ ZYDIS_INVALID, + /* 5F */ ZYDIS_INVALID, + /* 60 */ ZYDIS_INVALID, + /* 61 */ ZYDIS_INVALID, + /* 62 */ ZYDIS_INVALID, + /* 63 */ ZYDIS_INVALID, + /* 64 */ ZYDIS_INVALID, + /* 65 */ ZYDIS_INVALID, + /* 66 */ ZYDIS_INVALID, + /* 67 */ ZYDIS_INVALID, + /* 68 */ ZYDIS_INVALID, + /* 69 */ ZYDIS_INVALID, + /* 6A */ ZYDIS_INVALID, + /* 6B */ ZYDIS_INVALID, + /* 6C */ ZYDIS_INVALID, + /* 6D */ ZYDIS_INVALID, + /* 6E */ ZYDIS_INVALID, + /* 6F */ ZYDIS_INVALID, + /* 70 */ ZYDIS_INVALID, + /* 71 */ ZYDIS_INVALID, + /* 72 */ ZYDIS_INVALID, + /* 73 */ ZYDIS_INVALID, + /* 74 */ ZYDIS_INVALID, + /* 75 */ ZYDIS_INVALID, + /* 76 */ ZYDIS_INVALID, + /* 77 */ ZYDIS_INVALID, + /* 78 */ ZYDIS_INVALID, + /* 79 */ ZYDIS_INVALID, + /* 7A */ ZYDIS_INVALID, + /* 7B */ ZYDIS_INVALID, + /* 7C */ ZYDIS_INVALID, + /* 7D */ ZYDIS_INVALID, + /* 7E */ ZYDIS_INVALID, + /* 7F */ ZYDIS_INVALID, + /* 80 */ ZYDIS_INVALID, + /* 81 */ ZYDIS_INVALID, + /* 82 */ ZYDIS_INVALID, + /* 83 */ ZYDIS_INVALID, + /* 84 */ ZYDIS_INVALID, + /* 85 */ ZYDIS_INVALID, + /* 86 */ ZYDIS_INVALID, + /* 87 */ ZYDIS_INVALID, + /* 88 */ ZYDIS_INVALID, + /* 89 */ ZYDIS_INVALID, + /* 8A */ 0x03F0, + /* 8B */ ZYDIS_INVALID, + /* 8C */ ZYDIS_INVALID, + /* 8D */ ZYDIS_INVALID, + /* 8E */ 0x03F1, + /* 8F */ ZYDIS_INVALID, + /* 90 */ 0x03EB, + /* 91 */ ZYDIS_INVALID, + /* 92 */ ZYDIS_INVALID, + /* 93 */ ZYDIS_INVALID, + /* 94 */ 0x03EE, + /* 95 */ ZYDIS_INVALID, + /* 96 */ 0x03F2, + /* 97 */ 0x03F6, + /* 98 */ ZYDIS_INVALID, + /* 99 */ ZYDIS_INVALID, + /* 9A */ 0x03F7, + /* 9B */ ZYDIS_INVALID, + /* 9C */ ZYDIS_INVALID, + /* 9D */ ZYDIS_INVALID, + /* 9E */ 0x03E9, + /* 9F */ ZYDIS_INVALID, + /* A0 */ 0x03EC, + /* A1 */ ZYDIS_INVALID, + /* A2 */ ZYDIS_INVALID, + /* A3 */ ZYDIS_INVALID, + /* A4 */ 0x03ED, + /* A5 */ ZYDIS_INVALID, + /* A6 */ 0x03F3, + /* A7 */ 0x03F5, + /* A8 */ ZYDIS_INVALID, + /* A9 */ ZYDIS_INVALID, + /* AA */ 0x03F8, + /* AB */ ZYDIS_INVALID, + /* AC */ ZYDIS_INVALID, + /* AD */ ZYDIS_INVALID, + /* AE */ 0x03E8, + /* AF */ ZYDIS_INVALID, + /* B0 */ 0x03EA, + /* B1 */ ZYDIS_INVALID, + /* B2 */ ZYDIS_INVALID, + /* B3 */ ZYDIS_INVALID, + /* B4 */ 0x03EF, + /* B5 */ ZYDIS_INVALID, + /* B6 */ 0x03F4, + /* B7 */ 0x0433, + /* B8 */ ZYDIS_INVALID, + /* B9 */ ZYDIS_INVALID, + /* BA */ ZYDIS_INVALID, + /* BB */ 0x0499, + /* BC */ ZYDIS_INVALID, + /* BD */ ZYDIS_INVALID, + /* BE */ ZYDIS_INVALID, + /* BF */ 0x03C7, + /* C0 */ ZYDIS_INVALID, + /* C1 */ ZYDIS_INVALID, + /* C2 */ ZYDIS_INVALID, + /* C3 */ ZYDIS_INVALID, + /* C4 */ ZYDIS_INVALID, + /* C5 */ ZYDIS_INVALID, + /* C6 */ ZYDIS_INVALID, + /* C7 */ ZYDIS_INVALID, + /* C8 */ ZYDIS_INVALID, + /* C9 */ ZYDIS_INVALID, + /* CA */ ZYDIS_INVALID, + /* CB */ ZYDIS_INVALID, + /* CC */ ZYDIS_INVALID, + /* CD */ ZYDIS_INVALID, + /* CE */ ZYDIS_INVALID, + /* CF */ ZYDIS_INVALID, + /* D0 */ ZYDIS_INVALID, + /* D1 */ ZYDIS_INVALID, + /* D2 */ ZYDIS_INVALID, + /* D3 */ ZYDIS_INVALID, + /* D4 */ ZYDIS_INVALID, + /* D5 */ ZYDIS_INVALID, + /* D6 */ ZYDIS_INVALID, + /* D7 */ ZYDIS_INVALID, + /* D8 */ ZYDIS_INVALID, + /* D9 */ ZYDIS_INVALID, + /* DA */ ZYDIS_INVALID, + /* DB */ ZYDIS_INVALID, + /* DC */ ZYDIS_INVALID, + /* DD */ ZYDIS_INVALID, + /* DE */ ZYDIS_INVALID, + /* DF */ ZYDIS_INVALID, + /* E0 */ ZYDIS_INVALID, + /* E1 */ ZYDIS_INVALID, + /* E2 */ ZYDIS_INVALID, + /* E3 */ ZYDIS_INVALID, + /* E4 */ ZYDIS_INVALID, + /* E5 */ ZYDIS_INVALID, + /* E6 */ ZYDIS_INVALID, + /* E7 */ ZYDIS_INVALID, + /* E8 */ ZYDIS_INVALID, + /* E9 */ ZYDIS_INVALID, + /* EA */ ZYDIS_INVALID, + /* EB */ ZYDIS_INVALID, + /* EC */ ZYDIS_INVALID, + /* ED */ ZYDIS_INVALID, + /* EE */ ZYDIS_INVALID, + /* EF */ ZYDIS_INVALID, + /* F0 */ ZYDIS_INVALID, + /* F1 */ ZYDIS_INVALID, + /* F2 */ ZYDIS_INVALID, + /* F3 */ ZYDIS_INVALID, + /* F4 */ ZYDIS_INVALID, + /* F5 */ ZYDIS_INVALID, + /* F6 */ ZYDIS_INVALID, + /* F7 */ ZYDIS_INVALID, + /* F8 */ ZYDIS_INVALID, + /* F9 */ ZYDIS_INVALID, + /* FA */ ZYDIS_INVALID, + /* FB */ ZYDIS_INVALID, + /* FC */ ZYDIS_INVALID, + /* FD */ ZYDIS_INVALID, + /* FE */ ZYDIS_INVALID, + /* FF */ ZYDIS_INVALID, + }, +}; + +const OpcodeTreeNode optreeVex[][16] = +{ + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x0024), + /* 01 */ NODE(OpcodeTreeNodeType::TABLE, 0x0004), + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ NODE(OpcodeTreeNodeType::TABLE, 0x0005), + /* 06 */ NODE(OpcodeTreeNodeType::TABLE, 0x0006), + /* 07 */ NODE(OpcodeTreeNodeType::TABLE, 0x0007), + /* 08 */ ZYDIS_INVALID, + /* 09 */ NODE(OpcodeTreeNodeType::TABLE, 0x0008), + /* 0A */ ZYDIS_INVALID, + /* 0B */ ZYDIS_INVALID, + /* 0C */ ZYDIS_INVALID, + /* 0D */ NODE(OpcodeTreeNodeType::TABLE, 0x0009), + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::MODE, 0x0026), + /* 01 */ NODE(OpcodeTreeNodeType::TABLE, 0x0004), + /* 02 */ ZYDIS_INVALID, + /* 03 */ ZYDIS_INVALID, + /* 04 */ ZYDIS_INVALID, + /* 05 */ NODE(OpcodeTreeNodeType::TABLE, 0x0005), + /* 06 */ ZYDIS_INVALID, + /* 07 */ ZYDIS_INVALID, + /* 08 */ ZYDIS_INVALID, + /* 09 */ NODE(OpcodeTreeNodeType::TABLE, 0x0008), + /* 0A */ ZYDIS_INVALID, + /* 0B */ ZYDIS_INVALID, + /* 0C */ ZYDIS_INVALID, + /* 0D */ NODE(OpcodeTreeNodeType::TABLE, 0x0009), + /* 0E */ ZYDIS_INVALID, + /* 0F */ ZYDIS_INVALID, + }, +}; + +const OpcodeTreeNode optreeVexW[][2] = +{ + { + /* 00 */ 0x061D, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x061C, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0692, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0691, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x057B, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXL, 0x0008), + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05A6, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05A5, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05A7, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x05A4, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x061E, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x061B, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXL, 0x0009), + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x061F, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0620, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0621, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x0622, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXL, 0x000A), + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXL, 0x000B), + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXL, 0x000C), + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXL, 0x000D), + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ NODE(OpcodeTreeNodeType::VEXL, 0x000E), + /* 01 */ NODE(OpcodeTreeNodeType::VEXL, 0x000F), + }, + { + /* 00 */ 0x0579, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x0578, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x060B, + /* 01 */ ZYDIS_INVALID, + }, +}; + +const OpcodeTreeNode optreeVexL[][2] = +{ + { + /* 00 */ 0x069C, + /* 01 */ 0x069B, + }, + { + /* 00 */ 0x0660, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x065A, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x065E, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x063F, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x065F, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x065B, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x065D, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x057A, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x061A, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x05A0, + }, + { + /* 00 */ ZYDIS_INVALID, + /* 01 */ 0x059A, + }, + { + /* 00 */ 0x062C, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x062E, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x062D, + /* 01 */ ZYDIS_INVALID, + }, + { + /* 00 */ 0x062F, + /* 01 */ ZYDIS_INVALID, + }, +}; + +#undef ZYDIS_INVALID +#undef NODE + +#define OPI_NONE { DefinedOperandType::NONE, DefinedOperandSize::NA } +#define OPI_AL { DefinedOperandType::AL, DefinedOperandSize::B } +#define OPI_AX { DefinedOperandType::AX, DefinedOperandSize::W } +#define OPI_Av { DefinedOperandType::A, DefinedOperandSize::V } +#define OPI_C { DefinedOperandType::C, DefinedOperandSize::NA } +#define OPI_CL { DefinedOperandType::CL, DefinedOperandSize::B } +#define OPI_CS { DefinedOperandType::CS, DefinedOperandSize::NA } +#define OPI_CX { DefinedOperandType::CX, DefinedOperandSize::W } +#define OPI_D { DefinedOperandType::D, DefinedOperandSize::NA } +#define OPI_DL { DefinedOperandType::DL, DefinedOperandSize::B } +#define OPI_DS { DefinedOperandType::DS, DefinedOperandSize::NA } +#define OPI_DX { DefinedOperandType::DX, DefinedOperandSize::W } +#define OPI_E { DefinedOperandType::E, DefinedOperandSize::NA } +#define OPI_ES { DefinedOperandType::ES, DefinedOperandSize::NA } +#define OPI_Eb { DefinedOperandType::E, DefinedOperandSize::B } +#define OPI_Ed { DefinedOperandType::E, DefinedOperandSize::D } +#define OPI_Eq { DefinedOperandType::E, DefinedOperandSize::Q } +#define OPI_Ev { DefinedOperandType::E, DefinedOperandSize::V } +#define OPI_Ew { DefinedOperandType::E, DefinedOperandSize::W } +#define OPI_Ey { DefinedOperandType::E, DefinedOperandSize::Y } +#define OPI_Ez { DefinedOperandType::E, DefinedOperandSize::Z } +#define OPI_FS { DefinedOperandType::FS, DefinedOperandSize::NA } +#define OPI_Fv { DefinedOperandType::F, DefinedOperandSize::V } +#define OPI_G { DefinedOperandType::G, DefinedOperandSize::NA } +#define OPI_GS { DefinedOperandType::GS, DefinedOperandSize::NA } +#define OPI_Gb { DefinedOperandType::G, DefinedOperandSize::B } +#define OPI_Gd { DefinedOperandType::G, DefinedOperandSize::D } +#define OPI_Gq { DefinedOperandType::G, DefinedOperandSize::Q } +#define OPI_Gv { DefinedOperandType::G, DefinedOperandSize::V } +#define OPI_Gw { DefinedOperandType::G, DefinedOperandSize::W } +#define OPI_Gy { DefinedOperandType::G, DefinedOperandSize::Y } +#define OPI_Gz { DefinedOperandType::G, DefinedOperandSize::Z } +#define OPI_H { DefinedOperandType::H, DefinedOperandSize::X } +#define OPI_Hqq { DefinedOperandType::H, DefinedOperandSize::QQ } +#define OPI_Hx { DefinedOperandType::H, DefinedOperandSize::X } +#define OPI_I1 { DefinedOperandType::I1, DefinedOperandSize::NA } +#define OPI_Ib { DefinedOperandType::I, DefinedOperandSize::B } +#define OPI_Iv { DefinedOperandType::I, DefinedOperandSize::V } +#define OPI_Iw { DefinedOperandType::I, DefinedOperandSize::W } +#define OPI_Iz { DefinedOperandType::I, DefinedOperandSize::Z } +#define OPI_Jb { DefinedOperandType::J, DefinedOperandSize::B } +#define OPI_Jv { DefinedOperandType::J, DefinedOperandSize::V } +#define OPI_Jz { DefinedOperandType::J, DefinedOperandSize::Z } +#define OPI_L { DefinedOperandType::L, DefinedOperandSize::O } +#define OPI_Lx { DefinedOperandType::L, DefinedOperandSize::X } +#define OPI_M { DefinedOperandType::M, DefinedOperandSize::NA } +#define OPI_Mb { DefinedOperandType::M, DefinedOperandSize::B } +#define OPI_MbRd { DefinedOperandType::MR, DefinedOperandSize::BD } +#define OPI_MbRv { DefinedOperandType::MR, DefinedOperandSize::BV } +#define OPI_Md { DefinedOperandType::M, DefinedOperandSize::D } +#define OPI_MdRy { DefinedOperandType::MR, DefinedOperandSize::DY } +#define OPI_MdU { DefinedOperandType::MU, DefinedOperandSize::DO } +#define OPI_Mdq { DefinedOperandType::M, DefinedOperandSize::DQ } +#define OPI_Mo { DefinedOperandType::M, DefinedOperandSize::O } +#define OPI_Mq { DefinedOperandType::M, DefinedOperandSize::Q } +#define OPI_MqU { DefinedOperandType::MU, DefinedOperandSize::QO } +#define OPI_Ms { DefinedOperandType::M, DefinedOperandSize::W } +#define OPI_Mt { DefinedOperandType::M, DefinedOperandSize::T } +#define OPI_Mv { DefinedOperandType::M, DefinedOperandSize::V } +#define OPI_Mw { DefinedOperandType::M, DefinedOperandSize::W } +#define OPI_MwRd { DefinedOperandType::MR, DefinedOperandSize::WD } +#define OPI_MwRv { DefinedOperandType::MR, DefinedOperandSize::WV } +#define OPI_MwRy { DefinedOperandType::MR, DefinedOperandSize::WY } +#define OPI_MwU { DefinedOperandType::MU, DefinedOperandSize::WO } +#define OPI_N { DefinedOperandType::N, DefinedOperandSize::Q } +#define OPI_Ob { DefinedOperandType::O, DefinedOperandSize::B } +#define OPI_Ov { DefinedOperandType::O, DefinedOperandSize::V } +#define OPI_Ow { DefinedOperandType::O, DefinedOperandSize::W } +#define OPI_P { DefinedOperandType::P, DefinedOperandSize::Q } +#define OPI_Q { DefinedOperandType::Q, DefinedOperandSize::Q } +#define OPI_R { DefinedOperandType::R, DefinedOperandSize::RDQ } +#define OPI_R0b { DefinedOperandType::R0, DefinedOperandSize::B } +#define OPI_R0v { DefinedOperandType::R0, DefinedOperandSize::V } +#define OPI_R0w { DefinedOperandType::R0, DefinedOperandSize::W } +#define OPI_R0y { DefinedOperandType::R0, DefinedOperandSize::Y } +#define OPI_R0z { DefinedOperandType::R0, DefinedOperandSize::Z } +#define OPI_R1b { DefinedOperandType::R1, DefinedOperandSize::B } +#define OPI_R1v { DefinedOperandType::R1, DefinedOperandSize::V } +#define OPI_R1w { DefinedOperandType::R1, DefinedOperandSize::W } +#define OPI_R1y { DefinedOperandType::R1, DefinedOperandSize::Y } +#define OPI_R1z { DefinedOperandType::R1, DefinedOperandSize::Z } +#define OPI_R2b { DefinedOperandType::R2, DefinedOperandSize::B } +#define OPI_R2v { DefinedOperandType::R2, DefinedOperandSize::V } +#define OPI_R2w { DefinedOperandType::R2, DefinedOperandSize::W } +#define OPI_R2y { DefinedOperandType::R2, DefinedOperandSize::Y } +#define OPI_R2z { DefinedOperandType::R2, DefinedOperandSize::Z } +#define OPI_R3b { DefinedOperandType::R3, DefinedOperandSize::B } +#define OPI_R3v { DefinedOperandType::R3, DefinedOperandSize::V } +#define OPI_R3w { DefinedOperandType::R3, DefinedOperandSize::W } +#define OPI_R3y { DefinedOperandType::R3, DefinedOperandSize::Y } +#define OPI_R3z { DefinedOperandType::R3, DefinedOperandSize::Z } +#define OPI_R4b { DefinedOperandType::R4, DefinedOperandSize::B } +#define OPI_R4v { DefinedOperandType::R4, DefinedOperandSize::V } +#define OPI_R4w { DefinedOperandType::R4, DefinedOperandSize::W } +#define OPI_R4y { DefinedOperandType::R4, DefinedOperandSize::Y } +#define OPI_R4z { DefinedOperandType::R4, DefinedOperandSize::Z } +#define OPI_R5b { DefinedOperandType::R5, DefinedOperandSize::B } +#define OPI_R5v { DefinedOperandType::R5, DefinedOperandSize::V } +#define OPI_R5w { DefinedOperandType::R5, DefinedOperandSize::W } +#define OPI_R5y { DefinedOperandType::R5, DefinedOperandSize::Y } +#define OPI_R5z { DefinedOperandType::R5, DefinedOperandSize::Z } +#define OPI_R6b { DefinedOperandType::R6, DefinedOperandSize::B } +#define OPI_R6v { DefinedOperandType::R6, DefinedOperandSize::V } +#define OPI_R6w { DefinedOperandType::R6, DefinedOperandSize::W } +#define OPI_R6y { DefinedOperandType::R6, DefinedOperandSize::Y } +#define OPI_R6z { DefinedOperandType::R6, DefinedOperandSize::Z } +#define OPI_R7b { DefinedOperandType::R7, DefinedOperandSize::B } +#define OPI_R7v { DefinedOperandType::R7, DefinedOperandSize::V } +#define OPI_R7w { DefinedOperandType::R7, DefinedOperandSize::W } +#define OPI_R7y { DefinedOperandType::R7, DefinedOperandSize::Y } +#define OPI_R7z { DefinedOperandType::R7, DefinedOperandSize::Z } +#define OPI_S { DefinedOperandType::S, DefinedOperandSize::W } +#define OPI_SS { DefinedOperandType::SS, DefinedOperandSize::NA } +#define OPI_ST0 { DefinedOperandType::ST0, DefinedOperandSize::NA } +#define OPI_ST1 { DefinedOperandType::ST1, DefinedOperandSize::NA } +#define OPI_ST2 { DefinedOperandType::ST2, DefinedOperandSize::NA } +#define OPI_ST3 { DefinedOperandType::ST3, DefinedOperandSize::NA } +#define OPI_ST4 { DefinedOperandType::ST4, DefinedOperandSize::NA } +#define OPI_ST5 { DefinedOperandType::ST5, DefinedOperandSize::NA } +#define OPI_ST6 { DefinedOperandType::ST6, DefinedOperandSize::NA } +#define OPI_ST7 { DefinedOperandType::ST7, DefinedOperandSize::NA } +#define OPI_U { DefinedOperandType::U, DefinedOperandSize::O } +#define OPI_Ux { DefinedOperandType::U, DefinedOperandSize::X } +#define OPI_V { DefinedOperandType::V, DefinedOperandSize::DQ } +#define OPI_Vdq { DefinedOperandType::V, DefinedOperandSize::DQ } +#define OPI_Vqq { DefinedOperandType::V, DefinedOperandSize::QQ } +#define OPI_Vsd { DefinedOperandType::V, DefinedOperandSize::Q } +#define OPI_Vx { DefinedOperandType::V, DefinedOperandSize::X } +#define OPI_W { DefinedOperandType::W, DefinedOperandSize::DQ } +#define OPI_Wdq { DefinedOperandType::W, DefinedOperandSize::DQ } +#define OPI_Wqq { DefinedOperandType::W, DefinedOperandSize::QQ } +#define OPI_Wsd { DefinedOperandType::W, DefinedOperandSize::Q } +#define OPI_Wx { DefinedOperandType::W, DefinedOperandSize::X } +#define OPI_eAX { DefinedOperandType::EAX, DefinedOperandSize::Z } +#define OPI_eCX { DefinedOperandType::ECX, DefinedOperandSize::Z } +#define OPI_eDX { DefinedOperandType::EDX, DefinedOperandSize::Z } +#define OPI_rAX { DefinedOperandType::RAX, DefinedOperandSize::V } +#define OPI_rCX { DefinedOperandType::RCX, DefinedOperandSize::V } +#define OPI_rDX { DefinedOperandType::RDX, DefinedOperandSize::V } +#define OPI_sIb { DefinedOperandType::sI, DefinedOperandSize::B } +#define OPI_sIz { DefinedOperandType::sI, DefinedOperandSize::Z } + +const InstructionDefinition instrDefinitions[] = +{ + /* 000 */ { InstructionMnemonic::INVALID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 001 */ { InstructionMnemonic::AAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 002 */ { InstructionMnemonic::AAD, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 003 */ { InstructionMnemonic::AAM, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 004 */ { InstructionMnemonic::AAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 005 */ { InstructionMnemonic::ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 006 */ { InstructionMnemonic::ADC, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 007 */ { InstructionMnemonic::ADC, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 008 */ { InstructionMnemonic::ADC, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 009 */ { InstructionMnemonic::ADC, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00A */ { InstructionMnemonic::ADC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00B */ { InstructionMnemonic::ADC, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00C */ { InstructionMnemonic::ADC, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00D */ { InstructionMnemonic::ADC, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 00E */ { InstructionMnemonic::ADC, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 00F */ { InstructionMnemonic::ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 010 */ { InstructionMnemonic::ADD, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 011 */ { InstructionMnemonic::ADD, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 012 */ { InstructionMnemonic::ADD, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 013 */ { InstructionMnemonic::ADD, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 014 */ { InstructionMnemonic::ADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 015 */ { InstructionMnemonic::ADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 016 */ { InstructionMnemonic::ADD, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 017 */ { InstructionMnemonic::ADD, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 018 */ { InstructionMnemonic::ADD, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 019 */ { InstructionMnemonic::ADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01A */ { InstructionMnemonic::ADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01B */ { InstructionMnemonic::ADDSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01C */ { InstructionMnemonic::ADDSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01D */ { InstructionMnemonic::ADDSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01E */ { InstructionMnemonic::ADDSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 01F */ { InstructionMnemonic::AESDEC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 020 */ { InstructionMnemonic::AESDECLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 021 */ { InstructionMnemonic::AESENC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 022 */ { InstructionMnemonic::AESENCLAST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 023 */ { InstructionMnemonic::AESIMC, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 024 */ { InstructionMnemonic::AESKEYGENASSIST, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 025 */ { InstructionMnemonic::AND, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 026 */ { InstructionMnemonic::AND, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 027 */ { InstructionMnemonic::AND, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 028 */ { InstructionMnemonic::AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 029 */ { InstructionMnemonic::AND, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 02A */ { InstructionMnemonic::AND, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 02B */ { InstructionMnemonic::AND, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 02C */ { InstructionMnemonic::AND, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 02D */ { InstructionMnemonic::AND, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 02E */ { InstructionMnemonic::AND, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 02F */ { InstructionMnemonic::ANDNPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 030 */ { InstructionMnemonic::ANDNPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 031 */ { InstructionMnemonic::ANDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 032 */ { InstructionMnemonic::ANDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 033 */ { InstructionMnemonic::ARPL, { OPI_Ew, OPI_Gw, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 034 */ { InstructionMnemonic::BLENDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 035 */ { InstructionMnemonic::BLENDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 036 */ { InstructionMnemonic::BLENDVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 037 */ { InstructionMnemonic::BLENDVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 038 */ { InstructionMnemonic::BOUND, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 039 */ { InstructionMnemonic::BSF, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 03A */ { InstructionMnemonic::BSR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 03B */ { InstructionMnemonic::BSWAP, { OPI_R5y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03C */ { InstructionMnemonic::BSWAP, { OPI_R3y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03D */ { InstructionMnemonic::BSWAP, { OPI_R1y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03E */ { InstructionMnemonic::BSWAP, { OPI_R4y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 03F */ { InstructionMnemonic::BSWAP, { OPI_R0y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 040 */ { InstructionMnemonic::BSWAP, { OPI_R2y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 041 */ { InstructionMnemonic::BSWAP, { OPI_R7y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 042 */ { InstructionMnemonic::BSWAP, { OPI_R6y, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 043 */ { InstructionMnemonic::BT, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 044 */ { InstructionMnemonic::BT, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 045 */ { InstructionMnemonic::BTC, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 046 */ { InstructionMnemonic::BTC, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 047 */ { InstructionMnemonic::BTR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 048 */ { InstructionMnemonic::BTR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 049 */ { InstructionMnemonic::BTS, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 04A */ { InstructionMnemonic::BTS, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 04B */ { InstructionMnemonic::CALL, { OPI_Eq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 04C */ { InstructionMnemonic::CALL, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 04D */ { InstructionMnemonic::CALL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 04E */ { InstructionMnemonic::CALL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 04F */ { InstructionMnemonic::CALL, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 050 */ { InstructionMnemonic::CBW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 051 */ { InstructionMnemonic::CDQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 052 */ { InstructionMnemonic::CDQE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 053 */ { InstructionMnemonic::CLC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 054 */ { InstructionMnemonic::CLD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 055 */ { InstructionMnemonic::CLFLUSH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 056 */ { InstructionMnemonic::CLGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 057 */ { InstructionMnemonic::CLI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 058 */ { InstructionMnemonic::CLTS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 059 */ { InstructionMnemonic::CMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 05A */ { InstructionMnemonic::CMOVA, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05B */ { InstructionMnemonic::CMOVAE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05C */ { InstructionMnemonic::CMOVB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05D */ { InstructionMnemonic::CMOVBE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05E */ { InstructionMnemonic::CMOVE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 05F */ { InstructionMnemonic::CMOVG, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 060 */ { InstructionMnemonic::CMOVGE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 061 */ { InstructionMnemonic::CMOVL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 062 */ { InstructionMnemonic::CMOVLE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 063 */ { InstructionMnemonic::CMOVNE, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 064 */ { InstructionMnemonic::CMOVNO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 065 */ { InstructionMnemonic::CMOVNP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 066 */ { InstructionMnemonic::CMOVNS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 067 */ { InstructionMnemonic::CMOVO, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 068 */ { InstructionMnemonic::CMOVP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 069 */ { InstructionMnemonic::CMOVS, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 06A */ { InstructionMnemonic::CMP, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06B */ { InstructionMnemonic::CMP, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06C */ { InstructionMnemonic::CMP, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06D */ { InstructionMnemonic::CMP, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06E */ { InstructionMnemonic::CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 06F */ { InstructionMnemonic::CMP, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 070 */ { InstructionMnemonic::CMP, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 }, + /* 071 */ { InstructionMnemonic::CMP, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 072 */ { InstructionMnemonic::CMP, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 073 */ { InstructionMnemonic::CMP, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 }, + /* 074 */ { InstructionMnemonic::CMPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 075 */ { InstructionMnemonic::CMPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 076 */ { InstructionMnemonic::CMPSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 077 */ { InstructionMnemonic::CMPSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 078 */ { InstructionMnemonic::CMPSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 079 */ { InstructionMnemonic::CMPSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 07A */ { InstructionMnemonic::CMPSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07B */ { InstructionMnemonic::CMPSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 07C */ { InstructionMnemonic::CMPXCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07D */ { InstructionMnemonic::CMPXCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07E */ { InstructionMnemonic::CMPXCHG16B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 07F */ { InstructionMnemonic::CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 080 */ { InstructionMnemonic::CMPXCHG8B, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 081 */ { InstructionMnemonic::COMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 082 */ { InstructionMnemonic::COMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 083 */ { InstructionMnemonic::CPUID, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 084 */ { InstructionMnemonic::CQO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 085 */ { InstructionMnemonic::CRC32, { OPI_Gy, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 086 */ { InstructionMnemonic::CRC32, { OPI_Gy, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 087 */ { InstructionMnemonic::CVTDQ2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 088 */ { InstructionMnemonic::CVTDQ2PS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 089 */ { InstructionMnemonic::CVTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08A */ { InstructionMnemonic::CVTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08B */ { InstructionMnemonic::CVTPD2PS, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08C */ { InstructionMnemonic::CVTPI2PD, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08D */ { InstructionMnemonic::CVTPI2PS, { OPI_V, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08E */ { InstructionMnemonic::CVTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 08F */ { InstructionMnemonic::CVTPS2PD, { OPI_V, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 090 */ { InstructionMnemonic::CVTPS2PI, { OPI_P, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 091 */ { InstructionMnemonic::CVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 092 */ { InstructionMnemonic::CVTSD2SS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 093 */ { InstructionMnemonic::CVTSI2SD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 094 */ { InstructionMnemonic::CVTSI2SS, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 095 */ { InstructionMnemonic::CVTSS2SD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 096 */ { InstructionMnemonic::CVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 097 */ { InstructionMnemonic::CVTTPD2DQ, { OPI_Vdq, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 098 */ { InstructionMnemonic::CVTTPD2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 099 */ { InstructionMnemonic::CVTTPS2DQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09A */ { InstructionMnemonic::CVTTPS2PI, { OPI_P, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09B */ { InstructionMnemonic::CVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09C */ { InstructionMnemonic::CVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 09D */ { InstructionMnemonic::CWD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 09E */ { InstructionMnemonic::CWDE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 09F */ { InstructionMnemonic::DAA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 0A0 */ { InstructionMnemonic::DAS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 0A1 */ { InstructionMnemonic::DEC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A2 */ { InstructionMnemonic::DEC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A3 */ { InstructionMnemonic::DEC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A4 */ { InstructionMnemonic::DEC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0A5 */ { InstructionMnemonic::DEC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0A6 */ { InstructionMnemonic::DEC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A7 */ { InstructionMnemonic::DEC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A8 */ { InstructionMnemonic::DEC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0A9 */ { InstructionMnemonic::DEC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0AA */ { InstructionMnemonic::DEC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 0AB */ { InstructionMnemonic::DIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 0AC */ { InstructionMnemonic::DIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 0AD */ { InstructionMnemonic::DIVPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0AE */ { InstructionMnemonic::DIVPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0AF */ { InstructionMnemonic::DIVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B0 */ { InstructionMnemonic::DIVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B1 */ { InstructionMnemonic::DPPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B2 */ { InstructionMnemonic::DPPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 0B3 */ { InstructionMnemonic::EMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0B4 */ { InstructionMnemonic::ENTER, { OPI_Iw, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 }, + /* 0B5 */ { InstructionMnemonic::EXTRACTPS, { OPI_MdRy, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 0B6 */ { InstructionMnemonic::F2XM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0B7 */ { InstructionMnemonic::FABS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0B8 */ { InstructionMnemonic::FADD, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0B9 */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BA */ { InstructionMnemonic::FADD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0BB */ { InstructionMnemonic::FADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0BC */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BD */ { InstructionMnemonic::FADD, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BE */ { InstructionMnemonic::FADD, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0BF */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0C0 */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0C1 */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0C2 */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0C3 */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0C4 */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0C5 */ { InstructionMnemonic::FADD, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0C6 */ { InstructionMnemonic::FADD, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0C7 */ { InstructionMnemonic::FADD, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0C8 */ { InstructionMnemonic::FADD, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0C9 */ { InstructionMnemonic::FADD, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CA */ { InstructionMnemonic::FADDP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CB */ { InstructionMnemonic::FADDP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CC */ { InstructionMnemonic::FADDP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CD */ { InstructionMnemonic::FADDP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CE */ { InstructionMnemonic::FADDP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0CF */ { InstructionMnemonic::FADDP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0D0 */ { InstructionMnemonic::FADDP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0D1 */ { InstructionMnemonic::FADDP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0D2 */ { InstructionMnemonic::FBLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0D3 */ { InstructionMnemonic::FBSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 0D4 */ { InstructionMnemonic::FCHS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0D5 */ { InstructionMnemonic::FCLEX, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 0D6 */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0D7 */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0D8 */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0D9 */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0DA */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0DB */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0DC */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0DD */ { InstructionMnemonic::FCMOVB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0DE */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0DF */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0E0 */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0E1 */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0E2 */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0E3 */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0E4 */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0E5 */ { InstructionMnemonic::FCMOVBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0E6 */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0E7 */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0E8 */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0E9 */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0EA */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0EB */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0EC */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0ED */ { InstructionMnemonic::FCMOVE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0EE */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0EF */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0F0 */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0F1 */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0F2 */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0F3 */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0F4 */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0F5 */ { InstructionMnemonic::FCMOVNB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0F6 */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 0F7 */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 0F8 */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 0F9 */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 0FA */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 0FB */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 0FC */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 0FD */ { InstructionMnemonic::FCMOVNBE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0FE */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 0FF */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 100 */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 101 */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 102 */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 103 */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 104 */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 105 */ { InstructionMnemonic::FCMOVNE, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 106 */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 107 */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 108 */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 109 */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 10A */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 10B */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 10C */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 10D */ { InstructionMnemonic::FCMOVNU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 10E */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 10F */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 110 */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 111 */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 112 */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 113 */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 114 */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 115 */ { InstructionMnemonic::FCMOVU, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 116 */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 117 */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 118 */ { InstructionMnemonic::FCOM, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 119 */ { InstructionMnemonic::FCOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 11A */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 11B */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 11C */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 11D */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 11E */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 11F */ { InstructionMnemonic::FCOM, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 120 */ { InstructionMnemonic::FCOM2, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 121 */ { InstructionMnemonic::FCOM2, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 122 */ { InstructionMnemonic::FCOM2, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 123 */ { InstructionMnemonic::FCOM2, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 124 */ { InstructionMnemonic::FCOM2, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 125 */ { InstructionMnemonic::FCOM2, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 126 */ { InstructionMnemonic::FCOM2, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 127 */ { InstructionMnemonic::FCOM2, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 128 */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 129 */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 12A */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 12B */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 12C */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 12D */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 12E */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 12F */ { InstructionMnemonic::FCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 130 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 131 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 132 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 133 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 134 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 135 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 136 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 137 */ { InstructionMnemonic::FCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 138 */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 139 */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 13A */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 13B */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 13C */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 13D */ { InstructionMnemonic::FCOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 13E */ { InstructionMnemonic::FCOMP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 13F */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 140 */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 141 */ { InstructionMnemonic::FCOMP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 142 */ { InstructionMnemonic::FCOMP3, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 143 */ { InstructionMnemonic::FCOMP3, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 144 */ { InstructionMnemonic::FCOMP3, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 145 */ { InstructionMnemonic::FCOMP3, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 146 */ { InstructionMnemonic::FCOMP3, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 147 */ { InstructionMnemonic::FCOMP3, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 148 */ { InstructionMnemonic::FCOMP3, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 149 */ { InstructionMnemonic::FCOMP3, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14A */ { InstructionMnemonic::FCOMP5, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14B */ { InstructionMnemonic::FCOMP5, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14C */ { InstructionMnemonic::FCOMP5, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14D */ { InstructionMnemonic::FCOMP5, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14E */ { InstructionMnemonic::FCOMP5, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 14F */ { InstructionMnemonic::FCOMP5, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 150 */ { InstructionMnemonic::FCOMP5, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 151 */ { InstructionMnemonic::FCOMP5, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 152 */ { InstructionMnemonic::FCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 153 */ { InstructionMnemonic::FCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 154 */ { InstructionMnemonic::FDECSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 155 */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 156 */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 157 */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 158 */ { InstructionMnemonic::FDIV, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 159 */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 15A */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 15B */ { InstructionMnemonic::FDIV, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15C */ { InstructionMnemonic::FDIV, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15D */ { InstructionMnemonic::FDIV, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15E */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 15F */ { InstructionMnemonic::FDIV, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 160 */ { InstructionMnemonic::FDIV, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 161 */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 162 */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 163 */ { InstructionMnemonic::FDIV, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 164 */ { InstructionMnemonic::FDIV, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 165 */ { InstructionMnemonic::FDIV, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 166 */ { InstructionMnemonic::FDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 167 */ { InstructionMnemonic::FDIVP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 168 */ { InstructionMnemonic::FDIVP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 169 */ { InstructionMnemonic::FDIVP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16A */ { InstructionMnemonic::FDIVP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16B */ { InstructionMnemonic::FDIVP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16C */ { InstructionMnemonic::FDIVP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16D */ { InstructionMnemonic::FDIVP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16E */ { InstructionMnemonic::FDIVP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 16F */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 170 */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 171 */ { InstructionMnemonic::FDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 172 */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 173 */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 174 */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 175 */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 176 */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 177 */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 178 */ { InstructionMnemonic::FDIVR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 179 */ { InstructionMnemonic::FDIVR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17A */ { InstructionMnemonic::FDIVR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 17B */ { InstructionMnemonic::FDIVR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17C */ { InstructionMnemonic::FDIVR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17D */ { InstructionMnemonic::FDIVR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17E */ { InstructionMnemonic::FDIVR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 17F */ { InstructionMnemonic::FDIVR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 180 */ { InstructionMnemonic::FDIVR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 181 */ { InstructionMnemonic::FDIVRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 182 */ { InstructionMnemonic::FDIVRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 183 */ { InstructionMnemonic::FDIVRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 184 */ { InstructionMnemonic::FDIVRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 185 */ { InstructionMnemonic::FDIVRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 186 */ { InstructionMnemonic::FDIVRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 187 */ { InstructionMnemonic::FDIVRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 188 */ { InstructionMnemonic::FDIVRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 189 */ { InstructionMnemonic::FEMMS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18A */ { InstructionMnemonic::FFREE, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18B */ { InstructionMnemonic::FFREE, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18C */ { InstructionMnemonic::FFREE, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18D */ { InstructionMnemonic::FFREE, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18E */ { InstructionMnemonic::FFREE, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 18F */ { InstructionMnemonic::FFREE, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 190 */ { InstructionMnemonic::FFREE, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 191 */ { InstructionMnemonic::FFREE, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 192 */ { InstructionMnemonic::FFREEP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 193 */ { InstructionMnemonic::FFREEP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 194 */ { InstructionMnemonic::FFREEP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 195 */ { InstructionMnemonic::FFREEP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 196 */ { InstructionMnemonic::FFREEP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 197 */ { InstructionMnemonic::FFREEP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 198 */ { InstructionMnemonic::FFREEP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 199 */ { InstructionMnemonic::FFREEP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 19A */ { InstructionMnemonic::FIADD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19B */ { InstructionMnemonic::FIADD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19C */ { InstructionMnemonic::FICOM, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19D */ { InstructionMnemonic::FICOM, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19E */ { InstructionMnemonic::FICOMP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 19F */ { InstructionMnemonic::FICOMP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A0 */ { InstructionMnemonic::FIDIV, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A1 */ { InstructionMnemonic::FIDIV, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A2 */ { InstructionMnemonic::FIDIVR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A3 */ { InstructionMnemonic::FIDIVR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A4 */ { InstructionMnemonic::FILD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A5 */ { InstructionMnemonic::FILD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A6 */ { InstructionMnemonic::FILD, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A7 */ { InstructionMnemonic::FIMUL, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A8 */ { InstructionMnemonic::FIMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1A9 */ { InstructionMnemonic::FINCSTP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1AA */ { InstructionMnemonic::FIST, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AB */ { InstructionMnemonic::FIST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AC */ { InstructionMnemonic::FISTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AD */ { InstructionMnemonic::FISTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AE */ { InstructionMnemonic::FISTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1AF */ { InstructionMnemonic::FISTTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B0 */ { InstructionMnemonic::FISTTP, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B1 */ { InstructionMnemonic::FISTTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B2 */ { InstructionMnemonic::FISUB, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B3 */ { InstructionMnemonic::FISUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B4 */ { InstructionMnemonic::FISUBR, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B5 */ { InstructionMnemonic::FISUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1B6 */ { InstructionMnemonic::FLD, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1B7 */ { InstructionMnemonic::FLD, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1B8 */ { InstructionMnemonic::FLD, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1B9 */ { InstructionMnemonic::FLD, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1BA */ { InstructionMnemonic::FLD, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1BB */ { InstructionMnemonic::FLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1BC */ { InstructionMnemonic::FLD, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1BD */ { InstructionMnemonic::FLD, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1BE */ { InstructionMnemonic::FLD, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1BF */ { InstructionMnemonic::FLD, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C0 */ { InstructionMnemonic::FLD, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C1 */ { InstructionMnemonic::FLD1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C2 */ { InstructionMnemonic::FLDCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1C3 */ { InstructionMnemonic::FLDENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1C4 */ { InstructionMnemonic::FLDL2E, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C5 */ { InstructionMnemonic::FLDL2T, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C6 */ { InstructionMnemonic::FLDLG2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C7 */ { InstructionMnemonic::FLDLN2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C8 */ { InstructionMnemonic::FLDPI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1C9 */ { InstructionMnemonic::FLDZ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1CA */ { InstructionMnemonic::FMUL, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CB */ { InstructionMnemonic::FMUL, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CC */ { InstructionMnemonic::FMUL, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CD */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 1CE */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1CF */ { InstructionMnemonic::FMUL, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1D0 */ { InstructionMnemonic::FMUL, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D1 */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D2 */ { InstructionMnemonic::FMUL, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1D3 */ { InstructionMnemonic::FMUL, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D4 */ { InstructionMnemonic::FMUL, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D5 */ { InstructionMnemonic::FMUL, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1D6 */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 1D7 */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 1D8 */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 1D9 */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 1DA */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 1DB */ { InstructionMnemonic::FMUL, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 1DC */ { InstructionMnemonic::FMULP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1DD */ { InstructionMnemonic::FMULP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1DE */ { InstructionMnemonic::FMULP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1DF */ { InstructionMnemonic::FMULP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E0 */ { InstructionMnemonic::FMULP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E1 */ { InstructionMnemonic::FMULP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E2 */ { InstructionMnemonic::FMULP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E3 */ { InstructionMnemonic::FMULP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 1E4 */ { InstructionMnemonic::FNDISI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E5 */ { InstructionMnemonic::FNENI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E6 */ { InstructionMnemonic::FNINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E7 */ { InstructionMnemonic::FNOP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1E8 */ { InstructionMnemonic::FNSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1E9 */ { InstructionMnemonic::FNSETPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1EA */ { InstructionMnemonic::FNSTCW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1EB */ { InstructionMnemonic::FNSTENV, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1EC */ { InstructionMnemonic::FNSTSW, { OPI_AX, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1ED */ { InstructionMnemonic::FNSTSW, { OPI_Mw, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1EE */ { InstructionMnemonic::FPATAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1EF */ { InstructionMnemonic::FPREM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F0 */ { InstructionMnemonic::FPREM1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F1 */ { InstructionMnemonic::FPTAN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F2 */ { InstructionMnemonic::FRNDINT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F3 */ { InstructionMnemonic::FRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1F4 */ { InstructionMnemonic::FRSTPM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F5 */ { InstructionMnemonic::FSCALE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F6 */ { InstructionMnemonic::FSIN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F7 */ { InstructionMnemonic::FSINCOS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F8 */ { InstructionMnemonic::FSQRT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1F9 */ { InstructionMnemonic::FST, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FA */ { InstructionMnemonic::FST, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FB */ { InstructionMnemonic::FST, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FC */ { InstructionMnemonic::FST, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FD */ { InstructionMnemonic::FST, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 1FE */ { InstructionMnemonic::FST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 1FF */ { InstructionMnemonic::FST, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 200 */ { InstructionMnemonic::FST, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 201 */ { InstructionMnemonic::FST, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 202 */ { InstructionMnemonic::FST, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 203 */ { InstructionMnemonic::FSTP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 204 */ { InstructionMnemonic::FSTP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 205 */ { InstructionMnemonic::FSTP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 206 */ { InstructionMnemonic::FSTP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 207 */ { InstructionMnemonic::FSTP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 208 */ { InstructionMnemonic::FSTP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 209 */ { InstructionMnemonic::FSTP, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 20A */ { InstructionMnemonic::FSTP, { OPI_Mt, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 20B */ { InstructionMnemonic::FSTP, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 20C */ { InstructionMnemonic::FSTP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 20D */ { InstructionMnemonic::FSTP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 20E */ { InstructionMnemonic::FSTP1, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 20F */ { InstructionMnemonic::FSTP1, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 210 */ { InstructionMnemonic::FSTP1, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 211 */ { InstructionMnemonic::FSTP1, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 212 */ { InstructionMnemonic::FSTP1, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 213 */ { InstructionMnemonic::FSTP1, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 214 */ { InstructionMnemonic::FSTP1, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 215 */ { InstructionMnemonic::FSTP1, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 216 */ { InstructionMnemonic::FSTP8, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 217 */ { InstructionMnemonic::FSTP8, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 218 */ { InstructionMnemonic::FSTP8, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 219 */ { InstructionMnemonic::FSTP8, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21A */ { InstructionMnemonic::FSTP8, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21B */ { InstructionMnemonic::FSTP8, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21C */ { InstructionMnemonic::FSTP8, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21D */ { InstructionMnemonic::FSTP8, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21E */ { InstructionMnemonic::FSTP9, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 21F */ { InstructionMnemonic::FSTP9, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 220 */ { InstructionMnemonic::FSTP9, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 221 */ { InstructionMnemonic::FSTP9, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 222 */ { InstructionMnemonic::FSTP9, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 223 */ { InstructionMnemonic::FSTP9, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 224 */ { InstructionMnemonic::FSTP9, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 225 */ { InstructionMnemonic::FSTP9, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 226 */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 227 */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 228 */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 229 */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 22A */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 22B */ { InstructionMnemonic::FSUB, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 22C */ { InstructionMnemonic::FSUB, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 22D */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 22E */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 22F */ { InstructionMnemonic::FSUB, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 230 */ { InstructionMnemonic::FSUB, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 231 */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 232 */ { InstructionMnemonic::FSUB, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 233 */ { InstructionMnemonic::FSUB, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 234 */ { InstructionMnemonic::FSUB, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 235 */ { InstructionMnemonic::FSUB, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 236 */ { InstructionMnemonic::FSUB, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 237 */ { InstructionMnemonic::FSUB, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 238 */ { InstructionMnemonic::FSUBP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 239 */ { InstructionMnemonic::FSUBP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23A */ { InstructionMnemonic::FSUBP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23B */ { InstructionMnemonic::FSUBP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23C */ { InstructionMnemonic::FSUBP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23D */ { InstructionMnemonic::FSUBP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23E */ { InstructionMnemonic::FSUBP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 23F */ { InstructionMnemonic::FSUBP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 240 */ { InstructionMnemonic::FSUBR, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 241 */ { InstructionMnemonic::FSUBR, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 242 */ { InstructionMnemonic::FSUBR, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 243 */ { InstructionMnemonic::FSUBR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 244 */ { InstructionMnemonic::FSUBR, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 245 */ { InstructionMnemonic::FSUBR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 246 */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 247 */ { InstructionMnemonic::FSUBR, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 248 */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 249 */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 24A */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 24B */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 24C */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 24D */ { InstructionMnemonic::FSUBR, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 24E */ { InstructionMnemonic::FSUBR, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 24F */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 250 */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 251 */ { InstructionMnemonic::FSUBR, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 252 */ { InstructionMnemonic::FSUBRP, { OPI_ST5, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 253 */ { InstructionMnemonic::FSUBRP, { OPI_ST4, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 254 */ { InstructionMnemonic::FSUBRP, { OPI_ST7, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 255 */ { InstructionMnemonic::FSUBRP, { OPI_ST6, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 256 */ { InstructionMnemonic::FSUBRP, { OPI_ST2, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 257 */ { InstructionMnemonic::FSUBRP, { OPI_ST3, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 258 */ { InstructionMnemonic::FSUBRP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 259 */ { InstructionMnemonic::FSUBRP, { OPI_ST1, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 25A */ { InstructionMnemonic::FTST, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25B */ { InstructionMnemonic::FUCOM, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25C */ { InstructionMnemonic::FUCOM, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25D */ { InstructionMnemonic::FUCOM, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25E */ { InstructionMnemonic::FUCOM, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 25F */ { InstructionMnemonic::FUCOM, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 260 */ { InstructionMnemonic::FUCOM, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 261 */ { InstructionMnemonic::FUCOM, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 262 */ { InstructionMnemonic::FUCOM, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 263 */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 264 */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 265 */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 266 */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 267 */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 268 */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 269 */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 26A */ { InstructionMnemonic::FUCOMI, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 26B */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 26C */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 26D */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 26E */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 26F */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 270 */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 271 */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 272 */ { InstructionMnemonic::FUCOMIP, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 273 */ { InstructionMnemonic::FUCOMP, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 274 */ { InstructionMnemonic::FUCOMP, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 275 */ { InstructionMnemonic::FUCOMP, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 276 */ { InstructionMnemonic::FUCOMP, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 277 */ { InstructionMnemonic::FUCOMP, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 278 */ { InstructionMnemonic::FUCOMP, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 279 */ { InstructionMnemonic::FUCOMP, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27A */ { InstructionMnemonic::FUCOMP, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27B */ { InstructionMnemonic::FUCOMPP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27C */ { InstructionMnemonic::FXAM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 27D */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST4, OPI_NONE, OPI_NONE }, 0 }, + /* 27E */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST5, OPI_NONE, OPI_NONE }, 0 }, + /* 27F */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST6, OPI_NONE, OPI_NONE }, 0 }, + /* 280 */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST3, OPI_NONE, OPI_NONE }, 0 }, + /* 281 */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST0, OPI_NONE, OPI_NONE }, 0 }, + /* 282 */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST1, OPI_NONE, OPI_NONE }, 0 }, + /* 283 */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST2, OPI_NONE, OPI_NONE }, 0 }, + /* 284 */ { InstructionMnemonic::FXCH, { OPI_ST0, OPI_ST7, OPI_NONE, OPI_NONE }, 0 }, + /* 285 */ { InstructionMnemonic::FXCH4, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 286 */ { InstructionMnemonic::FXCH4, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 287 */ { InstructionMnemonic::FXCH4, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 288 */ { InstructionMnemonic::FXCH4, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 289 */ { InstructionMnemonic::FXCH4, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28A */ { InstructionMnemonic::FXCH4, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28B */ { InstructionMnemonic::FXCH4, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28C */ { InstructionMnemonic::FXCH4, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28D */ { InstructionMnemonic::FXCH7, { OPI_ST2, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28E */ { InstructionMnemonic::FXCH7, { OPI_ST3, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 28F */ { InstructionMnemonic::FXCH7, { OPI_ST0, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 290 */ { InstructionMnemonic::FXCH7, { OPI_ST1, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 291 */ { InstructionMnemonic::FXCH7, { OPI_ST6, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 292 */ { InstructionMnemonic::FXCH7, { OPI_ST7, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 293 */ { InstructionMnemonic::FXCH7, { OPI_ST4, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 294 */ { InstructionMnemonic::FXCH7, { OPI_ST5, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 295 */ { InstructionMnemonic::FXRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 296 */ { InstructionMnemonic::FXSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 297 */ { InstructionMnemonic::FXTRACT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 298 */ { InstructionMnemonic::FYL2X, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 299 */ { InstructionMnemonic::FYL2XP1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 29A */ { InstructionMnemonic::GETSEC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 29B */ { InstructionMnemonic::HADDPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 29C */ { InstructionMnemonic::HADDPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 29D */ { InstructionMnemonic::HLT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 29E */ { InstructionMnemonic::HSUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 29F */ { InstructionMnemonic::HSUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A0 */ { InstructionMnemonic::IDIV, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2A1 */ { InstructionMnemonic::IDIV, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2A2 */ { InstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A3 */ { InstructionMnemonic::IMUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A4 */ { InstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_Iz, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A5 */ { InstructionMnemonic::IMUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A6 */ { InstructionMnemonic::IMUL, { OPI_Gv, OPI_Ev, OPI_sIb, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2A7 */ { InstructionMnemonic::IN, { OPI_AL, OPI_DX, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 2A8 */ { InstructionMnemonic::IN, { OPI_eAX, OPI_DX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2A9 */ { InstructionMnemonic::IN, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 2AA */ { InstructionMnemonic::IN, { OPI_eAX, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2AB */ { InstructionMnemonic::INC, { OPI_R0z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AC */ { InstructionMnemonic::INC, { OPI_R1z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AD */ { InstructionMnemonic::INC, { OPI_R7z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AE */ { InstructionMnemonic::INC, { OPI_R6z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2AF */ { InstructionMnemonic::INC, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2B0 */ { InstructionMnemonic::INC, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 2B1 */ { InstructionMnemonic::INC, { OPI_R3z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B2 */ { InstructionMnemonic::INC, { OPI_R2z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B3 */ { InstructionMnemonic::INC, { OPI_R4z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B4 */ { InstructionMnemonic::INC, { OPI_R5z, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_READWRITE }, + /* 2B5 */ { InstructionMnemonic::INSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 2B6 */ { InstructionMnemonic::INSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 2B7 */ { InstructionMnemonic::INSERTPS, { OPI_V, OPI_Md, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2B8 */ { InstructionMnemonic::INSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 2B9 */ { InstructionMnemonic::INT, { OPI_Ib, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BA */ { InstructionMnemonic::INT1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BB */ { InstructionMnemonic::INT3, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BC */ { InstructionMnemonic::INTO, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 2BD */ { InstructionMnemonic::INVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2BE */ { InstructionMnemonic::INVEPT, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2BF */ { InstructionMnemonic::INVEPT, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2C0 */ { InstructionMnemonic::INVLPG, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2C1 */ { InstructionMnemonic::INVLPGA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2C2 */ { InstructionMnemonic::INVVPID, { OPI_Gq, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2C3 */ { InstructionMnemonic::INVVPID, { OPI_Gd, OPI_Mo, OPI_NONE, OPI_NONE }, 0 }, + /* 2C4 */ { InstructionMnemonic::IRETD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 2C5 */ { InstructionMnemonic::IRETQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 2C6 */ { InstructionMnemonic::IRETW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 2C7 */ { InstructionMnemonic::JA, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2C8 */ { InstructionMnemonic::JA, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2C9 */ { InstructionMnemonic::JB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2CA */ { InstructionMnemonic::JB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2CB */ { InstructionMnemonic::JBE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2CC */ { InstructionMnemonic::JBE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2CD */ { InstructionMnemonic::JCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, + /* 2CE */ { InstructionMnemonic::JE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2CF */ { InstructionMnemonic::JE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D0 */ { InstructionMnemonic::JECXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, + /* 2D1 */ { InstructionMnemonic::JG, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D2 */ { InstructionMnemonic::JG, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D3 */ { InstructionMnemonic::JGE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D4 */ { InstructionMnemonic::JGE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D5 */ { InstructionMnemonic::JL, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D6 */ { InstructionMnemonic::JL, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D7 */ { InstructionMnemonic::JLE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2D8 */ { InstructionMnemonic::JLE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2D9 */ { InstructionMnemonic::JMP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 2DA */ { InstructionMnemonic::JMP, { OPI_Fv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2DB */ { InstructionMnemonic::JMP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 2DC */ { InstructionMnemonic::JMP, { OPI_Av, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 2DD */ { InstructionMnemonic::JMP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_DEFAULT_64 }, + /* 2DE */ { InstructionMnemonic::JNB, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2DF */ { InstructionMnemonic::JNB, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E0 */ { InstructionMnemonic::JNE, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E1 */ { InstructionMnemonic::JNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E2 */ { InstructionMnemonic::JNO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E3 */ { InstructionMnemonic::JNO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E4 */ { InstructionMnemonic::JNP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E5 */ { InstructionMnemonic::JNP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E6 */ { InstructionMnemonic::JNS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E7 */ { InstructionMnemonic::JNS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2E8 */ { InstructionMnemonic::JO, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2E9 */ { InstructionMnemonic::JO, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2EA */ { InstructionMnemonic::JP, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2EB */ { InstructionMnemonic::JP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2EC */ { InstructionMnemonic::JRCXZ, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX }, + /* 2ED */ { InstructionMnemonic::JS, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2EE */ { InstructionMnemonic::JS, { OPI_Jz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 2EF */ { InstructionMnemonic::LAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2F0 */ { InstructionMnemonic::LAR, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F1 */ { InstructionMnemonic::LDDQU, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F2 */ { InstructionMnemonic::LDMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2F3 */ { InstructionMnemonic::LDS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2F4 */ { InstructionMnemonic::LEA, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F5 */ { InstructionMnemonic::LEAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2F6 */ { InstructionMnemonic::LES, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_OPERAND1_WRITE }, + /* 2F7 */ { InstructionMnemonic::LFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 2F8 */ { InstructionMnemonic::LFS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2F9 */ { InstructionMnemonic::LGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FA */ { InstructionMnemonic::LGS, { OPI_Gz, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 2FB */ { InstructionMnemonic::LIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FC */ { InstructionMnemonic::LLDT, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FD */ { InstructionMnemonic::LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FE */ { InstructionMnemonic::LMSW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 2FF */ { InstructionMnemonic::LOCK, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 300 */ { InstructionMnemonic::LODSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 301 */ { InstructionMnemonic::LODSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 302 */ { InstructionMnemonic::LODSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 303 */ { InstructionMnemonic::LODSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 304 */ { InstructionMnemonic::LOOP, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 305 */ { InstructionMnemonic::LOOPE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 306 */ { InstructionMnemonic::LOOPNE, { OPI_Jb, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 307 */ { InstructionMnemonic::LSL, { OPI_Gv, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 308 */ { InstructionMnemonic::LSS, { OPI_Gv, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 309 */ { InstructionMnemonic::LTR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 30A */ { InstructionMnemonic::MASKMOVDQU, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 30B */ { InstructionMnemonic::MASKMOVQ, { OPI_P, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 30C */ { InstructionMnemonic::MAXPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 30D */ { InstructionMnemonic::MAXPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 30E */ { InstructionMnemonic::MAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 30F */ { InstructionMnemonic::MAXSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 310 */ { InstructionMnemonic::MFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 311 */ { InstructionMnemonic::MINPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 312 */ { InstructionMnemonic::MINPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 313 */ { InstructionMnemonic::MINSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 314 */ { InstructionMnemonic::MINSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 315 */ { InstructionMnemonic::MONITOR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 316 */ { InstructionMnemonic::MONTMUL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 317 */ { InstructionMnemonic::MOV, { OPI_R0b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 318 */ { InstructionMnemonic::MOV, { OPI_R2b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 319 */ { InstructionMnemonic::MOV, { OPI_R3b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31A */ { InstructionMnemonic::MOV, { OPI_R1b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31B */ { InstructionMnemonic::MOV, { OPI_AL, OPI_Ob, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 31C */ { InstructionMnemonic::MOV, { OPI_S, OPI_MwRv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31D */ { InstructionMnemonic::MOV, { OPI_MwRv, OPI_S, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 31E */ { InstructionMnemonic::MOV, { OPI_Ov, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 31F */ { InstructionMnemonic::MOV, { OPI_Ob, OPI_AL, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 320 */ { InstructionMnemonic::MOV, { OPI_rAX, OPI_Ov, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 321 */ { InstructionMnemonic::MOV, { OPI_R4b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 322 */ { InstructionMnemonic::MOV, { OPI_R7v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 323 */ { InstructionMnemonic::MOV, { OPI_R6v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 324 */ { InstructionMnemonic::MOV, { OPI_R5v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 325 */ { InstructionMnemonic::MOV, { OPI_R, OPI_C, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 326 */ { InstructionMnemonic::MOV, { OPI_D, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 327 */ { InstructionMnemonic::MOV, { OPI_C, OPI_R, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 328 */ { InstructionMnemonic::MOV, { OPI_R, OPI_D, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 329 */ { InstructionMnemonic::MOV, { OPI_R4v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32A */ { InstructionMnemonic::MOV, { OPI_R7b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32B */ { InstructionMnemonic::MOV, { OPI_R6b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32C */ { InstructionMnemonic::MOV, { OPI_R5b, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32D */ { InstructionMnemonic::MOV, { OPI_R0v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32E */ { InstructionMnemonic::MOV, { OPI_R3v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 32F */ { InstructionMnemonic::MOV, { OPI_R2v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 330 */ { InstructionMnemonic::MOV, { OPI_R1v, OPI_Iv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 331 */ { InstructionMnemonic::MOV, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 332 */ { InstructionMnemonic::MOV, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 333 */ { InstructionMnemonic::MOV, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 334 */ { InstructionMnemonic::MOV, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 335 */ { InstructionMnemonic::MOV, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 336 */ { InstructionMnemonic::MOV, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 337 */ { InstructionMnemonic::MOVAPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 338 */ { InstructionMnemonic::MOVAPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 339 */ { InstructionMnemonic::MOVAPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33A */ { InstructionMnemonic::MOVAPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33B */ { InstructionMnemonic::MOVBE, { OPI_Gv, OPI_Mv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33C */ { InstructionMnemonic::MOVBE, { OPI_Mv, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33D */ { InstructionMnemonic::MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33E */ { InstructionMnemonic::MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 33F */ { InstructionMnemonic::MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 340 */ { InstructionMnemonic::MOVD, { OPI_Ey, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 341 */ { InstructionMnemonic::MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 342 */ { InstructionMnemonic::MOVD, { OPI_V, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 343 */ { InstructionMnemonic::MOVD, { OPI_P, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 344 */ { InstructionMnemonic::MOVD, { OPI_Ey, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 345 */ { InstructionMnemonic::MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 346 */ { InstructionMnemonic::MOVDDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 347 */ { InstructionMnemonic::MOVDQ2Q, { OPI_P, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 348 */ { InstructionMnemonic::MOVDQA, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 349 */ { InstructionMnemonic::MOVDQA, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34A */ { InstructionMnemonic::MOVDQU, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34B */ { InstructionMnemonic::MOVDQU, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34C */ { InstructionMnemonic::MOVHLPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34D */ { InstructionMnemonic::MOVHPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34E */ { InstructionMnemonic::MOVHPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 34F */ { InstructionMnemonic::MOVHPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 350 */ { InstructionMnemonic::MOVHPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 351 */ { InstructionMnemonic::MOVLHPS, { OPI_V, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 352 */ { InstructionMnemonic::MOVLPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 353 */ { InstructionMnemonic::MOVLPD, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 354 */ { InstructionMnemonic::MOVLPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 355 */ { InstructionMnemonic::MOVLPS, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 356 */ { InstructionMnemonic::MOVMSKPD, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 357 */ { InstructionMnemonic::MOVMSKPS, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 358 */ { InstructionMnemonic::MOVNTDQ, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 359 */ { InstructionMnemonic::MOVNTDQA, { OPI_V, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35A */ { InstructionMnemonic::MOVNTI, { OPI_M, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35B */ { InstructionMnemonic::MOVNTPD, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35C */ { InstructionMnemonic::MOVNTPS, { OPI_M, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35D */ { InstructionMnemonic::MOVNTQ, { OPI_M, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35E */ { InstructionMnemonic::MOVQ, { OPI_P, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 35F */ { InstructionMnemonic::MOVQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 360 */ { InstructionMnemonic::MOVQ, { OPI_Eq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 361 */ { InstructionMnemonic::MOVQ, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 362 */ { InstructionMnemonic::MOVQ, { OPI_Q, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 363 */ { InstructionMnemonic::MOVQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 364 */ { InstructionMnemonic::MOVQ, { OPI_V, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 365 */ { InstructionMnemonic::MOVQ, { OPI_Eq, OPI_P, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 366 */ { InstructionMnemonic::MOVQ2DQ, { OPI_V, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_OPERAND1_WRITE }, + /* 367 */ { InstructionMnemonic::MOVSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_OPERAND1_WRITE }, + /* 368 */ { InstructionMnemonic::MOVSD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 369 */ { InstructionMnemonic::MOVSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 36A */ { InstructionMnemonic::MOVSD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36B */ { InstructionMnemonic::MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36C */ { InstructionMnemonic::MOVSHDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36D */ { InstructionMnemonic::MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36E */ { InstructionMnemonic::MOVSLDUP, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 36F */ { InstructionMnemonic::MOVSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 370 */ { InstructionMnemonic::MOVSS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 371 */ { InstructionMnemonic::MOVSS, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 372 */ { InstructionMnemonic::MOVSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 373 */ { InstructionMnemonic::MOVSX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 374 */ { InstructionMnemonic::MOVSX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 375 */ { InstructionMnemonic::MOVSXD, { OPI_Gq, OPI_Ed, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 376 */ { InstructionMnemonic::MOVUPD, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 377 */ { InstructionMnemonic::MOVUPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 378 */ { InstructionMnemonic::MOVUPS, { OPI_W, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 379 */ { InstructionMnemonic::MOVUPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 37A */ { InstructionMnemonic::MOVZX, { OPI_Gy, OPI_Ew, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 37B */ { InstructionMnemonic::MOVZX, { OPI_Gv, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 37C */ { InstructionMnemonic::MPSADBW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 37D */ { InstructionMnemonic::MUL, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 37E */ { InstructionMnemonic::MUL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 37F */ { InstructionMnemonic::MULPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 380 */ { InstructionMnemonic::MULPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 381 */ { InstructionMnemonic::MULSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 382 */ { InstructionMnemonic::MULSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 383 */ { InstructionMnemonic::MWAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 384 */ { InstructionMnemonic::NEG, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 385 */ { InstructionMnemonic::NEG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 386 */ { InstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 387 */ { InstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 388 */ { InstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 389 */ { InstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38A */ { InstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38B */ { InstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38C */ { InstructionMnemonic::NOP, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 38D */ { InstructionMnemonic::NOT, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 38E */ { InstructionMnemonic::NOT, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 38F */ { InstructionMnemonic::OR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 390 */ { InstructionMnemonic::OR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 391 */ { InstructionMnemonic::OR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 392 */ { InstructionMnemonic::OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 393 */ { InstructionMnemonic::OR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 394 */ { InstructionMnemonic::OR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 395 */ { InstructionMnemonic::OR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 396 */ { InstructionMnemonic::OR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 397 */ { InstructionMnemonic::OR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 398 */ { InstructionMnemonic::OR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 399 */ { InstructionMnemonic::ORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 39A */ { InstructionMnemonic::ORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 39B */ { InstructionMnemonic::OUT, { OPI_DX, OPI_AL, OPI_NONE, OPI_NONE }, 0 }, + /* 39C */ { InstructionMnemonic::OUT, { OPI_DX, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 39D */ { InstructionMnemonic::OUT, { OPI_Ib, OPI_AL, OPI_NONE, OPI_NONE }, 0 }, + /* 39E */ { InstructionMnemonic::OUT, { OPI_Ib, OPI_eAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 39F */ { InstructionMnemonic::OUTSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 3A0 */ { InstructionMnemonic::OUTSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 3A1 */ { InstructionMnemonic::OUTSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 3A2 */ { InstructionMnemonic::PABSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A3 */ { InstructionMnemonic::PABSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A4 */ { InstructionMnemonic::PABSD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A5 */ { InstructionMnemonic::PABSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A6 */ { InstructionMnemonic::PABSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A7 */ { InstructionMnemonic::PABSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3A8 */ { InstructionMnemonic::PACKSSDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3A9 */ { InstructionMnemonic::PACKSSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AA */ { InstructionMnemonic::PACKSSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AB */ { InstructionMnemonic::PACKSSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AC */ { InstructionMnemonic::PACKUSDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AD */ { InstructionMnemonic::PACKUSWB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AE */ { InstructionMnemonic::PACKUSWB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3AF */ { InstructionMnemonic::PADDB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B0 */ { InstructionMnemonic::PADDB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B1 */ { InstructionMnemonic::PADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B2 */ { InstructionMnemonic::PADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B3 */ { InstructionMnemonic::PADDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B4 */ { InstructionMnemonic::PADDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B5 */ { InstructionMnemonic::PADDSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B6 */ { InstructionMnemonic::PADDSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B7 */ { InstructionMnemonic::PADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B8 */ { InstructionMnemonic::PADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3B9 */ { InstructionMnemonic::PADDUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BA */ { InstructionMnemonic::PADDUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BB */ { InstructionMnemonic::PADDUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BC */ { InstructionMnemonic::PADDUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BD */ { InstructionMnemonic::PADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BE */ { InstructionMnemonic::PADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3BF */ { InstructionMnemonic::PALIGNR, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C0 */ { InstructionMnemonic::PALIGNR, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C1 */ { InstructionMnemonic::PAND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C2 */ { InstructionMnemonic::PAND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C3 */ { InstructionMnemonic::PANDN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C4 */ { InstructionMnemonic::PANDN, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C5 */ { InstructionMnemonic::PAVGB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C6 */ { InstructionMnemonic::PAVGB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C7 */ { InstructionMnemonic::PAVGUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C8 */ { InstructionMnemonic::PAVGW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3C9 */ { InstructionMnemonic::PAVGW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CA */ { InstructionMnemonic::PBLENDVB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CB */ { InstructionMnemonic::PBLENDW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CC */ { InstructionMnemonic::PCLMULQDQ, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CD */ { InstructionMnemonic::PCMPEQB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CE */ { InstructionMnemonic::PCMPEQB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3CF */ { InstructionMnemonic::PCMPEQD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D0 */ { InstructionMnemonic::PCMPEQD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D1 */ { InstructionMnemonic::PCMPEQQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3D2 */ { InstructionMnemonic::PCMPEQW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D3 */ { InstructionMnemonic::PCMPEQW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D4 */ { InstructionMnemonic::PCMPESTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3D5 */ { InstructionMnemonic::PCMPESTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3D6 */ { InstructionMnemonic::PCMPGTB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D7 */ { InstructionMnemonic::PCMPGTB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D8 */ { InstructionMnemonic::PCMPGTD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3D9 */ { InstructionMnemonic::PCMPGTD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3DA */ { InstructionMnemonic::PCMPGTQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3DB */ { InstructionMnemonic::PCMPGTW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3DC */ { InstructionMnemonic::PCMPGTW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3DD */ { InstructionMnemonic::PCMPISTRI, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3DE */ { InstructionMnemonic::PCMPISTRM, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 3DF */ { InstructionMnemonic::PEXTRB, { OPI_MbRv, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 3E0 */ { InstructionMnemonic::PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E1 */ { InstructionMnemonic::PEXTRD, { OPI_Ed, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E2 */ { InstructionMnemonic::PEXTRQ, { OPI_Eq, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 3E3 */ { InstructionMnemonic::PEXTRW, { OPI_MwRd, OPI_V, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E4 */ { InstructionMnemonic::PEXTRW, { OPI_Gd, OPI_N, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E5 */ { InstructionMnemonic::PEXTRW, { OPI_Gd, OPI_U, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E6 */ { InstructionMnemonic::PF2ID, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E7 */ { InstructionMnemonic::PF2IW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3E8 */ { InstructionMnemonic::PFACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3E9 */ { InstructionMnemonic::PFADD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EA */ { InstructionMnemonic::PFCMPEQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EB */ { InstructionMnemonic::PFCMPGE, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EC */ { InstructionMnemonic::PFCMPGT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3ED */ { InstructionMnemonic::PFMAX, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EE */ { InstructionMnemonic::PFMIN, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3EF */ { InstructionMnemonic::PFMUL, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F0 */ { InstructionMnemonic::PFNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F1 */ { InstructionMnemonic::PFPNACC, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F2 */ { InstructionMnemonic::PFRCP, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F3 */ { InstructionMnemonic::PFRCPIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F4 */ { InstructionMnemonic::PFRCPIT2, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F5 */ { InstructionMnemonic::PFRSQIT1, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F6 */ { InstructionMnemonic::PFRSQRT, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 3F7 */ { InstructionMnemonic::PFSUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F8 */ { InstructionMnemonic::PFSUBR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3F9 */ { InstructionMnemonic::PHADDD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FA */ { InstructionMnemonic::PHADDD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FB */ { InstructionMnemonic::PHADDSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FC */ { InstructionMnemonic::PHADDSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FD */ { InstructionMnemonic::PHADDW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FE */ { InstructionMnemonic::PHADDW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 3FF */ { InstructionMnemonic::PHMINPOSUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 400 */ { InstructionMnemonic::PHSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 401 */ { InstructionMnemonic::PHSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 402 */ { InstructionMnemonic::PHSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 403 */ { InstructionMnemonic::PHSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 404 */ { InstructionMnemonic::PHSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 405 */ { InstructionMnemonic::PHSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 406 */ { InstructionMnemonic::PI2FD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 407 */ { InstructionMnemonic::PI2FW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 408 */ { InstructionMnemonic::PINSRB, { OPI_V, OPI_MbRd, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 409 */ { InstructionMnemonic::PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 40A */ { InstructionMnemonic::PINSRD, { OPI_V, OPI_Ed, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 40B */ { InstructionMnemonic::PINSRQ, { OPI_V, OPI_Eq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 40C */ { InstructionMnemonic::PINSRW, { OPI_V, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 40D */ { InstructionMnemonic::PINSRW, { OPI_P, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 40E */ { InstructionMnemonic::PMADDUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 40F */ { InstructionMnemonic::PMADDUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 410 */ { InstructionMnemonic::PMADDWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 411 */ { InstructionMnemonic::PMADDWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 412 */ { InstructionMnemonic::PMAXSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 413 */ { InstructionMnemonic::PMAXSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 414 */ { InstructionMnemonic::PMAXSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 415 */ { InstructionMnemonic::PMAXSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 416 */ { InstructionMnemonic::PMAXUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 417 */ { InstructionMnemonic::PMAXUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 418 */ { InstructionMnemonic::PMAXUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 419 */ { InstructionMnemonic::PMAXUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41A */ { InstructionMnemonic::PMINSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41B */ { InstructionMnemonic::PMINSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41C */ { InstructionMnemonic::PMINSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41D */ { InstructionMnemonic::PMINSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41E */ { InstructionMnemonic::PMINUB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 41F */ { InstructionMnemonic::PMINUB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 420 */ { InstructionMnemonic::PMINUD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 421 */ { InstructionMnemonic::PMINUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 422 */ { InstructionMnemonic::PMOVMSKB, { OPI_Gd, OPI_N, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 423 */ { InstructionMnemonic::PMOVMSKB, { OPI_Gd, OPI_U, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 424 */ { InstructionMnemonic::PMOVSXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 425 */ { InstructionMnemonic::PMOVSXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 426 */ { InstructionMnemonic::PMOVSXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 427 */ { InstructionMnemonic::PMOVSXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 428 */ { InstructionMnemonic::PMOVSXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 429 */ { InstructionMnemonic::PMOVSXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42A */ { InstructionMnemonic::PMOVZXBD, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42B */ { InstructionMnemonic::PMOVZXBQ, { OPI_V, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42C */ { InstructionMnemonic::PMOVZXBW, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42D */ { InstructionMnemonic::PMOVZXDQ, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42E */ { InstructionMnemonic::PMOVZXWD, { OPI_V, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 42F */ { InstructionMnemonic::PMOVZXWQ, { OPI_V, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 430 */ { InstructionMnemonic::PMULDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 431 */ { InstructionMnemonic::PMULHRSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 432 */ { InstructionMnemonic::PMULHRSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 433 */ { InstructionMnemonic::PMULHRW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 434 */ { InstructionMnemonic::PMULHUW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 435 */ { InstructionMnemonic::PMULHUW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 436 */ { InstructionMnemonic::PMULHW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 437 */ { InstructionMnemonic::PMULHW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 438 */ { InstructionMnemonic::PMULLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 439 */ { InstructionMnemonic::PMULLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43A */ { InstructionMnemonic::PMULLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43B */ { InstructionMnemonic::PMULUDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43C */ { InstructionMnemonic::PMULUDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 43D */ { InstructionMnemonic::POP, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 43E */ { InstructionMnemonic::POP, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 43F */ { InstructionMnemonic::POP, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 440 */ { InstructionMnemonic::POP, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 441 */ { InstructionMnemonic::POP, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 442 */ { InstructionMnemonic::POP, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 443 */ { InstructionMnemonic::POP, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 444 */ { InstructionMnemonic::POP, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 445 */ { InstructionMnemonic::POP, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 446 */ { InstructionMnemonic::POP, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 447 */ { InstructionMnemonic::POP, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 448 */ { InstructionMnemonic::POP, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 449 */ { InstructionMnemonic::POP, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 44A */ { InstructionMnemonic::POP, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 44B */ { InstructionMnemonic::POPA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 44C */ { InstructionMnemonic::POPAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 44D */ { InstructionMnemonic::POPCNT, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 44E */ { InstructionMnemonic::POPFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 44F */ { InstructionMnemonic::POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 450 */ { InstructionMnemonic::POPFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 451 */ { InstructionMnemonic::POPFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 452 */ { InstructionMnemonic::POR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 453 */ { InstructionMnemonic::POR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 454 */ { InstructionMnemonic::PREFETCH, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 455 */ { InstructionMnemonic::PREFETCHNTA, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 456 */ { InstructionMnemonic::PREFETCHT0, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 457 */ { InstructionMnemonic::PREFETCHT1, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 458 */ { InstructionMnemonic::PREFETCHT2, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 459 */ { InstructionMnemonic::PSADBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45A */ { InstructionMnemonic::PSADBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45B */ { InstructionMnemonic::PSHUFB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45C */ { InstructionMnemonic::PSHUFB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 45D */ { InstructionMnemonic::PSHUFD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 45E */ { InstructionMnemonic::PSHUFHW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 45F */ { InstructionMnemonic::PSHUFLW, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 460 */ { InstructionMnemonic::PSHUFW, { OPI_P, OPI_Q, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 461 */ { InstructionMnemonic::PSIGNB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 462 */ { InstructionMnemonic::PSIGNB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 463 */ { InstructionMnemonic::PSIGND, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 464 */ { InstructionMnemonic::PSIGND, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 465 */ { InstructionMnemonic::PSIGNW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 466 */ { InstructionMnemonic::PSIGNW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 467 */ { InstructionMnemonic::PSLLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 468 */ { InstructionMnemonic::PSLLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 469 */ { InstructionMnemonic::PSLLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46A */ { InstructionMnemonic::PSLLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46B */ { InstructionMnemonic::PSLLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46C */ { InstructionMnemonic::PSLLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46D */ { InstructionMnemonic::PSLLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 46E */ { InstructionMnemonic::PSLLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 46F */ { InstructionMnemonic::PSLLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 470 */ { InstructionMnemonic::PSLLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 471 */ { InstructionMnemonic::PSLLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 472 */ { InstructionMnemonic::PSLLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 473 */ { InstructionMnemonic::PSLLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 474 */ { InstructionMnemonic::PSRAD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 475 */ { InstructionMnemonic::PSRAD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 476 */ { InstructionMnemonic::PSRAD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 477 */ { InstructionMnemonic::PSRAD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 478 */ { InstructionMnemonic::PSRAW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 479 */ { InstructionMnemonic::PSRAW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 47A */ { InstructionMnemonic::PSRAW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47B */ { InstructionMnemonic::PSRAW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47C */ { InstructionMnemonic::PSRLD, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47D */ { InstructionMnemonic::PSRLD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 47E */ { InstructionMnemonic::PSRLD, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 47F */ { InstructionMnemonic::PSRLD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 480 */ { InstructionMnemonic::PSRLDQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 481 */ { InstructionMnemonic::PSRLQ, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 482 */ { InstructionMnemonic::PSRLQ, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 483 */ { InstructionMnemonic::PSRLQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 484 */ { InstructionMnemonic::PSRLQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 485 */ { InstructionMnemonic::PSRLW, { OPI_U, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 486 */ { InstructionMnemonic::PSRLW, { OPI_N, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 487 */ { InstructionMnemonic::PSRLW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 488 */ { InstructionMnemonic::PSRLW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 489 */ { InstructionMnemonic::PSUBB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48A */ { InstructionMnemonic::PSUBB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48B */ { InstructionMnemonic::PSUBD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48C */ { InstructionMnemonic::PSUBD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48D */ { InstructionMnemonic::PSUBQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48E */ { InstructionMnemonic::PSUBQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 48F */ { InstructionMnemonic::PSUBSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 490 */ { InstructionMnemonic::PSUBSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 491 */ { InstructionMnemonic::PSUBSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 492 */ { InstructionMnemonic::PSUBSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 493 */ { InstructionMnemonic::PSUBUSB, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 494 */ { InstructionMnemonic::PSUBUSB, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 495 */ { InstructionMnemonic::PSUBUSW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 496 */ { InstructionMnemonic::PSUBUSW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 497 */ { InstructionMnemonic::PSUBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 498 */ { InstructionMnemonic::PSUBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 499 */ { InstructionMnemonic::PSWAPD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 49A */ { InstructionMnemonic::PTEST, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 49B */ { InstructionMnemonic::PUNPCKHBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49C */ { InstructionMnemonic::PUNPCKHBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49D */ { InstructionMnemonic::PUNPCKHDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49E */ { InstructionMnemonic::PUNPCKHDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 49F */ { InstructionMnemonic::PUNPCKHQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A0 */ { InstructionMnemonic::PUNPCKHWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A1 */ { InstructionMnemonic::PUNPCKHWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A2 */ { InstructionMnemonic::PUNPCKLBW, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A3 */ { InstructionMnemonic::PUNPCKLBW, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A4 */ { InstructionMnemonic::PUNPCKLDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A5 */ { InstructionMnemonic::PUNPCKLDQ, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A6 */ { InstructionMnemonic::PUNPCKLQDQ, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A7 */ { InstructionMnemonic::PUNPCKLWD, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A8 */ { InstructionMnemonic::PUNPCKLWD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4A9 */ { InstructionMnemonic::PUSH, { OPI_DS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AA */ { InstructionMnemonic::PUSH, { OPI_ES, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AB */ { InstructionMnemonic::PUSH, { OPI_sIb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_DEFAULT_64 }, + /* 4AC */ { InstructionMnemonic::PUSH, { OPI_SS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AD */ { InstructionMnemonic::PUSH, { OPI_CS, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 }, + /* 4AE */ { InstructionMnemonic::PUSH, { OPI_R3v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4AF */ { InstructionMnemonic::PUSH, { OPI_R4v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B0 */ { InstructionMnemonic::PUSH, { OPI_R5v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B1 */ { InstructionMnemonic::PUSH, { OPI_R6v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B2 */ { InstructionMnemonic::PUSH, { OPI_R7v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B3 */ { InstructionMnemonic::PUSH, { OPI_R2v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B4 */ { InstructionMnemonic::PUSH, { OPI_R0v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B5 */ { InstructionMnemonic::PUSH, { OPI_FS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4B6 */ { InstructionMnemonic::PUSH, { OPI_GS, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4B7 */ { InstructionMnemonic::PUSH, { OPI_sIz, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4B8 */ { InstructionMnemonic::PUSH, { OPI_Ev, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4B9 */ { InstructionMnemonic::PUSH, { OPI_R1v, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 4BA */ { InstructionMnemonic::PUSHA, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 4BB */ { InstructionMnemonic::PUSHAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_INVALID_64 }, + /* 4BC */ { InstructionMnemonic::PUSHFD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 4BD */ { InstructionMnemonic::PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4BE */ { InstructionMnemonic::PUSHFQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4BF */ { InstructionMnemonic::PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_DEFAULT_64 }, + /* 4C0 */ { InstructionMnemonic::PUSHFW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX }, + /* 4C1 */ { InstructionMnemonic::PXOR, { OPI_P, OPI_Q, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C2 */ { InstructionMnemonic::PXOR, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C3 */ { InstructionMnemonic::RCL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C4 */ { InstructionMnemonic::RCL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C5 */ { InstructionMnemonic::RCL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C6 */ { InstructionMnemonic::RCL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C7 */ { InstructionMnemonic::RCL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C8 */ { InstructionMnemonic::RCL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4C9 */ { InstructionMnemonic::RCPPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4CA */ { InstructionMnemonic::RCPSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4CB */ { InstructionMnemonic::RCR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CC */ { InstructionMnemonic::RCR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CD */ { InstructionMnemonic::RCR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CE */ { InstructionMnemonic::RCR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4CF */ { InstructionMnemonic::RCR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4D0 */ { InstructionMnemonic::RCR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4D1 */ { InstructionMnemonic::RDMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D2 */ { InstructionMnemonic::RDPMC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D3 */ { InstructionMnemonic::RDRAND, { OPI_R, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4D4 */ { InstructionMnemonic::RDTSC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D5 */ { InstructionMnemonic::RDTSCP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D6 */ { InstructionMnemonic::REP, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D7 */ { InstructionMnemonic::REPNE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D8 */ { InstructionMnemonic::RET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4D9 */ { InstructionMnemonic::RET, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4DA */ { InstructionMnemonic::RETF, { OPI_Iw, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4DB */ { InstructionMnemonic::RETF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4DC */ { InstructionMnemonic::ROL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4DD */ { InstructionMnemonic::ROL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4DE */ { InstructionMnemonic::ROL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4DF */ { InstructionMnemonic::ROL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E0 */ { InstructionMnemonic::ROL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E1 */ { InstructionMnemonic::ROL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E2 */ { InstructionMnemonic::ROR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E3 */ { InstructionMnemonic::ROR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E4 */ { InstructionMnemonic::ROR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E5 */ { InstructionMnemonic::ROR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E6 */ { InstructionMnemonic::ROR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E7 */ { InstructionMnemonic::ROR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4E8 */ { InstructionMnemonic::ROUNDPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4E9 */ { InstructionMnemonic::ROUNDPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EA */ { InstructionMnemonic::ROUNDSD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EB */ { InstructionMnemonic::ROUNDSS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EC */ { InstructionMnemonic::RSM, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4ED */ { InstructionMnemonic::RSQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EE */ { InstructionMnemonic::RSQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4EF */ { InstructionMnemonic::SAHF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 4F0 */ { InstructionMnemonic::SALC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 4F1 */ { InstructionMnemonic::SAR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F2 */ { InstructionMnemonic::SAR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F3 */ { InstructionMnemonic::SAR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F4 */ { InstructionMnemonic::SAR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F5 */ { InstructionMnemonic::SAR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F6 */ { InstructionMnemonic::SAR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 4F7 */ { InstructionMnemonic::SBB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4F8 */ { InstructionMnemonic::SBB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4F9 */ { InstructionMnemonic::SBB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_WRITE }, + /* 4FA */ { InstructionMnemonic::SBB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_WRITE }, + /* 4FB */ { InstructionMnemonic::SBB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4FC */ { InstructionMnemonic::SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_WRITE }, + /* 4FD */ { InstructionMnemonic::SBB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4FE */ { InstructionMnemonic::SBB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 4FF */ { InstructionMnemonic::SBB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 500 */ { InstructionMnemonic::SBB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 501 */ { InstructionMnemonic::SCASB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 502 */ { InstructionMnemonic::SCASD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 503 */ { InstructionMnemonic::SCASQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 504 */ { InstructionMnemonic::SCASW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 505 */ { InstructionMnemonic::SETA, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 506 */ { InstructionMnemonic::SETAE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 507 */ { InstructionMnemonic::SETB, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 508 */ { InstructionMnemonic::SETBE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 509 */ { InstructionMnemonic::SETE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50A */ { InstructionMnemonic::SETG, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50B */ { InstructionMnemonic::SETGE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50C */ { InstructionMnemonic::SETL, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50D */ { InstructionMnemonic::SETLE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50E */ { InstructionMnemonic::SETNE, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 50F */ { InstructionMnemonic::SETNO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 510 */ { InstructionMnemonic::SETNP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 511 */ { InstructionMnemonic::SETNS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 512 */ { InstructionMnemonic::SETO, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 513 */ { InstructionMnemonic::SETP, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 514 */ { InstructionMnemonic::SETS, { OPI_Eb, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 515 */ { InstructionMnemonic::SFENCE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 516 */ { InstructionMnemonic::SGDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 517 */ { InstructionMnemonic::SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 518 */ { InstructionMnemonic::SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 519 */ { InstructionMnemonic::SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51A */ { InstructionMnemonic::SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51B */ { InstructionMnemonic::SHL, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51C */ { InstructionMnemonic::SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51D */ { InstructionMnemonic::SHL, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51E */ { InstructionMnemonic::SHL, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 51F */ { InstructionMnemonic::SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 520 */ { InstructionMnemonic::SHL, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 521 */ { InstructionMnemonic::SHL, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 522 */ { InstructionMnemonic::SHL, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 523 */ { InstructionMnemonic::SHLD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 524 */ { InstructionMnemonic::SHLD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 525 */ { InstructionMnemonic::SHR, { OPI_Ev, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 526 */ { InstructionMnemonic::SHR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 527 */ { InstructionMnemonic::SHR, { OPI_Eb, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 528 */ { InstructionMnemonic::SHR, { OPI_Ev, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 529 */ { InstructionMnemonic::SHR, { OPI_Eb, OPI_CL, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52A */ { InstructionMnemonic::SHR, { OPI_Ev, OPI_I1, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52B */ { InstructionMnemonic::SHRD, { OPI_Ev, OPI_Gv, OPI_CL, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52C */ { InstructionMnemonic::SHRD, { OPI_Ev, OPI_Gv, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52D */ { InstructionMnemonic::SHUFPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52E */ { InstructionMnemonic::SHUFPS, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 52F */ { InstructionMnemonic::SIDT, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 530 */ { InstructionMnemonic::SKINIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 531 */ { InstructionMnemonic::SLDT, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 532 */ { InstructionMnemonic::SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 533 */ { InstructionMnemonic::SMSW, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 534 */ { InstructionMnemonic::SQRTPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 535 */ { InstructionMnemonic::SQRTPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 536 */ { InstructionMnemonic::SQRTSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 537 */ { InstructionMnemonic::SQRTSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 538 */ { InstructionMnemonic::STC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 539 */ { InstructionMnemonic::STD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 53A */ { InstructionMnemonic::STGI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 53B */ { InstructionMnemonic::STI, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 53C */ { InstructionMnemonic::STMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 53D */ { InstructionMnemonic::STOSB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 53E */ { InstructionMnemonic::STOSD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 53F */ { InstructionMnemonic::STOSQ, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 540 */ { InstructionMnemonic::STOSW, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REP_PREFIX |IDF_ACCEPTS_SEGMENT_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 541 */ { InstructionMnemonic::STR, { OPI_MwRv, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 542 */ { InstructionMnemonic::SUB, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 543 */ { InstructionMnemonic::SUB, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 544 */ { InstructionMnemonic::SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 545 */ { InstructionMnemonic::SUB, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 546 */ { InstructionMnemonic::SUB, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 547 */ { InstructionMnemonic::SUB, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 548 */ { InstructionMnemonic::SUB, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 549 */ { InstructionMnemonic::SUB, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54A */ { InstructionMnemonic::SUB, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 54B */ { InstructionMnemonic::SUB, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54C */ { InstructionMnemonic::SUBPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54D */ { InstructionMnemonic::SUBPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54E */ { InstructionMnemonic::SUBSD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 54F */ { InstructionMnemonic::SUBSS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 550 */ { InstructionMnemonic::SWAPGS, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 551 */ { InstructionMnemonic::SYSCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 552 */ { InstructionMnemonic::SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 553 */ { InstructionMnemonic::SYSENTER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 554 */ { InstructionMnemonic::SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 555 */ { InstructionMnemonic::SYSEXIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 556 */ { InstructionMnemonic::SYSRET, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 557 */ { InstructionMnemonic::TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 558 */ { InstructionMnemonic::TEST, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 559 */ { InstructionMnemonic::TEST, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55A */ { InstructionMnemonic::TEST, { OPI_Ev, OPI_Iz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55B */ { InstructionMnemonic::TEST, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW }, + /* 55C */ { InstructionMnemonic::TEST, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55D */ { InstructionMnemonic::TEST, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 55E */ { InstructionMnemonic::TEST, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, 0 }, + /* 55F */ { InstructionMnemonic::UCOMISD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 560 */ { InstructionMnemonic::UCOMISS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 561 */ { InstructionMnemonic::UD2, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 562 */ { InstructionMnemonic::UNPCKHPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 563 */ { InstructionMnemonic::UNPCKHPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 564 */ { InstructionMnemonic::UNPCKLPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 565 */ { InstructionMnemonic::UNPCKLPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 566 */ { InstructionMnemonic::VADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 567 */ { InstructionMnemonic::VADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 568 */ { InstructionMnemonic::VADDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 569 */ { InstructionMnemonic::VADDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56A */ { InstructionMnemonic::VADDSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56B */ { InstructionMnemonic::VADDSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56C */ { InstructionMnemonic::VAESDEC, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56D */ { InstructionMnemonic::VAESDECLAST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56E */ { InstructionMnemonic::VAESENC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 56F */ { InstructionMnemonic::VAESENCLAST, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 570 */ { InstructionMnemonic::VAESIMC, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 571 */ { InstructionMnemonic::VAESKEYGENASSIST, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 572 */ { InstructionMnemonic::VANDNPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 573 */ { InstructionMnemonic::VANDNPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 574 */ { InstructionMnemonic::VANDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 575 */ { InstructionMnemonic::VANDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 576 */ { InstructionMnemonic::VBLENDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 577 */ { InstructionMnemonic::VBLENDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 578 */ { InstructionMnemonic::VBLENDVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 579 */ { InstructionMnemonic::VBLENDVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Lx }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 57A */ { InstructionMnemonic::VBROADCASTSD, { OPI_Vqq, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 57B */ { InstructionMnemonic::VBROADCASTSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 57C */ { InstructionMnemonic::VCMPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 57D */ { InstructionMnemonic::VCMPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 57E */ { InstructionMnemonic::VCMPSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 57F */ { InstructionMnemonic::VCMPSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 580 */ { InstructionMnemonic::VCOMISD, { OPI_Vsd, OPI_Wsd, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 581 */ { InstructionMnemonic::VCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 582 */ { InstructionMnemonic::VCVTDQ2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 583 */ { InstructionMnemonic::VCVTDQ2PS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 584 */ { InstructionMnemonic::VCVTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 585 */ { InstructionMnemonic::VCVTPD2PS, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 586 */ { InstructionMnemonic::VCVTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 587 */ { InstructionMnemonic::VCVTPS2PD, { OPI_Vx, OPI_Wdq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 588 */ { InstructionMnemonic::VCVTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 589 */ { InstructionMnemonic::VCVTSD2SS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58A */ { InstructionMnemonic::VCVTSI2SD, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58B */ { InstructionMnemonic::VCVTSI2SS, { OPI_Vx, OPI_Hx, OPI_Ey, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58C */ { InstructionMnemonic::VCVTSS2SD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58D */ { InstructionMnemonic::VCVTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 58E */ { InstructionMnemonic::VCVTTPD2DQ, { OPI_Vdq, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 58F */ { InstructionMnemonic::VCVTTPS2DQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 590 */ { InstructionMnemonic::VCVTTSD2SI, { OPI_Gy, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 591 */ { InstructionMnemonic::VCVTTSS2SI, { OPI_Gy, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 592 */ { InstructionMnemonic::VDIVPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 593 */ { InstructionMnemonic::VDIVPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 594 */ { InstructionMnemonic::VDIVSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 595 */ { InstructionMnemonic::VDIVSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 596 */ { InstructionMnemonic::VDPPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 597 */ { InstructionMnemonic::VDPPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 598 */ { InstructionMnemonic::VERR, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 599 */ { InstructionMnemonic::VERW, { OPI_Ew, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 59A */ { InstructionMnemonic::VEXTRACTF128, { OPI_Wdq, OPI_Vqq, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 59B */ { InstructionMnemonic::VEXTRACTPS, { OPI_MdRy, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 59C */ { InstructionMnemonic::VHADDPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 59D */ { InstructionMnemonic::VHADDPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 59E */ { InstructionMnemonic::VHSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 59F */ { InstructionMnemonic::VHSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5A0 */ { InstructionMnemonic::VINSERTF128, { OPI_Vqq, OPI_Hqq, OPI_Wdq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A1 */ { InstructionMnemonic::VINSERTPS, { OPI_Vx, OPI_Hx, OPI_Md, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5A2 */ { InstructionMnemonic::VLDDQU, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A3 */ { InstructionMnemonic::VMASKMOVDQU, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5A4 */ { InstructionMnemonic::VMASKMOVPD, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A5 */ { InstructionMnemonic::VMASKMOVPD, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A6 */ { InstructionMnemonic::VMASKMOVPS, { OPI_V, OPI_H, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A7 */ { InstructionMnemonic::VMASKMOVPS, { OPI_M, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5A8 */ { InstructionMnemonic::VMAXPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5A9 */ { InstructionMnemonic::VMAXPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5AA */ { InstructionMnemonic::VMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5AB */ { InstructionMnemonic::VMAXSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5AC */ { InstructionMnemonic::VMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5AD */ { InstructionMnemonic::VMCLEAR, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5AE */ { InstructionMnemonic::VMINPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5AF */ { InstructionMnemonic::VMINPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5B0 */ { InstructionMnemonic::VMINSD, { OPI_Vx, OPI_Hx, OPI_MqU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5B1 */ { InstructionMnemonic::VMINSS, { OPI_Vx, OPI_Hx, OPI_MdU, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5B2 */ { InstructionMnemonic::VMLAUNCH, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5B3 */ { InstructionMnemonic::VMLOAD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5B4 */ { InstructionMnemonic::VMMCALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5B5 */ { InstructionMnemonic::VMOVAPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B6 */ { InstructionMnemonic::VMOVAPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B7 */ { InstructionMnemonic::VMOVAPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B8 */ { InstructionMnemonic::VMOVAPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5B9 */ { InstructionMnemonic::VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BA */ { InstructionMnemonic::VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BB */ { InstructionMnemonic::VMOVD, { OPI_Vx, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BC */ { InstructionMnemonic::VMOVD, { OPI_Ey, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BD */ { InstructionMnemonic::VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BE */ { InstructionMnemonic::VMOVDDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5BF */ { InstructionMnemonic::VMOVDQA, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C0 */ { InstructionMnemonic::VMOVDQA, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C1 */ { InstructionMnemonic::VMOVDQU, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C2 */ { InstructionMnemonic::VMOVDQU, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5C3 */ { InstructionMnemonic::VMOVHLPS, { OPI_Vx, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C4 */ { InstructionMnemonic::VMOVHPD, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C5 */ { InstructionMnemonic::VMOVHPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C6 */ { InstructionMnemonic::VMOVHPS, { OPI_Vx, OPI_Hx, OPI_M, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C7 */ { InstructionMnemonic::VMOVHPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C8 */ { InstructionMnemonic::VMOVLHPS, { OPI_Vx, OPI_Hx, OPI_Ux, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5C9 */ { InstructionMnemonic::VMOVLPD, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CA */ { InstructionMnemonic::VMOVLPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CB */ { InstructionMnemonic::VMOVLPS, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CC */ { InstructionMnemonic::VMOVLPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CD */ { InstructionMnemonic::VMOVMSKPD, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5CE */ { InstructionMnemonic::VMOVMSKPS, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5CF */ { InstructionMnemonic::VMOVNTDQ, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D0 */ { InstructionMnemonic::VMOVNTDQA, { OPI_Vx, OPI_M, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D1 */ { InstructionMnemonic::VMOVNTPD, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D2 */ { InstructionMnemonic::VMOVNTPS, { OPI_M, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5D3 */ { InstructionMnemonic::VMOVQ, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D4 */ { InstructionMnemonic::VMOVQ, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D5 */ { InstructionMnemonic::VMOVQ, { OPI_Vx, OPI_Eq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D6 */ { InstructionMnemonic::VMOVQ, { OPI_Eq, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D7 */ { InstructionMnemonic::VMOVSD, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D8 */ { InstructionMnemonic::VMOVSD, { OPI_Mq, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5D9 */ { InstructionMnemonic::VMOVSD, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5DA */ { InstructionMnemonic::VMOVSD, { OPI_V, OPI_Mq, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5DB */ { InstructionMnemonic::VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DC */ { InstructionMnemonic::VMOVSHDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DD */ { InstructionMnemonic::VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DE */ { InstructionMnemonic::VMOVSLDUP, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5DF */ { InstructionMnemonic::VMOVSS, { OPI_V, OPI_H, OPI_U, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E0 */ { InstructionMnemonic::VMOVSS, { OPI_Md, OPI_V, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E1 */ { InstructionMnemonic::VMOVSS, { OPI_U, OPI_H, OPI_V, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E2 */ { InstructionMnemonic::VMOVSS, { OPI_V, OPI_Md, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 5E3 */ { InstructionMnemonic::VMOVUPD, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E4 */ { InstructionMnemonic::VMOVUPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E5 */ { InstructionMnemonic::VMOVUPS, { OPI_Wx, OPI_Vx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E6 */ { InstructionMnemonic::VMOVUPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5E7 */ { InstructionMnemonic::VMPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5E8 */ { InstructionMnemonic::VMPTRLD, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5E9 */ { InstructionMnemonic::VMPTRST, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5EA */ { InstructionMnemonic::VMREAD, { OPI_Ey, OPI_Gy, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 5EB */ { InstructionMnemonic::VMRESUME, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5EC */ { InstructionMnemonic::VMRUN, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5ED */ { InstructionMnemonic::VMSAVE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5EE */ { InstructionMnemonic::VMULPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5EF */ { InstructionMnemonic::VMULPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5F0 */ { InstructionMnemonic::VMULSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5F1 */ { InstructionMnemonic::VMULSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 5F2 */ { InstructionMnemonic::VMWRITE, { OPI_Gy, OPI_Ey, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 }, + /* 5F3 */ { InstructionMnemonic::VMXOFF, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 5F4 */ { InstructionMnemonic::VMXON, { OPI_Mq, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 5F5 */ { InstructionMnemonic::VORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5F6 */ { InstructionMnemonic::VORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 5F7 */ { InstructionMnemonic::VPABSB, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5F8 */ { InstructionMnemonic::VPABSD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5F9 */ { InstructionMnemonic::VPABSW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 5FA */ { InstructionMnemonic::VPACKSSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FB */ { InstructionMnemonic::VPACKSSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FC */ { InstructionMnemonic::VPACKUSDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FD */ { InstructionMnemonic::VPACKUSWB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FE */ { InstructionMnemonic::VPADDB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 5FF */ { InstructionMnemonic::VPADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 600 */ { InstructionMnemonic::VPADDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 601 */ { InstructionMnemonic::VPADDSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 602 */ { InstructionMnemonic::VPADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 603 */ { InstructionMnemonic::VPADDUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 604 */ { InstructionMnemonic::VPADDUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 605 */ { InstructionMnemonic::VPADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 606 */ { InstructionMnemonic::VPALIGNR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 607 */ { InstructionMnemonic::VPAND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 608 */ { InstructionMnemonic::VPANDN, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 609 */ { InstructionMnemonic::VPAVGB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60A */ { InstructionMnemonic::VPAVGW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60B */ { InstructionMnemonic::VPBLENDVB, { OPI_V, OPI_H, OPI_W, OPI_L }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 60C */ { InstructionMnemonic::VPBLENDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60D */ { InstructionMnemonic::VPCLMULQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60E */ { InstructionMnemonic::VPCMPEQB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 60F */ { InstructionMnemonic::VPCMPEQD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 610 */ { InstructionMnemonic::VPCMPEQQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 611 */ { InstructionMnemonic::VPCMPEQW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 612 */ { InstructionMnemonic::VPCMPESTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 613 */ { InstructionMnemonic::VPCMPESTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 614 */ { InstructionMnemonic::VPCMPGTB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 615 */ { InstructionMnemonic::VPCMPGTD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 616 */ { InstructionMnemonic::VPCMPGTQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 617 */ { InstructionMnemonic::VPCMPGTW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 618 */ { InstructionMnemonic::VPCMPISTRI, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 619 */ { InstructionMnemonic::VPCMPISTRM, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 61A */ { InstructionMnemonic::VPERM2F128, { OPI_Vqq, OPI_Hqq, OPI_Wqq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61B */ { InstructionMnemonic::VPERMILPD, { OPI_V, OPI_W, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61C */ { InstructionMnemonic::VPERMILPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61D */ { InstructionMnemonic::VPERMILPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61E */ { InstructionMnemonic::VPERMILPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 61F */ { InstructionMnemonic::VPEXTRB, { OPI_MbRv, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 620 */ { InstructionMnemonic::VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 621 */ { InstructionMnemonic::VPEXTRD, { OPI_Ed, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 622 */ { InstructionMnemonic::VPEXTRQ, { OPI_Eq, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 623 */ { InstructionMnemonic::VPEXTRW, { OPI_Gd, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 624 */ { InstructionMnemonic::VPEXTRW, { OPI_MwRd, OPI_Vx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 625 */ { InstructionMnemonic::VPHADDD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 626 */ { InstructionMnemonic::VPHADDSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 627 */ { InstructionMnemonic::VPHADDW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 628 */ { InstructionMnemonic::VPHMINPOSUW, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 629 */ { InstructionMnemonic::VPHSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 62A */ { InstructionMnemonic::VPHSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 62B */ { InstructionMnemonic::VPHSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 62C */ { InstructionMnemonic::VPINSRB, { OPI_V, OPI_H, OPI_MbRd, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 62D */ { InstructionMnemonic::VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 62E */ { InstructionMnemonic::VPINSRD, { OPI_V, OPI_H, OPI_Ed, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 62F */ { InstructionMnemonic::VPINSRQ, { OPI_V, OPI_H, OPI_Eq, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 630 */ { InstructionMnemonic::VPINSRW, { OPI_Vx, OPI_MwRy, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_DEFAULT_64 | IDF_OPERAND1_WRITE }, + /* 631 */ { InstructionMnemonic::VPMADDUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 632 */ { InstructionMnemonic::VPMADDWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 633 */ { InstructionMnemonic::VPMAXSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 634 */ { InstructionMnemonic::VPMAXSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 635 */ { InstructionMnemonic::VPMAXSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 636 */ { InstructionMnemonic::VPMAXUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 637 */ { InstructionMnemonic::VPMAXUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 638 */ { InstructionMnemonic::VPMAXUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 639 */ { InstructionMnemonic::VPMINSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63A */ { InstructionMnemonic::VPMINSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63B */ { InstructionMnemonic::VPMINSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63C */ { InstructionMnemonic::VPMINUB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63D */ { InstructionMnemonic::VPMINUD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63E */ { InstructionMnemonic::VPMINUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 63F */ { InstructionMnemonic::VPMOVMSKB, { OPI_Gd, OPI_Ux, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 640 */ { InstructionMnemonic::VPMOVSXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 641 */ { InstructionMnemonic::VPMOVSXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 642 */ { InstructionMnemonic::VPMOVSXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 643 */ { InstructionMnemonic::VPMOVSXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 644 */ { InstructionMnemonic::VPMOVSXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 645 */ { InstructionMnemonic::VPMOVZXBD, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 646 */ { InstructionMnemonic::VPMOVZXBQ, { OPI_Vx, OPI_MwU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 647 */ { InstructionMnemonic::VPMOVZXBW, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 648 */ { InstructionMnemonic::VPMOVZXDQ, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 649 */ { InstructionMnemonic::VPMOVZXWD, { OPI_Vx, OPI_MqU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 64A */ { InstructionMnemonic::VPMOVZXWQ, { OPI_Vx, OPI_MdU, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 64B */ { InstructionMnemonic::VPMULDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64C */ { InstructionMnemonic::VPMULHRSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64D */ { InstructionMnemonic::VPMULHUW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64E */ { InstructionMnemonic::VPMULHW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 64F */ { InstructionMnemonic::VPMULLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 650 */ { InstructionMnemonic::VPMULLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 651 */ { InstructionMnemonic::VPOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 652 */ { InstructionMnemonic::VPSADBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 653 */ { InstructionMnemonic::VPSHUFB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 654 */ { InstructionMnemonic::VPSHUFD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 655 */ { InstructionMnemonic::VPSHUFHW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 656 */ { InstructionMnemonic::VPSHUFLW, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 657 */ { InstructionMnemonic::VPSIGNB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 658 */ { InstructionMnemonic::VPSIGND, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 659 */ { InstructionMnemonic::VPSIGNW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 65A */ { InstructionMnemonic::VPSLLD, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65B */ { InstructionMnemonic::VPSLLD, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65C */ { InstructionMnemonic::VPSLLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 65D */ { InstructionMnemonic::VPSLLQ, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65E */ { InstructionMnemonic::VPSLLQ, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 65F */ { InstructionMnemonic::VPSLLW, { OPI_V, OPI_H, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 660 */ { InstructionMnemonic::VPSLLW, { OPI_H, OPI_V, OPI_W, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 661 */ { InstructionMnemonic::VPSRAD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 662 */ { InstructionMnemonic::VPSRAD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 663 */ { InstructionMnemonic::VPSRAW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 664 */ { InstructionMnemonic::VPSRAW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 665 */ { InstructionMnemonic::VPSRLD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 666 */ { InstructionMnemonic::VPSRLD, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 667 */ { InstructionMnemonic::VPSRLDQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 668 */ { InstructionMnemonic::VPSRLQ, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 669 */ { InstructionMnemonic::VPSRLQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66A */ { InstructionMnemonic::VPSRLW, { OPI_Hx, OPI_Ux, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66B */ { InstructionMnemonic::VPSRLW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66C */ { InstructionMnemonic::VPSUBB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66D */ { InstructionMnemonic::VPSUBD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66E */ { InstructionMnemonic::VPSUBQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 66F */ { InstructionMnemonic::VPSUBSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 670 */ { InstructionMnemonic::VPSUBSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 671 */ { InstructionMnemonic::VPSUBUSB, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 672 */ { InstructionMnemonic::VPSUBUSW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 673 */ { InstructionMnemonic::VPSUBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 674 */ { InstructionMnemonic::VPTEST, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 675 */ { InstructionMnemonic::VPUNPCKHBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 676 */ { InstructionMnemonic::VPUNPCKHDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 677 */ { InstructionMnemonic::VPUNPCKHQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 678 */ { InstructionMnemonic::VPUNPCKHWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 679 */ { InstructionMnemonic::VPUNPCKLBW, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67A */ { InstructionMnemonic::VPUNPCKLDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67B */ { InstructionMnemonic::VPUNPCKLQDQ, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67C */ { InstructionMnemonic::VPUNPCKLWD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67D */ { InstructionMnemonic::VPXOR, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 67E */ { InstructionMnemonic::VRCPPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 67F */ { InstructionMnemonic::VRCPSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 680 */ { InstructionMnemonic::VROUNDPD, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 681 */ { InstructionMnemonic::VROUNDPS, { OPI_Vx, OPI_Wx, OPI_Ib, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 682 */ { InstructionMnemonic::VROUNDSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 683 */ { InstructionMnemonic::VROUNDSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 684 */ { InstructionMnemonic::VRSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 685 */ { InstructionMnemonic::VRSQRTSS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 686 */ { InstructionMnemonic::VSHUFPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 687 */ { InstructionMnemonic::VSHUFPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_Ib }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 688 */ { InstructionMnemonic::VSQRTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 689 */ { InstructionMnemonic::VSQRTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_WRITE }, + /* 68A */ { InstructionMnemonic::VSQRTSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 68B */ { InstructionMnemonic::VSQRTSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 68C */ { InstructionMnemonic::VSTMXCSR, { OPI_Md, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_WRITE }, + /* 68D */ { InstructionMnemonic::VSUBPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 68E */ { InstructionMnemonic::VSUBPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 68F */ { InstructionMnemonic::VSUBSD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 690 */ { InstructionMnemonic::VSUBSS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 691 */ { InstructionMnemonic::VTESTPD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 692 */ { InstructionMnemonic::VTESTPS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL }, + /* 693 */ { InstructionMnemonic::VUCOMISD, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 694 */ { InstructionMnemonic::VUCOMISS, { OPI_Vx, OPI_Wx, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 695 */ { InstructionMnemonic::VUNPCKHPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 696 */ { InstructionMnemonic::VUNPCKHPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 697 */ { InstructionMnemonic::VUNPCKLPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 698 */ { InstructionMnemonic::VUNPCKLPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 699 */ { InstructionMnemonic::VXORPD, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_ACCEPTS_VEXL | IDF_OPERAND1_READWRITE }, + /* 69A */ { InstructionMnemonic::VXORPS, { OPI_Vx, OPI_Hx, OPI_Wx, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 69B */ { InstructionMnemonic::VZEROALL, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69C */ { InstructionMnemonic::VZEROUPPER, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69D */ { InstructionMnemonic::WAIT, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69E */ { InstructionMnemonic::WBINVD, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 69F */ { InstructionMnemonic::WRMSR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6A0 */ { InstructionMnemonic::XADD, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE }, + /* 6A1 */ { InstructionMnemonic::XADD, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_WRITE }, + /* 6A2 */ { InstructionMnemonic::XCHG, { OPI_R4v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A3 */ { InstructionMnemonic::XCHG, { OPI_R3v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A4 */ { InstructionMnemonic::XCHG, { OPI_R5v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A5 */ { InstructionMnemonic::XCHG, { OPI_R7v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A6 */ { InstructionMnemonic::XCHG, { OPI_R6v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A7 */ { InstructionMnemonic::XCHG, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A8 */ { InstructionMnemonic::XCHG, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6A9 */ { InstructionMnemonic::XCHG, { OPI_R0v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6AA */ { InstructionMnemonic::XCHG, { OPI_R2v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6AB */ { InstructionMnemonic::XCHG, { OPI_R1v, OPI_rAX, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE | IDF_OPERAND2_READWRITE }, + /* 6AC */ { InstructionMnemonic::XCRYPTCBC, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6AD */ { InstructionMnemonic::XCRYPTCFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6AE */ { InstructionMnemonic::XCRYPTCTR, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6AF */ { InstructionMnemonic::XCRYPTECB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6B0 */ { InstructionMnemonic::XCRYPTOFB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6B1 */ { InstructionMnemonic::XGETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6B2 */ { InstructionMnemonic::XLATB, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_REXW | IDF_ACCEPTS_SEGMENT_PREFIX }, + /* 6B3 */ { InstructionMnemonic::XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_INVALID_64 | IDF_OPERAND1_READWRITE }, + /* 6B4 */ { InstructionMnemonic::XOR, { OPI_Ev, OPI_sIb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B5 */ { InstructionMnemonic::XOR, { OPI_Ev, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B6 */ { InstructionMnemonic::XOR, { OPI_Gb, OPI_Eb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B7 */ { InstructionMnemonic::XOR, { OPI_Gv, OPI_Ev, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B8 */ { InstructionMnemonic::XOR, { OPI_Eb, OPI_Gb, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6B9 */ { InstructionMnemonic::XOR, { OPI_Ev, OPI_Gv, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BA */ { InstructionMnemonic::XOR, { OPI_AL, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_OPERAND1_READWRITE }, + /* 6BB */ { InstructionMnemonic::XOR, { OPI_rAX, OPI_sIz, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_OPERAND_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_OPERAND1_READWRITE }, + /* 6BC */ { InstructionMnemonic::XOR, { OPI_Eb, OPI_Ib, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BD */ { InstructionMnemonic::XORPD, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BE */ { InstructionMnemonic::XORPS, { OPI_V, OPI_W, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB | IDF_OPERAND1_READWRITE }, + /* 6BF */ { InstructionMnemonic::XRSTOR, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 6C0 */ { InstructionMnemonic::XSAVE, { OPI_M, OPI_NONE, OPI_NONE, OPI_NONE }, IDF_ACCEPTS_ADDRESS_SIZE_PREFIX | IDF_ACCEPTS_REXW | IDF_ACCEPTS_REXR | IDF_ACCEPTS_REXX | IDF_ACCEPTS_REXB }, + /* 6C1 */ { InstructionMnemonic::XSETBV, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6C2 */ { InstructionMnemonic::XSHA1, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6C3 */ { InstructionMnemonic::XSHA256, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, + /* 6C4 */ { InstructionMnemonic::XSTORE, { OPI_NONE, OPI_NONE, OPI_NONE, OPI_NONE }, 0 }, +}; + +#undef OPI_NONE +#undef OPI_AL +#undef OPI_AX +#undef OPI_Av +#undef OPI_C +#undef OPI_CL +#undef OPI_CS +#undef OPI_CX +#undef OPI_D +#undef OPI_DL +#undef OPI_DS +#undef OPI_DX +#undef OPI_E +#undef OPI_ES +#undef OPI_Eb +#undef OPI_Ed +#undef OPI_Eq +#undef OPI_Ev +#undef OPI_Ew +#undef OPI_Ey +#undef OPI_Ez +#undef OPI_FS +#undef OPI_Fv +#undef OPI_G +#undef OPI_GS +#undef OPI_Gb +#undef OPI_Gd +#undef OPI_Gq +#undef OPI_Gv +#undef OPI_Gw +#undef OPI_Gy +#undef OPI_Gz +#undef OPI_H +#undef OPI_Hqq +#undef OPI_Hx +#undef OPI_I1 +#undef OPI_Ib +#undef OPI_Iv +#undef OPI_Iw +#undef OPI_Iz +#undef OPI_Jb +#undef OPI_Jv +#undef OPI_Jz +#undef OPI_L +#undef OPI_Lx +#undef OPI_M +#undef OPI_Mb +#undef OPI_MbRd +#undef OPI_MbRv +#undef OPI_Md +#undef OPI_MdRy +#undef OPI_MdU +#undef OPI_Mdq +#undef OPI_Mo +#undef OPI_Mq +#undef OPI_MqU +#undef OPI_Ms +#undef OPI_Mt +#undef OPI_Mv +#undef OPI_Mw +#undef OPI_MwRd +#undef OPI_MwRv +#undef OPI_MwRy +#undef OPI_MwU +#undef OPI_N +#undef OPI_Ob +#undef OPI_Ov +#undef OPI_Ow +#undef OPI_P +#undef OPI_Q +#undef OPI_R +#undef OPI_R0b +#undef OPI_R0v +#undef OPI_R0w +#undef OPI_R0y +#undef OPI_R0z +#undef OPI_R1b +#undef OPI_R1v +#undef OPI_R1w +#undef OPI_R1y +#undef OPI_R1z +#undef OPI_R2b +#undef OPI_R2v +#undef OPI_R2w +#undef OPI_R2y +#undef OPI_R2z +#undef OPI_R3b +#undef OPI_R3v +#undef OPI_R3w +#undef OPI_R3y +#undef OPI_R3z +#undef OPI_R4b +#undef OPI_R4v +#undef OPI_R4w +#undef OPI_R4y +#undef OPI_R4z +#undef OPI_R5b +#undef OPI_R5v +#undef OPI_R5w +#undef OPI_R5y +#undef OPI_R5z +#undef OPI_R6b +#undef OPI_R6v +#undef OPI_R6w +#undef OPI_R6y +#undef OPI_R6z +#undef OPI_R7b +#undef OPI_R7v +#undef OPI_R7w +#undef OPI_R7y +#undef OPI_R7z +#undef OPI_S +#undef OPI_SS +#undef OPI_ST0 +#undef OPI_ST1 +#undef OPI_ST2 +#undef OPI_ST3 +#undef OPI_ST4 +#undef OPI_ST5 +#undef OPI_ST6 +#undef OPI_ST7 +#undef OPI_U +#undef OPI_Ux +#undef OPI_V +#undef OPI_Vdq +#undef OPI_Vqq +#undef OPI_Vsd +#undef OPI_Vx +#undef OPI_W +#undef OPI_Wdq +#undef OPI_Wqq +#undef OPI_Wsd +#undef OPI_Wx +#undef OPI_eAX +#undef OPI_eCX +#undef OPI_eDX +#undef OPI_rAX +#undef OPI_rCX +#undef OPI_rDX +#undef OPI_sIb +#undef OPI_sIz + +const char *instrMnemonicStrings[] = +{ + /* 000 */ "invalid", + /* 001 */ "aaa", + /* 002 */ "aad", + /* 003 */ "aam", + /* 004 */ "aas", + /* 005 */ "adc", + /* 006 */ "add", + /* 007 */ "addpd", + /* 008 */ "addps", + /* 009 */ "addsd", + /* 00A */ "addss", + /* 00B */ "addsubpd", + /* 00C */ "addsubps", + /* 00D */ "aesdec", + /* 00E */ "aesdeclast", + /* 00F */ "aesenc", + /* 010 */ "aesenclast", + /* 011 */ "aesimc", + /* 012 */ "aeskeygenassist", + /* 013 */ "and", + /* 014 */ "andnpd", + /* 015 */ "andnps", + /* 016 */ "andpd", + /* 017 */ "andps", + /* 018 */ "arpl", + /* 019 */ "blendpd", + /* 01A */ "blendps", + /* 01B */ "blendvpd", + /* 01C */ "blendvps", + /* 01D */ "bound", + /* 01E */ "bsf", + /* 01F */ "bsr", + /* 020 */ "bswap", + /* 021 */ "bt", + /* 022 */ "btc", + /* 023 */ "btr", + /* 024 */ "bts", + /* 025 */ "call", + /* 026 */ "cbw", + /* 027 */ "cdq", + /* 028 */ "cdqe", + /* 029 */ "clc", + /* 02A */ "cld", + /* 02B */ "clflush", + /* 02C */ "clgi", + /* 02D */ "cli", + /* 02E */ "clts", + /* 02F */ "cmc", + /* 030 */ "cmova", + /* 031 */ "cmovae", + /* 032 */ "cmovb", + /* 033 */ "cmovbe", + /* 034 */ "cmove", + /* 035 */ "cmovg", + /* 036 */ "cmovge", + /* 037 */ "cmovl", + /* 038 */ "cmovle", + /* 039 */ "cmovne", + /* 03A */ "cmovno", + /* 03B */ "cmovnp", + /* 03C */ "cmovns", + /* 03D */ "cmovo", + /* 03E */ "cmovp", + /* 03F */ "cmovs", + /* 040 */ "cmp", + /* 041 */ "cmppd", + /* 042 */ "cmpps", + /* 043 */ "cmpsb", + /* 044 */ "cmpsd", + /* 045 */ "cmpsq", + /* 046 */ "cmpss", + /* 047 */ "cmpsw", + /* 048 */ "cmpxchg", + /* 049 */ "cmpxchg16b", + /* 04A */ "cmpxchg8b", + /* 04B */ "comisd", + /* 04C */ "comiss", + /* 04D */ "cpuid", + /* 04E */ "cqo", + /* 04F */ "crc32", + /* 050 */ "cvtdq2pd", + /* 051 */ "cvtdq2ps", + /* 052 */ "cvtpd2dq", + /* 053 */ "cvtpd2pi", + /* 054 */ "cvtpd2ps", + /* 055 */ "cvtpi2pd", + /* 056 */ "cvtpi2ps", + /* 057 */ "cvtps2dq", + /* 058 */ "cvtps2pd", + /* 059 */ "cvtps2pi", + /* 05A */ "cvtsd2si", + /* 05B */ "cvtsd2ss", + /* 05C */ "cvtsi2sd", + /* 05D */ "cvtsi2ss", + /* 05E */ "cvtss2sd", + /* 05F */ "cvtss2si", + /* 060 */ "cvttpd2dq", + /* 061 */ "cvttpd2pi", + /* 062 */ "cvttps2dq", + /* 063 */ "cvttps2pi", + /* 064 */ "cvttsd2si", + /* 065 */ "cvttss2si", + /* 066 */ "cwd", + /* 067 */ "cwde", + /* 068 */ "daa", + /* 069 */ "das", + /* 06A */ "dec", + /* 06B */ "div", + /* 06C */ "divpd", + /* 06D */ "divps", + /* 06E */ "divsd", + /* 06F */ "divss", + /* 070 */ "dppd", + /* 071 */ "dpps", + /* 072 */ "emms", + /* 073 */ "enter", + /* 074 */ "extractps", + /* 075 */ "f2xm1", + /* 076 */ "fabs", + /* 077 */ "fadd", + /* 078 */ "faddp", + /* 079 */ "fbld", + /* 07A */ "fbstp", + /* 07B */ "fchs", + /* 07C */ "fclex", + /* 07D */ "fcmovb", + /* 07E */ "fcmovbe", + /* 07F */ "fcmove", + /* 080 */ "fcmovnb", + /* 081 */ "fcmovnbe", + /* 082 */ "fcmovne", + /* 083 */ "fcmovnu", + /* 084 */ "fcmovu", + /* 085 */ "fcom", + /* 086 */ "fcom2", + /* 087 */ "fcomi", + /* 088 */ "fcomip", + /* 089 */ "fcomp", + /* 08A */ "fcomp3", + /* 08B */ "fcomp5", + /* 08C */ "fcompp", + /* 08D */ "fcos", + /* 08E */ "fdecstp", + /* 08F */ "fdiv", + /* 090 */ "fdivp", + /* 091 */ "fdivr", + /* 092 */ "fdivrp", + /* 093 */ "femms", + /* 094 */ "ffree", + /* 095 */ "ffreep", + /* 096 */ "fiadd", + /* 097 */ "ficom", + /* 098 */ "ficomp", + /* 099 */ "fidiv", + /* 09A */ "fidivr", + /* 09B */ "fild", + /* 09C */ "fimul", + /* 09D */ "fincstp", + /* 09E */ "fist", + /* 09F */ "fistp", + /* 0A0 */ "fisttp", + /* 0A1 */ "fisub", + /* 0A2 */ "fisubr", + /* 0A3 */ "fld", + /* 0A4 */ "fld1", + /* 0A5 */ "fldcw", + /* 0A6 */ "fldenv", + /* 0A7 */ "fldl2e", + /* 0A8 */ "fldl2t", + /* 0A9 */ "fldlg2", + /* 0AA */ "fldln2", + /* 0AB */ "fldpi", + /* 0AC */ "fldz", + /* 0AD */ "fmul", + /* 0AE */ "fmulp", + /* 0AF */ "fndisi", + /* 0B0 */ "fneni", + /* 0B1 */ "fninit", + /* 0B2 */ "fnop", + /* 0B3 */ "fnsave", + /* 0B4 */ "fnsetpm", + /* 0B5 */ "fnstcw", + /* 0B6 */ "fnstenv", + /* 0B7 */ "fnstsw", + /* 0B8 */ "fpatan", + /* 0B9 */ "fprem", + /* 0BA */ "fprem1", + /* 0BB */ "fptan", + /* 0BC */ "frndint", + /* 0BD */ "frstor", + /* 0BE */ "frstpm", + /* 0BF */ "fscale", + /* 0C0 */ "fsin", + /* 0C1 */ "fsincos", + /* 0C2 */ "fsqrt", + /* 0C3 */ "fst", + /* 0C4 */ "fstp", + /* 0C5 */ "fstp1", + /* 0C6 */ "fstp8", + /* 0C7 */ "fstp9", + /* 0C8 */ "fsub", + /* 0C9 */ "fsubp", + /* 0CA */ "fsubr", + /* 0CB */ "fsubrp", + /* 0CC */ "ftst", + /* 0CD */ "fucom", + /* 0CE */ "fucomi", + /* 0CF */ "fucomip", + /* 0D0 */ "fucomp", + /* 0D1 */ "fucompp", + /* 0D2 */ "fxam", + /* 0D3 */ "fxch", + /* 0D4 */ "fxch4", + /* 0D5 */ "fxch7", + /* 0D6 */ "fxrstor", + /* 0D7 */ "fxsave", + /* 0D8 */ "fxtract", + /* 0D9 */ "fyl2x", + /* 0DA */ "fyl2xp1", + /* 0DB */ "getsec", + /* 0DC */ "haddpd", + /* 0DD */ "haddps", + /* 0DE */ "hlt", + /* 0DF */ "hsubpd", + /* 0E0 */ "hsubps", + /* 0E1 */ "idiv", + /* 0E2 */ "imul", + /* 0E3 */ "in", + /* 0E4 */ "inc", + /* 0E5 */ "insb", + /* 0E6 */ "insd", + /* 0E7 */ "insertps", + /* 0E8 */ "insw", + /* 0E9 */ "int", + /* 0EA */ "int1", + /* 0EB */ "int3", + /* 0EC */ "into", + /* 0ED */ "invd", + /* 0EE */ "invept", + /* 0EF */ "invlpg", + /* 0F0 */ "invlpga", + /* 0F1 */ "invvpid", + /* 0F2 */ "iretd", + /* 0F3 */ "iretq", + /* 0F4 */ "iretw", + /* 0F5 */ "ja", + /* 0F6 */ "jb", + /* 0F7 */ "jbe", + /* 0F8 */ "jcxz", + /* 0F9 */ "je", + /* 0FA */ "jecxz", + /* 0FB */ "jg", + /* 0FC */ "jge", + /* 0FD */ "jl", + /* 0FE */ "jle", + /* 0FF */ "jmp", + /* 100 */ "jnb", + /* 101 */ "jne", + /* 102 */ "jno", + /* 103 */ "jnp", + /* 104 */ "jns", + /* 105 */ "jo", + /* 106 */ "jp", + /* 107 */ "jrcxz", + /* 108 */ "js", + /* 109 */ "lahf", + /* 10A */ "lar", + /* 10B */ "lddqu", + /* 10C */ "ldmxcsr", + /* 10D */ "lds", + /* 10E */ "lea", + /* 10F */ "leave", + /* 110 */ "les", + /* 111 */ "lfence", + /* 112 */ "lfs", + /* 113 */ "lgdt", + /* 114 */ "lgs", + /* 115 */ "lidt", + /* 116 */ "lldt", + /* 117 */ "lmsw", + /* 118 */ "lock", + /* 119 */ "lodsb", + /* 11A */ "lodsd", + /* 11B */ "lodsq", + /* 11C */ "lodsw", + /* 11D */ "loop", + /* 11E */ "loope", + /* 11F */ "loopne", + /* 120 */ "lsl", + /* 121 */ "lss", + /* 122 */ "ltr", + /* 123 */ "maskmovdqu", + /* 124 */ "maskmovq", + /* 125 */ "maxpd", + /* 126 */ "maxps", + /* 127 */ "maxsd", + /* 128 */ "maxss", + /* 129 */ "mfence", + /* 12A */ "minpd", + /* 12B */ "minps", + /* 12C */ "minsd", + /* 12D */ "minss", + /* 12E */ "monitor", + /* 12F */ "montmul", + /* 130 */ "mov", + /* 131 */ "movapd", + /* 132 */ "movaps", + /* 133 */ "movbe", + /* 134 */ "movd", + /* 135 */ "movddup", + /* 136 */ "movdq2q", + /* 137 */ "movdqa", + /* 138 */ "movdqu", + /* 139 */ "movhlps", + /* 13A */ "movhpd", + /* 13B */ "movhps", + /* 13C */ "movlhps", + /* 13D */ "movlpd", + /* 13E */ "movlps", + /* 13F */ "movmskpd", + /* 140 */ "movmskps", + /* 141 */ "movntdq", + /* 142 */ "movntdqa", + /* 143 */ "movnti", + /* 144 */ "movntpd", + /* 145 */ "movntps", + /* 146 */ "movntq", + /* 147 */ "movq", + /* 148 */ "movq2dq", + /* 149 */ "movsb", + /* 14A */ "movsd", + /* 14B */ "movshdup", + /* 14C */ "movsldup", + /* 14D */ "movsq", + /* 14E */ "movss", + /* 14F */ "movsw", + /* 150 */ "movsx", + /* 151 */ "movsxd", + /* 152 */ "movupd", + /* 153 */ "movups", + /* 154 */ "movzx", + /* 155 */ "mpsadbw", + /* 156 */ "mul", + /* 157 */ "mulpd", + /* 158 */ "mulps", + /* 159 */ "mulsd", + /* 15A */ "mulss", + /* 15B */ "mwait", + /* 15C */ "neg", + /* 15D */ "nop", + /* 15E */ "not", + /* 15F */ "or", + /* 160 */ "orpd", + /* 161 */ "orps", + /* 162 */ "out", + /* 163 */ "outsb", + /* 164 */ "outsd", + /* 165 */ "outsw", + /* 166 */ "pabsb", + /* 167 */ "pabsd", + /* 168 */ "pabsw", + /* 169 */ "packssdw", + /* 16A */ "packsswb", + /* 16B */ "packusdw", + /* 16C */ "packuswb", + /* 16D */ "paddb", + /* 16E */ "paddd", + /* 16F */ "paddq", + /* 170 */ "paddsb", + /* 171 */ "paddsw", + /* 172 */ "paddusb", + /* 173 */ "paddusw", + /* 174 */ "paddw", + /* 175 */ "palignr", + /* 176 */ "pand", + /* 177 */ "pandn", + /* 178 */ "pause", + /* 179 */ "pavgb", + /* 17A */ "pavgusb", + /* 17B */ "pavgw", + /* 17C */ "pblendvb", + /* 17D */ "pblendw", + /* 17E */ "pclmulqdq", + /* 17F */ "pcmpeqb", + /* 180 */ "pcmpeqd", + /* 181 */ "pcmpeqq", + /* 182 */ "pcmpeqw", + /* 183 */ "pcmpestri", + /* 184 */ "pcmpestrm", + /* 185 */ "pcmpgtb", + /* 186 */ "pcmpgtd", + /* 187 */ "pcmpgtq", + /* 188 */ "pcmpgtw", + /* 189 */ "pcmpistri", + /* 18A */ "pcmpistrm", + /* 18B */ "pextrb", + /* 18C */ "pextrd", + /* 18D */ "pextrq", + /* 18E */ "pextrw", + /* 18F */ "pf2id", + /* 190 */ "pf2iw", + /* 191 */ "pfacc", + /* 192 */ "pfadd", + /* 193 */ "pfcmpeq", + /* 194 */ "pfcmpge", + /* 195 */ "pfcmpgt", + /* 196 */ "pfmax", + /* 197 */ "pfmin", + /* 198 */ "pfmul", + /* 199 */ "pfnacc", + /* 19A */ "pfpnacc", + /* 19B */ "pfrcp", + /* 19C */ "pfrcpit1", + /* 19D */ "pfrcpit2", + /* 19E */ "pfrsqit1", + /* 19F */ "pfrsqrt", + /* 1A0 */ "pfsub", + /* 1A1 */ "pfsubr", + /* 1A2 */ "phaddd", + /* 1A3 */ "phaddsw", + /* 1A4 */ "phaddw", + /* 1A5 */ "phminposuw", + /* 1A6 */ "phsubd", + /* 1A7 */ "phsubsw", + /* 1A8 */ "phsubw", + /* 1A9 */ "pi2fd", + /* 1AA */ "pi2fw", + /* 1AB */ "pinsrb", + /* 1AC */ "pinsrd", + /* 1AD */ "pinsrq", + /* 1AE */ "pinsrw", + /* 1AF */ "pmaddubsw", + /* 1B0 */ "pmaddwd", + /* 1B1 */ "pmaxsb", + /* 1B2 */ "pmaxsd", + /* 1B3 */ "pmaxsw", + /* 1B4 */ "pmaxub", + /* 1B5 */ "pmaxud", + /* 1B6 */ "pmaxuw", + /* 1B7 */ "pminsb", + /* 1B8 */ "pminsd", + /* 1B9 */ "pminsw", + /* 1BA */ "pminub", + /* 1BB */ "pminud", + /* 1BC */ "pminuw", + /* 1BD */ "pmovmskb", + /* 1BE */ "pmovsxbd", + /* 1BF */ "pmovsxbq", + /* 1C0 */ "pmovsxbw", + /* 1C1 */ "pmovsxdq", + /* 1C2 */ "pmovsxwd", + /* 1C3 */ "pmovsxwq", + /* 1C4 */ "pmovzxbd", + /* 1C5 */ "pmovzxbq", + /* 1C6 */ "pmovzxbw", + /* 1C7 */ "pmovzxdq", + /* 1C8 */ "pmovzxwd", + /* 1C9 */ "pmovzxwq", + /* 1CA */ "pmuldq", + /* 1CB */ "pmulhrsw", + /* 1CC */ "pmulhrw", + /* 1CD */ "pmulhuw", + /* 1CE */ "pmulhw", + /* 1CF */ "pmulld", + /* 1D0 */ "pmullw", + /* 1D1 */ "pmuludq", + /* 1D2 */ "pop", + /* 1D3 */ "popa", + /* 1D4 */ "popad", + /* 1D5 */ "popcnt", + /* 1D6 */ "popfd", + /* 1D7 */ "popfq", + /* 1D8 */ "popfw", + /* 1D9 */ "por", + /* 1DA */ "prefetch", + /* 1DB */ "prefetchnta", + /* 1DC */ "prefetcht0", + /* 1DD */ "prefetcht1", + /* 1DE */ "prefetcht2", + /* 1DF */ "psadbw", + /* 1E0 */ "pshufb", + /* 1E1 */ "pshufd", + /* 1E2 */ "pshufhw", + /* 1E3 */ "pshuflw", + /* 1E4 */ "pshufw", + /* 1E5 */ "psignb", + /* 1E6 */ "psignd", + /* 1E7 */ "psignw", + /* 1E8 */ "pslld", + /* 1E9 */ "pslldq", + /* 1EA */ "psllq", + /* 1EB */ "psllw", + /* 1EC */ "psrad", + /* 1ED */ "psraw", + /* 1EE */ "psrld", + /* 1EF */ "psrldq", + /* 1F0 */ "psrlq", + /* 1F1 */ "psrlw", + /* 1F2 */ "psubb", + /* 1F3 */ "psubd", + /* 1F4 */ "psubq", + /* 1F5 */ "psubsb", + /* 1F6 */ "psubsw", + /* 1F7 */ "psubusb", + /* 1F8 */ "psubusw", + /* 1F9 */ "psubw", + /* 1FA */ "pswapd", + /* 1FB */ "ptest", + /* 1FC */ "punpckhbw", + /* 1FD */ "punpckhdq", + /* 1FE */ "punpckhqdq", + /* 1FF */ "punpckhwd", + /* 200 */ "punpcklbw", + /* 201 */ "punpckldq", + /* 202 */ "punpcklqdq", + /* 203 */ "punpcklwd", + /* 204 */ "push", + /* 205 */ "pusha", + /* 206 */ "pushad", + /* 207 */ "pushfd", + /* 208 */ "pushfq", + /* 209 */ "pushfw", + /* 20A */ "pxor", + /* 20B */ "rcl", + /* 20C */ "rcpps", + /* 20D */ "rcpss", + /* 20E */ "rcr", + /* 20F */ "rdmsr", + /* 210 */ "rdpmc", + /* 211 */ "rdrand", + /* 212 */ "rdtsc", + /* 213 */ "rdtscp", + /* 214 */ "rep", + /* 215 */ "repne", + /* 216 */ "ret", + /* 217 */ "retf", + /* 218 */ "rol", + /* 219 */ "ror", + /* 21A */ "roundpd", + /* 21B */ "roundps", + /* 21C */ "roundsd", + /* 21D */ "roundss", + /* 21E */ "rsm", + /* 21F */ "rsqrtps", + /* 220 */ "rsqrtss", + /* 221 */ "sahf", + /* 222 */ "salc", + /* 223 */ "sar", + /* 224 */ "sbb", + /* 225 */ "scasb", + /* 226 */ "scasd", + /* 227 */ "scasq", + /* 228 */ "scasw", + /* 229 */ "seta", + /* 22A */ "setae", + /* 22B */ "setb", + /* 22C */ "setbe", + /* 22D */ "sete", + /* 22E */ "setg", + /* 22F */ "setge", + /* 230 */ "setl", + /* 231 */ "setle", + /* 232 */ "setne", + /* 233 */ "setno", + /* 234 */ "setnp", + /* 235 */ "setns", + /* 236 */ "seto", + /* 237 */ "setp", + /* 238 */ "sets", + /* 239 */ "sfence", + /* 23A */ "sgdt", + /* 23B */ "shl", + /* 23C */ "shld", + /* 23D */ "shr", + /* 23E */ "shrd", + /* 23F */ "shufpd", + /* 240 */ "shufps", + /* 241 */ "sidt", + /* 242 */ "skinit", + /* 243 */ "sldt", + /* 244 */ "smsw", + /* 245 */ "sqrtpd", + /* 246 */ "sqrtps", + /* 247 */ "sqrtsd", + /* 248 */ "sqrtss", + /* 249 */ "stc", + /* 24A */ "std", + /* 24B */ "stgi", + /* 24C */ "sti", + /* 24D */ "stmxcsr", + /* 24E */ "stosb", + /* 24F */ "stosd", + /* 250 */ "stosq", + /* 251 */ "stosw", + /* 252 */ "str", + /* 253 */ "sub", + /* 254 */ "subpd", + /* 255 */ "subps", + /* 256 */ "subsd", + /* 257 */ "subss", + /* 258 */ "swapgs", + /* 259 */ "syscall", + /* 25A */ "sysenter", + /* 25B */ "sysexit", + /* 25C */ "sysret", + /* 25D */ "test", + /* 25E */ "ucomisd", + /* 25F */ "ucomiss", + /* 260 */ "ud2", + /* 261 */ "unpckhpd", + /* 262 */ "unpckhps", + /* 263 */ "unpcklpd", + /* 264 */ "unpcklps", + /* 265 */ "vaddpd", + /* 266 */ "vaddps", + /* 267 */ "vaddsd", + /* 268 */ "vaddss", + /* 269 */ "vaddsubpd", + /* 26A */ "vaddsubps", + /* 26B */ "vaesdec", + /* 26C */ "vaesdeclast", + /* 26D */ "vaesenc", + /* 26E */ "vaesenclast", + /* 26F */ "vaesimc", + /* 270 */ "vaeskeygenassist", + /* 271 */ "vandnpd", + /* 272 */ "vandnps", + /* 273 */ "vandpd", + /* 274 */ "vandps", + /* 275 */ "vblendpd", + /* 276 */ "vblendps", + /* 277 */ "vblendvpd", + /* 278 */ "vblendvps", + /* 279 */ "vbroadcastsd", + /* 27A */ "vbroadcastss", + /* 27B */ "vcmppd", + /* 27C */ "vcmpps", + /* 27D */ "vcmpsd", + /* 27E */ "vcmpss", + /* 27F */ "vcomisd", + /* 280 */ "vcomiss", + /* 281 */ "vcvtdq2pd", + /* 282 */ "vcvtdq2ps", + /* 283 */ "vcvtpd2dq", + /* 284 */ "vcvtpd2ps", + /* 285 */ "vcvtps2dq", + /* 286 */ "vcvtps2pd", + /* 287 */ "vcvtsd2si", + /* 288 */ "vcvtsd2ss", + /* 289 */ "vcvtsi2sd", + /* 28A */ "vcvtsi2ss", + /* 28B */ "vcvtss2sd", + /* 28C */ "vcvtss2si", + /* 28D */ "vcvttpd2dq", + /* 28E */ "vcvttps2dq", + /* 28F */ "vcvttsd2si", + /* 290 */ "vcvttss2si", + /* 291 */ "vdivpd", + /* 292 */ "vdivps", + /* 293 */ "vdivsd", + /* 294 */ "vdivss", + /* 295 */ "vdppd", + /* 296 */ "vdpps", + /* 297 */ "verr", + /* 298 */ "verw", + /* 299 */ "vextractf128", + /* 29A */ "vextractps", + /* 29B */ "vhaddpd", + /* 29C */ "vhaddps", + /* 29D */ "vhsubpd", + /* 29E */ "vhsubps", + /* 29F */ "vinsertf128", + /* 2A0 */ "vinsertps", + /* 2A1 */ "vlddqu", + /* 2A2 */ "vmaskmovdqu", + /* 2A3 */ "vmaskmovpd", + /* 2A4 */ "vmaskmovps", + /* 2A5 */ "vmaxpd", + /* 2A6 */ "vmaxps", + /* 2A7 */ "vmaxsd", + /* 2A8 */ "vmaxss", + /* 2A9 */ "vmcall", + /* 2AA */ "vmclear", + /* 2AB */ "vminpd", + /* 2AC */ "vminps", + /* 2AD */ "vminsd", + /* 2AE */ "vminss", + /* 2AF */ "vmlaunch", + /* 2B0 */ "vmload", + /* 2B1 */ "vmmcall", + /* 2B2 */ "vmovapd", + /* 2B3 */ "vmovaps", + /* 2B4 */ "vmovd", + /* 2B5 */ "vmovddup", + /* 2B6 */ "vmovdqa", + /* 2B7 */ "vmovdqu", + /* 2B8 */ "vmovhlps", + /* 2B9 */ "vmovhpd", + /* 2BA */ "vmovhps", + /* 2BB */ "vmovlhps", + /* 2BC */ "vmovlpd", + /* 2BD */ "vmovlps", + /* 2BE */ "vmovmskpd", + /* 2BF */ "vmovmskps", + /* 2C0 */ "vmovntdq", + /* 2C1 */ "vmovntdqa", + /* 2C2 */ "vmovntpd", + /* 2C3 */ "vmovntps", + /* 2C4 */ "vmovq", + /* 2C5 */ "vmovsd", + /* 2C6 */ "vmovshdup", + /* 2C7 */ "vmovsldup", + /* 2C8 */ "vmovss", + /* 2C9 */ "vmovupd", + /* 2CA */ "vmovups", + /* 2CB */ "vmpsadbw", + /* 2CC */ "vmptrld", + /* 2CD */ "vmptrst", + /* 2CE */ "vmread", + /* 2CF */ "vmresume", + /* 2D0 */ "vmrun", + /* 2D1 */ "vmsave", + /* 2D2 */ "vmulpd", + /* 2D3 */ "vmulps", + /* 2D4 */ "vmulsd", + /* 2D5 */ "vmulss", + /* 2D6 */ "vmwrite", + /* 2D7 */ "vmxoff", + /* 2D8 */ "vmxon", + /* 2D9 */ "vorpd", + /* 2DA */ "vorps", + /* 2DB */ "vpabsb", + /* 2DC */ "vpabsd", + /* 2DD */ "vpabsw", + /* 2DE */ "vpackssdw", + /* 2DF */ "vpacksswb", + /* 2E0 */ "vpackusdw", + /* 2E1 */ "vpackuswb", + /* 2E2 */ "vpaddb", + /* 2E3 */ "vpaddd", + /* 2E4 */ "vpaddq", + /* 2E5 */ "vpaddsb", + /* 2E6 */ "vpaddsw", + /* 2E7 */ "vpaddusb", + /* 2E8 */ "vpaddusw", + /* 2E9 */ "vpaddw", + /* 2EA */ "vpalignr", + /* 2EB */ "vpand", + /* 2EC */ "vpandn", + /* 2ED */ "vpavgb", + /* 2EE */ "vpavgw", + /* 2EF */ "vpblendvb", + /* 2F0 */ "vpblendw", + /* 2F1 */ "vpclmulqdq", + /* 2F2 */ "vpcmpeqb", + /* 2F3 */ "vpcmpeqd", + /* 2F4 */ "vpcmpeqq", + /* 2F5 */ "vpcmpeqw", + /* 2F6 */ "vpcmpestri", + /* 2F7 */ "vpcmpestrm", + /* 2F8 */ "vpcmpgtb", + /* 2F9 */ "vpcmpgtd", + /* 2FA */ "vpcmpgtq", + /* 2FB */ "vpcmpgtw", + /* 2FC */ "vpcmpistri", + /* 2FD */ "vpcmpistrm", + /* 2FE */ "vperm2f128", + /* 2FF */ "vpermilpd", + /* 300 */ "vpermilps", + /* 301 */ "vpextrb", + /* 302 */ "vpextrd", + /* 303 */ "vpextrq", + /* 304 */ "vpextrw", + /* 305 */ "vphaddd", + /* 306 */ "vphaddsw", + /* 307 */ "vphaddw", + /* 308 */ "vphminposuw", + /* 309 */ "vphsubd", + /* 30A */ "vphsubsw", + /* 30B */ "vphsubw", + /* 30C */ "vpinsrb", + /* 30D */ "vpinsrd", + /* 30E */ "vpinsrq", + /* 30F */ "vpinsrw", + /* 310 */ "vpmaddubsw", + /* 311 */ "vpmaddwd", + /* 312 */ "vpmaxsb", + /* 313 */ "vpmaxsd", + /* 314 */ "vpmaxsw", + /* 315 */ "vpmaxub", + /* 316 */ "vpmaxud", + /* 317 */ "vpmaxuw", + /* 318 */ "vpminsb", + /* 319 */ "vpminsd", + /* 31A */ "vpminsw", + /* 31B */ "vpminub", + /* 31C */ "vpminud", + /* 31D */ "vpminuw", + /* 31E */ "vpmovmskb", + /* 31F */ "vpmovsxbd", + /* 320 */ "vpmovsxbq", + /* 321 */ "vpmovsxbw", + /* 322 */ "vpmovsxwd", + /* 323 */ "vpmovsxwq", + /* 324 */ "vpmovzxbd", + /* 325 */ "vpmovzxbq", + /* 326 */ "vpmovzxbw", + /* 327 */ "vpmovzxdq", + /* 328 */ "vpmovzxwd", + /* 329 */ "vpmovzxwq", + /* 32A */ "vpmuldq", + /* 32B */ "vpmulhrsw", + /* 32C */ "vpmulhuw", + /* 32D */ "vpmulhw", + /* 32E */ "vpmulld", + /* 32F */ "vpmullw", + /* 330 */ "vpor", + /* 331 */ "vpsadbw", + /* 332 */ "vpshufb", + /* 333 */ "vpshufd", + /* 334 */ "vpshufhw", + /* 335 */ "vpshuflw", + /* 336 */ "vpsignb", + /* 337 */ "vpsignd", + /* 338 */ "vpsignw", + /* 339 */ "vpslld", + /* 33A */ "vpslldq", + /* 33B */ "vpsllq", + /* 33C */ "vpsllw", + /* 33D */ "vpsrad", + /* 33E */ "vpsraw", + /* 33F */ "vpsrld", + /* 340 */ "vpsrldq", + /* 341 */ "vpsrlq", + /* 342 */ "vpsrlw", + /* 343 */ "vpsubb", + /* 344 */ "vpsubd", + /* 345 */ "vpsubq", + /* 346 */ "vpsubsb", + /* 347 */ "vpsubsw", + /* 348 */ "vpsubusb", + /* 349 */ "vpsubusw", + /* 34A */ "vpsubw", + /* 34B */ "vptest", + /* 34C */ "vpunpckhbw", + /* 34D */ "vpunpckhdq", + /* 34E */ "vpunpckhqdq", + /* 34F */ "vpunpckhwd", + /* 350 */ "vpunpcklbw", + /* 351 */ "vpunpckldq", + /* 352 */ "vpunpcklqdq", + /* 353 */ "vpunpcklwd", + /* 354 */ "vpxor", + /* 355 */ "vrcpps", + /* 356 */ "vrcpss", + /* 357 */ "vroundpd", + /* 358 */ "vroundps", + /* 359 */ "vroundsd", + /* 35A */ "vroundss", + /* 35B */ "vrsqrtps", + /* 35C */ "vrsqrtss", + /* 35D */ "vshufpd", + /* 35E */ "vshufps", + /* 35F */ "vsqrtpd", + /* 360 */ "vsqrtps", + /* 361 */ "vsqrtsd", + /* 362 */ "vsqrtss", + /* 363 */ "vstmxcsr", + /* 364 */ "vsubpd", + /* 365 */ "vsubps", + /* 366 */ "vsubsd", + /* 367 */ "vsubss", + /* 368 */ "vtestpd", + /* 369 */ "vtestps", + /* 36A */ "vucomisd", + /* 36B */ "vucomiss", + /* 36C */ "vunpckhpd", + /* 36D */ "vunpckhps", + /* 36E */ "vunpcklpd", + /* 36F */ "vunpcklps", + /* 370 */ "vxorpd", + /* 371 */ "vxorps", + /* 372 */ "vzeroall", + /* 373 */ "vzeroupper", + /* 374 */ "wait", + /* 375 */ "wbinvd", + /* 376 */ "wrmsr", + /* 377 */ "xadd", + /* 378 */ "xchg", + /* 379 */ "xcryptcbc", + /* 37A */ "xcryptcfb", + /* 37B */ "xcryptctr", + /* 37C */ "xcryptecb", + /* 37D */ "xcryptofb", + /* 37E */ "xgetbv", + /* 37F */ "xlatb", + /* 380 */ "xor", + /* 381 */ "xorpd", + /* 382 */ "xorps", + /* 383 */ "xrstor", + /* 384 */ "xsave", + /* 385 */ "xsetbv", + /* 386 */ "xsha1", + /* 387 */ "xsha256", + /* 388 */ "xstore", +}; + +} + +} \ No newline at end of file diff --git a/VerteronDisassemblerEngine/VXOpcodeTable.h b/Zydis/ZydisOpcodeTable.hpp similarity index 92% rename from VerteronDisassemblerEngine/VXOpcodeTable.h rename to Zydis/ZydisOpcodeTable.hpp index 9824d37..1b1d14a 100644 --- a/VerteronDisassemblerEngine/VXOpcodeTable.h +++ b/Zydis/ZydisOpcodeTable.hpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 29. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,19 +26,21 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#pragma once +***************************************************************************************************/ -#include "stdint.h" -#include "assert.h" +#ifndef _ZYDIS_OPCODETABLE_HPP_ +#define _ZYDIS_OPCODETABLE_HPP_ -namespace Verteron +#include +#include + +namespace Zydis { /** * @brief Values that represent an instruction mnemonic. */ -enum class VXInstructionMnemonic : uint16_t +enum class InstructionMnemonic : uint16_t { /* 000 */ INVALID, /* 001 */ AAA, @@ -953,12 +953,12 @@ enum class VXInstructionMnemonic : uint16_t * @brief Defines an alias representing an opcode tree node. An opcode tree node is a 16 bit * unsigned integer value with its first 4 bits reserved for the node type. */ -typedef uint16_t VXOpcodeTreeNode; +typedef uint16_t OpcodeTreeNode; /** * @brief Values that represent the type of an opcode tree node. */ -enum class VXOpcodeTreeNodeType : uint8_t +enum class OpcodeTreeNodeType : uint8_t { /** * @brief Reference to a concrete instruction definition. @@ -1025,7 +1025,7 @@ enum class VXOpcodeTreeNodeType : uint8_t /** * @brief Values that represent the type of an operand in the instruction definition. */ -enum class VXDefinedOperandType : uint8_t +enum class DefinedOperandType : uint8_t { /* * @brief No operand. @@ -1286,7 +1286,7 @@ enum class VXDefinedOperandType : uint8_t * @brief Values that represent the size of an operand in the instruction definition. * Do not change the order or the values of this enum! */ -enum class VXDefinedOperandSize : uint8_t +enum class DefinedOperandSize : uint8_t { /** * @brief No operand. @@ -1386,7 +1386,7 @@ enum class VXDefinedOperandSize : uint8_t * @brief Values that represent optional flags in the instruction definition. * Do not change the order or the values of this enum! */ -enum VXInstructionDefinitionFlags : uint16_t +enum InstructionDefinitionFlags : uint16_t { /** * @brief The instruction accepts the rex.b prefix value. @@ -1454,30 +1454,30 @@ enum VXInstructionDefinitionFlags : uint16_t /** * @brief An operand definition. */ -struct VXOperandDefinition +struct OperandDefinition { /** * @brief The defined operand type. */ - VXDefinedOperandType type; + DefinedOperandType type; /** * @brief The defined operand size. */ - VXDefinedOperandSize size; + DefinedOperandSize size; }; /** * @brief An instruction definition. */ -struct VXInstructionDefinition +struct InstructionDefinition { /** * @brief The instruction mnemonic. */ - VXInstructionMnemonic mnemonic; + InstructionMnemonic mnemonic; /** * @brief The operand definitions for all four possible operands. */ - VXOperandDefinition operand[4]; + OperandDefinition operand[4]; /** * @brief Additional flags for the instruction definition. */ @@ -1492,24 +1492,24 @@ namespace Internal * @brief Contains all opcode tables. * Indexed by the numeric value of the opcode. */ -extern const VXOpcodeTreeNode optreeTable[][256]; +extern const OpcodeTreeNode optreeTable[][256]; /** * @brief Contains all modrm_mod switch tables. * Index values: * 0 = [modrm_mod == !11] * 1 = [modrm_mod == 11] */ -extern const VXOpcodeTreeNode optreeModrmMod[][2]; +extern const OpcodeTreeNode optreeModrmMod[][2]; /** * @brief Contains all modrm_reg switch tables. * Indexed by the numeric value of the modrm_reg field. */ -extern const VXOpcodeTreeNode optreeModrmReg[][8]; +extern const OpcodeTreeNode optreeModrmReg[][8]; /** * @brief Contains all modrm_rm switch tables. * Indexed by the numeric value of the modrm_rm field. */ -extern const VXOpcodeTreeNode optreeModrmRm[][8]; +extern const OpcodeTreeNode optreeModrmRm[][8]; /** * @brief Contains all mandatory-prefix switch tables. * Index values: @@ -1518,13 +1518,13 @@ extern const VXOpcodeTreeNode optreeModrmRm[][8]; * 2 = F3 * 3 = 66 */ -extern const VXOpcodeTreeNode optreeMandatory[][4]; +extern const OpcodeTreeNode optreeMandatory[][4]; /** * @brief Contains all x87 opcode tables. * Indexed by the numeric value of the 6 lowest bits of the modrm byte (modrm_mod should * always be 11). */ -extern const VXOpcodeTreeNode optreeX87[][64]; +extern const OpcodeTreeNode optreeX87[][64]; /** * @brief Contains all address-size switch tables. * Index values: @@ -1532,7 +1532,7 @@ extern const VXOpcodeTreeNode optreeX87[][64]; * 1 = 32 * 2 = 64 */ -extern const VXOpcodeTreeNode optreeAddressSize[][3]; +extern const OpcodeTreeNode optreeAddressSize[][3]; /** * @brief Contains all operand-size switch tables. * Index values: @@ -1540,26 +1540,26 @@ extern const VXOpcodeTreeNode optreeAddressSize[][3]; * 1 = 32 * 2 = 64 */ -extern const VXOpcodeTreeNode optreeOperandSize[][3]; +extern const OpcodeTreeNode optreeOperandSize[][3]; /** * @brief Contains all cpu-mode switch tables. * Index values: * 0 = [!= 64] * 1 = 64 */ -extern const VXOpcodeTreeNode optreeMode[][2]; +extern const OpcodeTreeNode optreeMode[][2]; /** * @brief Contains all vendor switch tables. * Index values: * 0 = AMD * 1 = Intel */ -extern const VXOpcodeTreeNode optreeVendor[][2]; +extern const OpcodeTreeNode optreeVendor[][2]; /** * @brief Contains all 3dnow! switch tables. * Indexed by the numeric value of the 3dnow! opcode. */ -extern const VXOpcodeTreeNode optree3dnow[][256]; +extern const OpcodeTreeNode optree3dnow[][256]; /** * @brief Contains all vex switch tables. * Index values: @@ -1580,21 +1580,21 @@ extern const VXOpcodeTreeNode optree3dnow[][256]; * E = F2_0F38 * F = F2_0F3A */ -extern const VXOpcodeTreeNode optreeVex[][16]; +extern const OpcodeTreeNode optreeVex[][16]; /** * @brief Contains all vex_w switch tables. * Indexed by the numeric value of the vex_w field. */ -extern const VXOpcodeTreeNode optreeVexW[][2]; +extern const OpcodeTreeNode optreeVexW[][2]; /** * @brief Contains all vex_l switch tables. * Indexed by the numeric value of the vex_l field. */ -extern const VXOpcodeTreeNode optreeVexL[][2]; +extern const OpcodeTreeNode optreeVexL[][2]; /** * @brief Contains all instruction definitions. */ -extern const VXInstructionDefinition instrDefinitions[]; +extern const InstructionDefinition instrDefinitions[]; /** * @brief Contains all instruction mnemonic strings. */ @@ -1605,9 +1605,9 @@ extern const char* instrMnemonicStrings[]; * @param node The node. * @return The type of the specified opcode tree node. */ -inline VXOpcodeTreeNodeType VDEGetOpcodeNodeType(VXOpcodeTreeNode node) +inline OpcodeTreeNodeType GetOpcodeNodeType(OpcodeTreeNode node) { - return static_cast((node >> 12) & 0x0F); + return static_cast((node >> 12)& 0x0F); } /** @@ -1615,16 +1615,16 @@ inline VXOpcodeTreeNodeType VDEGetOpcodeNodeType(VXOpcodeTreeNode node) * @param node The node. * @return The value of the specified opcode tree node. */ -inline uint16_t VDEGetOpcodeNodeValue(VXOpcodeTreeNode node) +inline uint16_t GetOpcodeNodeValue(OpcodeTreeNode node) { - return (node & 0x0FFF); + return (node& 0x0FFF); } /** * @brief Returns the root node of the opcode tree. * @return The root node of the opcode tree. */ -inline VXOpcodeTreeNode VDEGetOpcodeTreeRoot() +inline OpcodeTreeNode GetOpcodeTreeRoot() { return 0x1000; } @@ -1635,53 +1635,53 @@ inline VXOpcodeTreeNode VDEGetOpcodeTreeRoot() * @param index The index of the child node to retrieve. * @return The specified child node. */ -inline VXOpcodeTreeNode VDEGetOpcodeTreeChild(VXOpcodeTreeNode parent, uint16_t index) +inline OpcodeTreeNode GetOpcodeTreeChild(OpcodeTreeNode parent, uint16_t index) { using namespace Internal; - VXOpcodeTreeNodeType nodeType = VDEGetOpcodeNodeType(parent); - uint16_t tableIndex = VDEGetOpcodeNodeValue(parent); + OpcodeTreeNodeType nodeType = GetOpcodeNodeType(parent); + uint16_t tableIndex = GetOpcodeNodeValue(parent); switch (nodeType) { - case VXOpcodeTreeNodeType::TABLE: + case OpcodeTreeNodeType::TABLE: assert(index < 256); return optreeTable[tableIndex][index]; - case VXOpcodeTreeNodeType::MODRM_MOD: + case OpcodeTreeNodeType::MODRM_MOD: assert(index < 2); return optreeModrmMod[tableIndex][index]; - case VXOpcodeTreeNodeType::MODRM_REG: + case OpcodeTreeNodeType::MODRM_REG: assert(index < 8); return optreeModrmReg[tableIndex][index]; - case VXOpcodeTreeNodeType::MODRM_RM: + case OpcodeTreeNodeType::MODRM_RM: assert(index < 8); return optreeModrmRm[tableIndex][index]; - case VXOpcodeTreeNodeType::MANDATORY: + case OpcodeTreeNodeType::MANDATORY: assert(index < 4); return optreeMandatory[tableIndex][index]; - case VXOpcodeTreeNodeType::X87: + case OpcodeTreeNodeType::X87: assert(index < 64); return optreeX87[tableIndex][index]; - case VXOpcodeTreeNodeType::ADDRESS_SIZE: + case OpcodeTreeNodeType::ADDRESS_SIZE: assert(index < 3); return optreeAddressSize[tableIndex][index]; - case VXOpcodeTreeNodeType::OPERAND_SIZE: + case OpcodeTreeNodeType::OPERAND_SIZE: assert(index < 3); return optreeOperandSize[tableIndex][index]; - case VXOpcodeTreeNodeType::MODE: + case OpcodeTreeNodeType::MODE: assert(index < 2); return optreeMode[tableIndex][index]; - case VXOpcodeTreeNodeType::VENDOR: + case OpcodeTreeNodeType::VENDOR: assert(index < 3); return optreeVendor[tableIndex][index]; - case VXOpcodeTreeNodeType::AMD3DNOW: + case OpcodeTreeNodeType::AMD3DNOW: assert(index < 256); return optree3dnow[tableIndex][index]; - case VXOpcodeTreeNodeType::VEX: + case OpcodeTreeNodeType::VEX: assert(index < 16); return optreeVex[tableIndex][index]; - case VXOpcodeTreeNodeType::VEXW: + case OpcodeTreeNodeType::VEXW: assert(index < 2); return optreeVexW[tableIndex][index]; - case VXOpcodeTreeNodeType::VEXL: + case OpcodeTreeNodeType::VEXL: assert(index < 2); return optreeVexL[tableIndex][index]; default: @@ -1695,10 +1695,10 @@ inline VXOpcodeTreeNode VDEGetOpcodeTreeChild(VXOpcodeTreeNode parent, uint16_t * @param node The instruction definition node. * @return Pointer to the instruction definition. */ -inline const VXInstructionDefinition* VDEGetInstructionDefinition(VXOpcodeTreeNode node) +inline const InstructionDefinition* GetInstructionDefinition(OpcodeTreeNode node) { - assert(VDEGetOpcodeNodeType(node) == VXOpcodeTreeNodeType::INSTRUCTION_DEFINITION); - return &instrDefinitions[node & 0x0FFF]; + assert(GetOpcodeNodeType(node) == OpcodeTreeNodeType::INSTRUCTION_DEFINITION); + return& instrDefinitions[node& 0x0FFF]; } /** @@ -1706,7 +1706,7 @@ inline const VXInstructionDefinition* VDEGetInstructionDefinition(VXOpcodeTreeNo * @param mnemonic The mnemonic. * @return The instruction mnemonic string. */ -inline const char* VDEGetInstructionMnemonicString(VXInstructionMnemonic mnemonic) +inline const char* GetInstructionMnemonicString(InstructionMnemonic mnemonic) { return instrMnemonicStrings[static_cast(mnemonic)]; } @@ -1716,14 +1716,14 @@ inline const char* VDEGetInstructionMnemonicString(VXInstructionMnemonic mnemoni * @param operandSize The defined operand size. * @return The the numeric value for the simple operand size definition. */ -inline uint16_t VDEGetSimpleOperandSize(VXDefinedOperandSize operandSize) +inline uint16_t GetSimpleOperandSize(DefinedOperandSize operandSize) { static uint16_t operandSizes[8] = { 8, 16, 32, 64, 80, 12, 128, 256 }; uint16_t index = - static_cast(operandSize) - static_cast(VXDefinedOperandSize::B); + static_cast(operandSize) - static_cast(DefinedOperandSize::B); assert(index < 8); return operandSizes[index]; } @@ -1733,9 +1733,9 @@ inline uint16_t VDEGetSimpleOperandSize(VXDefinedOperandSize operandSize) * @param operandSize The defined operand size. * @return The memory-size part of the operand size definition. */ -inline VXDefinedOperandSize VDEGetComplexOperandMemSize(VXDefinedOperandSize operandSize) +inline DefinedOperandSize GetComplexOperandMemSize(DefinedOperandSize operandSize) { - return static_cast(static_cast(operandSize) & 0x0F); + return static_cast(static_cast(operandSize)& 0x0F); } /** @@ -1743,11 +1743,13 @@ inline VXDefinedOperandSize VDEGetComplexOperandMemSize(VXDefinedOperandSize ope * @param operandSize The defined operand size. * @return The register-size part of the operand size definition. */ -inline VXDefinedOperandSize VDEGetComplexOperandRegSize(VXDefinedOperandSize operandSize) +inline DefinedOperandSize GetComplexOperandRegSize(DefinedOperandSize operandSize) { - return static_cast((static_cast(operandSize) >> 4) & 0x0F); + return static_cast((static_cast(operandSize) >> 4)& 0x0F); } } } + +#endif /* _ZYDIS_OPCODETABLE_HPP_ */ diff --git a/Zydis/ZydisSymbolResolver.cpp b/Zydis/ZydisSymbolResolver.cpp new file mode 100644 index 0000000..08b0938 --- /dev/null +++ b/Zydis/ZydisSymbolResolver.cpp @@ -0,0 +1,91 @@ +/*************************************************************************************************** + + Zyan Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : Joel Höner + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +***************************************************************************************************/ + +#include "ZydisSymbolResolver.hpp" + +namespace Zydis +{ + +/* BaseSymbolResolver ====================================================================== */ + +BaseSymbolResolver::~BaseSymbolResolver() +{ + +} + +const char* BaseSymbolResolver::resolveSymbol(const InstructionInfo& /*info*/, + uint64_t /*address*/, uint64_t& /*offset*/) +{ + return nullptr; +} + +/* ExactSymbolResolver ===================================================================== */ + +ExactSymbolResolver::~ExactSymbolResolver() +{ + +} + +const char* ExactSymbolResolver::resolveSymbol(const InstructionInfo& /*info*/, + uint64_t address, uint64_t& offset) +{ + std::unordered_map::const_iterator iterator = m_symbolMap.find(address); + if (iterator != m_symbolMap.cend()) + { + offset = 0; + return iterator->second.c_str(); + } + return nullptr; +} + +bool ExactSymbolResolver::containsSymbol(uint64_t address) const +{ + std::unordered_map::const_iterator iterator = m_symbolMap.find(address); + return (iterator != m_symbolMap.end()); +} + +void ExactSymbolResolver::setSymbol(uint64_t address, const char *name) +{ + m_symbolMap[address].assign(name); +} + +void ExactSymbolResolver::removeSymbol(uint64_t address) +{ + m_symbolMap.erase(address); +} + +void ExactSymbolResolver::clear() +{ + m_symbolMap.clear(); +} + +/* ============================================================================================== */ + +} \ No newline at end of file diff --git a/Zydis/ZydisSymbolResolver.hpp b/Zydis/ZydisSymbolResolver.hpp new file mode 100644 index 0000000..d825863 --- /dev/null +++ b/Zydis/ZydisSymbolResolver.hpp @@ -0,0 +1,119 @@ +/*************************************************************************************************** + + Zyan Disassembler Engine + Version 1.0 + + Remarks : Freeware, Copyright must be included + + Original Author : Florian Bernd + Modifications : Joel Höner + + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + +***************************************************************************************************/ + +#ifndef _ZYDIS_SYMBOLRESOLVER_HPP_ +#define _ZYDIS_SYMBOLRESOLVER_HPP_ + +#include +#include "ZydisTypes.hpp" + +namespace Zydis +{ + +/* BaseSymbolResolver =========================================================================== */ + +/** + * @brief Base class for all symbol resolver implementations. + */ +class BaseSymbolResolver +{ +public: + /** + * @brief Destructor. + */ + virtual ~BaseSymbolResolver(); +public: + /** + * @brief Resolves a symbol. + * @param info The instruction info. + * @param address The address. + * @param offset Reference to an unsigned 64 bit integer that receives an offset + * relative to the base address of the symbol. + * @return The name of the symbol, if the symbol was found, @c NULL if not. + */ + virtual const char* resolveSymbol(const InstructionInfo& info, uint64_t address, + uint64_t& offset); +}; + +/* ExactSymbolResolver ========================================================================== */ + +/** + * @brief Simple symbol resolver that only matches exact addresses. + */ +class ExactSymbolResolver : public BaseSymbolResolver +{ +private: + std::unordered_map m_symbolMap; +public: + /** + * @brief Destructor. + */ + ~ExactSymbolResolver() override; +public: + /** + * @brief Resolves a symbol. + * @param info The instruction info. + * @param address The address. + * @param offset Reference to an unsigned 64 bit integer that receives an offset + * relative to the base address of the symbol. + * @return The name of the symbol, if the symbol was found, @c NULL if not. + */ + const char* resolveSymbol(const InstructionInfo& info, uint64_t address, + uint64_t& offset) override; +public: + /** + * @brief Query if the given address is a known symbol. + * @param address The address. + * @return True if the address is known, false if not. + */ + bool containsSymbol(uint64_t address) const; + /** + * @brief Adds or changes a symbol. + * @param address The address. + * @param name The symbol name. + */ + void setSymbol(uint64_t address, const char* name); + /** + * @brief Removes the symbol described by address. This will invalidate all char pointers + * to the specific symbol name. + * @param address The address. + */ + void removeSymbol(uint64_t address); + /** + * @brief Clears the symbol tree. + */ + void clear(); +}; + +/* ============================================================================================== */ + +} + +#endif /* _ZYDIS_SYMBOLRESOLVER_HPP_ */ diff --git a/VerteronDisassemblerEngine/VXDisassemblerTypes.h b/Zydis/ZydisTypes.hpp similarity index 92% rename from VerteronDisassemblerEngine/VXDisassemblerTypes.h rename to Zydis/ZydisTypes.hpp index cf0b902..a63bc4d 100644 --- a/VerteronDisassemblerEngine/VXDisassemblerTypes.h +++ b/Zydis/ZydisTypes.hpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 22. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,15 +26,19 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#pragma once +***************************************************************************************************/ + +#ifndef _ZYDIS_TYPES_HPP_ +#define _ZYDIS_TYPES_HPP_ #include -#include "VXOpcodeTable.h" +#include "ZydisOpcodeTable.hpp" -namespace Verteron +namespace Zydis { +/* InstructionFlags ============================================================================= */ + /** * @brief Values that represent additional flags of a decoded instruction. */ @@ -125,10 +127,12 @@ enum InstructionFlags : uint32_t IF_ERROR_OPERAND = 0x01000000 }; +/* Register ===================================================================================== */ + /** * @brief Values that represent a cpu register. */ -enum class VXRegister : uint16_t +enum class Register : uint16_t { NONE, /* 8 bit general purpose registers */ @@ -185,10 +189,12 @@ enum class VXRegister : uint16_t RIP }; +/* OperandType ================================================================================== */ + /** * @brief Values that represent the type of a decoded operand. */ -enum class VXOperandType +enum class OperandType : uint8_t { /** * @brief The operand is not used. @@ -220,10 +226,12 @@ enum class VXOperandType CONSTANT }; +/* ZydisOperandAccessMode ============================================================================ */ + /** * @brief Values that represent the operand access mode. */ -enum class VXOperandAccessMode +enum class OperandAccessMode : uint8_t { NA, /** @@ -240,15 +248,17 @@ enum class VXOperandAccessMode READWRITE }; +/* OperandInfo ================================================================================== */ + /** * @brief This struct holds information about a decoded operand. */ -struct VXOperandInfo +struct OperandInfo { /** * @brief The type of the operand. */ - VXOperandType type; + OperandType type; /** * @brief The size of the operand. */ @@ -256,15 +266,15 @@ struct VXOperandInfo /** * @brief The operand access mode. */ - VXOperandAccessMode access_mode; + OperandAccessMode access_mode; /** * @brief The base register. */ - VXRegister base; + Register base; /** * @brief The index register. */ - VXRegister index; + Register index; /** * @brief The scale factor. */ @@ -297,10 +307,12 @@ struct VXOperandInfo } lval; }; +/* InstructionInfo ============================================================================== */ + /** * @brief This struct holds information about a decoded instruction. */ -struct VXInstructionInfo +struct InstructionInfo { /** * @brief The instruction flags. @@ -309,7 +321,7 @@ struct VXInstructionInfo /** * @brief The instruction mnemonic. */ - VXInstructionMnemonic mnemonic; + InstructionMnemonic mnemonic; /** * @brief The total length of the instruction. */ @@ -337,12 +349,12 @@ struct VXInstructionInfo /** * @brief The decoded operands. */ - VXOperandInfo operand[4]; + OperandInfo operand[4]; /** * @brief The segment register. This value will default to @c NONE, if no segment register * prefix is present. */ - VXRegister segment; + Register segment; /** * @brief The rex prefix byte. */ @@ -512,7 +524,7 @@ struct VXInstructionInfo /** * @brief The instruction definition. */ - const VXInstructionDefinition *instrDefinition; + const InstructionDefinition* instrDefinition; /** * @brief The instruction address points to the current instruction (relative to the * initial instruction pointer). @@ -527,3 +539,5 @@ struct VXInstructionInfo }; } + +#endif /* _ZYDIS_TYPES_HPP_ */ diff --git a/VerteronDisassemblerEngine/VXDisassemblerUtils.cpp b/Zydis/ZydisUtils.cpp similarity index 66% rename from VerteronDisassemblerEngine/VXDisassemblerUtils.cpp rename to Zydis/ZydisUtils.cpp index 8e7fa65..85d6c86 100644 --- a/VerteronDisassemblerEngine/VXDisassemblerUtils.cpp +++ b/Zydis/ZydisUtils.cpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 30. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,47 +26,48 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#include "VXDisassemblerUtils.h" -#include +***************************************************************************************************/ -namespace Verteron +#include "ZydisUtils.hpp" +#include + +namespace Zydis { - -uint64_t VDECalcAbsoluteTarget(const VXInstructionInfo &info, const VXOperandInfo &operand) + +uint64_t CalcAbsoluteTarget(const InstructionInfo& info, const OperandInfo& operand) { - assert((operand.type == VXOperandType::REL_IMMEDIATE) || - ((operand.type == VXOperandType::MEMORY) && (operand.base == VXRegister::RIP))); + assert((operand.type == OperandType::REL_IMMEDIATE) || + ((operand.type == OperandType::MEMORY)&& (operand.base == Register::RIP))); uint64_t truncMask = 0xFFFFFFFFFFFFFFFFull; - if (!(info.flags & IF_DISASSEMBLER_MODE_64)) + if (!(info.flags& IF_DISASSEMBLER_MODE_64)) { truncMask >>= (64 - info.operand_mode); } uint16_t size = operand.size; - if ((operand.type == VXOperandType::MEMORY) && (operand.base == VXRegister::RIP)) + if ((operand.type == OperandType::MEMORY)&& (operand.base == Register::RIP)) { size = operand.offset; } switch (size) { case 8: - return (info.instrPointer + operand.lval.sbyte) & truncMask; + return (info.instrPointer + operand.lval.sbyte)& truncMask; case 16: { - uint32_t delta = operand.lval.sword & truncMask; + uint32_t delta = operand.lval.sword& truncMask; if ((info.instrPointer + delta) > 0xFFFF) { - return (info.instrPointer & 0xF0000) + ((info.instrPointer + delta) & 0xFFFF); + return (info.instrPointer& 0xF0000) + ((info.instrPointer + delta)& 0xFFFF); } return info.instrPointer + delta; } case 32: - return (info.instrPointer + operand.lval.sdword) & truncMask; + return (info.instrPointer + operand.lval.sdword)& truncMask; default: assert(0); } return 0; } -} +} \ No newline at end of file diff --git a/VerteronDisassemblerEngine/VXDisassemblerUtils.h b/Zydis/ZydisUtils.hpp similarity index 81% rename from VerteronDisassemblerEngine/VXDisassemblerUtils.h rename to Zydis/ZydisUtils.hpp index e62d9b1..81c5398 100644 --- a/VerteronDisassemblerEngine/VXDisassemblerUtils.h +++ b/Zydis/ZydisUtils.hpp @@ -1,14 +1,12 @@ -/************************************************************************************************** +/*************************************************************************************************** - Verteron Disassembler Engine + Zyan Disassembler Engine Version 1.0 Remarks : Freeware, Copyright must be included Original Author : Florian Bernd - Modifications : - - Last change : 30. October 2014 + Modifications : Joel Höner * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -16,10 +14,10 @@ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: - * + * * The above copyright notice and this permission notice shall be included in all * copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE @@ -28,13 +26,15 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. -**************************************************************************************************/ -#pragma once +***************************************************************************************************/ + +#ifndef _ZYDIS_UTILS_HPP_ +#define _ZYDIS_UTILS_HPP_ #include -#include "VXDisassemblerTypes.h" +#include "ZydisTypes.hpp" -namespace Verteron +namespace Zydis { /** @@ -43,6 +43,8 @@ namespace Verteron * @param operand The operand. * @return The absolute target address. */ -uint64_t VDECalcAbsoluteTarget(const VXInstructionInfo &info, const VXOperandInfo &operand); +uint64_t CalcAbsoluteTarget(const InstructionInfo& info, const OperandInfo& operand); } + +#endif /* _ZYDIS_UTILS_HPP_ */