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zydis
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Fixed some instruction-definitions

This commit is contained in:
flobernd 2016-11-29 18:30:39 +01:00
parent 2e58e13d81
commit 879f456b03
1 changed files with 4 additions and 352 deletions
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356
assets/instructions.json
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@ -152330,7 +152330,7 @@
"prefix": "66", "prefix": "66",
"modrm_mod": "register", "modrm_mod": "register",
"bitfilters": [ "bitfilters": [
"rex_w" "vex_l"
] ]
}, },
"cpuid": [ "cpuid": [
@ -152342,65 +152342,6 @@
"encoding": "modrm_reg", "encoding": "modrm_reg",
"accessmode": "write" "accessmode": "write"
}, },
"operand2": {
"type": "vr128",
"encoding": "modrm_rm"
}
},
"comment": "vmovmskpd $GR32orGR64, $VR128 (VMOVMSKPDrr)",
"cd8scale": 0
},
{
"mnemonic": "vmovmskpd",
"opcode": "50",
"encoding": "vex",
"map": "0f",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"vex_l"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": {
"type": "vr256",
"encoding": "modrm_rm"
}
},
"comment": "vmovmskpd $GR32orGR64, $VR256 (VMOVMSKPDYrr)",
"cd8scale": 0
},
{
"mnemonic": "vmovmskpd",
"opcode": "50",
"encoding": "vex",
"map": "0f",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"rex_w",
"vex_l"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": { "operand2": {
"type": "vr256", "type": "vr256",
"encoding": "modrm_rm" "encoding": "modrm_rm"
@ -152442,7 +152383,7 @@
"extensions": { "extensions": {
"modrm_mod": "register", "modrm_mod": "register",
"bitfilters": [ "bitfilters": [
"rex_w" "vex_l"
] ]
}, },
"cpuid": [ "cpuid": [
@ -152454,63 +152395,6 @@
"encoding": "modrm_reg", "encoding": "modrm_reg",
"accessmode": "write" "accessmode": "write"
}, },
"operand2": {
"type": "vr128",
"encoding": "modrm_rm"
}
},
"comment": "vmovmskps $GR32orGR64, $VR128 (VMOVMSKPSrr)",
"cd8scale": 0
},
{
"mnemonic": "vmovmskps",
"opcode": "50",
"encoding": "vex",
"map": "0f",
"extensions": {
"modrm_mod": "register",
"bitfilters": [
"vex_l"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": {
"type": "vr256",
"encoding": "modrm_rm"
}
},
"comment": "vmovmskps $GR32orGR64, $VR256 (VMOVMSKPSYrr)",
"cd8scale": 0
},
{
"mnemonic": "vmovmskps",
"opcode": "50",
"encoding": "vex",
"map": "0f",
"extensions": {
"modrm_mod": "register",
"bitfilters": [
"rex_w",
"vex_l"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": { "operand2": {
"type": "vr256", "type": "vr256",
"encoding": "modrm_rm" "encoding": "modrm_rm"
@ -187871,39 +187755,6 @@
"comment": "vpextrb $GR32orGR64, $VR128, $u8imm (VPEXTRBrr)", "comment": "vpextrb $GR32orGR64, $VR128, $u8imm (VPEXTRBrr)",
"cd8scale": 0 "cd8scale": 0
}, },
{
"mnemonic": "vpextrb",
"opcode": "14",
"encoding": "vex",
"map": "0f3a",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"rex_w"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_rm",
"accessmode": "write"
},
"operand2": {
"type": "vr128",
"encoding": "modrm_reg"
},
"operand3": {
"type": "imm8u",
"encoding": "imm8"
}
},
"comment": "vpextrb $GR32orGR64, $VR128, $u8imm (VPEXTRBrr)",
"cd8scale": 0
},
{ {
"mnemonic": "vpextrb", "mnemonic": "vpextrb",
"opcode": "14", "opcode": "14",
@ -188246,39 +188097,6 @@
"comment": "vpextrw $GR32orGR64, $VR128, $u8imm (VPEXTRWri)", "comment": "vpextrw $GR32orGR64, $VR128, $u8imm (VPEXTRWri)",
"cd8scale": 0 "cd8scale": 0
}, },
{
"mnemonic": "vpextrw",
"opcode": "c5",
"encoding": "vex",
"map": "0f",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"rex_w"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": {
"type": "vr128",
"encoding": "modrm_rm"
},
"operand3": {
"type": "imm8u",
"encoding": "imm8"
}
},
"comment": "vpextrw $GR32orGR64, $VR128, $u8imm (VPEXTRWri)",
"cd8scale": 0
},
{ {
"mnemonic": "vpextrw", "mnemonic": "vpextrw",
"opcode": "15", "opcode": "15",
@ -188339,39 +188157,6 @@
"comment": "vpextrw $GR32orGR64, $VR128, $u8imm (VPEXTRWrr_REV)", "comment": "vpextrw $GR32orGR64, $VR128, $u8imm (VPEXTRWrr_REV)",
"cd8scale": 0 "cd8scale": 0
}, },
{
"mnemonic": "vpextrw",
"opcode": "15",
"encoding": "vex",
"map": "0f3a",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"rex_w"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_rm",
"accessmode": "write"
},
"operand2": {
"type": "vr128",
"encoding": "modrm_reg"
},
"operand3": {
"type": "imm8u",
"encoding": "imm8"
}
},
"comment": "vpextrw $GR32orGR64, $VR128, $u8imm (VPEXTRWrr_REV)",
"cd8scale": 0
},
{ {
"mnemonic": "vpextrw", "mnemonic": "vpextrw",
"opcode": "c5", "opcode": "c5",
@ -190738,43 +190523,6 @@
"comment": "vpinsrb $VR128, $VR128, $GR32orGR64, $u8imm (VPINSRBrr)", "comment": "vpinsrb $VR128, $VR128, $GR32orGR64, $u8imm (VPINSRBrr)",
"cd8scale": 0 "cd8scale": 0
}, },
{
"mnemonic": "vpinsrb",
"opcode": "20",
"encoding": "vex",
"map": "0f3a",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"rex_w"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "vr128",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": {
"type": "vr128",
"encoding": "vex_vvvv"
},
"operand3": {
"type": "gpr64",
"encoding": "modrm_rm"
},
"operand4": {
"type": "imm8u",
"encoding": "imm8"
}
},
"comment": "vpinsrb $VR128, $VR128, $GR32orGR64, $u8imm (VPINSRBrr)",
"cd8scale": 0
},
{ {
"mnemonic": "vpinsrb", "mnemonic": "vpinsrb",
"opcode": "20", "opcode": "20",
@ -191195,43 +190943,6 @@
"comment": "vpinsrw $VR128, $VR128, $GR32orGR64, $u8imm (VPINSRWrri)", "comment": "vpinsrw $VR128, $VR128, $GR32orGR64, $u8imm (VPINSRWrri)",
"cd8scale": 0 "cd8scale": 0
}, },
{
"mnemonic": "vpinsrw",
"opcode": "c4",
"encoding": "vex",
"map": "0f",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"rex_w"
]
},
"cpuid": [
"avx"
],
"operands": {
"operand1": {
"type": "vr128",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": {
"type": "vr128",
"encoding": "vex_vvvv"
},
"operand3": {
"type": "gpr64",
"encoding": "modrm_rm"
},
"operand4": {
"type": "imm8u",
"encoding": "imm8"
}
},
"comment": "vpinsrw $VR128, $VR128, $GR32orGR64, $u8imm (VPINSRWrri)",
"cd8scale": 0
},
{ {
"mnemonic": "vpinsrw", "mnemonic": "vpinsrw",
"opcode": "c4", "opcode": "c4",
@ -201338,11 +201049,11 @@
"prefix": "66", "prefix": "66",
"modrm_mod": "register", "modrm_mod": "register",
"bitfilters": [ "bitfilters": [
"rex_w" "vex_l"
] ]
}, },
"cpuid": [ "cpuid": [
"avx" "avx2"
], ],
"operands": { "operands": {
"operand1": { "operand1": {
@ -201350,65 +201061,6 @@
"encoding": "modrm_reg", "encoding": "modrm_reg",
"accessmode": "write" "accessmode": "write"
}, },
"operand2": {
"type": "vr128",
"encoding": "modrm_rm"
}
},
"comment": "vpmovmskb $GR32orGR64, $VR128 (VPMOVMSKBrr)",
"cd8scale": 0
},
{
"mnemonic": "vpmovmskb",
"opcode": "d7",
"encoding": "vex",
"map": "0f",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"vex_l"
]
},
"cpuid": [
"avx2"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": {
"type": "vr256",
"encoding": "modrm_rm"
}
},
"comment": "vpmovmskb $GR32orGR64, $VR256 (VPMOVMSKBYrr)",
"cd8scale": 0
},
{
"mnemonic": "vpmovmskb",
"opcode": "d7",
"encoding": "vex",
"map": "0f",
"extensions": {
"prefix": "66",
"modrm_mod": "register",
"bitfilters": [
"rex_w",
"vex_l"
]
},
"cpuid": [
"avx2"
],
"operands": {
"operand1": {
"type": "gpr64",
"encoding": "modrm_reg",
"accessmode": "write"
},
"operand2": { "operand2": {
"type": "vr256", "type": "vr256",
"encoding": "modrm_rm" "encoding": "modrm_rm"