mirror of https://github.com/x64dbg/zydis
Minor improvements to the instruction-decoder
- Set mask-mode to "merge" for all MVEX instructions - Set operand-action of EVEX dest-operands to RCW, if a merge write-mask is specified
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@ -1908,6 +1908,19 @@ FinalizeOperand:
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++operand;
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}
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// Fix operand-action for EVEX instructions with merge-mask
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if ((info->encoding == ZYDIS_INSTRUCTION_ENCODING_EVEX) &&
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(info->avx.maskMode == ZYDIS_MASK_MODE_MERGE) &&
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(info->operands[0].type == ZYDIS_OPERAND_TYPE_REGISTER) &&
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(info->operands[1].type == ZYDIS_OPERAND_TYPE_REGISTER) &&
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(info->operands[1].reg >= ZYDIS_REGISTER_K1) &&
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(info->operands[1].reg <= ZYDIS_REGISTER_K7))
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{
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ZYDIS_ASSERT(info->operands[0].action == ZYDIS_OPERAND_ACTION_WRITE ||
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info->operands[0].action == ZYDIS_OPERAND_ACTION_READWRITE);
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info->operands[0].action = ZYDIS_OPERAND_ACTION_READ_CONDWRITE;
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}
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return ZYDIS_STATUS_SUCCESS;
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}
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@ -2727,6 +2740,7 @@ static void ZydisSetAVXInformation(ZydisDecoderContext* context,
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// Mask mode
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info->avx.maskMode = ZYDIS_MASK_MODE_MERGE + info->details.evex.z;
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break;
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}
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case ZYDIS_INSTRUCTION_ENCODING_MVEX:
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@ -3019,6 +3033,9 @@ static void ZydisSetAVXInformation(ZydisDecoderContext* context,
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info->avx.hasEvictionHint = ZYDIS_TRUE;
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}
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// Mask mode
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info->avx.maskMode = ZYDIS_MASK_MODE_MERGE;
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break;
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}
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default:
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