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zydis
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Merge branch 'develop' of https://github.com/zyantific/zyan-disassembler-engine into develop

This commit is contained in:
Joel Höner 2017-04-11 02:20:02 +02:00
parent c9606c389d 8dd599555f
commit 71a551ef1a
5 changed files with 18 additions and 25 deletions
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2
CMakeLists.txt
View File

@ -25,7 +25,7 @@ option(ZYDIS_BUILD_TOOLS "Build tools" ON)
if (NOT CONFIGURED_ONCE)
if ("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU" OR
"${CMAKE_C_COMPILER_ID}" STREQUAL "Clang" OR
"${CMAKE_CXX_COMPILER_ID}" STREQUAL "AppleClang")
"${CMAKE_C_COMPILER_ID}" STREQUAL "AppleClang")
set(compiler_specific "-std=c99 -pedantic -Wextra -Werror")
elseif (MSVC)
set(compiler_specific "/WX /W4 /TC")

18
README.md
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@ -1,5 +1,5 @@
Zyan Disassembler Engine (Zydis)
================================
# Zyan Disassembler Engine (Zydis)
[![License: MIT](https://img.shields.io/badge/License-MIT-blue.svg)](https://opensource.org/licenses/MIT)
Fast and lightweight x86/x86-64 disassembler library.
@ -7,17 +7,17 @@ Fast and lightweight x86/x86-64 disassembler library.
- Supports all x86 and x86-64 (AMD64) general-purpose and system instructions.
- Supported ISA extensions:
- FPU (x87), MMX
- SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, AESNI
- AVX, AVX2, AVX512BW, AVX512CD, AVX512DQ, AVX512ER, AVX512F, AVX512PF, AVX512VL
- ADX, BMI1, BMI2, FMA, FMA4
- ..
- FPU (x87), MMX
- SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, AESNI
- AVX, AVX2, AVX512BW, AVX512CD, AVX512DQ, AVX512ER, AVX512F, AVX512PF, AVX512VL
- ADX, BMI1, BMI2, FMA, FMA4
- ..
- Optimized for high performance
- No dynamic memory allocation
- Perfect for kernel-mode drivers and embedded devices
- Perfect for kernel-mode drivers and embedded devices
- Very small file-size overhead compared to other common disassembler libraries
- Language bindings
- C++, Delphi, Python, ..
- C++, Delphi, Python, ..
- Complete doxygen documentation
## Quick Example ##

3
include/Zydis/InstructionInfo.h
View File

@ -357,7 +357,8 @@ typedef struct ZydisOperandInfo_
*/
ZydisBool isSigned;
/**
* @brief Signals, if the immediate value contains a relative offset.
* @brief Signals, if the immediate value contains a relative offset. You can use
* @c ZydisUtilsCalcAbsoluteTargetAddress to determine the absolute address value.
*/
ZydisBool isRelative;
/**

10
src/Decoder.c
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@ -2433,16 +2433,6 @@ ZydisStatus ZydisDecodeEx(ZydisOperatingMode operatingMode,
}
}
// For relative operands, apply instruction length offset.
for (size_t i = 0; i < info->operandCount; ++i)
{
if (info->operands[i].type == ZYDIS_OPERAND_TYPE_IMMEDIATE &&
info->operands[i].imm.isRelative)
{
info->operands[i].imm.value.sqword += info->length;
}
}
// Replace XCHG rAX, rAX with NOP alias
if (info->mnemonic == ZYDIS_MNEMONIC_XCHG)
{

6
src/Utils.c
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@ -56,14 +56,16 @@ ZydisStatus ZydisUtilsCalcAbsoluteTargetAddress(const ZydisInstructionInfo* info
}
if (operand->mem.base == ZYDIS_REGISTER_RIP)
{
*address = (uint64_t)(info->instrPointer + operand->mem.disp.value.sqword);
*address =
(uint64_t)(info->instrPointer + operand->mem.disp.value.sqword);
return ZYDIS_STATUS_SUCCESS;
}
break;
case ZYDIS_OPERAND_TYPE_IMMEDIATE:
if (operand->imm.isSigned && operand->imm.isRelative)
{
*address = (uint64_t)((int64_t)info->instrPointer + operand->imm.value.sqword);
*address =
(uint64_t)((int64_t)info->instrPointer + info->length + operand->imm.value.sqword);
switch (info->mode)
{
case ZYDIS_DISASSEMBLER_MODE_16BIT: