mirror of https://github.com/x64dbg/zydis
Encoder support for rIP relative addressing
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0862398940
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@ -541,6 +541,13 @@ static ZydisBool ZydisIsSPReg(ZydisRegister reg)
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reg == ZYDIS_REGISTER_RSP;
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reg == ZYDIS_REGISTER_RSP;
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}
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}
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static ZydisBool ZydisIsIPReg(ZydisRegister reg)
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{
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return reg == ZYDIS_REGISTER_IP ||
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reg == ZYDIS_REGISTER_EIP ||
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reg == ZYDIS_REGISTER_RIP;
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}
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static ZydisBool ZydisIsStackReg(ZydisRegister reg)
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static ZydisBool ZydisIsStackReg(ZydisRegister reg)
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{
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{
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return ZydisIsSPReg(reg) || ZydisIsBPReg(reg);
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return ZydisIsSPReg(reg) || ZydisIsBPReg(reg);
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@ -572,9 +579,7 @@ static ZydisStatus ZydisPrepareMemoryOperand(ZydisEncoderContext* ctx,
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ZYDIS_ASSERT(operand);
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ZYDIS_ASSERT(operand);
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ZYDIS_ASSERT(tableEntry);
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ZYDIS_ASSERT(tableEntry);
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// TODO: RIP relative addressing
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// Absolute memory access? Special case.
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// Absolute memory access?
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if (operand->mem.base == ZYDIS_REGISTER_NONE)
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if (operand->mem.base == ZYDIS_REGISTER_NONE)
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{
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{
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ctx->disp = operand->mem.disp.value.sdword;
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ctx->disp = operand->mem.disp.value.sdword;
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@ -600,6 +605,34 @@ static ZydisStatus ZydisPrepareMemoryOperand(ZydisEncoderContext* ctx,
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return ZYDIS_STATUS_SUCCESS;
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return ZYDIS_STATUS_SUCCESS;
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}
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}
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// rIP relative addressing? Special case.
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if (ZydisIsIPReg(operand->mem.base))
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{
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// rIP addressing is only available since AMD64.
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if (ctx->info->mode != ZYDIS_DISASSEMBLER_MODE_64BIT)
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{
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return ZYDIS_STATUS_IMPOSSIBLE_INSTRUCTION; // TODO
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}
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// Only available with either EIP or RIP, not with IP.
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if (operand->mem.base == ZYDIS_REGISTER_IP)
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{
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return ZYDIS_STATUS_IMPOSSIBLE_INSTRUCTION; // TODO
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}
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ctx->disp = operand->mem.disp.value.sdword;
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ctx->dispBitSize = 32;
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ctx->info->details.modrm.mod = 0x00;
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ctx->info->details.modrm.rm = 0x05 /* RIP relative mem */;
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if (operand->mem.base == ZYDIS_REGISTER_EIP)
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{
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ctx->info->attributes |= ZYDIS_ATTRIB_HAS_ADDRESSSIZE;
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}
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return ZYDIS_STATUS_SUCCESS;
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}
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// Process base register.
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// Process base register.
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ZYDIS_CHECK(ZydisPrepareRegOperand(ctx, operand->mem.base, 'B'));
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ZYDIS_CHECK(ZydisPrepareRegOperand(ctx, operand->mem.base, 'B'));
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