From 8af05ad549c3b4879f4b642f362605d7c83806c7 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" <41898282+github-actions[bot]@users.noreply.github.com> Date: Tue, 26 May 2026 19:11:44 +0000 Subject: [PATCH] Translation update (2026-05-26T19:11:44+0000) --- x64dbg.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_af_ZA.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ar_SA.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_bg_BG.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_bs_BA.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ca_ES.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ceb_PH.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_cs_CZ.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_da_DK.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_de_DE.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_el_GR.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_es_ES.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_fa_IR.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_fi_FI.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_fil_PH.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_fr_FR.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_he_IL.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_hi_IN.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_hu_HU.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_id_ID.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_it_IT.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ja_JP.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ka_GE.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ko_KR.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_lt_LT.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_nl_NL.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_no_NO.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_pl_PL.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_pt_BR.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_pt_PT.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ro_RO.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_ru_RU.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_si_LK.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_sr_SP.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_sv_SE.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_th_TH.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_tr_TR.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_uk_UA.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_vi_VN.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_zh_CN.ts | 402 +++++++++++++++++++++++------------------------ x64dbg_zh_TW.ts | 402 +++++++++++++++++++++++------------------------ 41 files changed, 8036 insertions(+), 8446 deletions(-) diff --git a/x64dbg.ts b/x64dbg.ts index 99f19d8..6198404 100644 --- a/x64dbg.ts +++ b/x64dbg.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3679,42 +3679,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12361,7 +12361,7 @@ Do you want to continue rendering this graph? - + Address @@ -15540,484 +15540,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16025,82 +16015,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16192,122 +16182,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17962,7 +17952,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18131,7 +18121,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18151,87 +18141,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18711,12 +18701,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18849,100 +18839,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_af_ZA.ts b/x64dbg_af_ZA.ts index e6d6ba0..132fac4 100644 --- a/x64dbg_af_ZA.ts +++ b/x64dbg_af_ZA.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3677,42 +3677,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12359,7 +12359,7 @@ Do you want to continue rendering this graph? - + Address @@ -15538,484 +15538,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16023,82 +16013,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16190,122 +16180,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17960,7 +17950,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18129,7 +18119,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18149,87 +18139,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18709,12 +18699,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18847,100 +18837,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_ar_SA.ts b/x64dbg_ar_SA.ts index 5a43201..de32424 100644 --- a/x64dbg_ar_SA.ts +++ b/x64dbg_ar_SA.ts @@ -92,7 +92,7 @@ - + &Copy نسخ @@ -3679,42 +3679,42 @@ Ctrl+G - + Disassembly تحليل - + Stack مكدس - + Registers - + Dump تفريغ - + Arguments الوسائط - + Sidebar - + InfoBox - + Graph رسم بياني @@ -12413,7 +12413,7 @@ Do you want to continue rendering this graph? - + Address عنوان @@ -15597,484 +15597,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - إخفاء FPU - - - - Show FPU - إظهار FPU - - - - - - - + + + + + Unknown مجهول @@ -16082,82 +16072,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero صفر - - + + Special خاص - - + + Empty فارغ - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used غير مستخدم - + Real8 - + Real10 @@ -16249,122 +16239,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... &فتح... - + &Paste لصق - + Load Script تحميل سكريبت - + Re&load Script إ&عادة تحميل سكريبت - + &Unload Script إل&غاء تحميل سكريبت - + &Edit Script - + Toggle &BP - + Ru&n until selection &تشغيل حتى موقع التحديد - + &Step &خطوة - + &Run &تشغيل - + &Abort &إحباط - + &Continue here... الا&ستمرار هنا... - + Copy نسخ - + E&xecute Command... - + Error on line خطأ في سطر - + Script Error! - + Select script تحديد سكريبت - + Script files (*.txt *.scr);;All files (*.*) - + Error! خطأ! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message رسالة - + Question السؤال @@ -18019,7 +18009,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error خطأ @@ -18188,7 +18178,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18208,87 +18198,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File فتح ملف - + Text Files (*.txt) ملفات نصية (*.txt) - + Could not open file تعذر فتح الملف - - + + Error! خطأ! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References المراجع @@ -18768,12 +18758,12 @@ This could introduce unexpected behaviour to your debugging session... تظليل - + View XMM register - + View MMX register @@ -18906,100 +18896,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly تحليل - + Registers - - + + Dump تفريغ - - + + Stack مكدس - + InfoBox - + Error خطأ - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning تحذير - + Loaded trace dump in %1ms - + &Selected Address &العنوان المحدد - + &Address: العنوان: - + &Old value: - + &Value: قيمة: - + &New value: - + &Constant: قيمة ثابتة: diff --git a/x64dbg_bg_BG.ts b/x64dbg_bg_BG.ts index 67af625..0c8720d 100644 --- a/x64dbg_bg_BG.ts +++ b/x64dbg_bg_BG.ts @@ -92,7 +92,7 @@ &Експорт на таблица - + &Copy &Копиране @@ -3679,42 +3679,42 @@ - + Disassembly - + Stack Стек - + Registers - + Dump Дъмп - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12361,7 +12361,7 @@ Do you want to continue rendering this graph? - + Address Aдрес @@ -15540,484 +15540,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown Неизвестно @@ -16025,82 +16015,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16192,122 +16182,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Грешка! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17962,7 +17952,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18131,7 +18121,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18151,87 +18141,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Отваряне на файл - + Text Files (*.txt) Текстови файл (*.txt);; - + Could not open file Файлът не може да бъде отворен - - + + Error! Грешка! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18711,12 +18701,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18849,100 +18839,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump Дъмп - - + + Stack Стек - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: &Адрес: - + &Old value: - + &Value: &Стойност: - + &New value: - + &Constant: &Константа: diff --git a/x64dbg_bs_BA.ts b/x64dbg_bs_BA.ts index 18bda89..bf0f21d 100644 --- a/x64dbg_bs_BA.ts +++ b/x64dbg_bs_BA.ts @@ -92,7 +92,7 @@ Spremanje table - + &Copy Kopiraj @@ -3688,42 +3688,42 @@ Hex dugo dugo (64-bit) - + Disassembly Disassembliranje - + Stack Štek - + Registers - + Dump Deponije: - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12371,7 +12371,7 @@ Kopiraj token &tekst Selekcija nije u moduli... - + Address Adresa @@ -15550,484 +15550,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16035,82 +16025,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16202,122 +16192,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste &Zalijepi - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Greška! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17972,7 +17962,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Greška @@ -18141,7 +18131,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18161,87 +18151,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Otvori Fajl - + Text Files (*.txt) Tekst Fajlovi (*.txt) - + Could not open file Greška pri otvaranju fajla - - + + Error! Greška! - + Selection not in a module... Selekcija nije u moduli... - + Selection not in a file... Selekcija nije u fajlu... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18723,12 +18713,12 @@ Hex dugo dugo (64-bit) Oznaka - + View XMM register - + View MMX register @@ -18861,100 +18851,100 @@ Hex dugo dugo (64-bit) - + Load dump - + Disassembly Disassembliranje - + Registers - - + + Dump Deponije: - - + + Stack Štek - + InfoBox - + Error Greška - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address &Odabrana Adresa - + &Address: &Adresa: - + &Old value: - + &Value: &Vrijednost: - + &New value: - + &Constant: &Konstanta: diff --git a/x64dbg_ca_ES.ts b/x64dbg_ca_ES.ts index f4abd2c..ad52d5a 100644 --- a/x64dbg_ca_ES.ts +++ b/x64dbg_ca_ES.ts @@ -93,7 +93,7 @@ - + &Copy @@ -3678,42 +3678,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12360,7 +12360,7 @@ Do you want to continue rendering this graph? - + Address @@ -15539,484 +15539,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16024,82 +16014,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16191,122 +16181,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17961,7 +17951,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18130,7 +18120,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18150,87 +18140,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18710,12 +18700,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18848,100 +18838,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_ceb_PH.ts b/x64dbg_ceb_PH.ts index 6cfabea..97eaf1c 100644 --- a/x64dbg_ceb_PH.ts +++ b/x64dbg_ceb_PH.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3678,42 +3678,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12360,7 +12360,7 @@ Do you want to continue rendering this graph? - + Address @@ -15539,484 +15539,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16024,82 +16014,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16191,122 +16181,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17961,7 +17951,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18130,7 +18120,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18150,87 +18140,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18710,12 +18700,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18848,100 +18838,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_cs_CZ.ts b/x64dbg_cs_CZ.ts index 9bb6338..0297d4c 100644 --- a/x64dbg_cs_CZ.ts +++ b/x64dbg_cs_CZ.ts @@ -94,7 +94,7 @@ Exportovat tabulku - + &Copy & Kopírovat @@ -3689,42 +3689,42 @@ Ctrl + G - + Disassembly Demontáž - + Stack Zásobník - + Registers - + Dump Výpis - + Arguments - + Sidebar - + InfoBox - + Graph Graf @@ -12380,7 +12380,7 @@ Do you want to continue rendering this graph? Výběr není v modulu ... - + Address Adresa @@ -15559,484 +15559,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16044,82 +16034,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16211,122 +16201,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste & Vložit - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Chyba! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17981,7 +17971,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Chyba @@ -18150,7 +18140,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18170,87 +18160,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Otevřít soubor - + Text Files (*.txt) Textové soubory (*.txt) - + Could not open file Soubor nelze otevřít - - + + Error! Chyba! - + Selection not in a module... Výběr není v modulu ... - + Selection not in a file... Výběr není v souboru ... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18730,12 +18720,12 @@ This could introduce unexpected behaviour to your debugging session... Hlavní body - + View XMM register - + View MMX register @@ -18869,100 +18859,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Demontáž - + Registers - - + + Dump Výpis - - + + Stack Zásobník - + InfoBox - + Error Chyba - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address Vybrané adresy - + &Address: Adresa: - + &Old value: - + &Value: Hodnota: - + &New value: - + &Constant: Konstanta diff --git a/x64dbg_da_DK.ts b/x64dbg_da_DK.ts index 140f1ad..5bbf370 100644 --- a/x64dbg_da_DK.ts +++ b/x64dbg_da_DK.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3677,42 +3677,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12359,7 +12359,7 @@ Do you want to continue rendering this graph? - + Address @@ -15538,484 +15538,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16023,82 +16013,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16190,122 +16180,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17960,7 +17950,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18129,7 +18119,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18149,87 +18139,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18709,12 +18699,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18847,100 +18837,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_de_DE.ts b/x64dbg_de_DE.ts index b346a71..9a9a916 100644 --- a/x64dbg_de_DE.ts +++ b/x64dbg_de_DE.ts @@ -92,7 +92,7 @@ In CSV Datei &exportieren - + &Copy &Kopieren @@ -3686,42 +3686,42 @@ Strg+G - + Disassembly Disassembler - + Stack Stapel - + Registers Register - + Dump Dump - + Arguments Argumente - + Sidebar Seitenleiste - + InfoBox Infobox - + Graph Diagramm @@ -12673,7 +12673,7 @@ Möchten Sie das Rendern dieses Diagramms fortsetzen? Auswahl nicht in einem Modul... - + Address Adresse @@ -15866,204 +15866,204 @@ Wollen Sie die Patches dennoch anwenden? RegistersView - + AVX-512 isn't supported on this computer. - + Registers Register - + Copy value Wert kopieren - + Copy floating point value Fließkommawert kopieren - + Copy Symbol Value Symbolwert kopieren - + Copy all registers Alle Register kopieren - + Change view Ansicht ändern - + Change SIMD Register Display Mode Anzeigemodus des SIMD-Register ändern - + Display ST(x) ST(x) anzeigen - + Display x87rX x87rX anzeigen - + Display MMX MMX anzeigen - + Hexadecimal Hexadezimal - + Float Float - + Double Double - + Signed Word Signiertes Wort - + Signed Dword Signiertes Dword - + Signed Qword Signiertes Qword - + Unsigned Word Unsigniertes Wort - + Unsigned Dword Unsigniertes Dword - + Unsigned Qword Unsigniertes Qword - + Hexadecimal Word Hexadezimales Wort - + Hexadecimal Dword Hexadezimales Dword - + Hexadecimal Qword Hexadezimales Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2): Parity Flag - Gesetzt wenn das niederwertigste Byte des Ergebnisses eine gerade Anzahl 1-Bits enthält. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (4 Bit): Auxiliary [Carry] flag oder Hilfsübertragsflag, @@ -16072,20 +16072,20 @@ gesetzt wenn bei einer Rechenoperation im unteren Halbbyte(Bit 3) ein Dieses Flag wird in der binär codierten Dezimalzahl (BCD) Arithmetik verwendet. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (Bit 6): Zero flag - Wird gesetzt(1), wenn das Ergebnis einer Berechnung 0 ergibt; ansonsten wird es gelöscht(0). [Das Zero flag ist für die Prüfung von Schleifenbedingungen und anderen bedingten Sprüngen von Bedeutung.] - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (Bit 7): Sign Flag - Spiegelt nach einer Berechnung das höchstwertige Bit des Ergebnisses wieder, also das Vorzeichenbit einer Ganzzahl. Bei einem negativen Wert ist es gesetzt(1) und bei positiven Ergebnisse gelöscht(0). - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16093,55 +16093,55 @@ condition for signed-integer (two’s complement) arithmetic. Wird gesetzt wenn das Ganzzahl-Resultat zu groß (vorzeichenlose Zahl) oder zu klein (vorzeichenbehaftete Zahl) für den Zieloperand ist. Das Flag zeigt einen Überlauf für vorzeichenbehaftete (Zweierkomplement) Berechnungen an. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). DF (Bit 10): Direction Flag - Steuert die Richtung von String-Befehlen (MOVS, CMPS, SCAS, LODS und STOS). Gesetzt wird der Index dekrementiert (String wird von höchster zu niedrigster Adresse bearbeitet). Gelöscht wird der Index inkrementiert (String wird von niedrigster Adresse bearbeitet). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8) : Trap Flag - Setze um Einzelschritt Modus für das Debuggen zu aktivieren; clear um Einzelschritt zu deaktivieren. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (9 bit): Interrupt Flag - Kontrolliert die Antwort des Prozessors auf maskierbare Interrupt Requests. Wenn gesetzt wird auf maskierte Interrupts regiert. Ungesetzt werden maskierbare Interrupts blockiert. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. Das 16-Bit-X87 FPU Steuer word steuert die Präzision der X87 FPU und die verwendete Rundungsmethode. Es enthält auch das X87 FPU Gleitkomma Ausnahme Maskierungbits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. Die 16-Bit-X87 FPU-Status-Register zeigt den aktuellen Status der x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). Das 16-Bit-Variablen Wort zeigt den Inhalt der 8 Register im x87 FPU-Daten-Register-Stack (einen 2-Bit-Variable-Tag pro Register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU Das Präzisions-Kontrollfeld (PC) (Bits 8 und 9 des x87 FPU Steuerwort) bestimmt die Genauigkeit (64, 53 oder 24 Bit) der x87 FPU Gleitkommaberechnungen. - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. Das rounding-control (RC) Feld des x87 FPU Kontrollregisters (Bit 10 und 11) kontrolliert wie die Resultate der x87 FPU Gleitkommainstruktionen gerundet werden. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. Die Unendlichkeits-Kontrolle Flagge (das 12. Bit des x87 Kontroll words) ist aus Kompatibilitätsgründen zum Intel 287 Mathe Koprozessor bereitgestellt. Es ist nutzlos für ältere Versionen des x87 FPU Koprozessors oder IA-32 Prozessoren. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. Bit 0 (IM): Maske für Ungültiger-Vorgang in x87 FP Assists @@ -16149,134 +16149,134 @@ Wenn gesetzt, wird entsprechende Ausnahme geblockt. (Dies erspart der Software diese zu behandeln, kann aber zu ungenauen Ergebnissen führen). - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. Die Denormaloper-Ausnahmemaske (Bit 2). Wenn das Maskenbit gesetzt ist, wird die entsprechende Ausnahme von der Erzeugung blockiert. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. Die Fließkommazahl Divide-by-Null Exception Maske (Bit 3). Wenn das Maskierungsbit gesetzt ist, wird die entsprechende Ausnahme von der Erzeugung blockiert. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. Die Fließkommaausnahmemaske (Bit 4). Wenn das Maskenbit gesetzt ist, wird die entsprechende Ausnahme von der Erzeugung blockiert. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. Die potenzielle Fließkommazahl numerische Unterlaufbedingungsmaske (Bit 5). Wenn das Maskenbit gesetzt ist, wird die entsprechende Ausnahme von der Erzeugung blockiert. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. Die Ungenauigkeits-Exceptionmaske (Bit 6). Wenn das Mask-Bit gesetzt ist, wird die entsprechende Ausnahme von der Erzeugung blockiert. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. Das busy-Flag (Bit 15) gibt an, ob die FPU während der Ausführung einer Anweisung besetzt (B = 1) ist oder im Leerlauf (B = 0). Es spiegelt den Inhalt des ES Flags und ist nur noch aus Kompatibilitätsgründen zum 8087 im Befehlssatz enthalten. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. Die C%1 Code-Zustands-Flagge (Bit %2) wird verwendet, um die Ergebnisse von Gleitkommazahlen Vergleichs- und Rechenoperationen zu zeigen. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. Fehler/Ausnahme Zusammenfassung-Flag (Bit 7) wird gesetzt wenn eines der andere Ausnahmeflags gesetzt ist. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. Die Stapelfehler-Flagge (das 6. Bit des x87 FPU Status words) zeigt an, dass Daten im x87 FPU Datenregisterstapel über- oder untergelaufen sind. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. Ein Zeiger auf das x87-FPU-Datenregister, das sich aktuell an der Spitze des x87-FPU-Registerstapels befindet, ist in den 3 Bits 11 bis 13 des x87-FPU-Statuswortes enthalten. Dieser Zeiger, der allgemein als TOP (für Spitze des Stapels) bezeichnet wird, ist ein Binärwert von 0 bis 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. Der Prozessor meldet eine ungültige Operation Ausnahme (Bit 0) als Reaktion auf ein oder mehrere ungültige arithmetische Operanden. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. Der Prozessor meldet eine Denormal-Operanden Ausnahme (Bit 2), wenn eine arithmetische Anweisung versucht einen Denormal Operanden zu verwenden. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. Der Prozessor meldet die Floating-Point Division durch Null-Ausnahme (Bit 3), wenn eine Anweisung versucht, einen endlichen Operanden (ungleich Null) durch 0 zu dividieren. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. Der Prozessor meldet eine Floating-Point numerischer Überlauf Ausnahme (Bit 4) wenn das gerundete Ergebnis einer Anweisung den größte zulässigen endlichen Wert überschreitet, welcher in den Ziel-Operanden passt. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. Der Prozessor erkennt eine potentielle Fließkomma-numerische Unterlaufbedingung (Bit 5), wenn das Rundungsergebnis mit dem unbegrenzten Exponenten ungleich Null und klein ist. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. Die ungenaue-Ergebnis/Präzision Ausnahme (Bit 6) tritt auf, wenn das Ergebnis eines Vorgangs nicht genau im Zielformat darstellbar ist. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. Das 32-Bit-MXCSR-Register enthält Kontroll- und Statusinformationen für SIMD Gleitkommaoperationen. SIMD => Single Instruction, Multiple Data. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE): Flag für ungültigen Vorgang ; zeigt an, ob bei der letzten Fließkommaberechnung eine SIMD Ausnahme aufgetreten ist. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE): Denormal Flag; zeigt an, ob bei der letzten Fließkommaberechnung eine SIMD Ausnahme aufgetreten ist. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE): Division-durch-Null-Flag; zeigt an, ob bei der letzten Fließkommaberechnung eine SIMD Ausnahme aufgetreten ist. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE): Überlauf Flag; zeigt an, ob eine SIMD Ausnahme bei der letzten Fließkommaberechnung aufgetreten ist. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE): Unterlauf Flag; zeigt an, ob bei der letzten Fließkommaberechnung eine SIMD Ausnahme aufgetreten ist. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE) : Präzision Flag; zeigt an, ob eine Ausnahme bei der letzten SIMD Fließkommaberechnung aufgetreten ist. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 7 (IM) : Maske für Ungültige Operation (Invalid Operation) @@ -16284,7 +16284,7 @@ Wenn gesetzt, wird entsprechende Ausnahme geblockt. (Dies erspart der Software diese zu behandeln, kann aber zu ungenauen Ergebnissen führen) - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 8 (DM): Maske für Denormalwerte. @@ -16294,7 +16294,7 @@ Ein Denormalwert ist eine Zahl, die so klein ist, dass die FPU sie aufgrund begrenzter Exponentenbereiche nicht renormieren kann. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 9 (ZM) : Mask für Division-durch-Null (Divide-by-Zero) @@ -16302,7 +16302,7 @@ Wenn gesetzt, wird entsprechende Ausnahme geblockt. (Dies erspart der Software diese zu behandeln, kann aber zu ungenauen Ergebnissen führen) - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 10 (OM) : Maske für Überlauf (Overflow) @@ -16310,7 +16310,7 @@ Wenn gesetzt, wird entsprechende Ausnahme geblockt. (Dies erspart der Software diese zu behandeln, kann aber zu ungenauen Ergebnissen führen). - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 11 (UM) : Maske für Unterlauf (Underflow) @@ -16318,7 +16318,7 @@ Wenn gesetzt, wird entsprechende Ausnahme geblockt. (Dies erspart der Software diese zu behandeln, kann aber zu ungenauen Ergebnissen führen) - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 12 (PM): Maske für Präzision. @@ -16326,7 +16326,7 @@ Wenn gesetzt, wird entsprechende Ausnahme geblockt. (Dies erspart der Software diese zu behandeln, kann aber zu ungenauen Ergebnissen führen) - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. Bit 15 (FZ) aktiviert den Flush-to-Zero-Modus. @@ -16334,7 +16334,7 @@ Bewirkt, dass alle Operationen welche einen Unterlauf erzeugen auf 0 gesetzt wer Dies spart Rechenzeit, bringt aber Einbusen in der Präzision. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. Bit 6 (DAZ) der MXCSR Register aktiviert den Denormals-Are-Zero Modus. In diesem Modus werden Denormalwerte automatisch gleich Null gesetzt. @@ -16342,28 +16342,28 @@ denormal operand condition. Ein Denormalwert ist eine Zahl, die so klein ist, dass die FPU sie aufgrund begrenzter Exponentenbereiche nicht renormieren kann. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. Bit 13 und 14 steuern das Rundungskontrollfeld [RC] und bestimmen wie die Ergebnisse einer SIMD Gleitkommaanweisung gerundet werden. - + The value of GetLastError(). This value is stored in the TEB. Der Wert von GetLastError(). Dieser Wert wird in der TEB gespeichert. - + The NTSTATUS in the LastStatusValue field of the TEB. Der NTSTATUS im LastStatusValue Feld im TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. Auf den TEB des aktuellen Threads kann als ein Offset des Segmentregisters GS (x64) zugegriffen werden. Die TEB kann verwendet werden, um eine Vielzahl von Informationen über den Prozess zu erfahren ohne eine Win32-API aufzurufen. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. Auf den TEB des aktuellen Threads kann als ein Offset des Segmentregisters FS (x86) zugegriffen werden. @@ -16371,21 +16371,11 @@ Die TEB kann verwendet werden, um eine Vielzahl von Informationen über den Prozess zu erfahren ohne eine Win32-API aufzurufen. - - Hide FPU - Verstecke FPU - - - - Show FPU - Zeige FPU - - - - - - - + + + + + Unknown Unbekannt @@ -16393,82 +16383,82 @@ Die TEB kann verwendet werden, um eine Vielzahl von Informationen RegistersView_ConstantsOfRegisters - - + + Nonzero Ungleich Null - - + + Zero Null - - + + Special Speziell - - + + Empty Leer - + Toward Zero Gegen Null - + Toward Positive Positive Richtung - + Toward Negative Negative Richtung - - + + Round Near Runden - + Truncate Abschneiden - + Round Up Aufrunden - + Round Down Abrunden - + Real4 Real4 - + Not Used Nicht verwendet - + Real8 Real8 - + Real10 Real10 @@ -16560,122 +16550,122 @@ Die TEB kann verwendet werden, um eine Vielzahl von Informationen Skriptbefehl ausführen... - + &Open... Ö&ffnen... - + &Paste &Einfügen - + Load Script Skript laden - + Re&load Script Skript neu &laden - + &Unload Script Skript &entladen - + &Edit Script Skript &bearbeiten - + Toggle &BP Halte&punkt An/Aus - + Ru&n until selection Aus&führen bis Auswahl - + &Step &Schritt - + &Run Ausfüh&ren - + &Abort Ab&brechen - + &Continue here... Hier for&tsetzen... - + Copy Kopieren - + E&xecute Command... Skript &ausführen... - + Error on line Fehler bei Zeile - + Script Error! Skriptfehler! - + Select script Skript auswählen - + Script files (*.txt *.scr);;All files (*.*) Skript-Dateien (*.txt *.scr);; Alle Dateien (*.*) - + Error! Fehler! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! Fehler beim Setzten des Skript Haltepunkt! - + Error executing command! Fehler beim Ausführen des Befehls! - + Message Nachricht - + Question Frage @@ -18330,7 +18320,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Fehler @@ -18499,7 +18489,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording Aufnahme löschen @@ -18519,87 +18509,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording Trace-Aufnahme öffnen - + Trace recording Trace-Aufnahme - + Trace recordings (*.%1);;All files (*.*) Trace Aufnahmen (*.%1);;Alle Dateien (*.*) - + Are you sure you want to delete this recording? Sind Sie sicher, dass Sie diese Aufnahme löschen möchten? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Datei öffnen - + Text Files (*.txt) Textdateien (*.txt) - + Could not open file Datei konnte nicht geöffnet werden - - + + Error! Fehler! - + Selection not in a module... Auswahl nicht in einem Modul... - + Selection not in a file... Auswahl ist nicht in einer Datei... - + Constant Konstante - - - + + + %1 result(s) in %2ms - + References Referenzen @@ -19079,12 +19069,12 @@ This could introduce unexpected behaviour to your debugging session... Hervorheben - + View XMM register XMM-Register anzeigen - + View MMX register MMX-Register anzeigen @@ -19217,100 +19207,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Disassembler - + Registers Register - - + + Dump Dump - - + + Stack Stapel - + InfoBox Infobox - + Error Fehler - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Warnung - + Loaded trace dump in %1ms - + &Selected Address Au&sgewählte Adresse - + &Address: &Adresse: - + &Old value: - + &Value: &Wert: - + &New value: - + &Constant: &Konstante: diff --git a/x64dbg_el_GR.ts b/x64dbg_el_GR.ts index e808686..f22f6e0 100644 --- a/x64dbg_el_GR.ts +++ b/x64dbg_el_GR.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3689,42 +3689,42 @@ Ctrl+G - + Disassembly Disassembly - + Stack Στοίβα - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12371,7 +12371,7 @@ Do you want to continue rendering this graph? - + Address @@ -15550,484 +15550,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16035,82 +16025,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16202,122 +16192,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste &Επικόλληση - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17972,7 +17962,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Σφάλμα @@ -18141,7 +18131,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18161,87 +18151,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18721,12 +18711,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18859,100 +18849,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Disassembly - + Registers - - + + Dump - - + + Stack Στοίβα - + InfoBox - + Error Σφάλμα - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address Επιλεγμένες Διευθυνσεις - + &Address: &Διεύθυνση: - + &Old value: - + &Value: &Τιμή: - + &New value: - + &Constant: &Σταθερά: diff --git a/x64dbg_es_ES.ts b/x64dbg_es_ES.ts index efabf59..e4542f0 100644 --- a/x64dbg_es_ES.ts +++ b/x64dbg_es_ES.ts @@ -92,7 +92,7 @@ &Exportar Tabla - + &Copy &Copiar @@ -3683,42 +3683,42 @@ Ctrl+G - + Disassembly Desensamblar - + Stack Pila - + Registers - + Dump Volcado - + Arguments Argumentos - + Sidebar - + InfoBox - + Graph Gráfico @@ -12576,7 +12576,7 @@ Do you want to continue rendering this graph? Selección fuera del módulo... - + Address Dirección @@ -15764,484 +15764,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2): la paridad de la bandera - establece si el byte menos significativo del resultado contiene un número par de bits 1; de lo contrario se borra/vacía. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (bit 4) : Bandera de Acarreo auxiliar - Establece que si una operación aritmética genera un acarreo o acarreo a cabo del bit 3 del resultado; de lo contrario se limpia/borra. Esta bandera es usado en binario-creados en aritmética decimal (BCD). - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bit 6): cero bandera - Set si el resultado es cero; de lo contrario es vaciado/borrado. Los bits del 0 al 6 son flags que son manejados por la FPU cuando detecta una excepción. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bit 7): bandera de signo - establece igualdad al bit más significativo del resultado, que es el bit de signo de un entero con signo. (el 0 indica un valor positivo y 1 indica un valor negativo) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. OF (bit 11): bandera del desbordamiento - establece si el resultado entero (integer) es un número positivo demasiado grande o demasiado pequeño a un número negativo (excepto el bit de signo) en el operando de destino; de lo contrario lo borra. Esta bandera indica una condición de desbordamiento para aritmética de enteros con signos(el complemento de dos). - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). DF (bit 10): la bandera de dirección controla las instrucciones de la cadena (MOVS, CMPS, SCAS, LODS y STOS). Establecer la bandera DF hace que las instrucciones de cadena (string) automáticamente disminuyan (las cadenas(string) de proceso de direcciones alta a/hacia direcciones bajas). Borrar la bandera DF hace que las instrucciones de cadena automáticamente incrementen (el proceso de las cadenas de direcciones bajas a direcciones altas). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8): bandera de trampa - Se establece para habilitar el modo de un solo paso para la depuración; borrar para desactivar el modo de un solo paso. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (bit 9): interrupción habilitar bandera - controla la respuesta del procesador a las peticiones de interrupción Enmascarables. Conjunto para responder a interrupciones Enmascarables; vacío/borrado para inhibir interrupciones Enmascarables. Nota: son flags condicionales que se usan por ejemplo para comprobar el resultado de una comparación. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. Los 16 bits de x87 FPU controla la precisión de la x87 FPU y redondeo el método utilizan. También contiene la x87 FPU bits de máscara de excepción de punto flotante. Nota: la forma más sencilla de entender la pila de la x87 FPU es pensar en el cañón del revólver. Los registros ST0-ST7 serían los huecos donde se alojan las balas y las balas serían el contenido de los registros. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. Los 16 bits del registro x87 FPU indica el estado actual de la x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). La palabra de etiqueta de 16 bits indica el contenido de cada uno los 8 registros en el x87 FPU apilado en registro de datos (una etiqueta de 2 bits por registro). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU El campo de control de la precisión (PC) (8 bits y 9 del control de la x87 FPU) determina la precisión de (64, 53 o 24 bits) de coma flotante en cálculos realizados por el x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. El campo de redondeo-control (RC) de la x87 FPU controla los registros de (bits 10 y 11) como los resultados de la x87 instrucciones de punto flotante FPU donde son redondeados. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. La bandera de control infinito (bit 12 de la x87 palabra de control FPU) se proporciona por compatibilidad con el coprocesador matemático Intel 287; no es significativa para más adelante coprocesadores FPU de versión x87 o procesadores IA-32. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. La bandera de falla de la pila/stack (bit 6 de la x87 palabra de estado FPU) indica que ha ocurrido la pila desbordamiento o subdesbordamiento de pila/stack con datos en la x87 FPU de información del registro de pila/stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. Un puntero a la x87 FPU en el registro de datos que está actualmente en la parte superior de la x87 FPU, registro pila está contenido en bits 11 al 13. Este puntero, que se conoce comúnmente como TOP (para la parte superior de la pila), es un valor binario de 0 a 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. El registro MXCSR 32 bits contiene información de control y estado para operaciones de punto flotante SIMD. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE): Bandera que indica operación no válida; indica si se ha detectado una excepción de punto flotante SIMD. Los bits del 0 al 6 son flags que son manejados por la FPU cuando detecta una excepción. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE): Denormal bandera; indicar si se ha detectado una excepción de punto flotante SIMD. también es llamado Denormalized Exception Flag y se pone a 1 cuando se intenta operar en un "denormalized number" o el resultado de una operación es un "denormalized number". Los bits del 0 al 6 son flags que son manejados por la FPU cuando detecta una excepción. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE): Bandera también es llamado Zero Divide Exception Flag ; indica si se ha detectado una excepción de punto flotante SIMD. y se pone a 1 cuando se intenta dividir por 0. Los bits del 0 al 6 son flags que son manejados por la FPU cuando detecta una excepción. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE): Desbordamiento de bandera; indicar si se ha detectado una excepción de punto flotante SIMD. El campo OE corresponde al bit 3, también es llamado Overflow Exception Flag y se pone a 1 cuando un valor es demasiado grande para poder ser representado. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE): Bandera de desbordamiento de capacidad inferior; indicar si se ha detectado una excepción de punto flotante SIMD. también es llamado Underflow Exception Flag y se pone a 1 cuando un valor es demasiado pequeño para poder ser representado. Los bits del 0 al 6 son flags que son manejados por la FPU cuando detecta una excepción. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE): Bandera de precisión; indicar si se ha detectado una excepción de punto flotante SIMD. también es llamado Precision Exception Flag y se pone a 1 cuando la precisión se ha perdido en alguna instrucción aritmética. Los bits del 0 al 6 son flags que son manejados por la FPU cuando detecta una excepción. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. Bit 15 (FZ) del registro MXCSR permite el modo de descarga a cero, que controla la respuesta de máscara a una condición de subdesbordamiento de punto flotante SIMD. El campo FZ también llamado Flush to Zero activa el modo en el que todas las operaciones donde ocurra un underflow valdrán 0. Esto hace que el tiempo de procesado sea más rápido pero se pierde precisión. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. Bit 6 (DAZ) del registro MXCSR también es llamado Denormals Are Zeros. controla la respuesta del procesador a una coma flotante SIMD. Al igual que el modo Flush To Zero (FZ) el modo DAZ es más rápido pero también pierde precisión. Si el bit 6 está activado el modo DAZ es soportado y por lo que se llama la condicion del operando DAZ. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. Bits 13 y 14 del registro MXCSR (el campo de redondeo del campo de control [RC]) controlan de cómo se redondean los resultados de las instrucciones de punto flotante SIMD. - + The value of GetLastError(). This value is stored in the TEB. El valor de GetLastError(). Este valor se almacena en TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - Ocultar FPU - - - - Show FPU - Mostar FPU - - - - - - - + + + + + Unknown Desconocido @@ -16249,82 +16239,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero Distinto de cero - - + + Zero Cero - - + + Special Especial - - + + Empty Vacío - + Toward Zero Hacia cero - + Toward Positive Hacia positivo - + Toward Negative Hacia el negativo - - + + Round Near Redondear al más cercano - + Truncate Truncar - + Round Up Redondear al alza - + Round Down Redondear a la baja - + Real4 Real4 - + Not Used Sin usar - + Real8 Real8 - + Real10 Real10 @@ -16416,122 +16406,122 @@ The TEB can be used to get a lot of information on the process without calling W Ejecutar comandos de Script... - + &Open... &Abrir... - + &Paste &Pegar - + Load Script Cargar script - + Re&load Script Recargar e&l script - + &Unload Script &Cerrar el script - + &Edit Script - + Toggle &BP Alternar/Conmutar/Palanca &BP (Punto de Ruptura) - + Ru&n until selection Ejecutar hasta la selecció&n - + &Step &Paso - + &Run &Ejecutar - + &Abort &Abortar - + &Continue here... &Continuar aquí... - + Copy Copiar - + E&xecute Command... - + Error on line Error en la línea - + Script Error! ¡Error en el script! - + Select script Selecciona un script - + Script files (*.txt *.scr);;All files (*.*) Scripts (*.txt *.scr);;Todos los archivos (*. *) - + Error! ¡Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! Error al establecer el breakpoint en el script - + Error executing command! ¡Error al ejecutar el comando! - + Message Mensaje - + Question Confirmación @@ -18186,7 +18176,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Error @@ -18355,7 +18345,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18375,87 +18365,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Abrir el archivo - + Text Files (*.txt) Archivos de texto (*.txt) - + Could not open file No se pudo abrir el archivo - - + + Error! ¡Error! - + Selection not in a module... La selección no está en ningún módulo... - + Selection not in a file... La selección no está en ningún archivo... - + Constant - - - + + + %1 result(s) in %2ms - + References Referencias @@ -18935,12 +18925,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -19073,100 +19063,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Desensamblar - + Registers - - + + Dump Volcado - - + + Stack Pila - + InfoBox - + Error Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Atención - + Loaded trace dump in %1ms - + &Selected Address &Dirección seleccionada - + &Address: &Dirección: - + &Old value: - + &Value: &Valor: - + &New value: - + &Constant: &Constante: diff --git a/x64dbg_fa_IR.ts b/x64dbg_fa_IR.ts index 1d5c777..4918261 100644 --- a/x64dbg_fa_IR.ts +++ b/x64dbg_fa_IR.ts @@ -92,7 +92,7 @@ خروجی‌&گیری از جدول - + &Copy &نسخه‌برداری @@ -3684,42 +3684,42 @@ Ctrl+G - + Disassembly کد ماشین تبدیل‌شده به زبان نمادین - + Stack پشته - + Registers Registers - + Dump داده‌ها - + Arguments Arguments - + Sidebar - + InfoBox - + Graph نمودار رابطه‌ای @@ -12649,7 +12649,7 @@ Do you want to continue rendering this graph? انتخاب‌شده درون قطعه‌کدی نیست... - + Address نشانی @@ -15842,223 +15842,223 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers Registers - + Copy value Copy value - + Copy floating point value Copy floating point value - + Copy Symbol Value Copy Symbol Value - + Copy all registers Copy all registers - + Change view Change view - + Change SIMD Register Display Mode Change SIMD Register Display Mode - + Display ST(x) Display ST(x) - + Display x87rX Display x87rX - + Display MMX Display MMX - + Hexadecimal Hexadecimal - + Float Float - + Double Double - + Signed Word Signed Word - + Signed Dword Signed Dword - + Signed Qword Signed Qword - + Unsigned Word Unsigned Word - + Unsigned Dword Unsigned Dword - + Unsigned Qword Unsigned Qword - + Hexadecimal Word Hexadecimal Word - + Hexadecimal Dword Hexadecimal Dword - + Hexadecimal Qword Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16067,7 +16067,7 @@ number (excluding the sign-bit) to fit in the destination operand; cleared other condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16076,263 +16076,253 @@ to auto-decrement (to process strings from high addresses to low addresses). Cle (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - Hide FPU - - - - Show FPU - Show FPU - - - - - - - + + + + + Unknown Unknown @@ -16340,82 +16330,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero Nonzero - - + + Zero Zero - - + + Special Special - - + + Empty Empty - + Toward Zero Toward Zero - + Toward Positive Toward Positive - + Toward Negative Toward Negative - - + + Round Near Round Near - + Truncate Truncate - + Round Up Round Up - + Round Down Round Down - + Real4 Real4 - + Not Used Not Used - + Real8 Real8 - + Real10 Real10 @@ -16507,122 +16497,122 @@ The TEB can be used to get a lot of information on the process without calling W Execute Script Command... - + &Open... &Open... - + &Paste &درج - + Load Script Load Script - + Re&load Script Re&load Script - + &Unload Script &Unload Script - + &Edit Script &Edit Script - + Toggle &BP Toggle &BP - + Ru&n until selection Ru&n until selection - + &Step &Step - + &Run &Run - + &Abort &Abort - + &Continue here... &Continue here... - + Copy Copy - + E&xecute Command... E&xecute Command... - + Error on line Error on line - + Script Error! Script Error! - + Select script Select script - + Script files (*.txt *.scr);;All files (*.*) Script files (*.txt *.scr);;All files (*.*) - + Error! !خطا - + File open failed! Please open the file yourself... - + Error setting script breakpoint! Error setting script breakpoint! - + Error executing command! Error executing command! - + Message Message - + Question پرسش @@ -18279,7 +18269,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error خطا @@ -18448,7 +18438,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18468,87 +18458,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File گشودن فایل - + Text Files (*.txt) فایل‌های متنی (*.txt) - + Could not open file نتوانست فایل را بگشاید - - + + Error! خطا! - + Selection not in a module... انتخاب‌شده درون قطعه‌کدی نیست... - + Selection not in a file... انتخاب‌شده درون فایلی نیست... - + Constant Constant - - - + + + %1 result(s) in %2ms - + References References @@ -19028,12 +19018,12 @@ This could introduce unexpected behaviour to your debugging session...برجسته‌سازی - + View XMM register View XMM register - + View MMX register View MMX register @@ -19166,100 +19156,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly کد ماشین تبدیل‌شده به زبان نمادین - + Registers Registers - - + + Dump داده‌ها - - + + Stack پشته - + InfoBox - + Error خطا - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Warning - + Loaded trace dump in %1ms - + &Selected Address نشانی &انتخاب‌شده - + &Address: &نشانی: l - + &Old value: - + &Value: &مقدار: l - + &New value: - + &Constant: &ثابت: l diff --git a/x64dbg_fi_FI.ts b/x64dbg_fi_FI.ts index b8994d3..b421b59 100644 --- a/x64dbg_fi_FI.ts +++ b/x64dbg_fi_FI.ts @@ -92,7 +92,7 @@ &Vie taulukko - + &Copy &Kopioi @@ -3683,42 +3683,42 @@ Ctrl+G - + Disassembly Purettu koodi - + Stack pinossa - + Registers - + Dump muistivedoksessa - + Arguments Argumentit - + Sidebar - + InfoBox - + Graph Kaavio @@ -12626,7 +12626,7 @@ Haluatko jatkaan tämän kaavion piirtämistä? Valinta ei ole moduulissa... - + Address Osoite @@ -15811,204 +15811,204 @@ Haluatko silti toteuttaa nämä muutokset? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Liukuluku - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bitti 2) : Parillisuusbitti - Tulee asetetuksi, jos tuloksen viimeinen tavu sisältää parillisen lukumäärän ykkösbittejä; muutoin tulee tyhjennetyksi. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (bitti 4) : Apumuistibitti - Tulee asetetuksi, jos aritmeettisen laskutoimituksen tuloksena @@ -16016,12 +16016,12 @@ kolmannen bitin kohdalta jää muistinumero tai lainaus; muutoin se tyhjennetä käytetään binäärikoodattujen desimaalilukujen (BCD) aritmetiikassa. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bitti 6) : Nollabitti - Tulee asetetuksi, jos tulos on nolla; muutoin tulee tyhjennetyksi. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bitti 7) : Etumerkkibitti - Asetetaan samaksi kuin tuloksen korkein bitti, joka on @@ -16029,7 +16029,7 @@ etumerkillisen kokonaisluvun etumerkkibitti. (0 merkitsee positiivista arvoa ja negatiivista.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16039,7 +16039,7 @@ tyhjennetään muutoin. Tämä bitti ilmaisee laskualueen ylitystä etumerkillis laskutoimituksissa. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16049,42 +16049,42 @@ Suuntabitin asettaminen saa käskyt liikkumaan muistissa suuremmasta osoitteesta Suuntabitin tyhjentäminen saa käskyt liikkumaan muistissa pienemmästä osoitteesta suurempaan. - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bitti 8) : Ansabitti - Tulee asetetuksi, kun virheenjäljitin suorittaa koodia käsky kerrallaan; tyhjennetään, kun tätä tilaa ei käytetä. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (bitti 9) : Keskeytysten käyttöönottobitti - Määrittää prosessorin toimintaan, kun tapahtuu maskitettavia keskeytyspyyntöjä. Kun bitti on asetettu, prosessori vastaa maskitettaviin keskeytyksiin; kun ei, prosessori ei reagoi niihin. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. 16-bittinen x87-liukulukuprosessorin hallintaluku määrittää käytettävän tarkkuuden ja pyöristysmenetelmän. Se sisältää myös liukulukupoikkeusten maskibitit. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. 16-bittinen x87-liukulukuprosessorin tilaluku ilmoittaa prosessorin senhetkisen tilan. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). 16-bittinen tagiluku kuvaa x87-liukulukuprosessorin kahdeksan rekisterin senhetkistä sisältöä (yksi 2-bittinen tagi rekisteriä kohden). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU Tarkkuushallintatietue (PC, x87-liukulukuprosessorin hallintaluvun bitit 8-9) määrittää prosessorin tekemien laskutoimitusten käyttämän tarkkuuden (64, 53 tai 24 bittiä). - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. Pyöristyshallintatietue (RC, x87-liukulukuprosessorin hallintaluvun bitit 10 ja 11) määrittää, kuinka prosessorin liukulukukäskyjen tulokset pyöristetään. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. Äärettömyyden hallintabitti (x87-liukulukuprosessorin hallintaluvun bitti 12) on käytettävissä, jotta @@ -16092,227 +16092,217 @@ saataisiin aikaan yhteensopivuus Intel 287 -sivuprosessorin kanssa; se ei merkitse mitään x87-prosessorin myöhemmissä versioissa tai IA-32-prosessoreissa. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. Virheellisen käskyn poikkeusmaskibitti (bitti 0). Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. Epänormaalin luvun poikkeusmaskibitti (bitti 0). Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. Nollalla jakamisen poikkeusmaskibitti (bitti 3). Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. Laskualueen ylityksen poikkeusmaskibitti (bitti 4). Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. Mahdollisen laskualueen alituksen poikkeusmaskibitti (bitti 5). Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. Epätarkan tuloksen poikkeusmaskibitti (bitti 6). Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. Varausbitti (bitti 15) merkitsee, että FPU on varattu (B=1) ja suorittaa parhaillaan komentoa tai että se on vapaa (B=0). B-bitti (bitti 15) on olemassa vain 8087-yhteensopivuutta varten. Se vastaa ES-bitin sisältöä. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. Tilakoodibittiä C%1 (bitti %2) käytetään ilmoittamaan liukulukujen aritmeettisten laskujen ja vertailujen tuloksia. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. Virhe-/poikkeusyhteenvetotilabitti (bitti 7) asetetaan silloin, kun mikä tahansa estämättömistä poikkeustilabiteistä asetetaan. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. Pinovirhebitti (x87-liukulukuprosessorin tilaluvun bitti 6) ilmoittaa, että x87-prosessorin rekisteripinossa on tapahtunut pinon ali- tai ylivuoto. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. Osoitin x87-prosessorin siihen datarekisteriin, joka on sillä hetkellä pinon päällimmäisenä, löytyy x87-prosessorin tilaluvun biteistä 11–13. Tämä osoitin, jota usein kutsutaan nimellä TOP (top-of-stack), on binääriluku välillä 0–7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. Prosessori luo kelpaamattoman laskutoimituksen poikkeuksen (bitti 0), jos yksi tai useampi operandi ei kelpaa. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. Prosessori ilmoittaa epänormaalin luvun poikkeuksen (bitti 2), jos aritmeettisessa laskutoimituksessa yritetään käyttää epänormaalia lukua. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. Prosessori ilmoittaa nollalla jakamisen poikkeuksen (bitti 3), kun käsky yrittää jakaa äärellistä, nollasta poikkeavaa lukua nollalla. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. Prosessori ilmoittaa liukuluvun laskualueen ylityksen poikkeuksen (bitti 4), kun käskyn tulos pyöristettynä ylittää suurimman mahdollisen äärellisen arvon, joka mahtuu annettuun kohdeoperandiin. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. Prosessori havaitsee mahdollisen liukulukujen laskualueen alituksen (bitti 5), kun pyöristyksen tulos ilman eksponentin rajoituksia eroaa nollasta, mutta on hyvin pieni. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. Epätarkan tuloksen poikkeus (bitti 6) luodaan, kun käskyn tulosta ei voi esittää tarkasti kohteen vaatimassa muodossa. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. 32-bittinen MXCSR-rekisteri sisältää hallinta- ja tilatietoa SIMD-liukulukulaskutoimituksia koskien. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bitti 0 (IE) : Virheellisen laskutoimituksen bitti; ilmoittaa, jos SIMD-liukulukupoikkeus on havaittu. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bitti 1 (DE) : Epänormaalibitti; ilmoittaa, mikäli SIMD-liukulukupoikkeus on havaittu. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bitti 2 (ZE) : Nollalla jakamisen bitti; ilmoittaa, mikäli SIMD-liukulukupoikkeus on havaittu. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bitti 3 (OE) : Ylivuotobitti; ilmoittaa, mikäli SIMD-liukulukupoikkeus on havaittu. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bitti 4 (UE) : Alivuotobitti; ilmoittaa, mikäli SIMD-liukulukupoikkeus on havaittu. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bitti 5 (PE) : Tarkkuusbitti; ilmoittaa, mikäli SIMD-liukulukupoikkeus on havaittu. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bitti 7 (IM) : Virheellisen käskyn maski. Kun maskibitti on asetettu, sitä vastaan poikkeuksen luominen estyy. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bitti 8 (DM) : Epänormaalin luvun maski. Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bitti 9 (ZM) : Nollalla jakamisen maski. Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bitti 10 (OM) : Ylivuotomaski. Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bitti 11 (UM) : Alivuotomaski. Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bitti 12 (PM) : Tarkkuusmaski. Kun maskibitti on asetettu, sitä vastaavan poikkeuksen luominen estyy. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. MXCSR-rekisterin bitti 15 (FZ) ottaa käyttöön ”huuhdo nollaksi” -tilan, joka vaikuttaa prosessorin toimintaan, kun SIMD- liukulukuoperandi on epänormaali. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. MXCSR-rekisterin bitti 6 (DAZ) ottaa käyttöön ”epänormaalit luvut ovat nollia” -tilan, joka vaikuttaa prosessorin toimintaan, kun SIMD- liukulukuoperandi on epänormaali. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. MXCSR-rekisterin bitit 13 ja 14 (pyöristyksen hallinta -tietue eli RC) määräävät, miten SIMD-liukulukulaskutoimitusten tulokset pyöristetään. - + The value of GetLastError(). This value is stored in the TEB. GetLastError()-kutsun tulos. Tämä arvo säilytetään TEB:ssä. - + The NTSTATUS in the LastStatusValue field of the TEB. NTSTATUS TEB:n LastStatusValue-tietueessa. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. Nykyisen säikeen TEB:tä voi käyttää lukemalla muistia alkaen GS-segmenttirekisteristä (x64). TEB:n avulla voi kerätä paljon tietoa prosessista kutsumatta Win32-rajapinnan kirjastoja. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. Nykyisen säikeen TEB:tä voi käyttää lukemalla muistia alkaen FS-segmenttirekisteristä (x86). TEB:n avulla voi kerätä paljon tietoa prosessista kutsumatta Win32-rajapinnan kirjastoja. - - Hide FPU - Piilota liukulukuprosessori - - - - Show FPU - Näytä liukulukuprosessori - - - - - - - + + + + + Unknown Tuntematon @@ -16320,82 +16310,82 @@ TEB:n avulla voi kerätä paljon tietoa prosessista kutsumatta Win32-rajapinnan RegistersView_ConstantsOfRegisters - - + + Nonzero Ei nolla - - + + Zero Nollaa - - + + Special Erityinen - - + + Empty Tyhjä - + Toward Zero Nollaa kohti - + Toward Positive Positiivista kohti - + Toward Negative Negatiivista kohti - - + + Round Near Pyöristä lähimpään - + Truncate Katkaise desimaalit - + Round Up Pyöristä ylöspäin - + Round Down Pyöristä alaspäin - + Real4 Real4 - + Not Used Käyttämätön - + Real8 Real8 - + Real10 Real10 @@ -16487,122 +16477,122 @@ TEB:n avulla voi kerätä paljon tietoa prosessista kutsumatta Win32-rajapinnan Suorita skriptikomento... - + &Open... &Avaa... - + &Paste &Liitä - + Load Script Lataa skripti - + Re&load Script Lataa skripti &uudelleen - + &Unload Script &Poista skriptin lataus - + &Edit Script &Muokkaa skriptiä - + Toggle &BP Lisää/poista &keskeytyskohta - + Ru&n until selection &Jatka valintaan asti - + &Step Jätä &väliin - + &Run &Suorita - + &Abort &Keskeytä - + &Continue here... Jatka &tästä... - + Copy Kopioi - + E&xecute Command... &Suorita komento... - + Error on line Virhe rivillä - + Script Error! Skriptivirhe! - + Select script Valitse skripti - + Script files (*.txt *.scr);;All files (*.*) Skriptitiedostot (*.txt *.scr);;Kaikki tiedostot (*.*) - + Error! Virhe! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! Virhe asettaessa skriptin keskeytyskohtaa! - + Error executing command! Virhe suorittaessa komentoa! - + Message Viesti - + Question Kysymys @@ -18259,7 +18249,7 @@ Se voi aiheuttaa odottamatonta toimintaa virheenjäljitysistunnossa... - + Error Virhe @@ -18428,7 +18418,7 @@ Se voi aiheuttaa odottamatonta toimintaa virheenjäljitysistunnossa... - + Delete recording @@ -18448,87 +18438,87 @@ Se voi aiheuttaa odottamatonta toimintaa virheenjäljitysistunnossa... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Avaa tiedosto - + Text Files (*.txt) Tekstitiedostot (*.txt) - + Could not open file Tiedoston avaaminen ei onnistunut - - + + Error! Virhe! - + Selection not in a module... Valinta ei ole moduulissa... - + Selection not in a file... Valinta ei ole tiedostossa... - + Constant Vakio - - - + + + %1 result(s) in %2ms - + References Viittaukset @@ -19008,12 +18998,12 @@ Se voi aiheuttaa odottamatonta toimintaa virheenjäljitysistunnossa...Korosta - + View XMM register - + View MMX register @@ -19146,100 +19136,100 @@ Se voi aiheuttaa odottamatonta toimintaa virheenjäljitysistunnossa... - + Load dump - + Disassembly Purettu koodi - + Registers - - + + Dump muistivedoksessa - - + + Stack pinossa - + InfoBox - + Error Virhe - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Varoitus - + Loaded trace dump in %1ms - + &Selected Address &valittuun osoitteeseen - + &Address: osoitteeseen: - + &Old value: - + &Value: arvoon: - + &New value: - + &Constant: vakioon: diff --git a/x64dbg_fil_PH.ts b/x64dbg_fil_PH.ts index 9a8c5d7..4359966 100644 --- a/x64dbg_fil_PH.ts +++ b/x64dbg_fil_PH.ts @@ -92,7 +92,7 @@ - + &Copy &Kopyahin @@ -3683,42 +3683,42 @@ Ctrl+G - + Disassembly I-disassembly - + Stack Stack - + Registers - + Dump Tapon - + Arguments - + Sidebar - + InfoBox - + Graph Graph @@ -12365,7 +12365,7 @@ Do you want to continue rendering this graph? Pagpili ng hindi kasali sa modyul... - + Address Address @@ -15544,484 +15544,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16029,82 +16019,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16196,122 +16186,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste &Idikit - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17966,7 +17956,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Error @@ -18135,7 +18125,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18155,87 +18145,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Buksan ang file - + Text Files (*.txt) Mga teksto ng file (*.txt) - + Could not open file Hindi mabuksan ang file - - + + Error! Error! - + Selection not in a module... Pagpili ng hindi kasali sa modyul... - + Selection not in a file... Pagpili na hindi kasali sa file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18715,12 +18705,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18853,100 +18843,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly I-disassembly - + Registers - - + + Dump Tapon - - + + Stack Stack - + InfoBox - + Error Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address &Piniling address - + &Address: &Address: - + &Old value: - + &Value: &Halaga: - + &New value: - + &Constant: &Patuloy: diff --git a/x64dbg_fr_FR.ts b/x64dbg_fr_FR.ts index 4f62abb..3f6c215 100644 --- a/x64dbg_fr_FR.ts +++ b/x64dbg_fr_FR.ts @@ -92,7 +92,7 @@ &Exporter la table - + &Copy &Copier @@ -3682,42 +3682,42 @@ Ctrl+G - + Disassembly Vue Désassembleur - + Stack Pile - + Registers - + Dump Vue Hexa - + Arguments - + Sidebar - + InfoBox - + Graph Graphe @@ -12442,7 +12442,7 @@ Do you want to continue rendering this graph? La sélection n'est pas dans un module... - + Address Addresse @@ -15626,484 +15626,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Flottant - + Double Flottant double précision - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - Masquer FPU - - - - Show FPU - Afficher FPU - - - - - - - + + + + + Unknown Inconnu @@ -16111,82 +16101,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero Zéro - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16278,122 +16268,122 @@ The TEB can be used to get a lot of information on the process without calling W Exécuter la commande de Script... - + &Open... &Ouvrir... - + &Paste &Coller - + Load Script Charger un Script - + Re&load Script Re&charger un Script - + &Unload Script &Décharger un Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run &Exécuter - + &Abort - + &Continue here... - + Copy Copier - + E&xecute Command... - + Error on line Erreur sur la ligne - + Script Error! Erreur de script! - + Select script Sélectionner un script - + Script files (*.txt *.scr);;All files (*.*) Fichiers script (*.txt *.scr); Tous les fichiers (*. *) - + Error! Erreur! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message Message - + Question Question @@ -18048,7 +18038,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Erreur @@ -18217,7 +18207,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18237,87 +18227,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) Traquer les enregistrements (*.%1);;Tous les fichiers (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace Adresse introuvable dans la trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Ouvrir le fichier - + Text Files (*.txt) Fichiers texte (*.txt) - + Could not open file Impossible d'ouvrir le fichier - - + + Error! Erreur! - + Selection not in a module... La sélection n'est pas dans un module... - + Selection not in a file... La sélection n'est pas dans un fichier... - + Constant Constante - - - + + + %1 result(s) in %2ms - + References Références @@ -18797,12 +18787,12 @@ This could introduce unexpected behaviour to your debugging session... Mettre en surbrillance - + View XMM register - + View MMX register @@ -18935,100 +18925,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Vue Désassembleur - + Registers - - + + Dump Vue Hexa - - + + Stack Pile - + InfoBox - + Error Erreur - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Attention - + Loaded trace dump in %1ms - + &Selected Address Adresse &Sélectionnée - + &Address: &Adresse : - + &Old value: - + &Value: &Valeur : - + &New value: - + &Constant: &Constante : diff --git a/x64dbg_he_IL.ts b/x64dbg_he_IL.ts index d30c818..b9ffce6 100644 --- a/x64dbg_he_IL.ts +++ b/x64dbg_he_IL.ts @@ -92,7 +92,7 @@ &יצא טבלאות - + &Copy &העתק @@ -3678,42 +3678,42 @@ Ctrl+G - + Disassembly Disassembly - + Stack מחסנית - + Registers אוגרים - + Dump Dump - + Arguments ארגומנטים - + Sidebar - + InfoBox - + Graph גרף @@ -12376,7 +12376,7 @@ Do you want to continue rendering this graph? - + Address כתובת @@ -15555,484 +15555,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers אוגרים - + Copy value העתק ערך - + Copy floating point value העתק ערך float - + Copy Symbol Value - + Copy all registers העתק את כל האוגרים - + Change view שנה תצוגה - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX הצג MMX - + Hexadecimal הקסדצימאלי - + Float Float - + Double Double - + Signed Word Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - הסתר FPU - - - - Show FPU - הצג FPU - - - - - - - + + + + + Unknown לא ידוע @@ -16040,82 +16030,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero לא אפס - - + + Zero אפס - - + + Special מיוחד - - + + Empty ריק - + Toward Zero לכיוון אפס - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 Real4 - + Not Used לא בשימוש - + Real8 Real8 - + Real10 Real10 @@ -16207,122 +16197,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... &פותח... - + &Paste &הדבק - + Load Script טען סקריפט - + Re&load Script - + &Unload Script - + &Edit Script &ערוך סקריפט - + Toggle &BP - + Ru&n until selection - + &Step &צעד - + &Run &הרץ - + &Abort &בטל - + &Continue here... - + Copy העתק - + E&xecute Command... - + Error on line שגיאה בשורה - + Script Error! שגיאת סקריפט! - + Select script בחר סקריפט - + Script files (*.txt *.scr);;All files (*.*) - + Error! שגיאה! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message הודעה - + Question שאלה @@ -17977,7 +17967,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error שגיאה @@ -18146,7 +18136,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18166,87 +18156,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File פתח קובץ - + Text Files (*.txt) קבצי טקסט (*.txt) - + Could not open file לא ניתן לפתוח את הקובץ - - + + Error! שגיאה! - + Selection not in a module... - + Selection not in a file... - + Constant קבוע - - - + + + %1 result(s) in %2ms - + References @@ -18726,12 +18716,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18864,100 +18854,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Disassembly - + Registers אוגרים - - + + Dump Dump - - + + Stack מחסנית - + InfoBox - + Error שגיאה - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning אזהרה - + Loaded trace dump in %1ms - + &Selected Address &כתובת שנבחרה - + &Address: &כתובת: - + &Old value: - + &Value: &ערך: - + &New value: - + &Constant: diff --git a/x64dbg_hi_IN.ts b/x64dbg_hi_IN.ts index 848b9d4..77b31eb 100644 --- a/x64dbg_hi_IN.ts +++ b/x64dbg_hi_IN.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3677,42 +3677,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12359,7 +12359,7 @@ Do you want to continue rendering this graph? - + Address @@ -15538,484 +15538,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16023,82 +16013,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16190,122 +16180,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17960,7 +17950,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18129,7 +18119,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18149,87 +18139,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18709,12 +18699,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18847,100 +18837,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_hu_HU.ts b/x64dbg_hu_HU.ts index 14b11b2..e472bdf 100644 --- a/x64dbg_hu_HU.ts +++ b/x64dbg_hu_HU.ts @@ -93,7 +93,7 @@ mrfearless - + &Copy &Másolás @@ -3680,42 +3680,42 @@ mrfearless - + Disassembly - + Stack Verem - + Registers Regiszterek - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12362,7 +12362,7 @@ Do you want to continue rendering this graph? - + Address Cím @@ -15541,486 +15541,476 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. A TEB az aktuális szál mint az eltolás szegmensregiszter GS (x64) érhető el. a TEB lehet hozzászokott kap egy csomó információt a folyamat a Win32 API hívása nélkül. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. A TEB az aktuális szál mint az eltolás szegmensregiszter FS (x86) érhető el. a TEB lehet hozzászokott kap egy csomó információt a folyamat a Win32 API hívása nélkül. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16028,82 +16018,82 @@ a TEB lehet hozzászokott kap egy csomó információt a folyamat a Win32 API h RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16195,122 +16185,122 @@ a TEB lehet hozzászokott kap egy csomó információt a folyamat a Win32 API h - + &Open... - + &Paste &Beillesztés - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run &Futtatás - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Hiba! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17965,7 +17955,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18134,7 +18124,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18154,87 +18144,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! Hiba! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18714,12 +18704,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18852,100 +18842,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack Verem - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address &Kiválasztott cím: - + &Address: &Cím: - + &Old value: - + &Value: &Érték: - + &New value: - + &Constant: &Konstans: diff --git a/x64dbg_id_ID.ts b/x64dbg_id_ID.ts index 9f50ac8..6914f6d 100644 --- a/x64dbg_id_ID.ts +++ b/x64dbg_id_ID.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3677,42 +3677,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12359,7 +12359,7 @@ Do you want to continue rendering this graph? - + Address @@ -15538,484 +15538,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16023,82 +16013,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16190,122 +16180,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17960,7 +17950,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18129,7 +18119,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18149,87 +18139,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18709,12 +18699,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18847,100 +18837,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_it_IT.ts b/x64dbg_it_IT.ts index 8df085f..b231c49 100644 --- a/x64dbg_it_IT.ts +++ b/x64dbg_it_IT.ts @@ -92,7 +92,7 @@ &Esporta Tabella - + &Copy &Copia @@ -3679,42 +3679,42 @@ Ctrl+G - + Disassembly Disassembly - + Stack Stack - + Registers - + Dump Dump - + Arguments Argomenti - + Sidebar - + InfoBox - + Graph Grafico @@ -12383,7 +12383,7 @@ Do you want to continue rendering this graph? Selezione non è in un modulo... - + Address Indirizzo @@ -15566,484 +15566,474 @@ Si desidera applicare queste patch comunque? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - Nascondi FPU - - - - Show FPU - Mostra FPU - - - - - - - + + + + + Unknown Sconosciuto @@ -16051,82 +16041,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero Azzera - - + + Special - - + + Empty Vuoto - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16218,122 +16208,122 @@ The TEB can be used to get a lot of information on the process without calling W Esegui comando script... - + &Open... - + &Paste &Incolla - + Load Script Carica script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run &Avvia - + &Abort - + &Continue here... - + Copy Copia - + E&xecute Command... - + Error on line Errore sulla riga - + Script Error! Errore script! - + Select script Seleziona script - + Script files (*.txt *.scr);;All files (*.*) File di script (*.txt *.scr);;Tutti i file (*.*) - + Error! Errore! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question Domanda @@ -17988,7 +17978,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Errore @@ -18157,7 +18147,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18177,87 +18167,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Apri File - + Text Files (*.txt) File di testo (*.txt) - + Could not open file Impossibile aprire il file - - + + Error! Errore! - + Selection not in a module... Selezione non in un modulo... - + Selection not in a file... Selezione non in un file... - + Constant - - - + + + %1 result(s) in %2ms - + References Riferimenti @@ -18737,12 +18727,12 @@ This could introduce unexpected behaviour to your debugging session... Evidenzia - + View XMM register - + View MMX register @@ -18875,100 +18865,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Disassembly - + Registers - - + + Dump Dump - - + + Stack Stack - + InfoBox - + Error Errore - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Avviso - + Loaded trace dump in %1ms - + &Selected Address &Indirizzo selezionato - + &Address: &Indirizzo: - + &Old value: - + &Value: &Valore: - + &New value: - + &Constant: &Costante: diff --git a/x64dbg_ja_JP.ts b/x64dbg_ja_JP.ts index 0ecad3f..d0ca5b2 100644 --- a/x64dbg_ja_JP.ts +++ b/x64dbg_ja_JP.ts @@ -92,7 +92,7 @@ テーブルのエクスポート(&E) - + &Copy コピー(&C) @@ -3686,42 +3686,42 @@ Ctrl+G - + Disassembly 逆アセンブル - + Stack スタック - + Registers レジスタ - + Dump ダンプ - + Arguments 引数 - + Sidebar サイドバー - + InfoBox InfoBox - + Graph グラフ @@ -12709,7 +12709,7 @@ Do you want to continue rendering this graph? 選択範囲がモジュール内にありません... - + Address アドレス @@ -15903,494 +15903,484 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. AVX-512 はこのコンピューターではサポートされていません。 - + Registers レジスタ - + Copy value 値をコピー - + Copy floating point value 浮動小数点値をコピー - + Copy Symbol Value シンボルの値をコピー - + Copy all registers すべてのレジスタをコピー - + Change view 表示の変更 - + Change SIMD Register Display Mode SIMD レジスタ表示モードの変更 - + Display ST(x) ST(x) を表示 - + Display x87rX x87rX を表示 - + Display MMX MMX を表示 - + Hexadecimal Hexadecimal - + Float Float - + Double Double - + Signed Word Signed Word - + Signed Dword Signed Dword - + Signed Qword Signed Qword - + Unsigned Word Unsigned Word - + Unsigned Dword Unsigned Dword - + Unsigned Qword Unsigned Qword - + Hexadecimal Word Hexadecimal Word - + Hexadecimal Dword Hexadecimal Dword - + Hexadecimal Qword Hexadecimal Qword - + Always show maximum vector length 常に最大ベクトル長を表示 - + Always show all AVX-512 registers 常にすべての AVX-512 レジスタを表示 - + CF (Carry flag) CF (キャリーフラグ) - + PF (Parity flag) PF (パリティフラグ) - + AF (Auxiliary Carry flag) AF (補助キャリー フラグ) - + ZF (Zero flag) ZF (ゼロ フラグ) - + SF (Sign flag) SF (サインフラグ) - + TF (Trap flag) TF (トラップ フラグ) - + IF (Interrupt enable flag) IF (割り込み有効 フラグ) - + DF (Direction flag) DF (方向 フラグ) - + OF (Overflow flag) OF (オーバーフロー フラグ) - + Bit # Bit # - + Mask マスク - + Flag フラグ - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. CF (bit 0) : Carry flag - 算術演算がキャリーを生成したり、結果の最も重要なビットを借りたりするかを設定する。 それ以外は消去された このフラグは符号なし整数算術のオーバーフロー条件を示します。これは多重精度算術でも使用されます。 - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2) : Parity フラグ - 結果の最も重要なバイト数が偶数1ビットを含む場合に設定する。それ以外の場合はクリアする。 - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (bit 4) : 補助キャリーフラグ - 算術演算によってキャリーまたはビット 3から借用が生成されるかどうかを設定します。 それ以外は消去された このフラグはバイナリコードの小数(BCD)算術で使用されます。 - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bit 6) : Zero flag - 結果がゼロの場合に設定します。 - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bit 7) : Sign フラグ - 結果の最も重要なビットに等しく設定する これは符号付き整数の符号ビットです。 (0 は正の値、1 は負の値を示します。) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. OF (bit 11) : オーバーフロー フラグ - 整数結果が大きすぎる正数、または小さすぎる負数 (符号ビットを除く) で宛先オペランドに収まらない場合にセットされ、それ以外の場合はクリアされます。このフラグは、符号付き整数 (2 の補数) 演算のオーバーフロー状態を示します。 - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). DF (bit 10): 方向フラグは文字列命令 (MOVS、CMPS、SCAS、LODS、および STOS) を制御します。DF フラグを設定すると、文字列命令は自動的にデクリメントされます (文字列を高アドレスから低アドレスに処理します)。DF フラグをクリアすると、文字列命令は自動的にインクリメントされます (文字列を低アドレスから高アドレスに処理します)。 - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8) : Trap フラグ - デバッグ時にシングルステップモードを有効にするための設定。シングルステップモードを無効にするための設定。 - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (bit 9) : Interrupt enable flag - マスク可能な割込み要求に対するプロセッサの応答を制御します。 マスク可能な割込みに応答するように設定します。マスク可能な割込みを抑制するためにクリアします。 - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. 16ビットのx87 FPU制御ワードは、x87 FPUの精度と使用される丸め方を制御します。 また、x87 FPU 浮動小数点例外マスクビットも含まれています。 - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. 16ビットのx87 FPUステータスレジスタは、x87 FPUの現在の状態を示します。 - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). 16ビットタグワードは、x87 FPUデータレジスタスタック(レジスタあたり1つの2ビットタグ)の各8つのレジスタの内容を示します。 - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU 精度制御(PC)フィールド(x87 FPU 制御ワードのビット8および9)が精度(64)を決定します。 x87 FPU で行われた浮動小数点計算の 53, または 24 ビット) - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. x87 FPU 制御レジスタの丸め制御(RC)フィールド(ビット10および11)は、x87 FPU 浮動小数点命令の結果がどのように丸められるかを制御します。 - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. インテル 287 数値コプロセッサとの互換性のため、無限大制御制御フラグ (x87 FPU 制御ワードのビット 12) が用意されています。 後のバージョンのx87 FPUコプロセッサまたはIA-32プロセッサでは意味がありません。 - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. 無効な動作例外マスク (ビット 0) です。マスクビットが設定されている場合、対応する例外が生成されることはありません。 - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. 非正規化オペランド例外マスク (ビット 2) マスクビットが設定されると、それに対応する例外がブロックされます。 - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. 浮動小数点除算ゼロ例外マスク (ビット 3) マスクビットを設定すると、その例外はブロックされます。 - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. 浮動小数点数値オーバーフロー例外マスク (ビット 4) マスクビットが設定されると、対応する例外が生成されなくなります。 - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. 潜在的な浮動小数点数値アンダーフロー条件マスク (ビット 5) マスクビットが設定されると、その例外はブロックされます。 - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. 不正確な結果/精度例外マスク (ビット 6) マスクビットが設定されると、対応する例外がブロックされます。 - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. ビジーフラグ(ビット 15)は、命令を実行しているときにFPUがビジー(B=1)であるか、アイドル(B=0)であるかを示します。 Bビット(ビット 15)は8087互換のみ含まれており、ESフラグの内容を反映しています。 - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. C%1 条件コードフラグ (ビット %2) は、浮動小数点比較と算術演算の結果を示すために使用されます。 - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. エラー/例外サマリ状態フラグ (ビット 7) は、マスクされていない例外フラグが設定されている場合に設定されます。 - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. スタックフォルトフラグ(x87 FPU ステータスワードのビット6)は、x87 FPU データレジスタスタック内のデータ でスタックオーバーフローまたはスタックアンダーフローが発生したことを示します。 - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. x87 FPUレジスタスタックの上部にあるx87 FPUデータレジスタへのポインタは、x87 FPUステータスワードのビット11~13 に含まれています。 このポインタは一般的に TOP (トップオブスタック) と呼ばれますが、0 から 7 のバイナリ値です。 - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. プロセッサは、無効な演算オペランドに応答して無効な演算例外 (ビット 0) を報告します。 - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. プロセッサは、非正規化オペランド例外(ビット 2)を報告します。これは、算術命令が非正規化オペランドを扱おうとしたときに発生します。 - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. プロセッサは、命令が有限でないオペランドを 0 で分割しようとするたびに、浮動小数点除算例外(ビット 3) を報告します。 - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. プロセッサは、浮動小数点数のオーバーフロー例外(ビット 4)を報告します。これは、命令の丸め後の結果が、宛先オペランドに収まる最大の有限値を超えた場合に発生します。 - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. プロセッサは、潜在的な浮動小数点アンダーフロー条件(ビット 5)を検出します。これは、無制限指数で丸めた結果がゼロではなく非常に小さい場合に発生します。 - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. 演算の結果がデスティネーションフォーマットで正確に表現できない場合、不正確な結果/精度例外(ビット 6) が発生します。 - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. 32 ビットの MXCSR レジスタには、SIMD 浮動小数点演算の制御およびステータス情報が格納されています。 - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE) : 不正な操作フラグ; SIMD 浮動小数点例外が検出されたかどうかを示します。 - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE) : 非正規化フラグ; SIMD 浮動小数点例外が検出されたかどうかを示します。 - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE) : ゼロフラグの分割; SIMD 浮動小数点例外が検出されたかどうかを示します。 - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE) : オーバーフローフラグ; SIMD 浮動小数点例外が検出されたかどうかを示します。 - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE) : アンダーフローフラグ; SIMD 浮動小数点例外が検出されたかどうかを示します。 - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE) : 精度フラグ; SIMD 浮動小数点例外が検出されたかどうかを示します。 - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 7 (IM) : 無効なオペレーションマスク. マスクビットが設定されている場合, その対応する例外が生成されることはありません. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 8 (DM) : 非正規化マスク。マスクビットが設定されている場合、対応する例外の発生がブロックされます。 - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 9 (ZM) : ゼロ除算マスク。マスクビットが設定されている場合、対応する例外の発生がブロックされます。 - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 10 (OM) : オーバーフローマスク。マスクビットを設定すると、それに対応する例外がブロックされます。 - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 11 (UM) : アンダーフローマスク。マスクビットが設定されると、それに対応する例外がブロックされます。 - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 12 (PM) : 精度マスク。マスクビットが設定されている場合、対応する例外の発生がブロックされます。 - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. MXCSR レジスタのビット 15 (FZ) は、SIMD 浮動小数点アンダーフロー状態に対するマスクされた応答を制御するゼロフラッシュ モードを有効にします。 - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. MXCSR レジスタのビット 6 (DAZ) は、SIMD 浮動小数点の非正規化オペランド条件に対するプロセッサの応答を制御する非正規化数ゼロ モードを有効にします。 - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. MXCSRレジスタ(丸め制御 [RC] フィールド)のビット13および14は、SIMD浮動小数点命令の結果がどのように丸められるかを制御します。 - + The value of GetLastError(). This value is stored in the TEB. GetLastError() の値。この値は TEB に格納されます。 - + The NTSTATUS in the LastStatusValue field of the TEB. TEB の LastStatusValue フィールドにある NTSTATUS。 - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. 現在のスレッドのTEBには、セグメントレジスタGS (x64) のオフセットとしてアクセスできます。 TEBは、Win32APIを呼び出すことなく、プロセスに関する多くの情報を取得するために使用できます。 - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. 現在のスレッドのTEBには、セグメントレジスタFS (x86) のオフセットとしてアクセスできます。 TEBは、Win32APIを呼び出すことなく、プロセスに関する多くの情報を取得するために使用できます。 - - Hide FPU - 浮動小数点演算ユニットを隠す - - - - Show FPU - 浮動小数点演算ユニットを表示 - - - - - - - + + + + + Unknown 不明 @@ -16398,82 +16388,82 @@ TEBは、Win32APIを呼び出すことなく、プロセスに関する多くの RegistersView_ConstantsOfRegisters - - + + Nonzero Nonzero - - + + Zero Zero - - + + Special Special - - + + Empty 空 - + Toward Zero ゼロ方向丸め - + Toward Positive 正方向丸め - + Toward Negative 負方向丸め - - + + Round Near 最近接丸め - + Truncate 切り捨て - + Round Up 切り上げ - + Round Down 切り下げ - + Real4 Real4 - + Not Used 未使用 - + Real8 Real8 - + Real10 Real10 @@ -16565,122 +16555,122 @@ TEBは、Win32APIを呼び出すことなく、プロセスに関する多くの スクリプト コマンドの実行... - + &Open... 開く(&O)... - + &Paste 貼り付け(&P) - + Load Script スクリプトの読み込み - + Re&load Script スクリプトを再読み込み(&L) - + &Unload Script スクリプトをアンロード(&U) - + &Edit Script スクリプトの編集(&E) - + Toggle &BP BP の切り替え(&B) - + Ru&n until selection 選択行まで実行(&N) - + &Step ステップ実行(&S) - + &Run 実行(&R) - + &Abort 中止(&A) - + &Continue here... ここから続行(&C)... - + Copy コピー - + E&xecute Command... コマンドを実行(&X)... - + Error on line 行にエラーがあります - + Script Error! スクリプト エラー! - + Select script スクリプトの選択 - + Script files (*.txt *.scr);;All files (*.*) スクリプトファイル (*.txt *.scr);;すべてのファイル (*.*) - + Error! エラー! - + File open failed! Please open the file yourself... ファイルを開けません! 自分でファイルを開いてください... - + Error setting script breakpoint! スクリプト ブレークポイントの設定エラー! - + Error executing command! コマンド実行中のエラー! - + Message メッセージ - + Question 質問 @@ -18337,7 +18327,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error エラー @@ -18507,7 +18497,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording 記録を削除 @@ -18527,88 +18517,88 @@ This could introduce unexpected behaviour to your debugging session... トレース ファイルをエクスプローラーで開く。 - + Open trace recording トレース記録を開く - + Trace recording トレース記録 - + Trace recordings (*.%1);;All files (*.*) トレース記録 (*.%1);;すべてのファイル (*.*) - + Are you sure you want to delete this recording? この記録を削除してもよろしいですか? - + Address not found in trace アドレスがトレース内に見つかりません - - + + The address %1 is not found in trace. アドレス %1 がトレース内に見つかりません。 - + Do you want to follow in CPU instead? 代わりに CPU画面で追跡しますか? - + Open File ファイルを開く - + Text Files (*.txt) テキスト ファイル(*.txt) - + Could not open file ファイルを開けませんでした - - + + Error! エラー! - + Selection not in a module... 選択範囲がモジュール内にありません... - + Selection not in a file... 選択範囲がファイル内にありません... - + Constant 定数 - - - + + + %1 result(s) in %2ms %1 結果 (%2 ミリ秒) - + References 参照 @@ -19089,12 +19079,12 @@ This could introduce unexpected behaviour to your debugging session... 強調表示 - + View XMM register XMM レジスタを表示 - + View MMX register MMX レジスタを表示 @@ -19227,101 +19217,101 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump ダンプの読み込み - + Disassembly 逆アセンブル - + Registers レジスタ - - + + Dump ダンプ - - + + Stack スタック - + InfoBox InfoBox - + Error エラー - + Error when opening trace recording (reason: %1) トレース記録を開くときにエラーが発生しました (理由 : %1) - + Trace file is recorded for another debuggee 別のデバッグ対象に対してトレースファイルが記録されます - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" チェックサムは、現在のトレースファイルとデバッグ対象で異なります。これは、間違ったトレースファイルを開いた可能性があります。このトレースファイルは %1 に記録されています - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. トレース ダンプを有効にすると、大量のメモリ (このトレースの最大で ~%1GiB) が消費され、x64dbg が長時間フリーズする可能性があります。この機能はまだ実験段階ですので、バグが発生した場合は報告してください。 - + Warning 警告 - + Loaded trace dump in %1ms %1 ミリ秒で、トレース ダンプを読み込み済み - + &Selected Address 選択したアドレス(&S) - + &Address: アドレス(&A) : - + &Old value: 元の値(&O) : - + &Value: 値(&V) : - + &New value: 新しい値(&N) : - + &Constant: 定数(&C) : diff --git a/x64dbg_ka_GE.ts b/x64dbg_ka_GE.ts index d83a942..90cc607 100644 --- a/x64dbg_ka_GE.ts +++ b/x64dbg_ka_GE.ts @@ -92,7 +92,7 @@ - + &Copy &კოპირება @@ -3678,42 +3678,42 @@ - + Disassembly დისასამბლირებული - + Stack სტეკი - + Registers - + Dump დამპი - + Arguments - + Sidebar - + InfoBox - + Graph გრაფი @@ -12360,7 +12360,7 @@ Do you want to continue rendering this graph? - + Address მისამართი @@ -15539,484 +15539,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16024,82 +16014,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16191,122 +16181,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste &ჩასმა - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! შეცდომა! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17961,7 +17951,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error შეცდომა @@ -18130,7 +18120,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18150,87 +18140,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File ფაილის გახსნა - + Text Files (*.txt) ტექსტური ფაილები (*.txt) - + Could not open file ფაილი ვერ იხსნება - - + + Error! შეცდომა! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18710,12 +18700,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18848,100 +18838,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly დისასამბლირებული - + Registers - - + + Dump დამპი - - + + Stack სტეკი - + InfoBox - + Error შეცდომა - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address &შერჩეული მისამართი - + &Address: &მისამართი: - + &Old value: - + &Value: &მნიშვნელობა: - + &New value: - + &Constant: &კონსტანტა: diff --git a/x64dbg_ko_KR.ts b/x64dbg_ko_KR.ts index de37b74..7aa97cd 100644 --- a/x64dbg_ko_KR.ts +++ b/x64dbg_ko_KR.ts @@ -92,7 +92,7 @@ 테이블 내보내기(&E) - + &Copy &복사 @@ -3683,42 +3683,42 @@ Ctrl+G - + Disassembly 디스어셈블리 - + Stack 스택 - + Registers 레지스터 - + Dump 덤프 - + Arguments 인자 - + Sidebar 사이드바 - + InfoBox 정보창 - + Graph 그래프 @@ -12609,7 +12609,7 @@ Do you want to continue rendering this graph? 선택이 모듈안에 존재하지 않습니다... - + Address 주소 @@ -15816,227 +15816,227 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers 레지스터 - + Copy value 값 복사 - + Copy floating point value 부동소수점 값 복사 - + Copy Symbol Value 심볼 값 복사 - + Copy all registers 모든 레지스터 복사 - + Change view 뷰 변경 - + Change SIMD Register Display Mode SIMD 레지스터 표시 모드 변경 - + Display ST(x) ST(x) 표시 - + Display x87rX x87rX 표시 - + Display MMX MMX 표시 - + Hexadecimal 16진수 - + Float Float - + Double Double - + Signed Word 부호 있는 Word - + Signed Dword 부호 있는 Dword - + Signed Qword 부호 있는 Qword - + Unsigned Word 부호 없는 Word - + Unsigned Dword 부호 없는 Dword - + Unsigned Qword 부호 없는 Qword - + Hexadecimal Word 16진수 Word - + Hexadecimal Dword 16진수 Dword - + Hexadecimal Qword 16진수 Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) CF (Carry flag) - + PF (Parity flag) PF (Parity flag) - + AF (Auxiliary Carry flag) AF (Auxiliary Carry flag) - + ZF (Zero flag) ZF (Zero flag) - + SF (Sign flag) SF (Sign flag) - + TF (Trap flag) TF (Trap flag) - + IF (Interrupt enable flag) IF (Interrupt enable flag) - + DF (Direction flag) DF (Direction flag) - + OF (Overflow flag) DF (Direction flag) - + Bit # 비트 # - + Mask 마스크 - + Flag 플래그 - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. CF (비트 0) : Carry flag - 연산 명령에서 최상위비트를 넘어가는 올림이나 내림을 하면 설정합니다; 그 외의 경우에는 표시하지 않습니다. 이 플래그는 부호없는 정수 연산에 대한 오버플로우 조건을 나타냅니다. 또한 다중 정밀도 산술에 사용됩니다. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2) : 패리티 플래그 - 결과의 최하위 바이트에 1 비트의 짝수가 포함되어있는 경우 설정하고; 그 외의 경우에는 표시하지 않습니다. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (bit 4) : 보조 올림 플래그 - 연산 작업에서 3비트 이상의 올림이나 내림을 하면 설정합니다; 그 외의 경우에는 표시하지 않습니다. 이 플래그는 2진화 10진수 (BCD) 연산에 사용됩니다. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bit 6) : 제로 플래그 - 결과값이 0일때 설정하고; 그 외의 경우에는 표시하지 않습니다. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bit 7) : 부호 플래그 - 부호가 있는 정수의 부호 비트와 결과의 최상위비트가 동일하도록 설정합니다. (0은 양의 값을 나타내고 1은 음의 값을 나타냅니다.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16045,7 +16045,7 @@ condition for signed-integer (two’s complement) arithmetic. 이 플래그는 부호가 있는 정수 (2의 채움수) 산술에 대한 오버플로우 조건을 나타냅니다. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16053,263 +16053,253 @@ to auto-decrement (to process strings from high addresses to low addresses). Cle (프로세스 문자열에 낮은 주소에서 높은 주소로) 하도록 합니다. - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8) : 트랩 플래그 - 디버깅 도중 단일 단계 모드 활성화시 설정하고; 비활성화시 표시하지 않습니다. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (bit 9) : 인터럽트 활성화 플래그 - 마스킹 가능 인터럽트 요청에 대한 프로세서의 응답을 제어합니다. 마스크 가능 인터럽트에 응답하면 설정하고; 금지되면 표시하지 않습니다. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. 16-bit x87 FPU 제어 word 는 x87 FPU 의 정밀도와 사용되는 자릿수 처리방식을 제어합니다. 또한 x87 FPU 부동 소수점 예외 마스크 bits를 포함하고있습니다. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. 16-bit x87 FPU 상태 레지스터는 현재 x87 FPU 상태를 나타냅니다. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). 16-bit tag word는 x87 FPU 데이터 레지스터 스택 (레지스터 당 one 2-bit tag) 에서 각각 8 레지스터의 내용을 나타냅니다. - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU 정밀도 제어 (PC) 필드 (x87 FPU 제어 word의 bits 8 와 9) 는 x87 FPU로 이루어진 소수점 계산의 정밀도 (64, 53, or 24 bits) 를 결정합니다 - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. X87 FPU 제어 레지스터 (bit 10 과 11) 의 자릿수 제어 (RC) 필드는x87 FPU 부동제어점 명령어의 결과가 자릿수 처리되는 방식을 제어합니다. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. 무한 제어 플래그 (x87 FPU 제어 word의 bit 12) 는 Intel 287 수치 연산 보조 처리기와의 호환성을 위해서 제공되었습니다; 상위 버전의 x87 FPU 보조 처리기나 IA-32 처리기와의 호환을 의미하지 않습니다. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. 유효하지 않은 연산 예외 마스크(비트 0). 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. 비정규 피연산자 예외 마스크(비트 2). 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. 부동 소수점 0으로 나눔 예외 마스크(비트 3). 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. 부동 소수점 오버플로우 예외 마스크(비트 4). 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. 잠재적 부동소수점 언더플로우 조건 마스크(비트 5). 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. 부정확한 결과/정밀도 예외 마스크(비트 6). 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. Busy flag(비트 15)는 명령을 실행하는 동안 FPU가 사용 중인지(B=1) 아니면 대기 중인지(B=0) 나타냅니다. B 비트(bit 15)는 8087 호환성을 위해서만 포함되어 있습니다. 이는 ES 플래그의 내용을 반영합니다. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. C%1 조건 코드 플래그(비트 %2)는 부동 소수점 비교 및 산술 연산의 결과를 나타내는 데 사용됩니다. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. 오류/예외 요약 상태 플래그(비트 7)는 마스크가 해제된 예외 플래그가 설정될 때 설정됩니다. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. 스택 오류 플래그 (x87 FPU 상태 word의 bit 6) 는 x87 FPU 데이터 레지스터 스택 데이터에서 스택 오버플로우나 스택 언더플로우가 발생했음을 나타냅니다. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. 현재 x87 FPU 레지스터 스택의 맨위에 있는 x87 FPU 데이터 레지스터로의 포인터로써 x87 FPU 상태 word의 bits 11에서 13까지에 포함되었습니다. 보통 TOP (스택의 맨위로) 으로 불리는, 이 포인터는 0부터 7까지의 바이너리 값입니다. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. 프로세서는 하나 이상의 잘못된 산술 피연산자에 대한 응답으로 유효하지 않은 작업 예외(비트 0)를 보고합니다. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. 프로세서는 산술 명령이 비정규 피연산자에 작용하려고 시도할 때 비정규 피연산자 예외(비트 2)를 보고합니다. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. 프로세서는 명령이 유한한 0이 아닌 피연산자를 0으로 나누려고 시도할 때마다 부동 소수점 0으로 나누기 예외(비트 3)를 보고합니다. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. 프로세서는 명령의 반올림 결과가 대상 피연산자에 들어갈 수 있는 최대 허용 유한 값을 초과할 때마다 부동 소수점 오버플로우 예외(비트 4)를 보고합니다. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. 프로세서는 반올림한 결과가 0이 아니며 아주 작을 때마다 부동 소수점 수치 언더플로우 조건(비트 5)을 감지합니다. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. 연산 결과가 대상 형식으로 정확하게 표현할 수 없는 경우에는 부정확한 결과/정밀도 예외(비트 6)가 발생합니다. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. 32-bit MXCSR 레지스터는 SIMD 부동소수점 연산을 위한 제어와 상태 정보를 포함합니다. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE) : 잘못된 작업 플래그; SIMD 부동 소수점 예외의 발견 여부를 나타냅니다. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE) : 비정상 플래그; SIMD 부동 소수점 예외의 발견 여부를 나타냅니다. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE) : 0으로 나누기 플래그; SIMD 부동 소수점 예외의 발견 여부를 나타냅니다. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE) : 오버플로우 플래그; SIMD 부동 소수점 예외의 발견 여부를 나타냅니다. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE) : 언더플로우 플래그; SIMD 부동 소수점 예외의 발견 여부를 나타냅니다. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE) : 정밀도 플래그; SIMD 부동 소수점 예외의 발견 여부를 나타냅니다. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 비트 7 (IM): 잘못된 연산 마스크. 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 비트 8 (DM) : 비정규 마스크. 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 비트 9 (ZM) : 0으로 나눔 마스크. 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 비트 10 (OM) : 오버플로우 마스크. 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 비트 11 (UM) : 언더플로우 마스크. 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 비트 12 (PM) : 정밀도 마스크. 마스크 비트가 설정되면 해당 예외가 생성되는 것이 차단됩니다. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. MXCSR 레지스터의 Bit 15 (FZ) 는 flush-to-zero 모드를 활성화하며, SIMD 부동소수점 언더플로우 조건에 마스크된 응답을 제어합니다. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. MXCSR 레지스터의 Bit 6 (DAZ) 는 denormals-are-zero 모드를 활성화하며, SIMD 부동소수점 비정상 피연산자 조건에 프로세스의 응답을 제어합니다. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. MXCSR 레지스터의 Bits 13 와 14 (자릿수 제어 [RC] 필드) 는 SIMD 부동소수점 명령어 결과가 자릿수처리되는 방식을 제어합니다. - + The value of GetLastError(). This value is stored in the TEB. GetLastError() 의 값입니다. 이 값은 TEB에 저장됩니다. - + The NTSTATUS in the LastStatusValue field of the TEB. TEB의 LastStatusValue 필드에 있는 NTSTATUS. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. 현재 스레드의 TEB는 세그먼트 레지스터 GS (x64) 의 오프셋으로 접근할수 있습니다. 이 TEB는 Win32 API 호출하지 않고 많은 정보를 얻는데 사용될 수 있습니다. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. 현재 스레드의 TEB는 세그먼트 레지스터 FS (x86) 의 오프셋으로 접근할수 있습니다. 이 TEB는 Win32 API 호출하지 않고 많은 정보를 얻는데 사용될 수 있습니다. - - Hide FPU - FPU 숨기기 - - - - Show FPU - FPU 보기 - - - - - - - + + + + + Unknown 알 수 없음 @@ -16317,82 +16307,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero 영이 아님 - - + + Zero 영 - - + + Special 특수 - - + + Empty 비어 있음 - + Toward Zero 영으로 - + Toward Positive 긍정문으로 - + Toward Negative 부정문으로 - - + + Round Near 자릿수 반올림 - + Truncate 생략 - + Round Up 자릿수 올림 - + Round Down 자릿수 내림 - + Real4 Real4 - + Not Used 사용되지 않음 - + Real8 Real8 - + Real10 Real10 @@ -16484,122 +16474,122 @@ The TEB can be used to get a lot of information on the process without calling W 스크립트 명령 실행... - + &Open... 열기(&O)... - + &Paste 붙여넣기(&P) - + Load Script 스크립트 로드 - + Re&load Script 스크립트 다시불러오기(&L) - + &Unload Script 스크립트 언로드(&U) - + &Edit Script 스크립트 편집(&E) - + Toggle &BP 중단점 설정/해제(&B) - + Ru&n until selection 선택까지 실행(&N) - + &Step 단계(&S) - + &Run 실행(&R) - + &Abort 중단(&A) - + &Continue here... 여기 계속하기(&C)... - + Copy 복사 - + E&xecute Command... 명령어 실행(&X)... - + Error on line 오류 발생 라인 - + Script Error! 스크립트 오류! - + Select script 스크립트를 선택 - + Script files (*.txt *.scr);;All files (*.*) 스크립트 파일 (*.txt *.scr);;모든 파일 (*. *) - + Error! 오류발생! - + File open failed! Please open the file yourself... 파일 오픈 실패! 파일을 수동으로 열어주세요... - + Error setting script breakpoint! 스크립트 중단점 설정 오류! - + Error executing command! 명령 실행 오류! - + Message 메시지 - + Question 질문 @@ -18259,7 +18249,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error 오류 @@ -18428,7 +18418,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording 기록 삭제 @@ -18448,87 +18438,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording 추적 기록 열기 - + Trace recording 추적 기록 - + Trace recordings (*.%1);;All files (*.*) 추적 기록 파일 (*.%1);; 모든 파일 (*.*) - + Are you sure you want to delete this recording? 정말로 이 기록을 삭제하시겠습니까? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File 파일 열기 - + Text Files (*.txt) 텍스트 파일 (*.txt);; - + Could not open file 파일을 열 수 없습니다 - - + + Error! 오류발생! - + Selection not in a module... 선택이 모듈안에 존재하지 않습니다... - + Selection not in a file... 선택 항목이 파일에 없습니다... - + Constant 상수 - - - + + + %1 result(s) in %2ms - + References 참조 @@ -19009,13 +18999,13 @@ This could introduce unexpected behaviour to your debugging session... 하이라이트 - + View XMM register XMM 레지스터를 뷰 - + View MMX register MMX 레지스터를 뷰 @@ -19149,100 +19139,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump 덤프 불러오기 - + Disassembly 디스어셈블리 - + Registers 레지스터 - - + + Dump 덤프 - - + + Stack 스택 - + InfoBox 정보창 - + Error 오류 - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning 경고 - + Loaded trace dump in %1ms - + &Selected Address 선택한 주소(&S) - + &Address: 주소(&A): - + &Old value: - + &Value: 값(&V): - + &New value: - + &Constant: 상수(&C): diff --git a/x64dbg_lt_LT.ts b/x64dbg_lt_LT.ts index cfbf832..29bc309 100644 --- a/x64dbg_lt_LT.ts +++ b/x64dbg_lt_LT.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3677,42 +3677,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12359,7 +12359,7 @@ Do you want to continue rendering this graph? - + Address @@ -15538,484 +15538,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16023,82 +16013,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16190,122 +16180,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17960,7 +17950,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18129,7 +18119,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18149,87 +18139,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18709,12 +18699,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18847,100 +18837,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_nl_NL.ts b/x64dbg_nl_NL.ts index 1960890..7a84d09 100644 --- a/x64dbg_nl_NL.ts +++ b/x64dbg_nl_NL.ts @@ -92,7 +92,7 @@ - + &Copy Kopieëren @@ -3683,42 +3683,42 @@ Ctrl+G - + Disassembly Disassembly - + Stack Stack - + Registers - + Dump Dump - + Arguments Argumenten - + Sidebar - + InfoBox - + Graph Grafiek @@ -12579,7 +12579,7 @@ Do you want to continue rendering this graph? Selectie niet in een module... - + Address Adres @@ -15767,486 +15767,476 @@ Wilt u deze patches toch toepassen? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2): Pariteit vlag - Wordt gezet als het Minst Significante Byte van het resultaat een even aantal 1 bits bevat; anders gewist. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (4 bits): Auxiliary Carry vlag - Wordt gezet als een rekenkundige bewerking bit 3 leent of overdraagt; anders wordt de vlag gereset. Deze vlag wordt gebruikt in Binair Gecodeerde Decimaal (BCD) rekenkunde. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bit 6): Nul vlag - Wordt gezet als het resultaat nul is; anders gewist. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bit 7): Sign vlag - Wordt ingesteld op het meest-significante bit van het resultaat, welke het teken-bit is van een signed integer. (0 betekent een positieve waarde en 1 betekent een negatieve waarde.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. OF (bit 11): Overloop vlag - Wordt gezet als het integer resultaat een te groot positief, of een te klein negatief getal is (met uitzondering van het sign-bit); anders wordt het gewist. Deze vlag geeft een overloop conditie aan voor signed-integer (two complement) bewerkingen. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). DF (bit 10): Richting vlag. Bepaalt de richting van automatisch ophogen van string instructies (MOVS, CMPS SCAS, LODS en STOS). Met de vlag gezet worden deze van hoog naar laag (achteruit) uitgevoerd in plaats van van laag naar hoog (vooruit). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8): Trap vlag - Het instellen hiervan activeert de single-step modus voor debugging; het wissen ervan schakeld single-step modus uit. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (bit 9): Interrupt vlag - Bepaalt de reactie van de processor op maskeerbare interrupt verzoeken. Zet de vlag om maskeerbare interrupts af te handelen; wissen deactiveert de afhandeling. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. Het 16-bits x87 FPU controle woord bepaalt de precisie van de x87 FPU en afrondingsmethode die wordt gebruikt. Het bevat ook de x87 FPU floating-point exceptie bit-maskers. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. Het 16-bits x87 FPU status register geeft de huidige status van de x87 FPU weer. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). Het 16-bits vlag woord geeft de inhoud aan van elk van de 8 registers in de x87 FPU gegevensregister stack (één 2-bits vlag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU Het precisie-controle (PC) veld (bit 8 en 9 van het x87 FPU controle woord) bepaalt de precisie (64, 53 of 24-bits) van floating-point berekeningen gemaakt door de x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. Het afronding-controle (RC) veld van het x87 FPU controle register (bits 10 en 11) bepaalt hoe de resultaten van x87 FPU floating-point instructies worden afgerond. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. De oneindig-controle vlag (bit 12 van het x87 controle register woord) dient uitsluitend voor compatibiliteit met de Intel 287 Math Co-processor; het wordt niet gebruikt door latere versies van x87 FPU of IA-32 processoren. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. De stack fout-vlag (bit 6 van het x87 FPU status woord) geeft aan dat een stack-overloop of -onderloop is opgetreden met de gegevens in de x87 FPU gegevens registrer stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. Een aanwijzer naar het x87 FPU gegevens register dat zich momenteel aan de top van de x87 FPU registreren stack bevindt, is opgeslagen in bits 11 tot en met 13 van het x87 FPU status woord. Deze aanwijzer, die wordt vaak aangeduid als TOP (wegens top-of-stack), is een binaire waarde van 0 tot en met 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. Het 32-bits MXCSR register bevat controle- en status-informatie van SIMD floating-point operaties. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE): Ongeldige Operatie Vlag; geeft aan of een SIMD float-point exceptie geconstateerd is. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE): Denormal Vlag; geeft aan of een SIMD floating-point exceptie geconstateerd is. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE): Delen-door-Nul Vlag; geeft aan of een SIMD floating-point exceptie geconstateerd is. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE): Overloop Vlag; geeft aan of een SIMD floating-point exceptie geconstateerd is. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE): Onderloop Vlag; geeft aan of een SIMD floating-point exceptie geconstateerd is. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE): Precisie Vlag; geeft aan of een SIMD floating-point exceptie geconstateerd is. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. Bit 15 (FZ) van het MXCSR-register activeert de Flush-naar-Nul modus, welke het gemaskeerde resultaat van een SIMD floating-point onderloop bepaalt. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. Bit 6 (DAZ) van de MXCSR register activeert de denormals-zijn-nullen modus, welke bepaalt hoe de processor reageert op SIMD floating-point denormal operatie condities. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. Bits 13 en 14 van het MXCSR-register (het afronding [RC] controleveld) bepalen hoe de resultaten van SIMD floating-point instructies worden afgerond. - + The value of GetLastError(). This value is stored in the TEB. De waarde van GetLastError(). Deze waarde wordt opgeslagen in het TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. Het TEB van het huidige thread kan benaderd worden als offset van segment register GS (x64). Het TEB kan gebruikt worden om veel informatie over het proces te achterhalen zonder Win32 API aan te roepen. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. Het TEB van het huidige thread kan benaderd worden als offset van segment register FS (x86). Het TEB kan gebruikt worden om veel informatie over het proces te achterhalen zonder Win32 API aan te roepen. - - Hide FPU - Verberg FPU - - - - Show FPU - Toon FPU - - - - - - - + + + + + Unknown Onbekend @@ -16254,82 +16244,82 @@ Het TEB kan gebruikt worden om veel informatie over het proces te achterhalen zo RegistersView_ConstantsOfRegisters - - + + Nonzero Niet-nul - - + + Zero Nul - - + + Special Speciaal - - + + Empty Leeg - + Toward Zero Naar Nul - + Toward Positive Naar Positief - + Toward Negative Naar Negatief - - + + Round Near Afronden Naar - + Truncate Afkappen - + Round Up Afronden naar Boven - + Round Down Afronden naar Beneden - + Real4 Real4 - + Not Used Niet Gebruikt - + Real8 Real8 - + Real10 Real10 @@ -16421,122 +16411,122 @@ Het TEB kan gebruikt worden om veel informatie over het proces te achterhalen zo Uitvoeren Script-opdracht... - + &Open... &Open... - + &Paste &Plakken - + Load Script Laad Script - + Re&load Script Re&load Script - + &Unload Script &Uitladen Script - + &Edit Script - + Toggle &BP Wissel &BP - + Ru&n until selection Uitvoere&n tot selectie - + &Step &Stap - + &Run Uitvoe&ren - + &Abort &Afbreken - + &Continue here... Hier Doorgaan... - + Copy Kopieren - + E&xecute Command... - + Error on line Fout op regel - + Script Error! Scriptfout! - + Select script Selecteer script - + Script files (*.txt *.scr);;All files (*.*) Script-bestanden (*.txt *.scr);;Alle bestanden (*. *) - + Error! Fout! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! Script breekpunt instellen is mislukt! - + Error executing command! Fout bij het uitvoeren van de opdracht! - + Message Bericht - + Question Vraag @@ -18193,7 +18183,7 @@ Dit kan onverwacht gedrag introduceren in de debug-sessie... - + Error Fout @@ -18362,7 +18352,7 @@ Dit kan onverwacht gedrag introduceren in de debug-sessie... - + Delete recording @@ -18382,87 +18372,87 @@ Dit kan onverwacht gedrag introduceren in de debug-sessie... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Bestand openen - + Text Files (*.txt) Tekstbestanden (*.txt) - + Could not open file Kan bestand niet openen - - + + Error! Fout! - + Selection not in a module... Selectie niet in een module... - + Selection not in a file... Selectie niet in een bestand... - + Constant - - - + + + %1 result(s) in %2ms - + References Referenties @@ -18942,12 +18932,12 @@ Dit kan onverwacht gedrag introduceren in de debug-sessie... Markeer - + View XMM register - + View MMX register @@ -19080,100 +19070,100 @@ Dit kan onverwacht gedrag introduceren in de debug-sessie... - + Load dump - + Disassembly Disassembly - + Registers - - + + Dump Dump - - + + Stack Stack - + InfoBox - + Error Fout - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Waarschuwing - + Loaded trace dump in %1ms - + &Selected Address Ge&selecteerd Adres - + &Address: &Adres: - + &Old value: - + &Value: Waarde: - + &New value: - + &Constant: &Constante: diff --git a/x64dbg_no_NO.ts b/x64dbg_no_NO.ts index 3c882b6..4203564 100644 --- a/x64dbg_no_NO.ts +++ b/x64dbg_no_NO.ts @@ -92,7 +92,7 @@ - + &Copy & Kopi @@ -3678,42 +3678,42 @@ Ctrl + G - + Disassembly Disassembly - + Stack Stack - + Registers - + Dump Dumpe - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12361,7 +12361,7 @@ Do you want to continue rendering this graph? - + Address Address @@ -15541,484 +15541,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - Skjule FPU - - - - Show FPU - Vis FPU - - - - - - - + + + + + Unknown Ukjent @@ -16026,82 +16016,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16193,122 +16183,122 @@ The TEB can be used to get a lot of information on the process without calling W Kjør skript kommando... - + &Open... - + &Paste &Lim inn - + Load Script Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run &Kjør - + &Abort - + &Continue here... - + Copy Kopier - + E&xecute Command... - + Error on line Feil på linjen - + Script Error! Skriptfeil! - + Select script Velg skript - + Script files (*.txt *.scr);;All files (*.*) Skript filer (*.txt *.scr); Alle filer (*.*) - + Error! Feil! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question Spørsmål @@ -17963,7 +17953,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Feil @@ -18132,7 +18122,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18152,87 +18142,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Åpne Fil - + Text Files (*.txt) Tekstfiler (*.txt) - + Could not open file Kunne ikke åpne fil - - + + Error! Feil! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References Referanser @@ -18712,12 +18702,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18850,100 +18840,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Disassembly - + Registers - - + + Dump Dumpe - - + + Stack Stack - + InfoBox - + Error Feil - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address & Valgte adresse - + &Address: & Adresse: - + &Old value: - + &Value: & Verdi: - + &New value: - + &Constant: & Konstant: diff --git a/x64dbg_pl_PL.ts b/x64dbg_pl_PL.ts index 0c37dd7..3e25716 100644 --- a/x64dbg_pl_PL.ts +++ b/x64dbg_pl_PL.ts @@ -92,7 +92,7 @@ &Eksportuj tabelę - + &Copy &Kopiuj @@ -3680,42 +3680,42 @@ Ctrl+G - + Disassembly - + Stack Stos - + Registers - + Dump Zrzuć - + Arguments Argumenty - + Sidebar - + InfoBox - + Graph Diagram @@ -12485,7 +12485,7 @@ Do you want to continue rendering this graph? Zaznaczenie nie w module... - + Address Adres @@ -15673,484 +15673,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view Zmień widok - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. Wartość GetLastError(). Ta wartość jest przechowywana w TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - Ukryj FPU - - - - Show FPU - Pokaż FPU - - - - - - - + + + + + Unknown Nieznany @@ -16158,82 +16148,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero Różne od zera - - + + Zero Zero - - + + Special - - + + Empty Puste - + Toward Zero W kierunku zera - + Toward Positive W kierunku dodatnim - + Toward Negative - - + + Round Near - + Truncate Obetnij - + Round Up Zaokrąglij w górę - + Round Down Zaokrąglij w dół - + Real4 Real4 - + Not Used Nie używane - + Real8 Real8 - + Real10 Real10 @@ -16325,122 +16315,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... &Otwórz... - + &Paste &Wklej - + Load Script Wczytaj skrypt - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step &Krok - + &Run &Wykonaj - + &Abort &Przerwij - + &Continue here... - + Copy Kopiuj - + E&xecute Command... - + Error on line Błąd w linii - + Script Error! Błąd skryptu! - + Select script Wybierz skrypt - + Script files (*.txt *.scr);;All files (*.*) Pliki skryptów (*.txt *.scr);;Wszystkie pliki (*.*) - + Error! Błąd! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message Wiadomość - + Question Pytanie @@ -18095,7 +18085,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Błąd @@ -18264,7 +18254,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18284,87 +18274,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Otwórz plik - + Text Files (*.txt) Pliki tekstowe (*.txt) - + Could not open file Nie można otworzyć pliku - - + + Error! Błąd! - + Selection not in a module... Zaznaczenie nie w module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References Odwołania @@ -18844,12 +18834,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register Zobacz rejestr XMM - + View MMX register Zobacz rejestr MMX @@ -18982,100 +18972,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump Zrzuć - - + + Stack Stos - + InfoBox - + Error Błąd - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Ostrzeżenie - + Loaded trace dump in %1ms - + &Selected Address &Wybrany adres - + &Address: &Adres: - + &Old value: - + &Value: &Wartość: - + &New value: - + &Constant: &Stała: diff --git a/x64dbg_pt_BR.ts b/x64dbg_pt_BR.ts index 5651920..ab2619e 100644 --- a/x64dbg_pt_BR.ts +++ b/x64dbg_pt_BR.ts @@ -92,7 +92,7 @@ &Exportar tabela - + &Copy &Copiar @@ -3685,42 +3685,42 @@ Ctrl+G - + Disassembly &Desmontagem - + Stack Pilha - + Registers - + Dump Despejo - + Arguments Argumentos - + Sidebar Barra lateral - + InfoBox - + Graph Gráfico @@ -12482,7 +12482,7 @@ Do you want to continue rendering this graph? Seleção não em um módulo... - + Address Endereço @@ -15661,484 +15661,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown Desconhecido @@ -16146,82 +16136,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 Real4 - + Not Used - + Real8 Real8 - + Real10 Real10 @@ -16313,122 +16303,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste Co&lar - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy Copiar - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Erro! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -18083,7 +18073,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Erro @@ -18252,7 +18242,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18272,87 +18262,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Abrir Arquivo - + Text Files (*.txt) Arquivos de Texto (*.txt) - + Could not open file Não pode abrir arquivo - - + + Error! Erro! - + Selection not in a module... Seleção não em um módulo... - + Selection not in a file... Seleção não está em um arquivo... - + Constant - - - + + + %1 result(s) in %2ms - + References Referências @@ -18832,12 +18822,12 @@ This could introduce unexpected behaviour to your debugging session... Destacar - + View XMM register - + View MMX register @@ -18970,100 +18960,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly &Desmontagem - + Registers - - + + Dump Despejo - - + + Stack Pilha - + InfoBox - + Error Erro - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Aviso - + Loaded trace dump in %1ms - + &Selected Address Endereços selecionados - + &Address: &Endereço: - + &Old value: - + &Value: Valor: - + &New value: - + &Constant: &Constante: diff --git a/x64dbg_pt_PT.ts b/x64dbg_pt_PT.ts index 1e3e6a1..adae7fa 100644 --- a/x64dbg_pt_PT.ts +++ b/x64dbg_pt_PT.ts @@ -92,7 +92,7 @@ - + &Copy &Copiar @@ -3678,42 +3678,42 @@ Ctrl+G - + Disassembly - + Stack Stack - + Registers - + Dump Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12360,7 +12360,7 @@ Do you want to continue rendering this graph? - + Address @@ -15539,484 +15539,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16024,82 +16014,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16191,122 +16181,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Erro! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17961,7 +17951,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18130,7 +18120,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18150,87 +18140,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! Erro! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18710,12 +18700,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18848,100 +18838,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump Dump - - + + Stack Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address &Endereço selecionado - + &Address: &Endereço: - + &Old value: - + &Value: &Valor: - + &New value: - + &Constant: &Constante: diff --git a/x64dbg_ro_RO.ts b/x64dbg_ro_RO.ts index 6e5a602..86cf795 100644 --- a/x64dbg_ro_RO.ts +++ b/x64dbg_ro_RO.ts @@ -93,7 +93,7 @@ - + &Copy @@ -3678,42 +3678,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12360,7 +12360,7 @@ Do you want to continue rendering this graph? - + Address @@ -15539,484 +15539,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16024,82 +16014,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16191,122 +16181,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17961,7 +17951,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18130,7 +18120,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18150,87 +18140,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18710,12 +18700,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18848,100 +18838,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_ru_RU.ts b/x64dbg_ru_RU.ts index 821405e..23f3823 100644 --- a/x64dbg_ru_RU.ts +++ b/x64dbg_ru_RU.ts @@ -92,7 +92,7 @@ &Экспортировать таблицу - + &Copy &Копировать @@ -3686,42 +3686,42 @@ Ctrl+G - + Disassembly Дизассемблированный код - + Stack Стек - + Registers Регистры - + Dump Дамп - + Arguments Аргументы - + Sidebar Боковая панель - + InfoBox - + Graph График @@ -12662,7 +12662,7 @@ Do you want to continue rendering this graph? Выделенное не в модуле... - + Address Адрес @@ -15854,204 +15854,204 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers Регистры - + Copy value Скопировать значение - + Copy floating point value Скопировать значение с плавающей точкой - + Copy Symbol Value Скопировать значение символа - + Copy all registers Скопировать все регистры - + Change view Изменить вид - + Change SIMD Register Display Mode Изменить режим отображения регистров SIMD - + Display ST(x) Отобразить ST(x) - + Display x87rX Отобразить x87rX - + Display MMX Отобразить MMX - + Hexadecimal Hexadecimal - + Float Float - + Double Double - + Signed Word Signed Word - + Signed Dword Signed Dword - + Signed Qword Signed Qword - + Unsigned Word Unsigned Word - + Unsigned Dword Unsigned Dword - + Unsigned Qword Unsigned Qword - + Hexadecimal Word Hexadecimal Word - + Hexadecimal Dword Hexadecimal Dword - + Hexadecimal Qword Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) SF (флаг знака) - + TF (Trap flag) TF (флаг ловушки) - + IF (Interrupt enable flag) IF (флаг включения прерываний) - + DF (Direction flag) DF (флаг направления) - + OF (Overflow flag) OF (флаг переполнения) - + Bit # Бит # - + Mask Маска - + Flag Флаг - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (бит 2) : Флаг четности - устанавливается если младший байт результата содержит четное число единичных бит; в противном случае сбрасывается. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (бит 4) : Вспомогательный флаг переноса - устанавливается если в результате арифметической операции @@ -16059,12 +16059,12 @@ This flag indicates an overflow condition for unsigned-integer arithmetic. It is Этот флаг используется только в вычислениях с двоично-десятичными числами (BCD). - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (бит 6) : Флаг нуля - устанавливается если результат равен нулю; в противном случае сбрасывается. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (бит 7) : Флаг знака - устанавливается равным старшему биту результата, который является @@ -16072,7 +16072,7 @@ integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16082,7 +16082,7 @@ condition for signed-integer (two’s complement) arithmetic. на переполнение для знакового целого числа (в дополнительном коде). - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16092,114 +16092,114 @@ to auto-decrement (to process strings from high addresses to low addresses). Cle для строковых инструкций (обработка строк от младших адресов к старшим). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (бит 8) : Флаг ловушки - устанавливается для включения режима пошаговой отладки; для отключения режима необходимо сбросить. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (бит 9) : Флаг прерывания - управляет реакцией процессора на маскирование прерываний. Установленный флаг разрешает прерывания; сброшенный флаг маскирует (запрещает) прерывания. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. 16-битное слово управления x87 FPU управляет точностью и методом округления x87 FPU. Оно также содержит биты маски исключения с плавающей запятой x87 FPU. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. 16-битный x87 FPU регистр статуса указывает текущее состояние x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). 16-битное слово тегов указывает содержимое каждого из 8-и регистров стека в x87 FPU (одно 2-битное поле в регистре). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU Поле контроля точности (PC) (биты 8 и 9 слова управления x87 FPU) определяет точность вычислений с плавающей запятой (64, 53, или 24 бит), выполняемые в x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. Поле режима округления (RC) регистра управления x87 FPU (биты 10 и 11) определяет каким образом округляются результаты инструкций x87 FPU с плавающей запятой. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. Флаг управления бесконечностью (бит 12 слова управления x87 FPU) обеспечивает совместимость с математическим сопроцессором Intel 287; для более поздних версий x87 FPU сопроцессоров или процессоров IA-32 не имеет смысла. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. Маска исключения недействительной операции (бит 0). Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. Маска исключения денормализованного операнда (бит 2). Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. Маска исключения деления на ноль чисел с плавающей запятой (бит 3). Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. Маска исключения переполнения чисел с плавающей запятой (бит 4). Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. Маска условия потенциального антипереполнения чисел с плавающей запятой (бит 5). Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. Маска исключения неточного результата (бит 6). Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. Флаг занятости (бит 15) указывает, если FPU занят (B=1) во время выполнения инструкции или свободен (B=0). B-бит (бит 15) присутствует только для совместимости с 8087. Он дублирует состояние флага ES. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. Код флага состояния C%1 (бит %2) используется для отображения результатов сравнения чисел с плавающей запятой и арифметических операций. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. Флаг суммарной ошибки/исключения (бит 7) устанавливается, когда устанавливается любой флаг немаскируемого исключения. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. Флаг ошибки стека (бит 6 слова состояния x87 FPU) указывает, что произошло переполнение или антипереполнение стека с данными в регистре данных стека x87 FPU. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. Указатель на регистр данных x87 FPU, находящийся в данный момент на верхушке стека регистров x87 FPU; @@ -16207,161 +16207,151 @@ of the x87 FPU status word. This pointer, which is commonly referred to as TOP ( является двоичным значением от 0 до 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. Процессор сообщает об исключении недействительной операции (бит 0) в ответ на один или несколько недействительных арифметических операндов. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. Процессор сообщает об исключении денормализованного операнда (бит 2) в случае попытки обработать денормализованный операнд. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. Процессор сообщает об исключении деления на ноль чисел с плавающей запятой (бит 3) всякий раз, когда инструкция пытается разделить конечный ненулевой операнд на 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. Процессор сообщает об исключении переполнения чисел с плавающей запятой (бит 4) всякий раз, когда округленный результат инструкции превышает максимально допустимое конечное значение, которое может поместиться в операнд-приемник. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. Процессор определяет потенциальное условие антипереполнения чисел с плавающей запятой (бит 5) всякий раз, когда результат округления с неограниченной экспонентой не нулевой и очень маленький. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. Исключение неточного результата (бит 6) возникает, если результат операции нельзя точно представить в выходном формате. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. 32-битный MXCSR регистр содержит информацию об управлении и состоянии SIMD-операций с плавающей запятой. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Бит 0 (IE) : Флаг недействительной операции; указывает, было ли обнаружено исключение SIMD с плавающей запятой. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Бит 1 (DE) : Флаг денормализованного операнда; указывает, было ли обнаружено исключение SIMD с плавающей запятой. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Бит 2 (ZE) : Флаг деление на ноль; указывает, было ли обнаружено исключение SIMD с плавающей запятой. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Бит 3 (OE) : Флаг переполнения; указывает, было ли обнаружено исключение SIMD с плавающей запятой. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Бит 4 (UE) : Флаг антипереполнения; указывает, было ли обнаружено исключение SIMD с плавающей запятой. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Бит 5 (PE) : Флаг точности; указывает, было ли обнаружено исключение SIMD с плавающей запятой . - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Бит 7 (IM) : Маска недействительной операции. Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Бит 8 (DM) : Маска денормализованного операнда. Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Бит 9 (ZM) : Маска деления на ноль. Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Бит 10 (OM) : Маска переполнения. Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Бит 11 (UM) : Маска антипереполнения. Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Бит 12 (PM) : Маска точности. Когда бит маски установлен, соответствующее исключение блокируется с момента создания. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. Бит 15 (FZ) регистра MXCSR включает режим сброс-в-ноль, который управляет маскированием состояния антипереполнения SIMD с плавающей запятой. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. Бит 6 (DAZ) регистра MXCSR включает режим денормализованное-как-ноль, который управляет ответом процессора на денормализованный операнд SIMD с плавающей запятой. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. Биты 13 и 14 MXCSR-регистра (управление округлением [RC]) определяют, каким образом округляются результаты SIMD-инструкций с плавающей запятой. - + The value of GetLastError(). This value is stored in the TEB. Значение GetLastError(). Это значение хранится в TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. NTSTATUS в поле LastStatusValue TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. Значение TEB текущего потока может быть получено как смещение сегментного регистра GS (x64). TEB может использоваться для получения информации о процессе без вызова Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. Значение TEB текущего потока может быть получено как смещение сегментного регистра FS (x86). TEB может использоваться для получения информации о процессе без вызова Win32 API. - - Hide FPU - Скрыть FPU - - - - Show FPU - Показать FPU - - - - - - - + + + + + Unknown Неизвестно @@ -16369,82 +16359,82 @@ TEB может использоваться для получения инфор RegistersView_ConstantsOfRegisters - - + + Nonzero Ненулевое значение - - + + Zero Нулевое значение - - + + Special Специальное значение - - + + Empty Пусто - + Toward Zero Округление к нулю - + Toward Positive Округление к положительным - + Toward Negative Округление к отрицательным - - + + Round Near Округлить до ближайшего - + Truncate Усечение - + Round Up Округлить вверх - + Round Down Округлить вниз - + Real4 Real4 - + Not Used Не используется - + Real8 Real8 - + Real10 Real10 @@ -16536,122 +16526,122 @@ TEB может использоваться для получения инфор Выполнение команды сценария... - + &Open... &Открыть... - + &Paste &Вставить - + Load Script Загрузить скрипт - + Re&load Script Перезагрузить скрипт - + &Unload Script Выгрузить скрипт - + &Edit Script &Редактировать скрипт - + Toggle &BP Переключить &BP - + Ru&n until selection Выполнить до выделенного - + &Step &Шаг - + &Run &Выполнить - + &Abort &Прервать - + &Continue here... П&родолжить отсюда... - + Copy Копировать - + E&xecute Command... Вы&полнить команду... - + Error on line Ошибка в строке - + Script Error! Ошибка сценария! - + Select script Выбор скрипта - + Script files (*.txt *.scr);;All files (*.*) Файлы сценариев (*.txt *.scr);;Все файлы (*.*) - + Error! Ошибка! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! Ошибка установки точки останова в скрипте! - + Error executing command! Ошибка выполнения команды! - + Message Сообщение - + Question Вопрос @@ -18308,7 +18298,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Ошибка @@ -18477,7 +18467,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18497,88 +18487,88 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Открыть файл - + Text Files (*.txt) Текстовые файлы (*.txt) - + Could not open file Невозможно открыть файл - - + + Error! Ошибка! - + Selection not in a module... Выделенное не в модуле... - + Selection not in a file... Выделение вне файла... - + Constant Константа - - - + + + %1 result(s) in %2ms %1 результат(-ов) в %2ms - + References Ссылки @@ -19058,12 +19048,12 @@ This could introduce unexpected behaviour to your debugging session... Подсветить - + View XMM register Посмотреть регистр XMM - + View MMX register Посмотреть регистр MMX @@ -19196,100 +19186,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Дизассемблированный код - + Registers Регистры - - + + Dump Дамп - - + + Stack Стек - + InfoBox - + Error Ошибка - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Внимание - + Loaded trace dump in %1ms - + &Selected Address &Выделенный адрес - + &Address: &Адрес: - + &Old value: - + &Value: &Значение: - + &New value: - + &Constant: &Константа: diff --git a/x64dbg_si_LK.ts b/x64dbg_si_LK.ts index 3e4db9a..fb7f15f 100644 --- a/x64dbg_si_LK.ts +++ b/x64dbg_si_LK.ts @@ -92,7 +92,7 @@ සහ අපනයන වගුව - + &Copy &පිටපත් @@ -3686,42 +3686,42 @@ Ctrl+G - + Disassembly විසුරුවීම - + Stack ගොඩගසන්න - + Registers ලේඛණ - + Dump ඩම්ප් - + Arguments තර්ක - + Sidebar බාර්කෝඩ් - + InfoBox තොරතුරු පෙට්ටිය - + Graph ප්රස්ථාර @@ -12690,7 +12690,7 @@ Do you want to continue rendering this graph? මොඩියුලයක් තුළ තෝරා ගැනීම... - + Address ලිපිනය @@ -15885,225 +15885,225 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. මෙම පරිගණකයේ AVX-512 සඳහා සහය නොදක්වයි. - + Registers ලේඛණ - + Copy value පිටපත් අගය - + Copy floating point value පාවෙන ලක්ෂ්ය අගය පිටපත් - + Copy Symbol Value පිටපත් සංකේත අගය - + Copy all registers සියලුම ලේඛන පිටපත් කරන්න - + Change view දැක්ම වෙනස් - + Change SIMD Register Display Mode SIMD ලියාපදිංචි පෙන්වන්න ප්රකාරය වෙනස් - + Display ST(x) ටී. සංදර්ශකය (x) - + Display x87rX X87RX සංදර්ශකය - + Display MMX MMX සංදර්ශකය - + Hexadecimal හෙක්සාඩෙසිමල් - + Float පාවෙන - + Double ද්විත්ව - + Signed Word අත්සන් කළ වචනය - + Signed Dword අත්සන් කළ ඩ්වර්ඩ් - + Signed Qword අත්සන් කළ Qword - + Unsigned Word අත්සන් නොකළ වචනය - + Unsigned Dword අත්සන් නොකළ ඩ්වර්ඩ් - + Unsigned Qword අත්සන් නොකළ Qword - + Hexadecimal Word හෙක්සාඩෙසිමල් වචනය - + Hexadecimal Dword හෙක්සාඩෙසිමල් ඩ්වර්ඩ් - + Hexadecimal Qword හෙක්සාඩෙසිමල් Qword - + Always show maximum vector length සෑම විටම උපරිම දෛශික දිග පෙන්වන්න - + Always show all AVX-512 registers සෑම විටම සියලුම AVX-512 රෙජිස්ටර් පෙන්වන්න - + CF (Carry flag) CF (රැගෙන යන ධජය) - + PF (Parity flag) PF (සමාන්තර ධජය) - + AF (Auxiliary Carry flag) AF (සහායක රැගෙන යාමේ ධජය) - + ZF (Zero flag) ZF (ශුන්‍ය ධජය) - + SF (Sign flag) SF (සංඥා කොඩිය) - + TF (Trap flag) TF (උගුල් කොඩිය) - + IF (Interrupt enable flag) IF (බාධා කිරීම් සක්‍රීය ධජය) - + DF (Direction flag) DF (දිශා ධජය) - + OF (Overflow flag) OF (පිටාර ගැලීමේ ධජය) - + Bit # බිට් # - + Mask මාස්ක් - + Flag කොඩිය - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. CF (bit 0) : Carry flag - අංක ගණිතමය මෙහෙයුමක් මඟින් ප්‍රතිඵලයේ වඩාත්ම වැදගත් bit එකෙන් carry එකක් හෝ loan එකක් ජනනය කරන්නේ නම් සකසන්න; එසේ නොමැතිනම් හිස් කරන්න. මෙම flag එක අත්සන් නොකළ-පූර්ණ සංඛ්‍යාංක අංක ගණිතය සඳහා පිටාර ගැලීමේ තත්වයක් දක්වයි. එය බහු-නිරවද්‍යතා අංක ගණිතයේ ද භාවිතා වේ. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2): Parity කොඩිය - ප්රතිඵලයේ අවසාන වැදගත් බයිට බිටු 1 ක සංඛ්යාවක් අඩංගු වේ නම් සකසන්න; වෙනත් ආකාරයකින් ඉවත් කර ඇත. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. ගුවන් හමුදා (bit 4): සහායක කැරී ධජය - අංක ගණිතමය මෙහෙයුම ප්රතිඵලයක් බිට් 3 පිටතට ගෙන හෝ ණයට ජනනය නම් සකසන්න; වෙනත් ආකාරයකින් ඉවත් කර ඇත. මෙම ධජය ද්වි-කේතනය දශම (බීසීඩී) අංක ගණිතයෙහි භාවිතා වේ. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bit 6): ශුන්ය ධජය - ප්රතිඵලය ශුන්ය නම් සකසන්න; වෙනත් ආකාරයකින් ඉවත් කර ඇත. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bit 7): සංඥා ධජය - අත්සන් කරන ලද නිඛිලනයක සං sign ා බිට් වන ප්රතිඵලයේ වඩාත්ම වැදගත් බිට් එකට සමාන සකසන්න. (0 ධනාත්මක අගයක් පෙන්නුම් කරන අතර 1 ඍණ අගයක් දක්වයි.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16112,7 +16112,7 @@ condition for signed-integer (two’s complement) arithmetic. කොන්දේසියක් දක්වයි. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16121,263 +16121,253 @@ to auto-decrement (to process strings from high addresses to low addresses). Cle (අඩු ලිපින සිට ඉහළ ලිපින දක්වා ක්රියාවලිය නූල්). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. කාර්ය සාධක බලකාය (bit 8): උගුල ධජය - නිදොස්කරණය සඳහා තනි පියවර මාදිලිය සක්රීය කිරීමට සකසන්න; තනි-පියවර මාදිලිය අක්රිය කිරීමට පැහැදිලි. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IR (bit 9): බාධා කරන්න ධජය සක්රීය කරන්න - වෙස් ගැන්විය හැකි බාධා ඉල්ලීම් සඳහා ප්රොසෙසරයේ ප්රතිචාරය පාලනය කරයි. maskable බාධා ප්රතිචාර කිරීමට සකසන්න; maskable බාධා තහංචි ඉවත් කර ඇත. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. 16-bit x87 FPU පාලන වචනය භාවිතා කරන x87 FPU සහ වටකුරු ක්රමය නිරවද්යතාව පාලනය කරයි. එහි x87 FPU පාවෙන ලක්ෂ්ය ව්යතිරේක වෙස් බිටු ද අඩංගු වේ. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. 16-bit x87 FPU තත්ව ලේඛනය x87 FPU හි වර්තමාන තත්වය පෙන්නුම් කරයි. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). 16-bit ටැගය වචනය x87 FPU දත්ත-ලියාපදිංචි අඩුක්කුව (එක් එක් 2-bit ටැගය එක් එක් 2 බිට් ටැගය) එක් එක් 8 ලියාපදිංචි අන්තර්ගතය පෙන්නුම් කරයි. - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU නියත-පාලන (PC) ක්ෂේත්රය (x87 FPU පාලන වචනයේ 8 සහ 9 බිටු) x87 FPU විසින් කරන ලද පාවෙන ලක්ෂ්ය ගණනය කිරීම්වල නිරවද්යතාවය (64, 53, හෝ 24 බිටු) තීරණය කරයි - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. x87 FPU පාලන ලේඛනයේ වට-පාලන (RC) ක්ෂේත්රය (බිටු 10 සහ 11) x87 FPU පාවෙන ලක්ෂ්ය උපදෙස් වල ප්රති results ල වටකුරු වන ආකාරය පාලනය කරයි. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. ඉන්ටෙල් 287 ගණිත කෝප්රොසෙසරය සමඟ ගැළපුම සඳහා අනන්තය පාලන ධජය (x87 FPU පාලන වචනයේ බිට් 12) සපයනු ලැබේ; පසුකාලීන අනුවාදය x87 FPU කෝප්රොසෙසර හෝ IA-32 ප්රොසෙසර සඳහා එය අර්ථවත් නොවේ. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. අවලංගු මෙහෙයුම ව්යතිරේක වෙස් (ටිකක් 0). වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. ඩෙනෝමල්-ක්රියාකරු ව්යතිරේක ආවරණ (බිට් 2). වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. පාවෙන ලක්ෂ්ය බෙදීම-විසින්-ශුන්ය ව්යතිරේක ආවරණ (බිට් 3). වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. පාවෙන ලක්ෂ්යය සංඛ්යාත්මක පිටාර ගැලීමේ ව්යතිරේක ආවරණ (බිට් 4). වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. විභව පාවෙන ලක්ෂ්යය සංඛ්යාත්මක යට ගැලීමේ තත්ත්වය ආවරණ (බිට් 5). වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. මෙම inexact-ප්රතිඵල/නිරවද්යතාවයකින් ව්යතිරේක වෙස් (බිට් 6). වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. කාර්යබහුල ධජය (බිට් 15) පෙන්නුම් කරන්නේ FPU කාර්යබහුල නම් (බී = 1) උපදෙස් ක්රියාත්මක කරන අතරතුර හෝ නිෂ්ක්රීය (බී = 0) වේ. B-bit (බිට් 15) 8087 ගැළපුම සඳහා පමණක් ඇතුළත් කර ඇත. එය එස් ධජයේ අන්තර්ගතය පිළිබිඹු කරයි. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. C%1 තත්ව කේත ධජය (බිට් %2) පාවෙන ලක්ෂ්ය සංසන්දනය සහ අංක ගණිතමය මෙහෙයුම් ප්රතිඵල දැක්වීමට භාවිතා කරයි. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. දෝෂ දර්ශනය/ව්යතිරේක සාරාංශය තත්ව ධජය (බිට් 7) සකසා ඇත්තේ ඕනෑම ව්යතිරේක ධජ එකක් සකසා ඇති විට ය. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. මෙම අඩුක්කුව වරදක් ධජය (මෙම x87 FPU තත්ත්වය වචනය බිට් 6) මෙම x87 FPU දත්ත ලියාපදිංචි අඩුක්කුව දත්ත සමග අඩුක්කුව පිටාර ගැලීම හෝ අඩුක්කුව යට ගලා සිදු වී ඇති බවයි. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. දැනට x87 FPU රෙජිස්ටර් ස්ටොක් එකේ ඉහළින්ම ඇති x87 FPU දත්ත ලේඛනයට පොයින්ටර් එකක් x87 FPU තත්ව වචනයේ 13 හරහා බිටු 11 තුල අඩංගු වේ. පොදුවේ ටොප් (ඉහළ-of-අඩුක්කුව සඳහා) ලෙස සඳහන් කරන මෙම පහිටුම් දක්වනය, 0 සිට 7 දක්වා ද්විමය අගය වේ. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. ප්රොසෙසරය අවලංගු අංක ගණිතමය ක්රියාකරුවන් එකක් හෝ වැඩි ගණනකට ප්රතිචාර වශයෙන් අවලංගු මෙහෙයුම් ව්යතිරේකයක් (බිට් 0) වාර්තා කරයි. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. අංක ගණිතමය උපදෙස් denormal operand මත ක්රියාත්මක කිරීමට උත්සාහ කරන්නේ නම් ප්රොසෙසරය denormal-operand ව්යතිරේකය (bit 2) වාර්තා කරයි. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. පරිමිත ශුන්ය නොවන ක්රියාකරුවෙකු 0 කින් බෙදීමට උපදෙස් දෙන සෑම අවස්ථාවකම ප්රොසෙසරය පාවෙන ලක්ෂ්ය බෙදීම-විසින්-ශුන්ය ව්යතිරේකය (bit 3) වාර්තා කරයි. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. ප්රොසෙසරය පාවෙන ලක්ෂ්ය සංඛ්යාත්මක පිටාර ගැලීම් ව්යතිරේකයක් (බිට් 4) වාර්තා කරයි උපදෙස් වල වටකුරු ප්රති result ලය ගමනාන්ත ඔපෙරැන්ඩ් වලට ගැලපෙන විශාලතම අවසර ලත් පරිමිත අගය ඉක්මවා යන සෑම අවස්ථාවකම. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. ප්රොසෙසරය විභව පාවෙන ලක්ෂ්ය සංඛ්යාත්මක ඌන ගැලීම් තත්වයක් (බිට් 5) හඳුනා ගනී. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. මෙහෙයුමක ප්රති result ලය ගමනාන්ත ආකෘතියේ හරියටම ප්රතිවර්තනය කළ නොහැකි නම්, අඩු ප්රතිඵල/නිරවද්යතා ව්යතිරේකය (බිට් 6) සිදු වේ. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. 32-bit MXCSR ලේඛනයේ SIMD පාවෙන ලක්ෂ්ය මෙහෙයුම් සඳහා පාලනය සහ තත්ව තොරතුරු අඩංගු වේ. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE): වලංගු නොවන මෙහෙයුම් ධජය; SIMD පාවෙන ලක්ෂ්ය ව්යතිරේකයක් අනාවරණය වී තිබේද යන්න පෙන්නුම් කරන්න. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE): ඩෙනෝමල් කොඩිය; SIMD පාවෙන ලක්ෂ්ය ව්යතිරේකයක් අනාවරණය වී තිබේද යන්න පෙන්නුම් කරන්න. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE): බෙදීම-විසින්-ශුන්ය ධජය; SIMD පාවෙන ලක්ෂ්ය ව්යතිරේකයක් අනාවරණය වී තිබේද යන්න පෙන්නුම් කරන්න. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE): පිටාර ගැලීමේ ධජය; SIMD පාවෙන ලක්ෂ්ය ව්යතිරේකයක් අනාවරණය වී තිබේද යන්න පෙන්නුම් කරන්න. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE): යටින් ගලා යන ධජය; SIMD පාවෙන ලක්ෂ්ය ව්යතිරේකයක් අනාවරණය වී තිබේද යන්න පෙන්නුම් කරන්න. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE): නිරවද්ය ධජය; SIMD පාවෙන ලක්ෂ්ය ව්යතිරේකයක් අනාවරණය වී තිබේද යන්න පෙන්නුම් කරන්න. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 7 (IM): වලංගු නොවන මෙහෙයුම් Mask. වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 8 (DM): Denormal Mask. වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. බිට් 9 (ZM): බෙදීම-විසින්-ශුන්ය මාස්ක්. වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 10 (OM): පිටාර ගැලීම Mask. වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 11 (UM): යට ගැලීමක් Mask. වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 12 (අගමැති): නිරවද්යතාව Mask. වෙස් බිට් සකසා ඇති විට, එහි අනුරූප ව්යතිරේකය ජනනය වීමෙන් අවහිර වේ. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. MXCSR ලේඛනයේ Bit 15 (FZ) මෙම flush-to-ශුන්ය මාදිලිය හැකියාව, එය SIMD පාවෙන ලක්ෂ්ය යට ගලා තත්ත්වය වෙත වෙස් ප්රතිචාර පාලනය කරයි. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. මෙම MXCSR ලේඛනයේ Bit 6 (DAZ) මෙම denormals-are-zeros මාදිලිය හැකියාව, එය SIMD පාවෙන අවස්ථාවක ප්රොසෙසරය ප්රතිචාරය පාලනය කරන denormal operand තත්ත්වය. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. MXCSR ලේඛනයේ බිටු 13 සහ 14 (වටකුරු පාලනය [RC] ක්ෂේත්රය) SIMD පාවෙන ලක්ෂ්ය උපදෙස් වල ප්රතිඵල වටා ඇති ආකාරය පාලනය කරයි. - + The value of GetLastError(). This value is stored in the TEB. GetLasterror හි වටිනාකම (). මෙම අගය TEB තුළ ගබඩා කර ඇත. - + The NTSTATUS in the LastStatusValue field of the TEB. TEB හි LastStusඅගය ක්ෂේත්රයේ NTstatus. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. වත්මන් නූල් TEB කාණ්ඩයේ ලියාපදිංචි GS (x64) ඕෆ්සෙට් එකක් ලෙස ප්රවේශ විය හැකිය. Win32 API ඇමතීමෙන් තොරව ක්රියාවලිය පිළිබඳ බොහෝ තොරතුරු ලබා ගැනීමට TEB භාවිතා කළ හැකිය. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. වත්මන් නූල් TEB කොටස් ලියාපදිංචි FS (x86) ක ඕෆ්සෙට් ලෙස ප්රවේශ විය හැක. Win32 API ඇමතීමෙන් තොරව ක්රියාවලිය පිළිබඳ බොහෝ තොරතුරු ලබා ගැනීමට TEB භාවිතා කළ හැකිය. - - Hide FPU - FPU සඟවන්න - - - - Show FPU - FPU පෙන්වන්න - - - - - - - + + + + + Unknown නොදන්නා @@ -16385,82 +16375,82 @@ Win32 API ඇමතීමෙන් තොරව ක්රියාවලිය RegistersView_ConstantsOfRegisters - - + + Nonzero නොශුන්ය - - + + Zero ශුන්ය - - + + Special විශේෂ - - + + Empty හිස් - + Toward Zero ශුන්ය දෙසට - + Toward Positive ධනාත්මක දෙසට - + Toward Negative සෘණ දෙසට - - + + Round Near වටයේ අසල - + Truncate ටන්කේට් - + Round Up වටය දක්වා - + Round Down වටයේ ඩවුන් - + Real4 රියල්4 - + Not Used භාවිතා නොවේ - + Real8 රියල් 8 - + Real10 රියල්10 @@ -16552,122 +16542,122 @@ Win32 API ඇමතීමෙන් තොරව ක්රියාවලිය විධානාවලිය විධානය ක්රියාත්මක කරන්න... - + &Open... &විවෘත... - + &Paste &පේස්ට් - + Load Script ස්ක්රිප්ට් පැටවුම් - + Re&load Script රීඇන්ඩ් පැටවුම් ස්ක්රිප්ට් - + &Unload Script සහ ස්ක්රිප්ට් බෑම - + &Edit Script & සංස්කරණය කරන්න ස්ක්රිප්ට් - + Toggle &BP ටොගල් කරන්න සහ බීපී - + Ru&n until selection තෝරා ගන්නා තෙක් RU&n - + &Step &පියවර - + &Run &දුවන්න - + &Abort &අබරණ - + &Continue here... &මෙතනින් ඉදිරියට යන්න... - + Copy පිටපත් කරන්න - + E&xecute Command... ඊ සහ සෙකියුට් විධානය... - + Error on line රේඛාවේ දෝෂය - + Script Error! ස්ක්රිප්ට් දෝෂය! - + Select script ස්ක්රිප්ට් තෝරන්න - + Script files (*.txt *.scr);;All files (*.*) ස්ක්රිප්ට් ගොනු (*.txt *.scr); සියලුම ගොනු (*.*) - + Error! දෝෂය! - + File open failed! Please open the file yourself... ගොනුව විවෘත කිරීම අසාර්ථක විය! කරුණාකර ඔබම ගොනුව විවෘත කරන්න... - + Error setting script breakpoint! ස්ක්රිප්ට් බ්රේක්පොයින්ට් සැකසීම දෝෂ! - + Error executing command! විධානය ක්රියාත්මක කිරීමේ දෝෂය! - + Message පණිවිඩය - + Question ප්රශ්නය @@ -18324,7 +18314,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error දෝෂය @@ -18494,7 +18484,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording පටිගත කිරීම මකන්න @@ -18514,88 +18504,88 @@ This could introduce unexpected behaviour to your debugging session... එක්ස්ප්ලෝරර් හි හෝඩුවාවන් ගොනුව විවෘත කරන්න. - + Open trace recording හෝඩුවාවන් පටිගත කිරීම විවෘත කරන්න - + Trace recording හෝඩුවාවන් පටිගත කිරීම - + Trace recordings (*.%1);;All files (*.*) පටිගත කිරීම් අනුරේඛනය කරන්න (*.%1);;සියලුම ගොනු (*.*) - + Are you sure you want to delete this recording? ඔබට මෙම පටිගත කිරීම මැකීමට අවශ්‍ය බව ඔබට විශ්වාසද? - + Address not found in trace - - + + The address %1 is not found in trace. %1 ලිපිනය හෝඩුවාවේ දක්නට නොලැබේ. - + Do you want to follow in CPU instead? ඒ වෙනුවට ඔබට CPU අනුගමනය කිරීමට අවශ්‍යද? - + Open File ගොනුව විවෘත කරන්න - + Text Files (*.txt) පෙළ ගොනු (*.txt) - + Could not open file ගොනුව විවෘත කළ නොහැක - - + + Error! දෝෂය! - + Selection not in a module... මොඩියුලයක් තුළ තෝරා ගැනීම... - + Selection not in a file... ගොනුවක නොතේරීම... - + Constant නිරන්තර - - - + + + %1 result(s) in %2ms %1 ප්රතිඵලය (s) %2ms - + References යොමු කිරීම් @@ -19075,12 +19065,12 @@ This could introduce unexpected behaviour to your debugging session... ඉස්මතු කරන්න - + View XMM register XMM ලේඛනය බලන්න - + View MMX register MMX ලේඛනය බලන්න @@ -19213,100 +19203,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump ඩම්ප් පැටවීම - + Disassembly විසුරුවීම - + Registers ලේඛණ - - + + Dump ඩම්ප් - - + + Stack ගොඩගසන්න - + InfoBox තොරතුරු පෙට්ටිය - + Error දෝෂය - + Error when opening trace recording (reason: %1) හෝඩුවාවන් පටිගත කිරීම විවෘත කිරීමේදී දෝෂයක් (හේතුව: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. හෝඩුවාවක් ලබා දීමේ ඩම්ප් එක සක්‍රීය කිරීමෙන් මතකය විශාල ප්‍රමාණයක් පරිභෝජනය කළ හැකිය (මෙම හෝඩුවාව සඳහා උපරිම ~%1GiB) සහ දිගු කාලයක් සඳහා x64dbg කැටි කළ හැකිය. මෙම විශේෂාංගය තවමත් පර්යේෂණාත්මකයි, කරුණාකර ඔබට හමු වන ඕනෑම දෝෂයක් වාර්තා කරන්න. - + Warning අවවාදය - + Loaded trace dump in %1ms - + &Selected Address සහ තෝරාගත් ලිපිනය - + &Address: & ලිපිනය: - + &Old value: &පැරණි අගය: - + &Value: & අගය: - + &New value: &නව අගය: - + &Constant: සහ නියත: diff --git a/x64dbg_sr_SP.ts b/x64dbg_sr_SP.ts index c94d069..1c805b4 100644 --- a/x64dbg_sr_SP.ts +++ b/x64dbg_sr_SP.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3677,42 +3677,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12359,7 +12359,7 @@ Do you want to continue rendering this graph? - + Address @@ -15538,484 +15538,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16023,82 +16013,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16190,122 +16180,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17960,7 +17950,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18129,7 +18119,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18149,87 +18139,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18709,12 +18699,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18847,100 +18837,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_sv_SE.ts b/x64dbg_sv_SE.ts index c000994..ce55c8a 100644 --- a/x64dbg_sv_SE.ts +++ b/x64dbg_sv_SE.ts @@ -92,7 +92,7 @@ - + &Copy @@ -3677,42 +3677,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12359,7 +12359,7 @@ Do you want to continue rendering this graph? - + Address @@ -15538,484 +15538,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16023,82 +16013,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16190,122 +16180,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17960,7 +17950,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18129,7 +18119,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18149,87 +18139,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18709,12 +18699,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18847,100 +18837,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_th_TH.ts b/x64dbg_th_TH.ts index f578850..2ba5470 100644 --- a/x64dbg_th_TH.ts +++ b/x64dbg_th_TH.ts @@ -93,7 +93,7 @@ - + &Copy @@ -3679,42 +3679,42 @@ - + Disassembly - + Stack - + Registers - + Dump - + Arguments - + Sidebar - + InfoBox - + Graph @@ -12361,7 +12361,7 @@ Do you want to continue rendering this graph? - + Address @@ -15540,484 +15540,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown @@ -16025,82 +16015,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special - - + + Empty - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate - + Round Up - + Round Down - + Real4 - + Not Used - + Real8 - + Real10 @@ -16192,122 +16182,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run - + &Abort - + &Continue here... - + Copy - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question @@ -17962,7 +17952,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error @@ -18131,7 +18121,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18151,87 +18141,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File - + Text Files (*.txt) - + Could not open file - - + + Error! - + Selection not in a module... - + Selection not in a file... - + Constant - - - + + + %1 result(s) in %2ms - + References @@ -18711,12 +18701,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18849,100 +18839,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly - + Registers - - + + Dump - - + + Stack - + InfoBox - + Error - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning - + Loaded trace dump in %1ms - + &Selected Address - + &Address: - + &Old value: - + &Value: - + &New value: - + &Constant: diff --git a/x64dbg_tr_TR.ts b/x64dbg_tr_TR.ts index e7c95f7..9f5db68 100644 --- a/x64dbg_tr_TR.ts +++ b/x64dbg_tr_TR.ts @@ -92,7 +92,7 @@ &Tabloyu Dışa Aktar - + &Copy &Kopyala @@ -3683,42 +3683,42 @@ Ctrl+G - + Disassembly Disassembly - + Stack Yığın - + Registers - + Dump Döküm - + Arguments Argümanlar - + Sidebar - + InfoBox - + Graph Grafik @@ -12634,7 +12634,7 @@ Bu grafiği oluşturmaya devam etmek istiyormusunuz? Seçim Modül'de değil... - + Address Adres @@ -15826,223 +15826,223 @@ Bu yamaları yine de uygulamak istiyor musunuz? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Float - + Double Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (bit 2) : Eşlik Bayrağı - İşlem sonucunda en alçak dereceli bayt içerisinde 1'lerin sayısı çift ise ayarlanır(1); yoksa temizlenir(0). - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (bit 4) : Ara Elde Bayrağı - Bir aritmetik işlemin 0-3 arasındaki bitlerinde yapılan işlemde elde veya borç üretilirse ayarlanır(1); yoksa temizlenir(0) Bu bayrak, ikili kodlanmış onlu (BCD) aritmetikte kullanılır. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (bit 6) : Sıfır Bayrağı - İşlem sonucu sıfır ise ayarlanır(1); yoksa temizlenir(0). - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (bit 7) : İşaret Bayrağı - İşlem sonucunda elde edilen sayının en solundaki bit değerini alır. (0 pozitif bir değer,1 negatif bir değer belirtir.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16050,7 +16050,7 @@ condition for signed-integer (two’s complement) arithmetic. Bu bayrak signed-integer(ikili tamamlayıcı) aritmetik koşulunda bir taşmayı gösterir. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16058,263 +16058,253 @@ to auto-decrement (to process strings from high addresses to low addresses). Cle Azaltma yönündeyse(String yüksek adresten düşük adrese doğru) 1 ayarlanır. Arttırma yönündeyse(String düşük adresten yüksek adrese doğru) 0 ayarlanır. - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8) : İzleme Bayrağı - Tek adımlı hata ayıklama modu için ayarlanır(1); yoksa mod devre dışıdır(0). - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (bit 9) : Kesme Yetki Bayrağı - İşlemcinin maskelenebilen kesme isteklerine cevabını kontrol eder. Maskelenebilir kesmelere yanıt vermek üzere ayarlanır(1); yoksa maskelenebilir kesmelere yanıt devre dışıdır(0)(Tavsiye edilmez). - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. (Bit 0) geçersiz işlem özel durum maskesi. Maske biti ayarlandığında, buna karşılık gelen özet oluşumu engellenir. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. (bit 2) anormal özel durum maskesi. Maske biti ayarlandığında, buna karşılık gelen özet oluşumu engellenir. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. (bit 3) Kayma noktası maskesi. Maske biti ayarlandığında, buna karşılık gelen özet oluşumu engellenir. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. (bit 4) kayma noktası sayısal özet maskesi (bit). Maske biti ayarlandığında, buna karşılık gelen özet oluşumu engellenir. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. (bit 5) potansiyel kayma noktası sayısal yetersizlik durumu maskesi. Maske biti ayarlandığında, buna karşılık gelen özel durum oluşumu engellenir. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. (bit 6) hatalı-sonuç/hassas özet maskesi. Maske biti ayarlandığında, buna karşılık gelen özet oluşumu engellenir. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. Eğer bir yönergenin çalıştırmsıa sırasında FPU (B=1) meşgul ise, veya (B=0) boşta ise (bit 15) meşgul bayrağı gösterilir. (Bit 15) B-bit sadece 8087 uyumluluk için eklenmiştir. ES bayrağı içeriği yansıtır. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. Nokta karşılaştırması ve aritmetik işlemlerin sonuçlarını göstermek için C%1 durum kodu bayrağı (bit%2) kullanılır. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. Hata veya istisna özet durumu bayrağı (bit 7) maskesiz özel durum bayraklarının herhangi biri ayarlandığında ayarlanır. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. İşlemci bir veya daha fazla geçersiz aritmetik yanıt için (bit 0) geçersiz bir işlem durumu bildiriyor. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. Eğer bir aritmetik yönerge anormal işlenen özet üzerinde çalışırsa işlemci anormal işlenen özel durum (bit 2) bildirir. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. Eğer bir yönerge sıfır işlenen 0 ile sınırlı olmayan bölme için çalışırsa işlemci-3 sıfır istisna (bit) kayan nokta bölme raporlar. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. İşlemcinin bir talimat sonucu işlenen hedefi içine sığan en büyük izin verilen sonlu değeri aşması durumunda (4 bit) kayan nokta sayısal taşma durumu bildirir. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. Ne zaman limitsiz üst ile yuvarlamanın sonucu sıfırdan farklı ve ufak olur ise işlemci, potansiyel bir kayan noktalı sayı, aşağı taşma durumu tespit eder (bit 5). - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. Eğer bir işlemin sonucu hedef biçiminde tam olarak gösterilebilirse 6 (bit) hatalı-sonuç/hassas durum oluşur. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 7 (IM) Bit : Geçersiz İşlem Maskesi. Maske biti ayarlandığında, onu karşılayan gelen özel durum oluşumu engellenir. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 8 (DM): Anormal Maske. Maske biti ayarlandığında, ona karşılık gelen istisna durumunun oluşması engellenir. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 9 (ZM) Sıfır Maskeye Böl. Maske biti ayarlandığında, ona karşılık gelen özel durum oluşumu engellenir. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 10 (OM) : Taşma Maskesi. Maske biti ayarlandığında, ona karşılık gelen özel durum oluşumu engellenir. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 11 (UM) : Yetersizlik Durumu Maskesi. Maske biti ayarlandığında, ona karşılık gelen özel durum oluşumu engellenir. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Bit 12 (PM) : Hassas Maske. Maske biti ayarlandığında, ona karşılık gelen özel durum oluşumu engellenir. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. GetLastError()'dan gelen değer. Bu değer TEB'de saklanır. - + The NTSTATUS in the LastStatusValue field of the TEB. TEB bu LastStatusValue alanında NTSTATUS. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. TEB geçerli işlemin, GS (x64) ofset bölüm kaydına erişebilir. TEB, Win32 API'sini çağırmadan süreç hakkında bir çok bilgi almak için kullanılabilir. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. TEB geçerli işlemin, FS (x86) ofset bölüm kaydına erişebilir. TEB, Win32 API'sini çağırmadan süreç hakkında bir çok bilgi almak için kullanılabilir. - - Hide FPU - FPU Gizle - - - - Show FPU - FPU Göster - - - - - - - + + + + + Unknown Bilinmiyor.. @@ -16322,82 +16312,82 @@ TEB, Win32 API'sini çağırmadan süreç hakkında bir çok bilgi almak için k RegistersView_ConstantsOfRegisters - - + + Nonzero Sıfır olmayan - - + + Zero Sıfır - - + + Special Özel - - + + Empty Boş - + Toward Zero Sıfır'a Doğru - + Toward Positive Pozitif'e Doğru - + Toward Negative Negatif'e Doğru - - + + Round Near Yakına Yuvarla - + Truncate Uç Kes - + Round Up Yukarı Yuvarla - + Round Down Aşağı Yuvarla - + Real4 Real4 - + Not Used Kullanılmadı - + Real8 Real8 - + Real10 Real10 @@ -16489,122 +16479,122 @@ TEB, Win32 API'sini çağırmadan süreç hakkında bir çok bilgi almak için k Komut Dosyasında Komut Çalıştır... - + &Open... &Aç... - + &Paste &Yapıştır - + Load Script Komut Dosyası Yükle - + Re&load Script Dosyayı &Yeniden Yükle - + &Unload Script Komut Dosyasını &Kaldır - + &Edit Script &Komut Dosyasını Düzenle - + Toggle &BP Değiştir &BP - + Ru&n until selection &Seçime kadar çalıştır - + &Step &Adım - + &Run &Çalıştır - + &Abort &İptal Et - + &Continue here... &Buradan devam et... - + Copy Kopyala - + E&xecute Command... K&omut Yürüt... - + Error on line Satır hatası - + Script Error! Komut Dosyası Hatası! - + Select script Komut Dosyası Seç - + Script files (*.txt *.scr);;All files (*.*) Komut dosyaları (*.txt *.scr);;Tüm dosyalar (*.*) - + Error! Hata! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! Komut dosyasında kesme noktası ayarlanırken hata oluştu! - + Error executing command! Komut yürütürken hata oluştu! - + Message Mesaj - + Question Soru @@ -18261,7 +18251,7 @@ Bu, hata ayıklama oturumunuzda beklenmeyen davranışa sebeb olabilir... - + Error Hata @@ -18430,7 +18420,7 @@ Bu, hata ayıklama oturumunuzda beklenmeyen davranışa sebeb olabilir... - + Delete recording @@ -18450,87 +18440,87 @@ Bu, hata ayıklama oturumunuzda beklenmeyen davranışa sebeb olabilir... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Dosya Aç - + Text Files (*.txt) Metin Dosyaları (*.txt) - + Could not open file Dosya açılamadı - - + + Error! Hata! - + Selection not in a module... Seçim Modül'de değil... - + Selection not in a file... Seçim bir dosyada değil... - + Constant Sabit - - - + + + %1 result(s) in %2ms - + References Referanslar @@ -19010,12 +19000,12 @@ Bu, hata ayıklama oturumunuzda beklenmeyen davranışa sebeb olabilir...Vurgula - + View XMM register - + View MMX register @@ -19148,100 +19138,100 @@ Bu, hata ayıklama oturumunuzda beklenmeyen davranışa sebeb olabilir... - + Load dump - + Disassembly Disassembly - + Registers - - + + Dump Döküm - - + + Stack Yığın - + InfoBox - + Error Hata - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Uyarı - + Loaded trace dump in %1ms - + &Selected Address &Seçili Adres - + &Address: &Adres: - + &Old value: - + &Value: &Değer: - + &New value: - + &Constant: &Sabit: diff --git a/x64dbg_uk_UA.ts b/x64dbg_uk_UA.ts index 3521846..6c48d16 100644 --- a/x64dbg_uk_UA.ts +++ b/x64dbg_uk_UA.ts @@ -92,7 +92,7 @@ &Експортувати таблицю - + &Copy &Копіювати @@ -3687,42 +3687,42 @@ Ctrl+G - + Disassembly Дизасембльований код - + Stack Стек - + Registers Регістри - + Dump Дамп - + Arguments Аргументи - + Sidebar Бічна панель - + InfoBox InfoBox - + Graph Граф @@ -12610,7 +12610,7 @@ Do you want to continue rendering this graph? Виділене не у модулі... - + Address Адреса @@ -15808,230 +15808,230 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. AVX-512 не підтримується у вашій системі. - + Registers Регістри - + Copy value Копіювати значення - + Copy floating point value Копіювати значення з плаваючою крапкою - + Copy Symbol Value Копіювати значення символу - + Copy all registers Копіювати всі регістри - + Change view Змінити вигляд - + Change SIMD Register Display Mode Змінити режим відображення SIMD регістру - + Display ST(x) ВІдобразити ST(x) - + Display x87rX Відобразити x87rX - + Display MMX Відобразити MMX - + Hexadecimal Hexadecimal - + Float Float - + Double Double - + Signed Word Signed Word - + Signed Dword Signed Dword - + Signed Qword Signed Qword - + Unsigned Word Unsigned Word - + Unsigned Dword Unsigned Dword - + Unsigned Qword Unsigned Qword - + Hexadecimal Word Hexadecimal Word - + Hexadecimal Dword Hexadecimal Dword - + Hexadecimal Qword Hexadecimal Qword - + Always show maximum vector length Завжди показувати максимальну довжину вектора - + Always show all AVX-512 registers Завжди показувати всі регістри AVX-512 - + CF (Carry flag) CF (Прапорець переносу) - + PF (Parity flag) PF (Прапорець парності) - + AF (Auxiliary Carry flag) AF (Допоміжний прапорець переносу) - + ZF (Zero flag) ZF (Нульовий прапорець) - + SF (Sign flag) SF (Прапорець знаку) - + TF (Trap flag) TF (Прапорець пастки) - + IF (Interrupt enable flag) IF (Прапорець переривання) - + DF (Direction flag) DF (Прапорець напрямку) - + OF (Overflow flag) OF (Прапорець переповнення) - + Bit # Біт # - + Mask Маска - + Flag Прапорець - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. CF (біт 0) : прапорець переносу (Carry Flag) - встановлюється, якщо арифметична операція генерує перенос або позику з найбільш значного біту; інакше скидається. Цей прапорець вказує на переповнення при операціях із беззнаковими цілими. Він також використовується в обчисленнях із високою точністю. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (біт 2) : прапорець парності (Parity Flag) - встановлюється, якщо наймолодший байт результату містить парну кількість одиничних бітів; інакше скидається. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (bit 4) : допоміжний прапорець переносу (Auxiliary Carry Flag) - встановлюється, якщо арифметична операція генерує перенос із біту 3 або займ в біт 3 результату; інакше скидається. Цей прапорець використовується в арифметиці двійково-кодованих десяткових (BCD). - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (біт 6) : прапорець Zero - встановлюється, якщо результат нуль; скидається в іншому випадку. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (біт 7) : Біт знаку - встановлюється рівним найбільш значущому біту результату, який є знаковим бітом числа цілого типу. (0 вказує на додатнє значення і 1 вказує на від'ємне значення.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. OF (біт 11) : прапорець переповнення -встановлюється якщо цілочисельний результат є занадто великим додатнім числом або занадто маленьким від'ємним числом (за винятком біту знаку), щоб поміститись в адресаті, інакше очищається. Цей прапорець вказує на переповненя для знакового цілого числа (арифметика доповнення до 2). - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16040,263 +16040,253 @@ to auto-decrement (to process strings from high addresses to low addresses). Cle (обробляти рядки з низьких адрес до високих). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (bit 8) : Прапорець Пасток - встановлюється для режиму покрокового налагодження. Для відімкнення режиму необхідно скинути цей прапорець. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (біт 9) : Прапорець переривань - керує відповіддю процесора на масковані запити переривань. Встановлений прапорець дозволяє переривання; скинутий - маскує (забороняє) перериввання. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. 16-біт x87 FPU керуюче слово керує точністю та методом та округлення x87 FPU. Також містить біти маски виключення з плаваючою точкою x87 FPU. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. 16-бітний статус регістр x87 FPU вказує на поточний стан x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). 16-бітне слово тегів вказує на вміст кожного з 8 регістрів стеку у x87 FPU (одне 2-бітне поле на регістр). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU Точність управління (PC) поле (8 та 9 слова контролю x87 FPU) визначає точність (64, 4, 53, або 24 біт) розрахунків чисел з плаваючою комою x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. Керування округленням (RC) поля управління x87 FPU (bits 10 та 11) визначає, як округлюються результати x87 FPU чисел із плаваючою комою. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. Прапор контролю нескінченності (біт 12 слова управління x87 FPU) надається для сумісності з Intel 287 Math Coprocessor; для пізнішої версії x87 FPU не враховується. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. Невірна маска виключної операції (біт 0). Коли біт маски встановлено, його відповідний виняток блокується від створення. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. Маска винятків денормалізованих операндів (біт 2). Коли маска задана, відповідний виняток блокується від моменту створення. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. Маска виключення ділення на нуль чисел із плаваючою комою (біт 3). Коли біт маски встановлений, відповідне виключення блокується із моменту створення. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. Маска виключення переповнення чисел із плаваючою комою (біт 4). Коли біт маски встановлений, відповідне виключення блокується із моменту створення. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. Маска умови потенційного антипереповнення чисел із плаваючою комою (біт 5). Коли біт маски встановлений, відповідний виняток блокується із моменту створення. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. Маска виключення неточного результату (біт 6). Коли біт маски встановлений, відповідне виключення блокується із моменту створення. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. Прапорець зайнятості (біт 15) вказує коли FPU зайнятий (B=1) під час виконання інструкції або ж вільний (B=0). B-біт (біт 15) присутній лишень для сумісності з 8087. Він дублює стан прапорця ES. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. Прапорець коду стану C%1 (біт %2) використовується для позначення результатів порівняння чисел із плаваючою комою та арифметичних операцій. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. Прапорець підсумкової помилки/виключення (біт 7) встановлений, коли встановлюється будь-який прапорець із немаскованих винятків. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. Прапорець помилки стеку (біт 6 слова стану x87 FPU) вказує на те, що відбулось переповнення чи антипереповнення стеку з даними в регістрі даних стеку x87 FPU. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. Вказівник на регістр даних x87 FPU, що знаходиться наразі на вершині стеку x87 FPU; міститься в бітах із 11 по 13 слова статусу x87 FPU. Цей вказівник, який зазвичай зветься TOP (top-of-stack), є двійковим значенням від 0 до 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. Процесор повідомляє про некоректне виключення операції (біт 0) у відповідь на одну або кілька недійсних арифметичних операцій. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. Процесор повідомляє про виняток денормалізованого операнду (біт 2) в випадку спроби опрацювати денормалізований операнд. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. Процесор повідомляє про виключення типу ділення числа з плаваючою точкою на нуль (біт 3) кожного разу, коли інструкція намагається поділити скінченний ненульовий операнд на 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. Процесор повідомляє про можливість переповнення чисел із плаваючою комопю (біт 4) кожного разу, коли результат інструкції перевищує максимально допустиме скінченне значення, яке може поміститись в операнд призначення. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. Процесор виявив потенційну умову анти-переповнення чисел із плаваючою комою (біт 5), щоразу, коли результат округлення з необмеженою експонентою не дорівнює нулю і дуже маленький. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. Витянок неточного результату (біт 6) виникає, якщо результат операції не є цілком показовим у форматі призначення. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. 32-бітний MXCSR регістр містить інформацію про керування та статус SIMD операцій із плаваючою комою. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. Біт 0 (IE) : Прапорець недійсної операції; вказує чи було виявлено виняток SIMD для чисел із плаваючою комою. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. Біт 1 (DE) : Прапорець денормалізації; вказує чи було виявлено SIMD виняток для чисел із плаваючою комою. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. Біт 2 (ZE) : Прапорець ділення на нуль; вказує на те, чи було виявлено виняток SIMD числа із плаваючою комою. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. Біт 3 (OE) : Прапорець переповнення; вказує чи було виявлено виняток SIMD числа з плаваючою комою. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. Біт 4 (UE) : Прапорець антипереповнення вказує, чи було виявлено виняток SIMD на числах із плаваючою комою. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. Bit 5 (PE) : Прапорець точності; вказує, чи було виявлено виняток SIMD числа із плаваючою комою. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Біт 7 (IM) : Прапорець маски неприпустимої операції. Коли біт маски задано, його відповідний виняток блокується від моменту створення. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Біт 8 (DM) : Маска денормалізованого операнду. Коли маска визначена, її відповідний виняток блокується від створення. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Біт 9 (ZM) : Прапорець маски ділення на нуль. Коли біт маски встановлений, відповідний виняток блокується від моменту генерації. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Біт 10 (OM) : Маска переповнення. Коли біт встановлений, то відповідний виняток блокується із моменту генерації. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Біт 11 (UM) : Маска антипереповнення. Коли біт маски встановлений, відповідний виняток блокується від моменту генерації. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. Біт 12 (PM) : Маска точності. Коли біт маски задано, його відповідний виняток блокується від моменту генерування. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. Біт 15 (FZ) регістру MXCSR вмикає режим скинути-в-нуль, який контролює замасковану відповідь на умову SIMD антипереповнення числа із плаваючою комою. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. Біт 6 (DAZ) регістру MXCSR вмикає режим денормалізоване-як-нуль, який контролює відповідь процесора на денормалізований операнд SIMD із плаваючою комою. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. Біти 13 і 14 регістру MXCSR (керування округленням [RC]) визначають яким чином округляються результати SIMD інструкцій із плаваючою комою. - + The value of GetLastError(). This value is stored in the TEB. Значення GetLastError(). Це значення зберігається у TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. Поле LastStatusValue у TEB містить NTSTATUS. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. TEB поточного потоку може бути доступний як зсув сегментного регістру GS (x64). TEB можна використовувати для отримання інформації про процес без виклику Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. TEB поточного потоку можна отримати як зсув від сегментного регістру FS (x86). TEB може бути використаний для отримання інформації про процес без виклику Win32 API. - - Hide FPU - Приховати FPU - - - - Show FPU - Показати FPU - - - - - - - + + + + + Unknown Невідомо @@ -16304,82 +16294,82 @@ TEB може бути використаний для отримання інф RegistersView_ConstantsOfRegisters - - + + Nonzero Ненульове значення - - + + Zero Нульове значення - - + + Special Спеціальне значення - - + + Empty Порожньо - + Toward Zero Заокруглення до нуля - + Toward Positive Заокруглення до позитивних - + Toward Negative Заокруглення до негативних - - + + Round Near Заокруглити до найближчого - + Truncate Урізання - + Round Up Заокруглити вгору - + Round Down Заокруглити вниз - + Real4 Real4 - + Not Used Не використовується - + Real8 Real8 - + Real10 Real10 @@ -16471,122 +16461,122 @@ TEB може бути використаний для отримання інф Виконання команд сценарію... - + &Open... &Відкрити... - + &Paste &Вставити - + Load Script Завантажити скрипт - + Re&load Script Перезавантажити скрипт - + &Unload Script &Вивантажити скрипт - + &Edit Script &Редагувати скрипт - + Toggle &BP Переключити &BP - + Ru&n until selection В&иконати до виділеного - + &Step &Крок - + &Run &Виконати - + &Abort &Перервати - + &Continue here... &Продовжити звідси... - + Copy Копіювати - + E&xecute Command... Ви&конати команду... - + Error on line Помилка в рядку - + Script Error! Помилка скрипту! - + Select script Вибір скрипту - + Script files (*.txt *.scr);;All files (*.*) Файли скриптів (*.txt *.scr);Всі файли (*.*) - + Error! Помилка! - + File open failed! Please open the file yourself... Не вдалося відкрити файл! Будь ласка, відкрийте файл самостійно... - + Error setting script breakpoint! Помилка встановлення точки зупину скрипту! - + Error executing command! Помилка при виконанні команди! - + Message Повідомлення - + Question Запитання @@ -18243,7 +18233,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Помилка @@ -18413,7 +18403,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording Видалити запис @@ -18433,87 +18423,87 @@ This could introduce unexpected behaviour to your debugging session... Відкрити файл трасування у Провіднику. - + Open trace recording Відкрити запис трасування - + Trace recording Запис трасування - + Trace recordings (*.%1);;All files (*.*) Записи трасування (*.%1);Всі файли (*.*) - + Are you sure you want to delete this recording? Ви дійсно бажаєте видалити цей запис? - + Address not found in trace Адресу в трейсі не знайдено - - + + The address %1 is not found in trace. Адресу %1 не знайдено в трейсі. - + Do you want to follow in CPU instead? Бажаєте замість цього слідувати в процесорі? - + Open File Відкрити файл - + Text Files (*.txt) Текстові файли (*.txt) - + Could not open file Не вдалося відкрити файл - - + + Error! Помилка! - + Selection not in a module... Виділення не знаходиться в модулі... - + Selection not in a file... Виділення не знаходиться в файлі... - + Constant Константа - - - + + + %1 result(s) in %2ms %1 результат(-ів) в %2ms - + References Посилання @@ -18993,12 +18983,12 @@ This could introduce unexpected behaviour to your debugging session... Виділення - + View XMM register Переглянути регістр XMM - + View MMX register Переглянути регістр MMX @@ -19131,100 +19121,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump Завантажити дамп - + Disassembly Дизасембльований код - + Registers Регістри - - + + Dump Дамп - - + + Stack Стек - + InfoBox InfoBox - + Error Помилка - + Error when opening trace recording (reason: %1) Помилка при відкритті запису трасування (причина: %1) - + Trace file is recorded for another debuggee Файл трасування записано для іншого відлагоджувача - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" Контрольна сума відрізняється для поточного файлу трасування та відлагоджуваної програми. Це, ймовірно, означає, що ви відкрили невірний файл трасування. Цей файл трасування записано для "%1". - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. Увімкнення трейс-дампу може споживати багато пам'яті (максимум ~%1Gдля цього трейсу) та завдати шкоди х64dbg протягом тривалого періоду часу. Ця функція є експериментальною, будь ласка повідомте про будь-які помилки, з якими ви зіткнетесь. - + Warning Попередження - + Loaded trace dump in %1ms Завантажено трейс-дамп в %1ms - + &Selected Address &Виділена адреса - + &Address: &Адреса: - + &Old value: &Старе значення: - + &Value: &Значення: - + &New value: &Нове значення: - + &Constant: &Константа: diff --git a/x64dbg_vi_VN.ts b/x64dbg_vi_VN.ts index 11ce1b6..f597482 100644 --- a/x64dbg_vi_VN.ts +++ b/x64dbg_vi_VN.ts @@ -92,7 +92,7 @@ - + &Copy &Chép @@ -3678,42 +3678,42 @@ Ctrl+G - + Disassembly Disassembly - + Stack Stack - + Registers - + Dump Dump - + Arguments Tham số - + Sidebar - + InfoBox - + Graph Lược đồ @@ -12362,7 +12362,7 @@ Do you want to continue rendering this graph? Vùng được chọn khong nằm trong module... - + Address Địa chỉ @@ -15541,484 +15541,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers - + Copy value - + Copy floating point value - + Copy Symbol Value - + Copy all registers - + Change view - + Change SIMD Register Display Mode - + Display ST(x) - + Display x87rX - + Display MMX - + Hexadecimal - + Float Số thực - + Double - + Signed Word - + Signed Dword - + Signed Qword - + Unsigned Word - + Unsigned Dword - + Unsigned Qword - + Hexadecimal Word - + Hexadecimal Dword - + Hexadecimal Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - - - - - Show FPU - - - - - - - - + + + + + Unknown Không rõ @@ -16026,82 +16016,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero - - + + Zero - - + + Special Đặc biệt - - + + Empty Trống - + Toward Zero - + Toward Positive - + Toward Negative - - + + Round Near - + Truncate Lược bỏ - + Round Up Làm tròn lên - + Round Down Làm tròn xuống - + Real4 - + Not Used - + Real8 - + Real10 @@ -16193,122 +16183,122 @@ The TEB can be used to get a lot of information on the process without calling W - + &Open... - + &Paste (&P) Dán - + Load Script - + Re&load Script - + &Unload Script - + &Edit Script - + Toggle &BP - + Ru&n until selection - + &Step - + &Run Chạy - + &Abort Hủy bỏ - + &Continue here... - + Copy Chép - + E&xecute Command... - + Error on line - + Script Error! - + Select script - + Script files (*.txt *.scr);;All files (*.*) - + Error! Lỗi! - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! - + Message - + Question Câu hỏi @@ -17963,7 +17953,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error Lỗi @@ -18132,7 +18122,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18152,87 +18142,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File Mở file - + Text Files (*.txt) File văn bản (*.txt) - + Could not open file Không thể mở file - - + + Error! Lỗi! - + Selection not in a module... Vùng được chọn khong nằm trong module... - + Selection not in a file... Phần được chọn không nằm trong file... - + Constant - - - + + + %1 result(s) in %2ms - + References Các tham chiếu @@ -18712,12 +18702,12 @@ This could introduce unexpected behaviour to your debugging session... - + View XMM register - + View MMX register @@ -18850,100 +18840,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly Disassembly - + Registers - - + + Dump Dump - - + + Stack Stack - + InfoBox - + Error Lỗi - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning Cảnh báo - + Loaded trace dump in %1ms - + &Selected Address (&S) Địa chỉ đã chọn - + &Address: Đi&a chỉ: - + &Old value: - + &Value: (&V) Giá trị: - + &New value: - + &Constant: (&C) Hằng số: diff --git a/x64dbg_zh_CN.ts b/x64dbg_zh_CN.ts index 1e49ebf..6194929 100644 --- a/x64dbg_zh_CN.ts +++ b/x64dbg_zh_CN.ts @@ -92,7 +92,7 @@ 导出表(&E) - + &Copy 复制(&C) @@ -3683,42 +3683,42 @@ Ctrl+G - + Disassembly 反汇编 - + Stack 堆栈 - + Registers 寄存器 - + Dump 内存窗口 - + Arguments 参数 - + Sidebar 侧栏 - + InfoBox 信息栏 - + Graph 流程图 @@ -12686,7 +12686,7 @@ Do you want to continue rendering this graph? 选区不在一个模块中…… - + Address 地址 @@ -15877,224 +15877,224 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. 这台电脑不支持AVX-512。 - + Registers 寄存器 - + Copy value 复制值 - + Copy floating point value 复制浮点数 - + Copy Symbol Value 复制符号 - + Copy all registers 复制所有寄存器 - + Change view 切换视图 - + Change SIMD Register Display Mode 更改 SIMD 寄存器显示模式 - + Display ST(x) 显示 ST(x) - + Display x87rX 显示 x87rX - + Display MMX 显示 MMX - + Hexadecimal 十六进制 - + Float 单精度浮点数 - + Double 双精度浮点数 - + Signed Word 有符号Word - + Signed Dword 有符号Dword - + Signed Qword 有符号Qword - + Unsigned Word 无符号Word - + Unsigned Dword 无符号Dword - + Unsigned Qword 无符号Qword - + Hexadecimal Word 十六进制Word - + Hexadecimal Dword 十六进制Dword - + Hexadecimal Qword 十六进制Qword - + Always show maximum vector length 总是显示寄存器最大向量长度 - + Always show all AVX-512 registers 总是显示所有AVX-512寄存器 - + CF (Carry flag) CF (进位标志) - + PF (Parity flag) PF (奇偶标志) - + AF (Auxiliary Carry flag) AF (辅助进位标志) - + ZF (Zero flag) ZF (零标志) - + SF (Sign flag) SF (符号标志) - + TF (Trap flag) TF (陷阱标志) - + IF (Interrupt enable flag) IF (中断启用标志) - + DF (Direction flag) DF (方向标志) - + OF (Overflow flag) OF (溢出标志) - + Bit # 位 # - + Mask 掩码 - + Flag 标志位 - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. CF (第0位) : 进位标志 - 当算数运算在最高位产生了进位或借位时设置，否则清除。 该标志也表示无符号整数运算发生了溢出。该标志也用于高精度算术。 - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. PF (第2位) : 奇偶标志位 - 当结果的最低字节中1的个数为偶数时设置，否则清除。 - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. AF (第4位) : 辅助进位标志位 - 当算术运算在第3位产生了进位或者借位时设置，否则清除。 该标志位主要用于二进制编码的十进制(BCD码)算术。 - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. ZF (第6位) : 零标志位 - 当结果是零时设置，否则清除。 - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) SF (第7位) : 符号标志位 - 设置成结果的最高位，也就是带符号数中的符号位。（0表示正数，1表示负数） - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. @@ -16102,7 +16102,7 @@ condition for signed-integer (two’s complement) arithmetic. 该标志位表示了有符号数算术（补码算术）发生了溢出情况。 - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). @@ -16110,258 +16110,248 @@ to auto-decrement (to process strings from high addresses to low addresses). Cle 清除DF标志位将使得串操作指令自动递增（从低地址向高地址处理串）。 - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. TF (第8位) : 跟踪标志位 - 设置可启用单步运行模式来调试程序，清除则禁用单步运行模式。 - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. IF (第9位) : 中断允许标志 - 控制处理器对于可屏蔽中断的处理。 置位可使处理器响应可屏蔽中断；清除则禁止响应可屏蔽中断。 - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. 16位的x87控制字控制了x87 FPU的精度以及采用的舍入方法。它还包括了x87 FPU浮点运算异常掩码位。 - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. 16位的x87 FPU状态寄存器表明了x87 FPU的当前状态。 - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). 16位的标志字表明了8个x87浮点寄存器各自的内容。(每个浮点寄存器占两位) - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU 精度控制(PC)位(x87 FPU控制字的第8和9位)决定了x87 FPU浮点数计算采用的精度(64, 53 或 24位)。 - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. x87 FPU控制字的舍入控制(RC)位(第10和11位)控制了x87 FPU浮点运算的结果如何舍入。 - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. 无穷控制标志 (FPU控制字的第12位) 是为了兼容英特尔 287 数学协处理器而提供的；它在后来版本的x87 FPU协处理器和IA-32处理器中没有意义。 - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. 无效操作异常掩码(第0位)。当这个掩码位设置，它对应的异常就被屏蔽而不会发生。 - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. 操作数不正常掩码(第2位)。当这个掩码位设置，它对应的异常就不会发生。 - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. 浮点数被零除异常掩码(第3位)。当这个掩码位设置，它对应的异常就不会发生。 - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. 浮点数溢出掩码(第4位)。当这个掩码位设置，它对应的异常就不会发生。 - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. 浮点数可能发生下溢掩码(第5位)。当这个掩码位设置，它对应的异常就不会发生。 - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. 结果不精确掩码(第6位)。当这个掩码位设置，它对应的异常就不会发生。 - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. 忙碌标志(第15位) 表明了FPU当前正在运行指令(B=1) 还是空闲(B=0)。B标志(第15位) 仅仅是为了兼容8087而保留的。它反映了ES标志的内容。 - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. C%1状态码标志 (第%2位) 用来指示浮点数比较或运算的结果。 - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. 错误/异常汇总状态位(第7位)应在任何未屏蔽的异常位被设置时设置。 - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. 堆栈错误标志(x87 FPU状态字的第6位)表明x87 FPU浮点寄存器栈发生了溢出。 - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. 这个指针指向当前x87浮点处理器寄存器栈的栈顶，被保存于x87浮点处理器状态字的第11位至第13位。这个被称为TOP(top-of-stack)的指针是一个0到7的二进制数。 - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. 处理器会在存在一个或多个无效的算术操作数时报告无效操作异常(第0位)。 - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. 处理器会在运算一个不正常的算术操作数时报告操作数不正常异常(第2位)。 - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. 处理器会在把有限且非零的数除以零时报告浮点数被零除异常(第3位)。 - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. 处理器会在舍入结果超出目标寄存器的最大表示范围时报告浮点数溢出异常(第4位)。 - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. 处理器会在舍入结果中指数位非零但很小时报告可能存在浮点数下溢异常(第5位)。 - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. 结果不准确异常(第6位)会在结果无法在目标格式中被准确表示时发生。 - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. 32位的MXCSR寄存器保存了SIMD浮点运算的控制位与状态信息 - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. 第0位 (IE) : 无效操作标志；表示一个SIMD浮点异常是否曾发生过。 - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. 第1位 (DE) : 不正常标志；表示一个SIMD浮点异常是否曾发生过。 - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. 第2位 (ZE) : 被零除标志；表示一个SIMD浮点异常是否曾发生过。 - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. 第3位 (OE) : 溢出标志；表示一个SIMD浮点异常是否曾发生过。 - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. 第4位 (UE)：溢出标志；表示一个SIMD浮点异常是否曾发生过。 - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. 第5位 (PE)：精度低标志；表示一个SIMD浮点异常是否曾发生过。 - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 第7位 (IM) : 无效操作掩码。当这个掩码位设置，它对应的异常就不会触发。 - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 第8位 (DM) : 数值不正常掩码。当这个掩码位设置，它对应的异常就不会触发。 - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 第9位 (ZM) : 被零除掩码。当这个掩码位设置，它对应的异常就不会触发。 - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 第10位 (OM) : 堆栈上溢掩码。当这个掩码位设置，它对应的异常就不会触发。 - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 第11位 (UM) : 堆栈下溢掩码。当这个掩码位设置，它对应的异常就不会触发。 - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. 第12位 (PM) : 结果不精确掩码。当这个掩码位设置，它对应的异常就不会触发。 - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. MXCSR寄存器的第15位 (FZ) 可启用“清除为零”模式，来控制对被屏蔽的SIMD浮点数计算下溢情况的处理。 - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. 第6位 (DAZ) MXCSR寄存器可以启用“非正常数为零”模式，来控制处理器对于 非正常数字作为操作数时SIMD浮点运算的处理。 - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. 舍入控制位域[RC]位于MXCSR寄存器的第13和14位，它控制了SIMD浮点运算的结果如何舍入。 - + The value of GetLastError(). This value is stored in the TEB. GetLastError() 的值。该值保存于TEB。 - + The NTSTATUS in the LastStatusValue field of the TEB. 保存在TEB中LastStatusValue域的NTSTATUS值 - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. 当前线程的 TEB 可以以 GS (x64) 段寄存器的偏移地址访问。TEB 可以无需调用 Win32 API 就得到大量的有关进程的信息。 - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. 当前线程的 TEB 可以以 FS (x86) 段寄存器的偏移地址访问。TEB 可以无需调用 Win32 API 就得到大量的有关进程的信息。 - - Hide FPU - 隐藏FPU - - - - Show FPU - 显示FPU - - - - - - - + + + + + Unknown 未知 @@ -16369,82 +16359,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero 非零 - - + + Zero 零 - - + + Special 特殊 - - + + Empty 空 - + Toward Zero 向零 - + Toward Positive 向上 - + Toward Negative 向下 - - + + Round Near 向最近偶数 - + Truncate 截断 - + Round Up 向上舍入 - + Round Down 向下舍入 - + Real4 Real4 - + Not Used 未使用 - + Real8 Real8 - + Real10 Real10 @@ -16536,122 +16526,122 @@ The TEB can be used to get a lot of information on the process without calling W 运行脚本命令... - + &Open... 打开(&O)... - + &Paste 粘贴(&P) - + Load Script 载入脚本 - + Re&load Script 重新载入脚本(&L) - + &Unload Script 关闭脚本(&U) - + &Edit Script 编辑脚本(&E) - + Toggle &BP 切换断点(&B) - + Ru&n until selection 运行到选区(&N) - + &Step 单步(&S) - + &Run 运行(&R) - + &Abort 终止(&A) - + &Continue here... 从此处继续运行(&C)... - + Copy 复制 - + E&xecute Command... 运行命令(&X)... - + Error on line 发生错误于行 - + Script Error! 脚本错误！ - + Select script 选择脚本 - + Script files (*.txt *.scr);;All files (*.*) 脚本文件 (*.txt *.scr);;所有文件 (*.*) - + Error! 错误! - + File open failed! Please open the file yourself... 文件打开失败！请自己打开文件... - + Error setting script breakpoint! 设置脚本断点时发生错误！ - + Error executing command! 执行命令时出错！ - + Message 消息 - + Question 温馨提示 @@ -18308,7 +18298,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error 错误 @@ -18478,7 +18468,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording 关闭并删除运行跟踪文件 @@ -18498,88 +18488,88 @@ This could introduce unexpected behaviour to your debugging session... 在资源管理器中打开运行跟踪文件。 - + Open trace recording 打开运行跟踪 - + Trace recording 运行跟踪 - + Trace recordings (*.%1);;All files (*.*) 运行跟踪文件 (*.%1);;所有文件 (*.*) - + Are you sure you want to delete this recording? 您确定要删除这个运行跟踪文件吗？ - + Address not found in trace 在运行跟踪中找不到该地址 - - + + The address %1 is not found in trace. 在运行跟踪中找不到地址%1 - + Do you want to follow in CPU instead? 您想要在CPU视图中转到该地址吗？ - + Open File 打开文件 - + Text Files (*.txt) 文本文件 (*.txt) - + Could not open file 无法打开文件 - - + + Error! 错误! - + Selection not in a module... 选区不在一个模块中…… - + Selection not in a file... 选区不在一个文件中…… - + Constant 常数 - - - + + + %1 result(s) in %2ms %1 结果， 用时 %2毫秒 - + References 引用 @@ -19060,12 +19050,12 @@ This could introduce unexpected behaviour to your debugging session... 高亮 - + View XMM register 查看XMM寄存器 - + View MMX register 查看MMX寄存器 @@ -19198,100 +19188,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump 加载内存窗口 - + Disassembly 反汇编 - + Registers 寄存器 - - + + Dump 内存窗口 - - + + Stack 堆栈 - + InfoBox 信息栏 - + Error 错误 - + Error when opening trace recording (reason: %1) 打开运行跟踪时出错（原因：%1） - + Trace file is recorded for another debuggee 运行跟踪文件记录了另一个调试对象的历史。 - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" 当前文件的校验和与当前调试的程序不同。这可能是因为你打开了一个错误的文件。这个运行跟踪文件对应了“%1“。 - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. 启用运行跟踪内存窗口可能消耗大量内存(此运行跟踪最大需要 ~%1GiB)，并长时间冻结x64dbg。此功能仍然是实验性的，请报告您遇到的任何问题。 - + Warning 警告 - + Loaded trace dump in %1ms 载入跟踪内存用时%1毫秒 - + &Selected Address 选定的地址(&S) - + &Address: 地址(&A): - + &Old value: 旧值(&O)： - + &Value: 值(&V): - + &New value: 新值(&N)： - + &Constant: 常数(&C): diff --git a/x64dbg_zh_TW.ts b/x64dbg_zh_TW.ts index bbb5dca..cd2dd2d 100644 --- a/x64dbg_zh_TW.ts +++ b/x64dbg_zh_TW.ts @@ -92,7 +92,7 @@ 匯出表(&E) - + &Copy 複製(&C) @@ -3681,42 +3681,42 @@ Ctrl+G - + Disassembly 反組譯 - + Stack 堆疊 - + Registers 暫存器 - + Dump 資料視窗 - + Arguments 參數 - + Sidebar 側欄 - + InfoBox - + Graph 圖形 @@ -12488,7 +12488,7 @@ Do you want to continue rendering this graph? - + Address 位址 @@ -15672,484 +15672,474 @@ Do you want to apply these patches anyway? RegistersView - + AVX-512 isn't supported on this computer. - + Registers 暫存器 - + Copy value 複製數值 - + Copy floating point value 複製浮點數值 - + Copy Symbol Value 複製符號 - + Copy all registers 複製所有暫存器 - + Change view - + Change SIMD Register Display Mode 更改 SIMD 暫存器顯示模式 - + Display ST(x) 顯示 ST(x) - + Display x87rX 顯示 x87rX - + Display MMX 顯示 MMX - + Hexadecimal 十六進位 - + Float Float - + Double Double - + Signed Word 有符號Word - + Signed Dword 有符號Dword - + Signed Qword 有符號Qword - + Unsigned Word 無符號Word - + Unsigned Dword 無符號Dword - + Unsigned Qword 無符號Qword - + Hexadecimal Word 十六進位Word - + Hexadecimal Dword 十六進位Dword - + Hexadecimal Qword 十六進位Qword - + Always show maximum vector length - + Always show all AVX-512 registers - + CF (Carry flag) - + PF (Parity flag) - + AF (Auxiliary Carry flag) - + ZF (Zero flag) - + SF (Sign flag) - + TF (Trap flag) - + IF (Interrupt enable flag) - + DF (Direction flag) - + OF (Overflow flag) - + Bit # - + Mask - + Flag - + CF (bit 0) : Carry flag - Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic. - + PF (bit 2) : Parity flag - Set if the least-significant byte of the result contains an even number of 1 bits; cleared otherwise. - + AF (bit 4) : Auxiliary Carry flag - Set if an arithmetic operation generates a carry or a borrow out of bit 3 of the result; cleared otherwise. This flag is used in binary-coded decimal (BCD) arithmetic. - + ZF (bit 6) : Zero flag - Set if the result is zero; cleared otherwise. - + SF (bit 7) : Sign flag - Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.) - + OF (bit 11) : Overflow flag - Set if the integer result is too large a positive number or too small a negative number (excluding the sign-bit) to fit in the destination operand; cleared otherwise. This flag indicates an overflow condition for signed-integer (two’s complement) arithmetic. - + DF (bit 10) : The direction flag controls string instructions (MOVS, CMPS, SCAS, LODS, and STOS). Setting the DF flag causes the string instructions to auto-decrement (to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses). - + TF (bit 8) : Trap flag - Set to enable single-step mode for debugging; clear to disable single-step mode. - + IF (bit 9) : Interrupt enable flag - Controls the response of the processor to maskable interrupt requests. Set to respond to maskable interrupts; cleared to inhibit maskable interrupts. - + The 16-bit x87 FPU control word controls the precision of the x87 FPU and rounding method used. It also contains the x87 FPU floating-point exception mask bits. - + The 16-bit x87 FPU status register indicates the current state of the x87 FPU. - + The 16-bit tag word indicates the contents of each the 8 registers in the x87 FPU data-register stack (one 2-bit tag per register). - + The precision-control (PC) field (bits 8 and 9 of the x87 FPU control word) determines the precision (64, 53, or 24 bits) of floating-point calculations made by the x87 FPU - + The rounding-control (RC) field of the x87 FPU control register (bits 10 and 11) controls how the results of x87 FPU floating-point instructions are rounded. - + The infinity control flag (bit 12 of the x87 FPU control word) is provided for compatibility with the Intel 287 Math Coprocessor; it is not meaningful for later version x87 FPU coprocessors or IA-32 processors. - + The invalid operation exception mask (bit 0). When the mask bit is set, its corresponding exception is blocked from being generated. - + The denormal-operand exception mask (bit 2). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point divide-by-zero exception mask (bit 3). When the mask bit is set, its corresponding exception is blocked from being generated. - + The floating-point numeric overflow exception mask (bit 4). When the mask bit is set, its corresponding exception is blocked from being generated. - + The potential floating-point numeric underflow condition mask (bit 5). When the mask bit is set, its corresponding exception is blocked from being generated. - + The inexact-result/precision exception mask (bit 6). When the mask bit is set, its corresponding exception is blocked from being generated. - + The busy flag (bit 15) indicates if the FPU is busy (B=1) while executing an instruction, or is idle (B=0). The B-bit (bit 15) is included for 8087 compatibility only. It reflects the contents of the ES flag. - - - - + + + + The C%1 condition code flag (bit %2) is used to indicate the results of floating-point comparison and arithmetic operations. - + The error/exception summary status flag (bit 7) is set when any of the unmasked exception flags are set. - + The stack fault flag (bit 6 of the x87 FPU status word) indicates that stack overflow or stack underflow has occurred with data in the x87 FPU data register stack. - + A pointer to the x87 FPU data register that is currently at the top of the x87 FPU register stack is contained in bits 11 through 13 of the x87 FPU status word. This pointer, which is commonly referred to as TOP (for top-of-stack), is a binary value from 0 to 7. - + The processor reports an invalid operation exception (bit 0) in response to one or more invalid arithmetic operands. - + The processor reports the denormal-operand exception (bit 2) if an arithmetic instruction attempts to operate on a denormal operand. - + The processor reports the floating-point divide-by-zero exception (bit 3) whenever an instruction attempts to divide a finite non-zero operand by 0. - + The processor reports a floating-point numeric overflow exception (bit 4) whenever the rounded result of an instruction exceeds the largest allowable finite value that will fit into the destination operand. - + The processor detects a potential floating-point numeric underflow condition (bit 5) whenever the result of rounding with unbounded exponent is non-zero and tiny. - + The inexact-result/precision exception (bit 6) occurs if the result of an operation is not exactly representable in the destination format. - + The 32-bit MXCSR register contains control and status information for SIMD floating-point operations. - + Bit 0 (IE) : Invalid Operation Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 1 (DE) : Denormal Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 2 (ZE) : Divide-by-Zero Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 3 (OE) : Overflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 4 (UE) : Underflow Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 5 (PE) : Precision Flag; indicate whether a SIMD floating-point exception has been detected. - + Bit 7 (IM) : Invalid Operation Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 8 (DM) : Denormal Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 9 (ZM) : Divide-by-Zero Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 10 (OM) : Overflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 11 (UM) : Underflow Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 12 (PM) : Precision Mask. When the mask bit is set, its corresponding exception is blocked from being generated. - + Bit 15 (FZ) of the MXCSR register enables the flush-to-zero mode, which controls the masked response to a SIMD floating-point underflow condition. - + Bit 6 (DAZ) of the MXCSR register enables the denormals-are-zeros mode, which controls the processor’s response to a SIMD floating-point denormal operand condition. - + Bits 13 and 14 of the MXCSR register (the rounding control [RC] field) control how the results of SIMD floating-point instructions are rounded. - + The value of GetLastError(). This value is stored in the TEB. - + The NTSTATUS in the LastStatusValue field of the TEB. - + The TEB of the current thread can be accessed as an offset of segment register GS (x64). The TEB can be used to get a lot of information on the process without calling Win32 API. - + The TEB of the current thread can be accessed as an offset of segment register FS (x86). The TEB can be used to get a lot of information on the process without calling Win32 API. - - Hide FPU - 隱藏 FPU - - - - Show FPU - 顯示 FPU - - - - - - - + + + + + Unknown 未知 @@ -16157,82 +16147,82 @@ The TEB can be used to get a lot of information on the process without calling W RegistersView_ConstantsOfRegisters - - + + Nonzero 非零 - - + + Zero 零 - - + + Special 特殊 - - + + Empty 空 - + Toward Zero 向零 - + Toward Positive 向上 - + Toward Negative 向下 - - + + Round Near 向最近偶數 - + Truncate 截斷 - + Round Up 向上舍入 - + Round Down 向下舍入 - + Real4 - + Not Used 未使用 - + Real8 - + Real10 @@ -16324,122 +16314,122 @@ The TEB can be used to get a lot of information on the process without calling W 執行腳本命令 - + &Open... 開啟(&O)... - + &Paste 貼上(&P) - + Load Script 載入腳本 - + Re&load Script 重新載入腳本(&L) - + &Unload Script 關閉腳本(&U) - + &Edit Script 編輯腳本(&E) - + Toggle &BP 切換 &BP - + Ru&n until selection 執行到選取處(&N) - + &Step 單步(&S) - + &Run 執行(&R) - + &Abort 中止(&A) - + &Continue here... 從此處繼續(&C) - + Copy 複製 - + E&xecute Command... 執行命令(&X) - + Error on line 發現錯誤于行 - + Script Error! 脚本錯誤！ - + Select script 選擇腳本 - + Script files (*.txt *.scr);;All files (*.*) 腳本檔 (*.txt *.scr);;所有檔 (*.*) - + Error! 錯誤！ - + File open failed! Please open the file yourself... - + Error setting script breakpoint! - + Error executing command! 執行命令時發生錯誤！ - + Message 訊息 - + Question 問題 @@ -18094,7 +18084,7 @@ This could introduce unexpected behaviour to your debugging session... - + Error 錯誤 @@ -18263,7 +18253,7 @@ This could introduce unexpected behaviour to your debugging session... - + Delete recording @@ -18283,87 +18273,87 @@ This could introduce unexpected behaviour to your debugging session... - + Open trace recording - + Trace recording - + Trace recordings (*.%1);;All files (*.*) - + Are you sure you want to delete this recording? - + Address not found in trace - - + + The address %1 is not found in trace. - + Do you want to follow in CPU instead? - + Open File 開啟檔案 - + Text Files (*.txt) 文字檔案 (*.txt) - + Could not open file 無法開啟檔案 - - + + Error! 錯誤！ - + Selection not in a module... 選區不在模組中…… - + Selection not in a file... 選區不在檔中…… - + Constant 常數 - - - + + + %1 result(s) in %2ms - + References 引用 @@ -18843,12 +18833,12 @@ This could introduce unexpected behaviour to your debugging session... 突顯 - + View XMM register 查看 XMM 暫存器 - + View MMX register 查看 MMX 暫存器 @@ -18981,100 +18971,100 @@ This could introduce unexpected behaviour to your debugging session... - + Load dump - + Disassembly 反組譯 - + Registers 暫存器 - - + + Dump 資料視窗 - - + + Stack 堆疊 - + InfoBox - + Error 錯誤 - + Error when opening trace recording (reason: %1) - + Trace file is recorded for another debuggee - + Checksum is different for current trace file and the debugee. This probably means you have opened a wrong trace file. This trace file is recorded for "%1" - + Enabling the trace dump can consume a lot of memory (max ~%1GiB for this trace) and freeze x64dbg for prolonged periods of time. This feature is still experimental, please report any bugs you encounter. - + Warning 警告 - + Loaded trace dump in %1ms - + &Selected Address 選定的位址(&S) - + &Address: 位址(&A): - + &Old value: - + &Value: 值(&V): - + &New value: - + &Constant: 常數(&C):