x64dbg
/
TitanEngine
mirror of https://github.com/x64dbg/TitanEngine
1
0
Fork 0
Code Releases Activity

las fpu changes

This commit is contained in:
dreg_fr33project 2014-10-27 08:03:11 +01:00
parent 1ef361ba10
commit 650bb5a46b
3 changed files with 269 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
SDK/C/TitanEngine.h
View File

@ -253,6 +253,51 @@
#define UE_SEG_DS 40
#define UE_SEG_CS 41
#define UE_SEG_SS 42
#define UE_x87_r0 43
#define UE_x87_r1 44
#define UE_x87_r2 45
#define UE_x87_r3 46
#define UE_x87_r4 47
#define UE_x87_r5 48
#define UE_x87_r6 49
#define UE_x87_r7 50
#define UE_X87_STATUSWORD 51
#define UE_X87_CONTROLWORD 52
#define UE_X87_TAGWORD 53
#define UE_MXCSR 54
#define UE_MMX0 55
#define UE_MMX1 56
#define UE_MMX2 57
#define UE_MMX3 58
#define UE_MMX4 59
#define UE_MMX5 60
#define UE_MMX6 61
#define UE_MMX7 62
#define UE_XMM0 63
#define UE_XMM1 64
#define UE_XMM2 65
#define UE_XMM3 66
#define UE_XMM4 67
#define UE_XMM5 68
#define UE_XMM6 69
#define UE_XMM7 70
#define UE_XMM8 71
#define UE_XMM9 72
#define UE_XMM10 73
#define UE_XMM11 74
#define UE_XMM12 75
#define UE_XMM13 76
#define UE_XMM14 77
#define UE_XMM15 78
#define UE_x87_ST0 79
#define UE_x87_ST1 80
#define UE_x87_ST2 81
#define UE_x87_ST3 82
#define UE_x87_ST4 83
#define UE_x87_ST5 84
#define UE_x87_ST6 85
#define UE_x87_ST7 86
#ifndef CONTEXT_EXTENDED_REGISTERS
#define CONTEXT_EXTENDED_REGISTERS 0

249
TitanEngine/TitanEngine.Debugger.Context.cpp
View File

@ -293,239 +293,254 @@ __declspec(dllexport) bool TITCALL GetFullContextDataEx(HANDLE hActiveThread, TI
__declspec(dllexport) ULONG_PTR TITCALL GetContextDataEx(HANDLE hActiveThread, DWORD IndexOfRegister)
{
ULONG_PTR retValue = 0;
CONTEXT DBGContext;
memset(&DBGContext, 0, sizeof(CONTEXT));
DBGContext.ContextFlags = CONTEXT_ALL;
TITAN_ENGINE_CONTEXT_t titcontext;
if(SuspendThread(hActiveThread) == (DWORD) - 1)
return retValue;
return false;
if(!GetThreadContext(hActiveThread, &DBGContext))
memset(&titcontext, 0, sizeof(titcontext));
if(! _GetFullContextDataEx(hActiveThread, & titcontext))
{
ResumeThread(hActiveThread);
return retValue;
return false;
}
ResumeThread(hActiveThread);
#ifdef _WIN64 //x64
if(IndexOfRegister == UE_EAX)
{
retValue = DBGContext.Rax & 0xFFFFFFFF;
retValue = titcontext.cax & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_EBX)
{
retValue = DBGContext.Rbx & 0xFFFFFFFF;
retValue = titcontext.cbx & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_ECX)
{
retValue = DBGContext.Rcx & 0xFFFFFFFF;
retValue = titcontext.ccx & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_EDX)
{
retValue = DBGContext.Rdx & 0xFFFFFFFF;
retValue = titcontext.cdx & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_EDI)
{
retValue = DBGContext.Rdi & 0xFFFFFFFF;
retValue = titcontext.cdi & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_ESI)
{
retValue = DBGContext.Rsi & 0xFFFFFFFF;
retValue = titcontext.csi & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_EBP)
{
retValue = DBGContext.Rbp & 0xFFFFFFFF;
retValue = titcontext.cbp & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_ESP)
{
retValue = DBGContext.Rsp & 0xFFFFFFFF;
retValue = titcontext.csp & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_EIP)
{
retValue = DBGContext.Rip & 0xFFFFFFFF;
retValue = titcontext.cip & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_EFLAGS)
{
retValue = DBGContext.EFlags & 0xFFFFFFFF;
retValue = titcontext.eflags & 0xFFFFFFFF;
}
else if(IndexOfRegister == UE_RAX)
{
retValue = DBGContext.Rax;
retValue = titcontext.cax;
}
else if(IndexOfRegister == UE_RBX)
{
retValue = DBGContext.Rbx;
retValue = titcontext.cbx;
}
else if(IndexOfRegister == UE_RCX)
{
retValue = DBGContext.Rcx;
retValue = titcontext.ccx;
}
else if(IndexOfRegister == UE_RDX)
{
retValue = DBGContext.Rdx;
retValue = titcontext.cdx;
}
else if(IndexOfRegister == UE_RDI)
{
retValue = DBGContext.Rdi;
retValue = titcontext.cdi;
}
else if(IndexOfRegister == UE_RSI)
{
retValue = DBGContext.Rsi;
retValue = titcontext.csi;
}
else if(IndexOfRegister == UE_RBP)
{
retValue = DBGContext.Rbp;
retValue = titcontext.cbp;
}
else if(IndexOfRegister == UE_RSP)
{
retValue = DBGContext.Rsp;
retValue = titcontext.csp;
}
else if(IndexOfRegister == UE_RIP)
{
retValue = DBGContext.Rip;
retValue = titcontext.cip;
}
else if(IndexOfRegister == UE_RFLAGS)
{
retValue = DBGContext.EFlags;
retValue = titcontext.eflags;
}
else if(IndexOfRegister == UE_R8)
{
retValue = DBGContext.R8;
retValue = titcontext.r8;
}
else if(IndexOfRegister == UE_R9)
{
retValue = DBGContext.R9;
retValue = titcontext.r9;
}
else if(IndexOfRegister == UE_R10)
{
retValue = DBGContext.R10;
retValue = titcontext.r10;
}
else if(IndexOfRegister == UE_R11)
{
retValue = DBGContext.R11;
retValue = titcontext.r11;
}
else if(IndexOfRegister == UE_R12)
{
retValue = DBGContext.R12;
retValue = titcontext.r12;
}
else if(IndexOfRegister == UE_R13)
{
retValue = DBGContext.R13;
retValue = titcontext.r13;
}
else if(IndexOfRegister == UE_R14)
{
retValue = DBGContext.R14;
retValue = titcontext.r14;
}
else if(IndexOfRegister == UE_R15)
{
retValue = DBGContext.R15;
retValue = titcontext.r15;
}
else if(IndexOfRegister == UE_CIP)
{
retValue = DBGContext.Rip;
retValue = titcontext.cip;
}
else if(IndexOfRegister == UE_CSP)
{
retValue = DBGContext.Rsp;
retValue = titcontext.csp;
}
#else //x86
if(IndexOfRegister == UE_EAX)
{
retValue = DBGContext.Eax;
retValue = titcontext.cax;
}
else if(IndexOfRegister == UE_EBX)
{
retValue = DBGContext.Ebx;
retValue = titcontext.cbx;
}
else if(IndexOfRegister == UE_ECX)
{
retValue = DBGContext.Ecx;
retValue = titcontext.ccx;
}
else if(IndexOfRegister == UE_EDX)
{
retValue = DBGContext.Edx;
retValue = titcontext.cdx;
}
else if(IndexOfRegister == UE_EDI)
{
retValue = DBGContext.Edi;
retValue = titcontext.cdi;
}
else if(IndexOfRegister == UE_ESI)
{
retValue = DBGContext.Esi;
retValue = titcontext.csi;
}
else if(IndexOfRegister == UE_EBP)
{
retValue = DBGContext.Ebp;
retValue = titcontext.cbp;
}
else if(IndexOfRegister == UE_ESP)
{
retValue = DBGContext.Esp;
retValue = titcontext.csp;
}
else if(IndexOfRegister == UE_EIP)
{
retValue = DBGContext.Eip;
retValue = titcontext.cip;
}
else if(IndexOfRegister == UE_CIP)
{
retValue = DBGContext.Eip;
retValue = titcontext.cip;
}
else if(IndexOfRegister == UE_CSP)
{
retValue = DBGContext.Esp;
retValue = titcontext.csp;
}
#endif
else if(IndexOfRegister == UE_X87_STATUSWORD)
{
retValue = titcontext.x87fpu.StatusWord;
}
else if(IndexOfRegister == UE_X87_CONTROLWORD)
{
retValue = titcontext.x87fpu.ControlWord;
}
else if(IndexOfRegister == UE_X87_TAGWORD)
{
retValue = titcontext.x87fpu.TagWord;
}
else if(IndexOfRegister == UE_MXCSR)
{
retValue = titcontext.MxCsr;
}
else if(IndexOfRegister == UE_EFLAGS)
{
retValue = DBGContext.EFlags;
retValue = titcontext.eflags;
}
else if(IndexOfRegister == UE_DR0)
{
retValue = DBGContext.Dr0;
retValue = titcontext.dr0;
}
else if(IndexOfRegister == UE_DR1)
{
retValue = DBGContext.Dr1;
retValue = titcontext.dr1;
}
else if(IndexOfRegister == UE_DR2)
{
retValue = DBGContext.Dr2;
retValue = titcontext.dr2;
}
else if(IndexOfRegister == UE_DR3)
{
retValue = DBGContext.Dr3;
retValue = titcontext.dr3;
}
else if(IndexOfRegister == UE_DR6)
{
retValue = DBGContext.Dr6;
retValue = titcontext.dr6;
}
else if(IndexOfRegister == UE_DR7)
{
retValue = DBGContext.Dr7;
retValue = titcontext.dr7;
}
else if(IndexOfRegister == UE_SEG_GS)
{
retValue = DBGContext.SegGs;
retValue = titcontext.gs;
}
else if(IndexOfRegister == UE_SEG_FS)
{
retValue = DBGContext.SegFs;
retValue = titcontext.fs;
}
else if(IndexOfRegister == UE_SEG_ES)
{
retValue = DBGContext.SegEs;
retValue = titcontext.es;
}
else if(IndexOfRegister == UE_SEG_DS)
{
retValue = DBGContext.SegDs;
retValue = titcontext.ds;
}
else if(IndexOfRegister == UE_SEG_CS)
{
retValue = DBGContext.SegCs;
retValue = titcontext.cs;
}
else if(IndexOfRegister == UE_SEG_SS)
{
retValue = DBGContext.SegSs;
retValue = titcontext.ss;
}
return retValue;
}
@ -715,6 +730,38 @@ __declspec(dllexport) bool TITCALL SetContextDataEx(HANDLE hActiveThread, DWORD
{
titcontext.csp = NewRegisterValue;
}
else if(IndexOfRegister == UE_XMM8)
{
memcpy(& (titcontext.XmmRegisters[8]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM9)
{
memcpy(& (titcontext.XmmRegisters[9]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM10)
{
memcpy(& (titcontext.XmmRegisters[10]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM11)
{
memcpy(& (titcontext.XmmRegisters[11]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM12)
{
memcpy(& (titcontext.XmmRegisters[12]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM13)
{
memcpy(& (titcontext.XmmRegisters[13]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM14)
{
memcpy(& (titcontext.XmmRegisters[14]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM15)
{
memcpy(& (titcontext.XmmRegisters[15]), (void*) NewRegisterValue, 16);
}
#else //x86
if(IndexOfRegister == UE_EAX)
{
@ -813,6 +860,86 @@ __declspec(dllexport) bool TITCALL SetContextDataEx(HANDLE hActiveThread, DWORD
{
titcontext.ss = (unsigned short)NewRegisterValue;
}
else if(IndexOfRegister == UE_X87_STATUSWORD)
{
titcontext.x87fpu.StatusWord = (unsigned short)NewRegisterValue;
}
else if(IndexOfRegister == UE_X87_CONTROLWORD)
{
titcontext.x87fpu.ControlWord = (unsigned short)NewRegisterValue;
}
else if(IndexOfRegister == UE_X87_TAGWORD)
{
titcontext.x87fpu.TagWord = (unsigned short)NewRegisterValue;
}
else if(IndexOfRegister == UE_MXCSR)
{
titcontext.MxCsr = (unsigned short)NewRegisterValue;
}
else if(IndexOfRegister == UE_XMM0)
{
memcpy(& (titcontext.XmmRegisters[0]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM1)
{
memcpy(& (titcontext.XmmRegisters[1]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM2)
{
memcpy(& (titcontext.XmmRegisters[2]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM3)
{
memcpy(& (titcontext.XmmRegisters[3]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM4)
{
memcpy(& (titcontext.XmmRegisters[4]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM5)
{
memcpy(& (titcontext.XmmRegisters[5]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM6)
{
memcpy(& (titcontext.XmmRegisters[6]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_XMM7)
{
memcpy(& (titcontext.XmmRegisters[7]), (void*) NewRegisterValue, 16);
}
else if(IndexOfRegister == UE_MMX0)
{
memcpy(&(titcontext.RegisterArea[0 * 10]), (void*) NewRegisterValue, 10);
}
else if(IndexOfRegister == UE_MMX1)
{
memcpy(&(titcontext.RegisterArea[1 * 10]), (void*) NewRegisterValue, 10);
}
else if(IndexOfRegister == UE_MMX2)
{
memcpy(&(titcontext.RegisterArea[2 * 10]), (void*) NewRegisterValue, 10);
}
else if(IndexOfRegister == UE_MMX3)
{
memcpy(&(titcontext.RegisterArea[3 * 10]), (void*) NewRegisterValue, 10);
}
else if(IndexOfRegister == UE_MMX4)
{
memcpy(&(titcontext.RegisterArea[4 * 10]), (void*) NewRegisterValue, 10);
}
else if(IndexOfRegister == UE_MMX5)
{
memcpy(&(titcontext.RegisterArea[5 * 10]), (void*) NewRegisterValue, 10);
}
else if(IndexOfRegister == UE_MMX6)
{
memcpy(&(titcontext.RegisterArea[0 * 10]), (void*) NewRegisterValue, 10);
}
else if(IndexOfRegister == UE_MMX7)
{
memcpy(&(titcontext.RegisterArea[0 * 10]), (void*) NewRegisterValue, 10);
}
else
{
ResumeThread(hActiveThread);

37
TitanEngine/stdafx.h
View File

@ -619,7 +619,6 @@ typedef struct
#define UE_SEG_DS 40
#define UE_SEG_CS 41
#define UE_SEG_SS 42
#define UE_x87_r0 43
#define UE_x87_r1 44
#define UE_x87_r2 45
@ -628,6 +627,42 @@ typedef struct
#define UE_x87_r5 48
#define UE_x87_r6 49
#define UE_x87_r7 50
#define UE_X87_STATUSWORD 51
#define UE_X87_CONTROLWORD 52
#define UE_X87_TAGWORD 53
#define UE_MXCSR 54
#define UE_MMX0 55
#define UE_MMX1 56
#define UE_MMX2 57
#define UE_MMX3 58
#define UE_MMX4 59
#define UE_MMX5 60
#define UE_MMX6 61
#define UE_MMX7 62
#define UE_XMM0 63
#define UE_XMM1 64
#define UE_XMM2 65
#define UE_XMM3 66
#define UE_XMM4 67
#define UE_XMM5 68
#define UE_XMM6 69
#define UE_XMM7 70
#define UE_XMM8 71
#define UE_XMM9 72
#define UE_XMM10 73
#define UE_XMM11 74
#define UE_XMM12 75
#define UE_XMM13 76
#define UE_XMM14 77
#define UE_XMM15 78
#define UE_x87_ST0 79
#define UE_x87_ST1 80
#define UE_x87_ST2 81
#define UE_x87_ST3 82
#define UE_x87_ST4 83
#define UE_x87_ST5 84
#define UE_x87_ST6 85
#define UE_x87_ST7 86
typedef struct
{